WO1998049812A1 - Circuit de modulation et terminal radio - Google Patents

Circuit de modulation et terminal radio Download PDF

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Publication number
WO1998049812A1
WO1998049812A1 PCT/JP1997/001455 JP9701455W WO9849812A1 WO 1998049812 A1 WO1998049812 A1 WO 1998049812A1 JP 9701455 W JP9701455 W JP 9701455W WO 9849812 A1 WO9849812 A1 WO 9849812A1
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WIPO (PCT)
Prior art keywords
data
signal
circuit
signal point
function
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PCT/JP1997/001455
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English (en)
Japanese (ja)
Inventor
Katsuhiro Furukawa
Yoichiro Kobayashi
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Hitachi, Ltd.
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Publication date
Application filed by Hitachi, Ltd. filed Critical Hitachi, Ltd.
Priority to PCT/JP1997/001455 priority Critical patent/WO1998049812A1/fr
Publication of WO1998049812A1 publication Critical patent/WO1998049812A1/fr

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03828Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
    • H04L25/03834Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using pulse shaping

Definitions

  • the present invention relates to a modulation circuit used for mobile communication and the like, for example, a multi-level modulation circuit such as GMSK (Gaussian Filtered Minimum Shift Keying; QPSK (Quadrature Phase Shift Keying)), for example.
  • GMSK Gausian Filtered Minimum Shift Keying
  • QPSK Quadrature Phase Shift Keying
  • the present invention relates to a technology that is effective when applied to a wireless terminal device or a transmission terminal device such as a mobile phone or an automobile phone.
  • the multi-level modulation scheme used for mobile communication or transmission terminal equipment is a modulation scheme that uses two or more types of transmission waveforms so that more information can be transmitted with a limited transmission bandwidth.
  • a multi-level modulation scheme such as quadrature phase modulation
  • quadrature phase modulation when considering a signal point layout diagram in which the in-phase and quadrature components of a modulated signal are displayed in a quadrature coordinate system, the signal points transition by 7 ⁇ / 2, and the digit before modulation is The transition direction of the signal point is determined according to the value of the symbol de as the evening.
  • this state is equivalent to a state in which the edge of a rectangular pulse is smoothed by low-pass fill.
  • a Gaussian filter having a Gaussian distribution characteristic can be used as such a mouth-to-pass filter.
  • GMSK is one such modulation scheme.
  • GMSK is based on MSK (Minimum Shift Keying), and MSK is a modulation method that reduces the error rate of FSK (Frequency Shift Keying) with continuous phase. It should be noted that if the phase is continued at the signal point, neither frequency modulation nor phase modulation is essentially unchanged. .
  • a method of generating a spanned waveform with a digital circuit, converting the output to an analog signal with a D / A converter, and driving the quadrature converter with the converted signal can be adopted.
  • the digitizing circuit performs a fill calculation corresponding to a Gaussian fill based on transmission data, and generates baseband waveform data forming in-phase and quadrature components using the calculation result.
  • Gaussian filter arithmetic circuit requires delay elements that are cascaded in multiple stages, a latch that holds the output of each delay element, and a multi-input adder that takes the sum of the outputs of each latch.
  • This Gaussian filter arithmetic circuit must operate at a very high frequency at an extremely high frequency compared to one symbol period.
  • the present inventors have studied a modulation circuit that can generate baseband waveform data for multi-level modulation on a small circuit scale.
  • the inventor has previously provided a data sequence for generating baseband waveform data in a memory, and selects and uses the data of the sequence according to the data supplied to the modulation circuit. Was considered.
  • Japanese Patent Application Laid-Open No. 5-327800 there is Japanese Patent Application Laid-Open No. 5-327800.
  • An object of the present invention is to provide a modulation circuit that can generate baseband waveform data for multilevel modulation on a small circuit scale.
  • Another object of the present invention is to prepare a data sequence for generating baseband waveform data in a memory in advance and, when making it possible to generate a baseband waveform using the data sequence, a type of data sequence to be held in the memory.
  • the purpose is to minimize the amount of data.
  • Still another object of the present invention is to provide a wireless terminal device or a transmission terminal device that can contribute to miniaturization.
  • Still another object of the present invention is to provide a wireless terminal device that can contribute to low power consumption by reducing the circuit scale.
  • a modulation circuit obtains a past signal history of digital data supplied in time series by past data until the present data.
  • the transition of the signal point indicated by the acquired history is obtained from the current data.
  • the position of the signal point acquired from the signal history will be any one of a plurality of predetermined phase positions in the signal point arrangement diagram. For example, in the case of GMSK modulation, the signal point is located at any one of 0, ⁇ / 2, ⁇ , and 37 ⁇ / 2.
  • the transition direction of the signal point position acquired in this way is clockwise or counterclockwise depending on the current data value or its sign.
  • the waveform of one symbol interval (unit interval indicating 1 or 0) in the transition direction specified by the current data is as follows:
  • the discrete filter response waveform data is set so that the phase change rate at the signal point is continuous (in other words, the phase is not changed sharply at the signal point in order to narrow the bandwidth of the modulated signal).
  • a plurality of baseband waveforms for multi-level modulation can be formed for each symbol section of the current data so that the phase does not change abruptly at the signal point. Therefore, it is not necessary to input the digital data in a time series to a filter circuit having a large circuit scale such as a Gaussian filter and perform an operation. That is, the physical circuit scale of the modulation circuit can be reduced.
  • the baseband waveform data is represented by a function equivalent to a sin function and a cos function, and if the phase change of the function has a Gaussian characteristic, the signal point arrangement It is not necessary to have the discrete filter response waveform data described above for all sections in the figure.
  • a memory or the like may have filter response waveform data having a function format corresponding to a sin or cos function on behalf of one section of a signal point.
  • the filter response waveform data held in the memory is selectively negative-numbered based on the signal point position specified by the past history and the transition direction specified by the current data.
  • the modulation circuit shifts the signal point by 2 ⁇ / ⁇ in the circumferential direction every one symbol section of the digital signal, and outputs one signal.
  • a transition waveform from a point to an adjacent signal point is interpolated using a discrete filter response waveform to form a plurality of baseband waveforms for multi-level modulation.
  • a signal point is a signal that represents the components of a signal in a rectangular coordinate system. This is a multi-level signal position that can be taken sequentially by signals in the signal point arrangement diagram.
  • a modulating circuit configured to input the digit data in a time-series manner, and to calculate a most recent past signal point position with respect to the present based on the past input digit data with respect to the current input digit data;
  • the signal point position calculated by the calculation means is set as an initial position, and the transition direction of the signal point position with respect to this initial position is determined based on the current input digit data, and a plurality of sequences corresponding to the initial position and the transition direction are determined.
  • Baseband waveform generating means for forming a plurality of baseband waveform data for multi-level modulation corresponding to one symbol section of the current input digital data by using the fillband response waveform; and the baseband Storage means for storing the filter response waveform data output to the waveform generation means.
  • the filter response waveform data data having a characteristic that a change in phase near the signal point is reduced can be adopted. Further, as the filter response waveform data, a data having a Gaussian distribution in a phase change in one symbol section from a signal point to another signal point can be adopted.
  • the arithmetic means may be a circuit for obtaining a value equal to the remainder obtained by dividing the sum of the past input digit data by m as the most recent past signal point position with respect to the present.
  • the modulation circuit converts a plurality of baseband waveform data output from the baseband waveform generation means into analog signals, and each of the converted signals has a fixed carrier frequency and a different phase.
  • An analog section that multiplies the obtained carrier frequency signals and outputs the sum of the multiplication results as an analog modulation signal can be further provided.
  • the wireless terminal device or the transmission terminal device may include: the modulation circuit; an analog modulation signal output from the analog unit included in the modulation circuit; a high-frequency amplification and output from an antenna; and a signal input from the antenna.
  • a demodulation circuit that demodulates the signal detected by the high frequency unit, and generates a data to be supplied to the modulation circuit based on an input from an input circuit.
  • an arithmetic control unit for performing processing for outputting the output data to the output circuit.
  • the modulation circuit of the present invention according to a specific mode when applied to quaternary modulation such as GMSK modulation shifts the signal point by 7 ⁇ / 2 in the circumferential direction for each symbol section of the digit data,
  • the transition waveform from one signal point to the next signal point is interpolated using discrete fill response waveform data to form each of the spanned waveform data for the in-phase component and the quadrature component.
  • the modulation circuit inputs the digital data in a time-series manner, and calculates the latest past signal point position with respect to the present based on the past input digital data with respect to the current input digital data.
  • the signal point position calculated by the calculating means is used as an initial position, and the transition direction of the signal point position with respect to this initial position is determined based on the current input digit data.
  • a base-spanned waveform that forms the baseband waveform data for the in-phase component and the quadrature component corresponding to one symbol section of the current input digital data using the corresponding multiple series of fill response waveform data.
  • the arithmetic means may be a circuit that obtains the remainder obtained by dividing the sum of the past input digits and the past by four as the most recent past signal point position with respect to the present.
  • the storage means has an area for storing m discrete data of a function corresponding to the sin function and m discrete data of a function corresponding to the cos function, respectively. For each one symbol period, m discrete data of a function corresponding to the sin function and m discrete data of a function corresponding to the cos function are sequentially output in parallel from the region. Things. Further, the baseband waveform generating means outputs m discrete data of a function corresponding to the sin function and m discrete data of a function corresponding to the cos function output from the storage means.
  • a discrete circuit that selectively converts the data into a negative number, and m discrete data of a function corresponding to the sin function and m discrete data of a function corresponding to the cos function output through the conversion circuit.
  • a selection circuit for selecting which one is to be used as the baseband waveform data of the in-phase component and the other is used as the baseband waveform data of the quadrature component.
  • a conversion operation and a selection operation corresponding to the initial position and the transition direction are performed to form continuous baseband waveforms for the in-phase component and the quadrature component at signal points.
  • the modulation circuit further converts each of the in-phase component and quadrature-component base-span waveform data output from the baseband waveform generation means into an analog signal, and converts the converted signals into fixed signals. It is possible to provide an analog section for multiplying carrier frequency signals having carrier frequencies and having a phase difference of 7 ⁇ / 2 and outputting the sum of the respective product results as an analog modulation signal.
  • the modulation circuit according to this specific embodiment can also constitute a wireless terminal device in the same manner as described above, and includes the modulation circuit, the high frequency unit, the demodulation circuit, and the arithmetic control unit.
  • FIG. 2 is a signal point arrangement diagram in GMSK modulation.
  • FIG. 3 shows the in-phase component (Ii) corresponding to the positive (negative) (+1 or -1) of the phase transition for the current data every 0, 1, 2, and 3 of the signal history ( ⁇ , hii) in the past.
  • FIG. 4 is an explanatory diagram showing a function corresponding to a sin function and a function corresponding to a COS function that constitute (m, k)) and an orthogonal component (Qi (m, k)).
  • FIG. 4 shows a function (sin ( ⁇ k KE (m, k))) corresponding to a sin function and a function (cos ( ⁇ k
  • FIG. 9 is an explanatory diagram showing values of KE (m, k))).
  • Figure 5 shows the in-phase component (Ii (m, k)) and the quadrature component (Qi (m i) according to the value of the past signal history ( ⁇ i -t ai) and the direction of the phase transition with respect to the current data i. , K)) is shown in the form of a truth value in the form of a logical means for determining in advance whether the value of sin or cos is used, and whether the value is positive or negative.
  • FIG. 6 is a block diagram showing the modulation circuit of FIG. 1 in further detail.
  • FIG. 7 is a block diagram showing a more detailed shelf of the baseband waveform generation circuit.
  • Fig. 8 is a waveform diagram showing the waveform formed by the baseband waveform data Ibase and Qbase.
  • FIG. 9 is an explanatory diagram showing a waveform formed by the baseband waveform data Qbase of FIG. 8 in a signal point arrangement diagram.
  • FIG. 10 is a block diagram showing an example of a signal point position calculation circuit based on past data.
  • FIG. 11 is a block diagram showing an example of a code controller.
  • FIG. 12 is a block diagram of an example of a wireless terminal device such as a mobile phone or a car phone.
  • FIG. 13 is a signal point arrangement diagram in 16PSK modulation.
  • FIG. 14 is a block diagram showing a comparative example of a modulation circuit using a filter circuit having Gaussian characteristics.
  • the signal arrangement is normalized such that the phase difference between the signal points P1 to P4 is 7 ⁇ / 2.
  • the first term in the above equation (2) is the phase transition of the current data, and the equation (2)
  • the second term means the history of past signals.
  • the second term means that the signal point arrangement of the GMSK modulated signal has shifted to any position on the orthogonal I-axis or Q-axis on the basis of the previous signal history.
  • the maximum transition of the phase of the modulated signal within the current data transmission time (within one symbol section of the current data) is 7 ⁇ / 2. The change in phase at this maximum transition width can be considered as a transition for each Convolution Integral of the Gaussian function.
  • m is the number of samplings and k is the processing number (0 to m-l). That is, 7 ⁇ / 2, which is the maximum transition width of the phase of the modulated signal in the current data time of the GMSK modulated signal (within one symbol section of the current data), is divided by m, and the Gaussian function is assigned to each divided position. It attempts to perform de-interpolation in accordance with. Continuing the transformation of the formula for this,
  • E (m, k) in the above equation (4) means a convolution integral of a Gaussian function.
  • Zi (m, k) is the phase.
  • the baseband waveform of GMSK modulation which performs quaternary modulation, consists of an in-phase component (I) and a quadrature component (Q) whose phase is shifted by 7 ⁇ / 2. Taking the in-phase component (I) and the quadrature component (Q) into account, the above Zi (m, k) is represented by the modulation vector format (I + jQ) as follows.
  • the first and second terms of the above equation (7) represent the phase transition of the current data and the history of the past signal, as in the above equation (2). Therefore, as described above, since GMSK performs a phase shift of 7 ⁇ / 2 during one symbol period of one night, 2 k KE (m, Equation (7) can be further transformed as follows.
  • Vi (m, k) exp [j ( ⁇ k KE (m, k) a ⁇ + ( ⁇ / 2) ⁇ ai)]-(10)
  • Vi (m, k) exp [j ( ⁇ k KE (m, k) ai]. Exp [j ( ⁇ / 2) ⁇ : ai) t "(11)
  • the signal point arrangement of the GMSK modulated signal is orthogonal I axis Considering the four points on the Q axis and Vi (m, k) in Eq. (11), it is sufficient to consider the following first to fourth states.
  • the first state is shown below
  • Vi (m, k) cos ( ⁇ k KE (m,) ai) + j sin ( ⁇ k KE (m, k) h i) (14)
  • the GMSK vector Vi (m, k) corresponding to the sign of the day (hi i) can be expressed as follows.
  • Vi (m, k) cos ( ⁇ k KE (m, k)) + j sin ( ⁇ k KE (m, k))-(15)
  • Vi (m, k) cos ( ⁇ k KE (m, k))-j sin ( ⁇ k KE (m, k)) (16)
  • Vi (m, k) exp [j ( ⁇ / 2)] ⁇ exp [j ( ⁇ k KE (m,) ai]-(18)
  • the signal point arrangement in the GMSK modulation is P1, P2, P3, and P4 shown in FIG.
  • the first to fourth states are, as summarized in FIG. 3, the present state for each of the values 0, 1, 2, 3 of the past signal history ( ⁇ i ⁇ i). It corresponds to the sin function that composes the in-phase component (Ii (m, k)) and the quadrature component (Qi (m, k)) according to the positive or negative (+1 or -1) of the phase shift for data i.
  • the function and the function corresponding to the cos function can be grasped.
  • the expressions constituting the first to fourth states are intended to be adapted to discrete processing, and a function corresponding to the sin function (sin ( ⁇ k KE (m, k))) And the function corresponding to the cos function (cos ( ⁇ k KE (m, k))) may be obtained by dividing the section of ⁇ / 2 by m and obtaining its value.
  • the values of the function corresponding to the sin function and the function corresponding to the cos function can be obtained in advance as shown in FIG. Therefore, the values of the function corresponding to the sin function and the function corresponding to the cos function shown in FIG. 4 are stored in storage means such as ROM (Read Only Memory), and the signal history of the past is stored.
  • FIG. 5 shows the logical configuration of the logical means in the form of a truth value.
  • output indicates the type of function used for the in-phase component (I) and the quadrature component (Q) of the baseband waveform data
  • sig corresponds to the sin function used for the in-phase component and the quadrature component.
  • FIG. 1 shows a block diagram for realizing the GMSK modulation method described above.
  • Arithmetic circuit 1 inputs a time-series manner by delaying the differential code shed i, the data of past signal history (sigma i shed i) Isseki seeking (last de Isseki), by the last de Isseki Find the transitioned signal point position.
  • the baseband waveform generating circuit 2 sets the signal point position calculated by the arithmetic circuit 1 as an initial position, and determines the transition direction of the signal point position with respect to this initial position by the current input difference code (current data).
  • the filter response waveform data used in the baseband waveform generation circuit 2 is data of a function corresponding to a sin function and data of a function corresponding to a c0s function, and is supplied from the storage circuit 3.
  • the baseband waveform data Ibase and Qbase are supplied to the analog circuit 4.
  • the analog circuit 4 analyzes the baseband waveform data Ibase and Qbase. Signals, and multiply each converted signal by a carrier frequency signal with a fixed carrier frequency and a phase difference of 7 ⁇ / 2, and output the sum of the product results as an analog modulated signal I do.
  • FIG. 6 shows a more detailed block diagram of the modulation circuit.
  • 11 is a delay circuit for one symbol period
  • 12 is a signal point position calculation circuit based on the past data, and they constitute the calculation circuit 1.
  • the signal denoted by reference numeral 13 is a 2-bit signal indicating the signal point position which has transitioned due to the past data.
  • the signal point position indicated by the signal 13 is any one of P1 to P4 as illustrated in FIG.
  • the storage circuit 3 has a 3-bit counter 30, a cosR0M31 and a sin ROM32.
  • the counter 30 is reset for each period of the symbol clock signal CLK sym to count the sampling clock signal CLKsam.
  • the symbol clock C L K sym is a signal having a period corresponding to one symbol period of the input data d i.
  • the sampling clock signal CLKsam is a clock signal having a frequency eight times the frequency of the symbol clock signal CLK sym. Therefore, Count 30 outputs the count values from 0 to 7 cyclically.
  • the memory circuit 3 synchronizes with the sampling clock signal CLK sam every one symbol period, and sets a sin function having a phase range of 0 to 7 ⁇ / 2. And the value of the function corresponding to the COS function can be output discretely.
  • the baseband waveform generation circuit 2 includes a re-imaging circuit 20, a code controller 21, and a data selector 22.
  • the re-imaging circuit 20 receives the signal 13 and the current data of the difference code, and outputs the input signal in synchronization with the symbol clock CLK sym.
  • the code controller 21 selects eight discrete data of a function corresponding to the sin function and eight discrete data of a function corresponding to the cos function output from the storage circuit 3. To a negative number.
  • the data selector 22 selects eight discrete data of a function corresponding to the sin function and eight discrete data of a function corresponding to the cos function output through the code controller 21.
  • the code controller 21 and the data selector 22 implement the logic shown in FIG. That is, the code controller 21 and the data selector 22 form the baseband waveform data Ibase and Qbase for the in-phase component and the quadrature component that are continuous at the signal point position, respectively.
  • the analog circuit 4 includes a re-imaging circuit 40, a baseband waveform converter, a Qbase D / A converter 41, a baseband waveform converter, an Ibase D / A converter 42, and a carrier signal (eg, cos having (w c t)) of the generating circuit 4 3, shifter 4 4 proceed ⁇ / 2 the phase of the carrier signal, multiplying circuit 4 5, 4 6 and the summing circuit 4 7.
  • a carrier signal eg, cos having (w c t)
  • the re-forming circuit 40 inputs the baseband waveform data Ibase and Qbase for the in-phase component and the quadrature component, and outputs them in synchronization with the symbol clock CLK sym. It is converted to an analog signal by the D / A
  • the quadrature component signal GMSKout-Q is multiplied with the carrier signal whose phase has been advanced in shift circuit 46, and the in-phase component signal GMSKout-1 converted to an analog signal in D / A converter 42 is converted to circuit 4 Multiplied with the carrier signal output from 5.
  • the two signals thus multiplied are added by an adder circuit 47 and output as a GMSK modulated signal GMSKout.
  • FIG. 7 shows further details of the base spanned waveform generation circuit 2.
  • the control logic indicated by 23 is a circuit block that generically refers to the control logic included in the code controller 21 and the data selector 22.
  • the control logic 23 follows the contents of FIG.
  • the data stored in the sinROM 32 and the cosROM 31 are values in the first quadrant of the trigonometric function, as is clear from the values shown in FIG. Referring to FIG. 8, the data indicated by the section C1 is stored in the cosROM 31 and the data of the section indicated by S1 is stored in the sinROM 32. In FIG. 8, the data shown in the section C2 is obtained by converting the data shown in the section C1 into a negative number. Similarly, the data shown in the section S2 can be obtained by converting the data shown in the section S1 into a negative number. As can be seen from the description of FIG. 8 showing the waveforms formed by the baseband waveforms Ibase and Qbase, both waveforms have four types of data represented by the sections C1, C2, S1, and S2. Is realized by combining
  • the sign controller 21 has a logic for determining whether or not to perform the above-mentioned negative conversion based on the signal point position shifted by the past data and the sign of the current data as described above.
  • the data selector 2 2 determines which of the two systems of data output through the code controller 2 1 should be used as Ibase and which should be used as Qbase, as described above. It has logic to determine based on the point position and the sign of the current data.
  • Fig. 9 shows the base-span waveform data Qbase of Fig. 8 This is shown in the signal point arrangement diagram.
  • FIG. 10 shows an example of the signal point position calculation circuit 12.
  • the signal point position calculation circuit 12 has a series circuit of selectors 120, 121 and latches 122, 123.
  • the selectors 12 0 and 12 1 When the logical value “0” is supplied to the control terminal selin, the selectors 12 0 and 12 1 output the input data of the input terminal inL to the output terminal out, and the control terminal selin outputs the logical value “1”.
  • the input data of the input terminal inH is output to the output terminal out.
  • a circuit 125 always outputs a logical "1" signal, and a circuit 126 always outputs a logical "0" signal.
  • AND gates 127, 128, latch 129, and gate 130 are reset circuits.
  • RST is an externally supplied reset signal.
  • the one indicated by 124 is a half adder, which adds the output of the latch 123 and the logical value "1" to the input terminal inH of the selector 120.
  • the latches 122, 123, and 129 are operated in synchronization with the symbol work signal CLKsym.
  • the differential code i-1 delayed by one symbol in the delay circuit 11 is a signal sig a
  • FIG. 11 shows an example of the code controller 21.
  • FIG. 2 representatively shows only the circuit corresponding to the cosROM 31.
  • the 11 has a series circuit of a selection inverting circuit 220 and a full adder 221 as a unit circuit, and eight unit circuits are connected in cascade.
  • the selection inverting circuit 220 has a non-inverting output terminal trueout that outputs a signal input from the input terminal Din as it is, and an inverted output terminal that inverts the signal input from the input terminal Din and outputs the result.
  • Cin is a carry signal input terminal from the previous stage
  • Cout is a carry signal output terminal to the next stage.
  • 2 2 2 receives the signal sig and i-ibar at an input terminal sel, outputs a logical value “0” when it is a logical value “1”, and outputs a logical value “1” when it is a logical value “0”.
  • the output terminal out of this selection circuit 222 is coupled to one data input terminal Din2 of the full adder 221 constituting the first stage unit circuit.
  • the output terminal of a circuit 223 that always outputs a logical value “0” is coupled to the data input terminal Din2 of the full adder 221 constituting the unit circuit of the next stage and thereafter.
  • the 8-bit read data R0Mout0 to R0Mout7 are supplied from the cosROM 31 to the data input terminal Din of the selection inversion circuit 220 included in each unit circuit.
  • Readout ROMoutO is the least significant bit.
  • the output signals bitO to bit7 are function data corresponding to the cos function read from the cosROM 31 and converted to a negative number or maintain the same value.
  • bit8 is the sign bit of the function data equivalent to the cos function.
  • the above-mentioned modulation circuit is designed to obtain the difference code supplied in time series, i ⁇ 1, hii, and the past data up to the current data i, i.
  • the past signal history is acquired by i-1.
  • the transition of the signal point indicated by the acquired history is obtained from the current data i.
  • the position of the signal point obtained from the signal history is 0, 7 ⁇ / 2, ⁇ 3 7 ⁇ / 2 in the case of GMSK modulation.
  • the transition direction of the signal point position acquired in this way is clockwise or counterclockwise depending on the value of the current data i or its sign.
  • the waveform in one symbol section in the transition direction specified by the current data i is set so that the phase change speed at the signal point is continuous (in other words, the signal point is used to narrow the bandwidth of the modulated signal.
  • the decision is made using the data of cosROM 31 and sin ROM 32 of the function corresponding to the cos function and the function corresponding to the sin function as discrete filter response waveform data.
  • FIG. 14 shows a comparative example of the modulation circuit, and a circuit block indicated by 70 is a configuration of a filter circuit in a case where the processing of the equation (1) is directly performed. In this case, a large number of delay elements, latches, and multi-input adders are required, and the physical circuit size is large. It becomes.
  • the baseband waveform data is represented by a function equivalent to the sin function and a function equivalent to the cos function, and if the phase change of the function has a Gaussian characteristic, it can correspond to the entire section of the signal point arrangement diagram. It is not necessary to have the discrete filter response waveform.
  • the sinROM 32 and cosROM 31 have filter response waveform data having a function form corresponding to the sin and cos functions on behalf of one section of the signal point. Based on the signal point position specified by the past history and the transition direction specified by the current data, the sign is set for the filter response waveform stored in the sinROM 32 and cosROM 31.
  • the controller 21 selectively performs negative conversion, and assigns a function equivalent to a sin function or a function equivalent to a cos function to a plurality of baseband waveform data using the data selector 22, thereby obtaining a signal.
  • a spanned signal whose phase is continuous at a point can be easily generated with a small circuit scale.
  • FIG. 12 shows an example block diagram of a wireless terminal device or a transmission terminal device such as a mobile phone or a car phone.
  • the wireless terminal device shown in the figure includes a high-frequency unit 50, a modulation circuit 51, a demodulation circuit 52, an arithmetic and control unit 53, a speaker 54, a microphone 55, a liquid crystal display (LCD) 56, and an operation key. It is equipped with one 57, an external memory 58, a notebook 59, a power supply circuit 60, a PLL (Phase Locked Loop) circuit 61, an auxiliary ADC (RSSI ADC) 62, and an antenna 63.
  • PLL Phase Locked Loop
  • RSSI ADC auxiliary ADC
  • the modulation circuit 51 means a digital circuit portion shown in FIG.
  • the modulation circuit described in FIG. 6 has a configuration including the analog circuit 4.
  • the circuits up to the point where the digital baseband waveform data Ibase and Qbase are generated can also be referred to as modulation circuits. This At this time, a part of the analog circuit 4 shown in FIG. 6 is shown in FIG. 12 so as to be included in a block of the high frequency unit 50 for convenience.
  • the high frequency section 50 amplifies the analog modulated signal GMSKout output from the analog section 4 at high frequency and outputs the amplified signal GMSKout from the antenna 63, and detects the signal input from the antenna 63.
  • the detected quadrature component signal IF-inl-IF-inQ is demodulated by the demodulation circuit 52.
  • the arithmetic control unit 53 includes a circuit block 530 described as a channel code, a circuit block 531, described as CPU + DSP, and D / A converters 533, 534. Have.
  • the circuit block 530 performs communication channel control or protocol control.
  • the circuit block 531 has a CPU (Central Processing Unit) and a DSP (Digital Signal Processor) to control the entire wireless terminal device and to process the digital signal. Performs calculations such as filtering on audio signals.
  • CPU Central Processing Unit
  • DSP Digital Signal Processor
  • the arithmetic control unit 53 converts the reception information into a voice signal based on the reception data Rx-Data and the reception synchronization clock Rx-CLK output from the demodulation circuit 52, and thereby the speaker 5 4 to control the output of voice, and generates transmission data Tx-Data to be supplied to the modulation circuit 51 based on an input signal from the microphone phone 55.
  • the PLL circuit 61 generates an operation reference clock signal used in the wireless terminal device.
  • the symbol clock signal CLKsym and the sampling clock signal CLKsam are generated by dividing the operation reference clock signal and are not particularly limited, but are supplied from the arithmetic and control unit 53 to the modulation circuit 51 in FIG.
  • GMSK modulation is taken as an example, but the modulation method to which the present invention can be applied is not limited thereto.
  • a phase-continuous FSK in which data having characteristics other than the Gaussian distribution type is used as the filter response waveform data may be used. It can also be applied to QPSK modulation, ⁇ / 4 shift QPSK, etc.
  • the present invention can be applied to 16 PSK modulation shown in the signal point arrangement diagram of FIG. This is a modulation method in which there are m (for example, 16) signal points on one circumference of the signal point arrangement diagram. In this case, the signal point position based on the past data may be obtained by mod (— i ⁇ i then i, m).
  • the specific logical configuration of the code controller selector is not limited to the content described above.
  • the code controller may adopt a circuit configuration that selectively performs two's complement operation on the output of sinROM and cosROM.
  • the logic for acquiring the history of past data is not limited to the logical configuration described with reference to FIG. 10, and other circuit configurations can be employed. In short, it is only necessary to obtain the same result as the remainder operation result.
  • sampling clock frequency is not limited to eight times the symbol clock frequency, and can be changed as appropriate.
  • the algorithm according to the present invention is implemented by software processing such as a digital signal processor (DSP), the number of software steps is reduced, and the program memory capacity and the processing speed of the DSP are increased. Achievable.
  • the arithmetic circuit 1, the baseband waveform generation circuit 2, and the storage circuit 3 (until the inputs of the D / A converters 41 and 42) in FIG. 6 can be implemented by DSP soft processing.
  • the present invention can be considered as a transmission terminal device.
  • the modulation circuit according to the present invention can be used for a wireless terminal device represented by a mobile phone or a mobile phone. In addition, it can be applied to a cordless telephone and a pager.
  • the modulation circuit according to the present invention can be widely applied to transmission terminal devices in the field of mobile communication and the like.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

L'invention concerne un circuit de modulation qui acquiert l'histoire de signaux passés concernant des données numériques fournies séquentiellement dans le temps, à partir des données passées jusqu'aux données actuelles, au moyen d'un circuit arithmétique (1). Le circuit acquiert le sens de décalage du point de signal indiqué par l'histoire acquise. La position du point de signal acquis à partir de l'histoire est une position parmi plusieurs positions de phase spécifique sur un plan d'agencement de points de signal. Un circuit générateur de forme d'onde en bande de base (2) détermine la forme d'onde dans une section symbole, dans le sens de décalage donné par les données actuelles, au moyen de données de forme d'onde de réponse de filtre discret, de sorte que la vitesse de changement de phase à la position du point de signal peut être continue (en d'autres termes, la phase ne change pas brusquement au point de signal de façon à rétrécir la bande des signaux modulés). En conséquence, une pluralité de données de forme d'onde en bande de base pour une modulation multiniveau peut être formée pour chaque section symbole des données actuelles, de sorte que la phase ne change pas brusquement au point de signal. Pour cette raison, il n'est pas nécessaire, pour les utiliser, d'entrer séquentiellement dans le temps les données numériques susmentionnées dans un circuit filtrant présentant une grande échelle de circuit, comme un filtre de Gauss.
PCT/JP1997/001455 1997-04-25 1997-04-25 Circuit de modulation et terminal radio WO1998049812A1 (fr)

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PCT/JP1997/001455 WO1998049812A1 (fr) 1997-04-25 1997-04-25 Circuit de modulation et terminal radio

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PCT/JP1997/001455 WO1998049812A1 (fr) 1997-04-25 1997-04-25 Circuit de modulation et terminal radio

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JP2014512147A (ja) * 2011-04-15 2014-05-19 アストラピ コーポレーション 通信方法及び装置
US11184201B2 (en) 2019-05-15 2021-11-23 Astrapi Corporation Communication devices, systems, software and methods employing symbol waveform hopping
US11228477B2 (en) 2019-03-06 2022-01-18 Astrapi Corporation Devices, systems, and methods employing polynomial symbol waveforms
US11310090B2 (en) 2016-05-23 2022-04-19 Astrapi Corporation Systems, transmitters, and methods employing waveform bandwidth compression to transmit information
US11411785B2 (en) 2015-09-02 2022-08-09 Astrapi Corporation Spiral polynomial division multiplexing
US11824694B2 (en) 2015-09-02 2023-11-21 Astrapi Corporation Systems, devices, and methods employing instantaneous spectral analysis in the transmission of signals

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JP2014512147A (ja) * 2011-04-15 2014-05-19 アストラピ コーポレーション 通信方法及び装置
US11240088B2 (en) 2011-04-15 2022-02-01 Astrapi Corporation Methods and systems for transmitting and receiving data using non-periodic functions
US11848812B2 (en) 2011-04-15 2023-12-19 Astrapi Corporation Methods and systems for communicating
US11411785B2 (en) 2015-09-02 2022-08-09 Astrapi Corporation Spiral polynomial division multiplexing
US11824694B2 (en) 2015-09-02 2023-11-21 Astrapi Corporation Systems, devices, and methods employing instantaneous spectral analysis in the transmission of signals
US11310090B2 (en) 2016-05-23 2022-04-19 Astrapi Corporation Systems, transmitters, and methods employing waveform bandwidth compression to transmit information
US11228477B2 (en) 2019-03-06 2022-01-18 Astrapi Corporation Devices, systems, and methods employing polynomial symbol waveforms
US11729041B2 (en) 2019-03-06 2023-08-15 Astrapi Corporation Devices, systems, and methods employing polynomial symbol waveforms
US11184201B2 (en) 2019-05-15 2021-11-23 Astrapi Corporation Communication devices, systems, software and methods employing symbol waveform hopping
US11582075B2 (en) 2019-05-15 2023-02-14 Astrapi Corporation Communication devices, systems, software and methods employing symbol waveform hopping

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