WO1997049028A1 - Electronic control unit with detachable storage elements connected to the bus that contain the entire software program - Google Patents
Electronic control unit with detachable storage elements connected to the bus that contain the entire software program Download PDFInfo
- Publication number
- WO1997049028A1 WO1997049028A1 PCT/CH1996/000233 CH9600233W WO9749028A1 WO 1997049028 A1 WO1997049028 A1 WO 1997049028A1 CH 9600233 W CH9600233 W CH 9600233W WO 9749028 A1 WO9749028 A1 WO 9749028A1
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- WO
- WIPO (PCT)
- Prior art keywords
- hardware
- control device
- hardware block
- card
- bus
- Prior art date
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/006—Identification
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/23—Pc programming
- G05B2219/23344—Changeable memory, program
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25314—Modular structure, modules
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/1417—Boot up procedures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1446—Point-in-time backing up or restoration of persistent data
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2289—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by configuration test
Definitions
- the present invention relates to an electronic control device with a first hardware block with a microcomputer that works together with a software program, with a bus system with at least one address bus, a data bus and a control bus.
- Electronic control devices with integrated hardware and software are used in many industrial applications. It is often the case that the supplier supplies the hardware and basic software for operating a device.
- the hardware can, for example, be a personal
- Robots, dosing systems, processing, handling or cleaning and sterilization machines can be mentioned as examples of use for electronic control devices.
- Known control devices are used as finished hardware in the devices mentioned above. The user must
- DLLs dynamically linkable libraries
- initialization files must be created and a setup with parameter settings must be carried out. If a defect occurs in the control unit in such a system, it often takes several hours to restart the system after the control unit has been repaired. All settings must be made again. With one on one
- this object is achieved in that, in the case of an electronic control device of the type mentioned at the beginning, at least one there is a second hardware block which can be connected to the first hardware block via a detachable electrical connection, that the at least one second hardware block contains electronic memory elements, the memory elements of the at least one second hardware block being connected when the two hardware blocks are connected are directly connected to the bus system of the first hardware block and that the entire software program for the microcomputer is completely contained in the memory elements of the at least one second hardware block.
- the hardware blocks are preferably designed such that the first hardware block is constructed essentially without memory elements and the memory elements are completely accommodated in the at least one of the second hardware blocks. This means that not only the software program for starting (booting), but all computer software is stored in the at least one second hardware block in the memory elements there.
- a second further hardware block with memory elements can be used at runtime of the control device, on soft online or with a time recording, all software and data of the memory elements of the at least one second hardware blocks are backed up. With the ability to enter the second second hardware block
- Creating a backup also results in simple cloning for the creation of identical behavior controls. It is therefore preferably see that a so-called clone can be created on the second second hardware block backup block by means of a control button in the control unit. Such a cloned hardware block can then be used to operate a new, identical controller without the need for installation work, such as initializations, parameter setting, etc.
- control unit In order to ensure the correct operation of the control device according to the invention with second hardware blocks, special security mechanisms are provided. These must ensure that only the second hardware block with valid online and program data can boot. If a second hardware block is unsuccessful, the control unit either does not start at all in the event of a data defect or only starts the program again without accepting the data still available in the relevant second hardware block for further processing of the program. In the latter case e.g. a corresponding message is issued to the operator. In such a case, all special settings and the user programs as well as any parameters must be reinstalled or, if this is to be prevented, the backup must be continued with the second hardware block.
- the second hardware blocks preferably correspond to the known PC cards (PCMCIA).
- the first hardware block is installed in an aluminum housing and is closed from it as completely as possible. Not least in order to nip EMC problems in the bud.
- a flat front plate made of aluminum serves as a mounting plate.
- an aluminum cover can be mounted on the front board from behind.
- a human / machine interface consists of a display element, preferably an LC display with backlight, from one Trackpad for moving a mouse pointer on the LC display and from some control and operating buttons.
- Cold cathode tubes are used as backlighting in LC displays. Since such tubes have a relatively short lifespan, the background lighting of the LC display is controlled by a proximity switch or motion detector which is provided on the front board. The backlight of the LC display is only switched on when there is a person in front of the control unit.
- a touchscreen can also be used, in which a certain, appropriately marked area of the screen surface is touched by the operator of the control device to trigger a function.
- an infrared interface can preferably be arranged on the front board. With this a contactless transmission of data from and to the third hardware block is determined.
- the third hardware block can be, for example, a keyboard with a corresponding infrared interface.
- a plug can of course also be provided, in which case contactless data transmission is no longer provided in the latter case.
- the aforementioned special security mechanisms in the first hardware block include a parity generator for generating a parity bit per byte or per word, which parity bit for each data byte or each data word or each program word that is present in the at least one second hardware block, there in a special one Storage area is saved.
- Another security mechanism includes the correct functioning, in particular the supply voltage supply for the second hardware block or the PC cards and a monitoring circuit as to whether a PC card has been replaced at any time, regardless of whether the control device is switched on or off is.
- a third security mechanism comprises identification circuits which contain identification data of the corresponding hardware blocks or corresponding removable or plug-in modules installed in hardware blocks. Using the identification data, software can be used to determine whether the entire hardware is correctly constructed and whether the individual assemblies or hardware blocks fit together and match the software.
- FIG. 2 shows a block diagram of the control device according to FIG. 1,
- Fig. 3 is a block diagram showing the interconnection of several
- Fig. 4 is a flowchart showing the sequence of a first step for starting the control unit
- Fig. 5 is a flow chart showing a second step to start the control unit.
- 1 shows the external view of an electronic control device 1 according to the invention. This is surrounded by a metal, all-round closed housing 18, preferably made of aluminum.
- the metal housing 18 serves to nip EMC problems in the bud.
- the human / machine interface is essentially built on the front board 19. This consists of a display element 25, which can either be an LC display, preferably a colored LC display, or which can have a touchscreen instead of the LC display.
- Six software-programmable keys 24 are arranged below the display element 25, to which various functions can be assigned in software.
- a start button 20 and a stop button 21 for starting and stopping a machine program or a preprogrammed program sequence complete the operating elements.
- a trackpad 23 is provided, in the case of an LC display 25, to position a mouse pointer at a specific point on the LC display, in order to then start a function shown on the LC display with an execution key 22.
- LC displays are backlit to make the display more visible. This consists of a cold cathode tube, which has a relatively short lifespan. According to the invention, a proximity switch 26 or a motion detector 26 is now provided, which only switches on the backlighting of the LC display when an operator approaches. This increases the life of the backlight of the LC display.
- the display element is a touchscreen 25
- Trackpad 23 and the execution button 22 are not necessary.
- a certain function or a certain part of the program is started on the touchscreen by the operator touching the screen surface at a certain, predefined point.
- the human / machine interface can furthermore have a keyboard connection 39, which is intended for connecting, for example, a PC keyboard, with which certain parameters or initialization data can be entered into the control unit 1.
- An infrared interface 27 can also be provided in order to transmit contactlessly a data transmission from control device 1 to a further device (not shown) with an equivalent infrared interface or vice versa.
- a first hardware block 2 (FIG. 2) is accommodated in the interior of the housing 18 of the electronic control unit 1, which is constructed in modules and comprises various modules.
- At least a second hardware block 8 preferably a data carrier card with the format of a PC card (PCMCIA), can be plug-connected to the first hardware block 2 via an opening 28. Further openings 28 can be provided for plugging and unplugging two further hardware blocks 8, 9.
- Reference number 33 shows a first interface, preferably a plug connection, which is intended for the electrical connection of a system which is not visible in the figures and which is to be controlled by control unit 1.
- a second interface 34 preferably also in the form of a plug, is used to connect the electronic control unit 1 to other electronic control units in order to produce a multiprocessor system.
- the control device 1 is shown in block diagram form in FIG. 2. It essentially comprises the already mentioned first hardware block 2 installed in the housing 18 and at least one or more second hardware blocks 8, 9, which can be connected to the first hardware block 2 via plug connections 10, 11.
- the first hardware block 2 is constructed in modules and comprises various peripheral modules 37, such as a real-time clock, an LC display, an interface for a touchscreen, an interface for connecting a keyboard, a fieldbus interface, an analog / digital converter, one Digital / analog converter, an acoustic system, serial and parallel interfaces as well as digital inputs and outputs.
- peripheral modules 37 such as a real-time clock, an LC display, an interface for a touchscreen, an interface for connecting a keyboard, a fieldbus interface, an analog / digital converter, one Digital / analog converter, an acoustic system, serial and parallel interfaces as well as digital inputs and outputs.
- peripheral modules is connected to the microcomputer module 3 in a known manner via a bus system 4 consisting of at least one address bus 6, a data bus 5 and a control bus 7.
- a special unit 40 Gluelogic
- the necessary signal processing such as chip select and interrupt requests are carried out.
- microprocessors that have already integrated this special unit 40. In this case
- the bus system 4 has an address bus 6, a data bus 5 and a control bus 7.
- the data transmission between the microprocessor 3, on the motherboard of the first hardware block 2 existing modules 35, 36, a peripheral module 37 or the second hardware blocks 8, 9 takes place in a known manner as follows: to the desired module 35, 36 or the desired peripheral module 37 a specific address is created by the microprocessor 3, with which the module or the peripheral module is selected.
- the signals on the control bus are now used to exchange data in both directions between the selected component or the selected peripheral module and the microprocessor via the data bus.
- the control bus 7 leads through the special unit 40, the Gluelogic, in the block diagram. In some cases, signals are carried out directly or signals from the control bus are used to generate further control bus signals.
- the mode of operation of the Gluelogic 40 is known and is therefore not described further here.
- Other existing modules 29, 30 are not addressed with addresses, but directly via module 35 (digital ON / OFF module). This is done via discrete lines.
- the interrupt system is routed via another separate bus connection 41.
- the gluelogic 40 to which the interrupt bus 41 is connected, decodes an interrupt request from various sources and forwards it to the microprocessor 3 in a suitable format.
- a monitoring circuit 29 for monitoring whether the second hardware blocks 8, 9 have been plugged in or changed at any time is provided on the motherboard of the first hardware block 2, and a further monitoring circuit 30 for monitoring the correct voltage supply , in particular the second hardware blocks 8, 9.
- a parity generator module 36 is provided, which, as will be described later, is used to detect corrupt data.
- Hardware identification circuits 38 in each removable module, 0 for determining whether all the necessary, provided modules are present and correspond to the required type, further increase the operational safety of the electronic control device according to the invention.
- PCMCIA PCMCIA
- the memory element 12 is designed as RAM memory
- the memory 0 elements 13, 16 as non-volatile EEPROM memory or flash memory
- the memory elements 14, 15 are again constructed as RAM memories.
- every second hardware block 8, 9 comprises an identification circuit 38, which, as already mentioned briefly above, contains identification data with which it can be determined whether the correct second hardware block 8, 9 is connected to the first hardware block 2 at the correct location is.
- every second hardware block 8, 9 comprises its own voltage supply circuit 17, in which a buffer element for temporarily holding the data stored in the RAM memories 12, 14, 15 determines when the second hardware block 8, 9 is pulled out is.
- the buffer element can be a capacitor, a battery or an accumulator. A battery is preferably used. This guarantees data retention over a longer period of time, so that second hardware blocks can easily be sent from the supplier to a customer without loss of data.
- the control device is that the second hardware blocks 8, 9, the data carrier cards, are connected directly to the bus system of the microcomputer 3 of the first hardware block 2 via connecting plugs 10, 11, which can be PC card standard plugs.
- plugs 10, 11, which can be PC card standard plugs In the first hardware block 2 itself, essentially no memory elements are required.
- the software, the boot and user programs, parameters, initial data and other data are completely contained in the memory elements of the second hardware block 8, all program code preferably being stored in the flash memory 13, that is to say in a non-volatile memory element is. Since the second hardware blocks 8, 9 are connected directly to the bus system 4 of the microcomputer 3 without an interface, the control device can be started from one of the second hardware blocks 8. This with the advantages mentioned at the beginning.
- the data which are already known at the time of the programming are preferably in the EE in addition to the program code -PROM or flash memory housed while in RAM Data are stored which are generated during the operation of the control device.
- a second second hardware block 9 the so-called backup card.
- the backup card is constructed in exactly the same way as the boot card and is intended so that, at the operator's request, the contents of the various memory elements 12, 13, 14, 15, 16 of the boot card 8 can be mapped onto the identical memory elements 12, 13 at a certain point in time , 14, 15, 16 of the backup card 9 can be created.
- a memory map can also be created and carried along permanently.
- both cards 8, 9 are written to simultaneously in each write cycle of the microcomputer 3. Only the boat card 8 is read in each case. At certain, predetermined intervals, an instantaneous comparison of the two cards 8, 9 can be carried out. In the event of a fault, a warning, for example an acoustic or optical signal, can be issued.
- each hardware module which is not permanently connected to the motherboard of the first hardware block 2, comprises an identification circuit 38.
- This essentially has a non-volatile memory element, for example an EE-PROM, in which a module number, a serial number , a manufacturing date and calibration data or, depending on the module, other data are entered.
- the hardware module can be clearly identified with the identification data.
- the hardware parts are fully traceable.
- the individual identification circuits 38 are connected to one another by their own bus 42, the identification bus, and end digitally on / off on the module 35, via which the identification data of the individual modules 2, 8, 9, 37 can be called up by the microcomputer 3 and processed further.
- the identification data of the individual modules are determined during production and permanently programmed. Checksums can also be used to increase data security.
- the identification system is based on a single address which is predefined and which must be the same for all variants of first hardware blocks 2 to which the second hardware blocks 8, 9 are intended to match.
- This address is that of the digital on / off module 35.
- the software uses this module to access the identification system.
- the address of the named block is the gateway to the description of the hardware configuration. Through this gate, all connected hardware modules can be addressed via identification bus 42.
- All pluggable hardware modules 8, 9, 37 and the basic circuit board of the first hardware block 2 receive a unique type identification after manufacture. This enables the user software to recognize the entire hardware configuration by querying all the existing identification circuits 38.
- the first identification circuit 38 is always the identification circuit 38 of the motherboard of the first hardware block 2. In this circuit, e.g. in the form of a list, all addresses or chipselect settings of the slots on the motherboard for the hardware modules 8, 9, 37 and the associated identification circuit addresses. By addressing the identification circuit addresses, the software can find out where which additional hardware is plugged in. After all identification modules have been read in, the software is completely familiar with the configuration of the present hardware. It can also find out whether it even fits the hardware configuration found. It also finds out whether a module has been replaced in the meantime, namely when the current identification data are stored in one of the memory elements 12 of one of the second hardware blocks 8, 9 during each boot process.
- parity bit generator 36 For data words from the flash memory 13 of the second hardware block 8, parity is generated over 16 bits each and for the RAM memory 12 of the second hardware block 8 over 8 bits or byte-by-byte, since this memory can also be written and read byte-by-byte.
- a parity bit is generated per byte or per word.
- the parity bit is written into the corresponding parity memory 14, 15, 16.
- the existing parity bit stored at the corresponding address is compared with the newly generated one.
- a signal is generated which stores the error and triggers a parity error signal 43.
- the parity generator 36 is equipped with an additional buffer in order to detect a double parity error. It is thus possible, in the case of a simple error, to find out by software in which memory area the error is located.
- a simple error exists if e.g. a single bit changes its state illegally or if the area in which the software for examining and displaying the parity error is not affected by errors.
- a reset must be triggered and maintained. In this case, it must be assumed that neither an executable program code nor consistent data are present in the memory area.
- the double parity error 56 must be cleared by switching control unit 1 off and on again. However, the double parity error can only be remedied by using a new corresponding hardware block or a new boot card 8.
- the backup card 9 can be used, for example.
- the monitoring circuit 29 is provided, which is intended in particular for recognizing a change in one of the second hardware blocks 8, 9 during operation or outside the operation of control device 1.
- the task of the monitoring circuit 29 is, more precisely in other words, to recognize at any time whether a second hardware block, in our example the boot card 8, or the backup card 9 is present, whether one or both of these cards have been inserted and reinserted or replaced, and whether these cards have their own correct supply voltage. gene.
- the monitoring circuit 29 is on the one hand via the software and on the other hand by signals 57, 58 (boot card unplugged, backup card unplugged), 59, 60 (monitoring of the boot card voltage or backup card voltage) of the second hardware blocks 8, 9 controlled.
- the signals come from the monitoring circuit 29 via signal lines 48, 49 (boot card 8 changed, backup card 9 changed) 50, 51 (information voltage supply boot card or backup card) via the digital on / off Module 35 for further processing in the microcomputer 3.
- the monitoring circuit can be reset via software if necessary via lines 44, 45 (reset signal boot card changed or backup card changed) become.
- a change of one or more of the second hardware blocks 8, 9, in particular the boot card 8, should only take place when the control device is switched off.
- the removal of the boot card is recognized with a signal 57 (boot card not inserted).
- the monitoring circuit 29 reports this event via a signal 46 (no boot card) to the further monitoring circuit 30, which triggers a reset signal 32.
- the control unit 1 will never start without a boot card 8.
- the monitoring circuit 29 reports an unplugged boot card 8 or backup card 9 to the digital ON / OFF circuit 35 via the signal lines 48, 49.
- the state of the two signals on the lines mentioned remains stored in the monitoring circuit 29.
- the signals mentioned on lines 48, 49 are reset via signals 44, 45. Since the monitoring circuit 29 must recognize and save a change of the cards 8, 9 even when the device is switched off, a system battery 47 is present in the first hardware block 2, which also supplies the monitoring circuit 29 with voltage via one of the lines 31 (5 VRT). worries.
- the monitoring circuits 29, 30 can no longer work correctly.
- the status of the system battery 47 is monitored by the further monitoring circuit 30.
- a signal 52 changes its level.
- the signals 48, 49 are set to TRUE and the state of the batteries 17 of the boot card 8 and the backup card 9 is recorded with the signals 50 and 51.
- the voltages of the boot card 8 and the backup card 9 are measured via the signal lines 59, 60 (voltage of the boot card 8 or voltage of the backup card 9) by the monitoring circuit 29.
- Signals 48, 49 (boot card changed, backup card changed) are set when the card has been changed. Each time the card is changed, the battery 17 of the card 8, 9 concerned is automatically measured. In order not to load the battery unnecessarily long, the measurement is only carried out for a short time. Therefore, after a booting process, the signals 50, 51 indicate the state of the corresponding card battery 17 at the time of changing one of the cards 8, 9. As long as the cards 8, 9 are inserted, the voltage supply is taken over by the system battery 47 via the lines 31. By setting a signal 61 (measure card voltage), the microcomputer module 3 can request a measurement of the state of the batteries 17 of the second hardware blocks 8, 9 via the digital ON / OFF module 35. The signals 50, 51 are then set accordingly and remain stored.
- the further monitoring circuit 30 is the last link in the safety chain of the control device according to the invention. This building block summarizes the generation of the supply voltage (5 V) and the voltage for the non-volatile data storage (5 VRT), the generation of the reset signal 32 and a reset signal 52 for the monitoring circuit 29.
- the module 30 further contains a battery voltage monitoring unit.
- the further monitoring circuit 30 continuously monitors the voltage of the system battery 47. If the voltage is lost, ie if the voltage level drops below a minimum value, after the correct voltage has been restored, a signal 65 (battery error) will remain as true when the device is switched off until it is signaled by the software via another signal 64 (reset battery error) is reset.
- software can be used via a line
- the reset signal 32 remains active and at the same time an output 53 fatal system error is set and an acoustic or optical warning signal 54 is triggered.
- FIG. 3 shows how a plurality of control units 1 connect to one another via a multi-port RAM 55 via the built-in second interfaces 34, to which the address bus 6, the data bus 5 and the control bus 7 of the bus system 4 are each connected can be connected to a multiprocessor system. This type of connection is known and therefore need not be described further here.
- the control device 1 must be started (booted) using a special procedure. This is because the correct functioning is ensured via a chain of various monitoring or safety circuits 29, 30, 35, 36, 37, 38.
- Starting the device can be roughly divided into two steps.
- a first boot step is shown in the flow diagram of FIG. 4. It is based on the detection of a boot card 8 and the non-occurrence of a double parity error. In order to be able to detect a parity error at all, the software must first be started. After starting up
- the hardware is checked by the software as described above. That is, it is checked with the aid of the predetermined and fixed address of the digital on / off module 36 whether the cards 8, 9 have not been changed and whether the battery voltages are sufficiently high. If something is wrong, an operator dialog is automatically switched on and displayed on the display unit 25.
- a second boot step which is shown in the flowchart in FIG. 5, it is checked whether the software in the existing boot card 8 fits the recognized and checked hardware configuration. This is done by querying all identification circuits 38 of the system.
- the heart of the control device 1 is the boot card 8.
- the boot card In order to be able to operate the control device at all, a consistent boot card must be present.
- the boot card must contain an executable program code with correctly set parity in the addressed memory area 13, 14, 15, 16 (flash memory, parity memory). This can only be achieved by first of all writing the boot card with a boot program during the manufacturing process.
- the parity is automatically set for the first time for all the memory locations described.
- a parity error can no longer occur, except when the memory is defective.
- a boot card booted up in this way is considered to be consistent.
- the system can be booted with it.
- the parity bit is automatically generated and stored online by the parity generator 36 with each word stored, or is compared with the existing parity.
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- General Physics & Mathematics (AREA)
- Software Systems (AREA)
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Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU58905/96A AU5890596A (en) | 1996-06-18 | 1996-06-18 | Electronic control unit with detachable storage elements connected to the bus that contain the entire software program |
PCT/CH1996/000233 WO1997049028A1 (en) | 1996-06-18 | 1996-06-18 | Electronic control unit with detachable storage elements connected to the bus that contain the entire software program |
DE19681520T DE19681520D2 (en) | 1996-06-18 | 1996-06-18 | Electronic control unit with removable storage elements connected to the bus, which contain the entire software program |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/CH1996/000233 WO1997049028A1 (en) | 1996-06-18 | 1996-06-18 | Electronic control unit with detachable storage elements connected to the bus that contain the entire software program |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1997049028A1 true WO1997049028A1 (en) | 1997-12-24 |
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ID=4550431
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CH1996/000233 WO1997049028A1 (en) | 1996-06-18 | 1996-06-18 | Electronic control unit with detachable storage elements connected to the bus that contain the entire software program |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU5890596A (en) |
DE (1) | DE19681520D2 (en) |
WO (1) | WO1997049028A1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000026731A1 (en) * | 1998-11-02 | 2000-05-11 | Siemens Aktiengesellschaft | Automation system and method for accessing the functionality of hardware components |
EP1460502A2 (en) * | 2003-03-21 | 2004-09-22 | Focke & Co. (GmbH & Co.) | Method for operating control device of a communication medium |
WO2005020072A2 (en) * | 2003-08-15 | 2005-03-03 | York International Corporation | System and method for loading software into a control panel for a chiller system |
Citations (3)
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US4229804A (en) * | 1976-06-28 | 1980-10-21 | Fujitsu Fanuc Limited | Numerical control unit having a cassette type memory |
US4704676A (en) * | 1986-03-24 | 1987-11-03 | The Foxboro Company | Method and apparatus for configuring a controller |
US4777590A (en) * | 1984-10-29 | 1988-10-11 | Pictorial, Inc. | Portable computer |
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1996
- 1996-06-18 DE DE19681520T patent/DE19681520D2/en not_active Expired - Lifetime
- 1996-06-18 AU AU58905/96A patent/AU5890596A/en not_active Abandoned
- 1996-06-18 WO PCT/CH1996/000233 patent/WO1997049028A1/en active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US4229804A (en) * | 1976-06-28 | 1980-10-21 | Fujitsu Fanuc Limited | Numerical control unit having a cassette type memory |
US4777590A (en) * | 1984-10-29 | 1988-10-11 | Pictorial, Inc. | Portable computer |
US4704676A (en) * | 1986-03-24 | 1987-11-03 | The Foxboro Company | Method and apparatus for configuring a controller |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000026731A1 (en) * | 1998-11-02 | 2000-05-11 | Siemens Aktiengesellschaft | Automation system and method for accessing the functionality of hardware components |
US6625664B2 (en) | 1998-11-02 | 2003-09-23 | Siemens Aktiengesellschaft | Automation system to access functionality of hardware components with each hardware component having system connection unit with function objects representing real functionality of components |
EP1460502A2 (en) * | 2003-03-21 | 2004-09-22 | Focke & Co. (GmbH & Co.) | Method for operating control device of a communication medium |
EP1460502A3 (en) * | 2003-03-21 | 2005-12-14 | Focke & Co. (GmbH & Co. KG) | Method for operating control device of a communication medium |
CN100366509C (en) * | 2003-03-21 | 2008-02-06 | 福克有限公司 | Method for operating controller by communication medium |
WO2005020072A2 (en) * | 2003-08-15 | 2005-03-03 | York International Corporation | System and method for loading software into a control panel for a chiller system |
WO2005020072A3 (en) * | 2003-08-15 | 2006-03-23 | York Int Corp | System and method for loading software into a control panel for a chiller system |
US7434089B2 (en) | 2003-08-15 | 2008-10-07 | York International Corporation | System and method for loading software into a control panel for a chiller system |
Also Published As
Publication number | Publication date |
---|---|
AU5890596A (en) | 1998-01-07 |
DE19681520D2 (en) | 1999-09-23 |
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