WO1997048019A1

WO1997048019A1 - Method of manufacturing photomask, method of manufacturing phase-shifting mask, and method of manufacturing semiconductor device

Info

Publication number: WO1997048019A1
Application number: PCT/JP1996/001574
Authority: WO
Inventors: Eiji Tsujimoto; Yasuo Sato; Toshio Suzuki
Original assignee: Hitachi, Ltd.
Priority date: 1996-06-11
Filing date: 1996-06-11
Publication date: 1997-12-18

Abstract

A photomask manufacturing method includes a step (100) of comparing the design data before a design change with those after the design change, a step (200) of finding areas in which design data are changed from the original design data, a step (300) of preparing new drawing data for the changed-data areas in accordance with the changed data, a step (400) of combining the drawing data of the changed-data areas with the already prepared drawing data of unchanged-data areas, and a step (500) of fabricating a photomask after the design change based on the combined drawing data.

Description

TECHNICAL FIELD The present invention relates to a method for manufacturing a photomask, a method for manufacturing a phase shift mask, and a method for manufacturing a semiconductor device.

The present invention relates to a mask manufacturing technology, and more particularly to a technology effective when applied to a computer-aided automatic layout of a mask pattern of a photomask for forming circuit elements on a semiconductor wafer. Background art

Today, semiconductor devices are becoming ever more highly integrated and sophisticated. And the higher the degree of integration, the faster the people and time required for product development will increase. On the other hand, the theme of shortening the product development period is always imposed in order to respond quickly to market needs or to shorten the life of the product life cycle. In such an environment, the demand for the shortening described above was achieved by designing automation (DA) for the mask pattern design of a photomask that forms an electronic circuit on a semiconductor wafer. I am responding.

However, it usually takes a long time, starting from logic design, until the final mask is created, for example, three weeks or more. Therefore, even though it was shortened by DA, the time ratio occupied by mask design in the series of product development processes is relatively large. For this reason, if the mask pattern is recreated for all the layout patterns when a part of the design data is changed, the change processing time is about the same as that for the new creation described above. Will be huge.

Therefore, various techniques have been proposed to efficiently correct the mask pattern according to the design change. For example, Japanese Unexamined Patent Publication No. 5-323655 describes a technique for managing the log for each mask layer to prevent erroneous correction of the layout data. In addition, Japanese Patent Application Laid-Open No. 4-3727155 discloses a reference pattern and a change pattern. A technique is described in which a difference is checked and a change miss is checked, and a pattern is corrected in an edit. In Japanese Patent Application Laid-Open No. Hei 4-2385979, the changed subnet was deleted from the data before the change, the portion which was not placed due to the deletion was relocated, and further added. It describes techniques for arranging blocks and nets. Japanese Patent Laid-Open Publication No. 4-32973 describes a technique for determining a mask to be used and constituent elements from input pattern data to create a mask pattern. Japanese Patent Application Laid-Open No. H5-677756 describes a technique for interactively changing an endless dress information file and generating a mask pattern for a mask ROM according to the changed file. Japanese Patent Application Laid-Open No. 3-206646 describes a technique of combining a plurality of mask data into integrated circuits having different design rules into one integrated circuit. Japanese Patent Application Laid-Open No. Sho 61-1985889 discloses a technique of integrating a master and mask data of a changed portion to form a wiring pattern in a region having no wiring. Japanese Patent Application Laid-Open No. 3-2699767 describes a technique for designing an electronic circuit by specifying a remodeled portion accompanying a design change.

However, in any of the above-mentioned techniques, no consideration is given to the work content of how to perform the change work efficiently. Therefore, in actual work, it is assumed that it is necessary to perform a pattern layout along a procedure similar to that of new creation over a considerable range, and it is difficult to significantly reduce the time.

Also, in the case of a phase shift mask that transfers a pattern onto a semiconductor wafer while selectively shifting the phase of light, an exposure prediction calculation is performed in the mask pattern state to prevent the occurrence of shift pattern defects. It is verified that the design pattern is reproduced. Then, when there is a possibility that a shift pattern defect may occur, a necessary correction can be made at that location. This correction work also needs to be as quick as the above-mentioned change work.

Therefore, an object of the present invention is to provide a technique capable of creating a mask pattern of a photomask in a short time according to a design change.

It is another object of the present invention to provide a technique capable of performing a writing correction operation in a short time in the manufacture of a phase shift mask.

The above and other objects and novel features of the present invention will be described in the present specification and appended. It will be clear from the accompanying drawings. Disclosure of the invention

The following is a brief description of an outline of typical inventions disclosed in the present application.

That is, the method for manufacturing a photomask according to the present invention includes the following steps (a) to (e).

(a) the process of narrowing down the design data before and after the design change,

(b) a process of finding a changed area in the design data after the change that is different from the design data before the change from the result of the comparison,

(c) a step of creating new drawing data according to the content of the change in the changed area,

(d) a step of synthesizing the drawing data of the changed area and the drawing data other than the changed area already created before the design change;

(e) A step of manufacturing a photomask after the design change based on the synthesized drawing data.

In this method for manufacturing a photomask, the step (C) includes the following steps (C 1) to (C 1).

(C3).

(C,) a step of obtaining parent data that is design data of the smallest block that includes the change area in the hierarchically designed design data;

(c2) a step of transforming the graphic coordinates of the child data relating to the change area into the coordinate system of the parent data among the child data which are the design data of the lower hierarchy of the parent data;

(C ₃₎ the parent data and coordinate transformation child data for the step of creating a new drawing de Isseki along the changes.

The method of manufacturing a photomask according to the present invention is characterized by including the following steps (a) to (f).

(a) the process of comparing design data before and after the design change with each other;

(b) a process of determining a changed area in the design data after the change that is different from the design data before the change from the comparison result,

(c) The smallest block that includes the change area in the hierarchically designed design data A step of extracting child data, which is design data of a certain parent data and its lower hierarchy,

-(D) a process of creating new drawing data according to the changed contents of the extracted parent data and child data,

(e) a step of synthesizing the drawing data with the drawing data already created before the design change and not changed,

(f) A step of manufacturing a photomask after a design change based on the synthesized drawing data.

A method of manufacturing a phase shift mask according to the present invention is characterized by including the following steps (a) to (f).

(a) a step of creating provisional drawing data for the phase shift mask;

(b) a step of performing an exposure prediction operation based on the image data;

(c) a step of obtaining an area that needs to be corrected in the drawing data from the result of the exposure prediction calculation; and (d) if there is an area that needs to be corrected, creating new drawing data in accordance with the correction contents for that area. If it does not exist, the process moves to the (f) process,

(e) a step of combining drawing data with drawing data that does not need to be modified,

(f) A step of manufacturing a phase shift mask based on the synthesized drawing data.

In this method of manufacturing a phase shift mask, it is possible to create appropriate drawing data while performing a limited exposure prediction operation on a corrected area after creating a new drawing data in the step (d). desirable.

A method of manufacturing a semiconductor device according to the present invention transfers a pattern formed on a photomask onto a semiconductor wafer to form a predetermined electronic circuit, and includes the following steps (a) to (h). It is assumed that.

(a) a process of narrowing down the design data before and after the design change of the photomask, (b) a process of finding a changed area in the design data after the change different from the design data before the change from the comparison result,

(d) a step of combining the drawing data of the changed area with the drawing data other than the changed area already created before the design change, (e) manufacturing a photomask after the design change based on the synthesized drawing data,

(f) mounting the semiconductor wafer on which the photo resist has been applied onto a stage of an exposure apparatus and positioning the semiconductor wafer at an exposure position;

(g) arranging the manufactured photomask on an optical path from an exposure light source to the semiconductor wafer;

(h) a step of irradiating the photomask with exposure light to expose a pattern formed on the photomask onto the semiconductor substrate C;

This method of manufacturing a semiconductor device, the step (c) may comprise the following steps _{_{(C l) ~ (c 3}} ).

(c,) a step of obtaining a parent data, which is design data of the smallest block including the change area in the design data which has been subjected to the hierarchical design,

(c ₂ ) a step of converting the graphic coordinates of the child data relating to the change area to the coordinate system of the parent data among the child data which is the design data of the lower hierarchy of the parent data;

(ca) A process of creating new drawing data according to the changed contents for the parent data and the child data subjected to the coordinate conversion.

The method for manufacturing a semiconductor device according to the present invention includes transferring a pattern formed on a photomask onto a semiconductor wafer to form a predetermined electronic circuit.

(i).

(a) comparing the design data before and after the photomask design change with each other;

(b) determining a changed area in the design data after the change that is different from the design data before the change from the comparison result;

(c) a step of extracting the parent data, which is the minimum block including the change area, from the hierarchically designed design data and the child data, which is the design data of the lower hierarchy, and (d) the extracted parent. The process of creating new drawing data according to the changes for data and child data,

(e) a step of combining the created drawing data with the drawing data already created before the design change and not changed,

(f) Manufacturing a photomask after the design change based on the synthesized drawing data About

(g) a step of mounting the photo resist-coated semiconductor wafer on a stage of an exposure apparatus and positioning the semiconductor wafer at an exposure position;

(h) arranging the manufactured photomask on the optical path from the exposure light source to the semiconductor wafer;

(i) A step of irradiating the photomask with exposure light to expose a pattern formed on the photomask to a semiconductor wafer.

In the method of manufacturing a semiconductor device according to the present invention, a pattern formed on a phase shift mask is transferred onto a semiconductor wafer to form a predetermined electronic circuit. The following steps ( _a ) to (i) It is characterized by including.

(a) a step of creating provisional drawing data for the phase shift mask,

(b) performing an exposure prediction operation based on the drawing data;

(c) a step of finding an area in the drawing data that needs correction from the result of the exposure prediction calculation;

(d) If there is an area that needs correction, create new drawing data for that area according to the details of the correction. If it does not exist, move to step (f).

(f) a step of manufacturing a phase shift mask based on the synthesized drawing data,

(g) mounting the semiconductor wafer coated with the photo resist on a wafer stage of an exposure apparatus and positioning the semiconductor wafer at an exposure position;

(h) arranging the manufactured phase shift mask on the optical path from the exposure light source to the semiconductor wafer;

(i) A step of irradiating the phase shift mask with exposure light to expose a pattern formed on the phase shift mask onto a semiconductor wafer.

In this method of manufacturing a semiconductor device, it is preferable that after the new drawing data is created in the step (d), the drawing data is created while performing an exposure prediction operation in a limited manner on the corrected area.

This makes it possible to create a mask pattern of a photomask in a short time due to a design change. In the manufacture of phase shift masks, Evening correction work can be performed in a short time. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a process diagram showing the flow of photomask design and development, FIG. 2 is a flow chart showing an outline of a photomask manufacturing method according to an embodiment of the present invention, and FIGS. FIG. 5 is a flow chart showing a part of the flow chart of FIG. 2 in detail, and FIG. 6 is an output figure of a change area when the flow chart of FIG. 5 is executed. FIG. 7 is a flowchart showing another part of the flowchart of FIG. 2 in detail, FIG. 8 is an explanatory diagram conceptually showing the contents of a photomask design change, and FIG. 9 is a diagram of FIG. FIG. 10 is an explanatory diagram showing a hierarchical structure of design data constituting a photomask, FIG. 10 is a conceptual diagram showing a data structure of design data stored in a layout design, and FIG. 11 is still another flowchart of FIG. Flow chart showing some details, 12 is a schematic diagram showing an exposure apparatus using the manufactured photomask. FIG. 13 is a flow chart schematically showing a photomask manufacturing method according to another embodiment of the present invention. Is an explanatory diagram conceptually showing the contents of the photomask design change, FIG. 15 is an explanatory diagram showing the hierarchical structure of the design data constituting the photomask in FIG. 14, and FIG. 16 is a diagram showing still another embodiment of the present invention. FIG. 17 is a flow chart schematically showing a method of manufacturing a phase shift mask which is a photomask of the embodiment. FIG. 17 is an explanatory view showing a transfer pattern formed on a semiconductor substrate according to the flow chart of FIG. FIG. 18 is an explanatory diagram showing a mask pattern, FIG. 19 is an explanatory diagram showing a transfer pattern formed on a semiconductor substrate by the mask pattern of FIG. 18, and FIG. 20 is for forming the transfer pattern of FIG. Shows the mask pattern of FIG. 21 is an explanatory diagram showing another transfer pattern formed on the semiconductor wafer in accordance with the flowchart of FIG. 16, FIG. 22 is an explanatory diagram showing a mask pattern, and FIG. FIG. 24 is an explanatory view showing a transfer pattern formed on the semiconductor wafer by the mask pattern of FIG. 2, and FIG. 24 is an explanatory view showing a mask pattern for forming the transfer pattern of FIG. 21. BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The implementation In all the drawings for describing the embodiments, members having the same functions are denoted by the same reference numerals, and the repeated description thereof is omitted.

Fig. 1 is a process diagram showing the flow of photomask design and development. Fig. 2 is a flowchart showing an outline of a photomask manufacturing method according to an embodiment of the present invention. Figs. 3 and 4 are diagrams. 2 is an explanatory diagram along the flowchart of FIG. 2, FIG. 5 is a flowchart showing a part of the flowchart of FIG. 2 in detail, and FIG. 6 is an output of a change area when the flowchart of FIG. 5 is executed. Fig. 7 is an explanatory diagram showing a figure, Fig. 7 is a flowchart showing another part of the flowchart of Fig. 2 in detail, Fig. 8 is an explanatory diagram conceptually showing the contents of a design change of a photomask, and Fig. 9 is a diagram. 8 is an explanatory diagram showing a hierarchical structure of design data constituting a photomask, FIG. 10 is a conceptual diagram showing a data structure of design data stored in a layout design, and FIG. 11 is a flow chart of FIG. A flowchart detailing yet another part of the 1 2 is a schematic diagram showing an exposure device manufactured photomasks are used.

The design and development of a photomask M (Fig. 8, Fig. 12) on which a predetermined pattern such as a circuit pattern and a wiring pattern transferred onto a semiconductor wafer W (Fig. 12) is formed is computer-aided design automation. the original, as shown in FIG. 1, from the upstream toward the down stream, the system function design step S,, logic and test design process S _2, circuit

• Consists of a device design process S ₃ , a layout design process S ₄ , and a network processing process S ₅ . Each step s, go processing by operating the Wa one Kusutesho emissions WS based like Seo off Touwea Ya database is illustrated in correspondence with ~s ₅ is executed, § one WINCH work processing steps S ₅ The photomask M is manufactured by applying the drawing data created in step 1 to a mask pattern drawing apparatus (hereinafter simply referred to as “drawing apparatus”) A.

Here, it is Unamono to the follows good explaining an outline of processing contents executed in the respective steps ~ S _5.

First, in a system / function design process S, a function specification of a semiconductor device is created based on the system specification, and details of operation are designed. Here, the operation of the semiconductor device is determined using a function description language and a state transition diagram, and the architecture, for example, the number of bits and the number of function registers of the logic block is determined. In the logic 'test design process S _2, is described a system function design step S, the

-Based on the functional design data, it is embodied to the level of logic gates (NAND, OR, inverter, etc.). In other words, the design is performed with a focus on the logical circuit structure using the structural description language and logic diagrams. In addition, the simulation check corrects the logical error.

In the circuit device design step S _3, the shape and electrical performance, such as Bok Rungis evening based on production conditions of the semiconductors devices with structure description language or schematic of the foregoing is designed. Furthermore, basic circuits and circuit cells are designed on the basis of these, and the entire circuit is designed.

In layout design process S _4, the arrangement of the logic gate Bok using logic cell library that has been prepared by a logical 'test design process S connection information obtained by ₂ and the circuit device design step S _3, the wiring is performed Thus, design data that is an outline of the pattern of the photomask M is determined. As will be described later, this design data is generally designed in a hierarchical manner, and the design efficiency is improved by reducing the complexity of the design. The artwork process S _5, against the design data in the layout design process S _4, it is an drawing data subjected to a treatment capable processed by the drawing device. Then, as described above, when the drawing data is applied to the drawing apparatus A, a photomask M on which a predetermined pattern is formed is obtained.

Here, if a design change occurs after the drawing data is created through the above-described process, or if a design change occurs after the photomask M is manufactured further, in the present embodiment, A photomask M is manufactured according to the flowchart shown in FIG. That is, the design data before and after the layout pattern design change is compared (100). Next, the influence range of the design data before the change in the design data after the change, that is, the change area in the design data after the design change is obtained from the comparison result (200). New drawing data is created based on the data (300). Then, the drawing data of the changed area is combined with the drawing data of the area other than the changed area (this drawing data is a part of the drawing data already created before the design change), that is, merged (400), A photomask M is created (500). Figures corresponding to this flow are shown in Figs. Figure 3 (a) shows the design data D before the design change. , 3 (b) is a design data D _N after the design change. Here, the pattern P shown in Fig. 3 (a) was changed due to a design change. However, as shown in FIG. 3 (b), a case where the pattern P _N has been moved downward in the drawing is shown. Therefore, by comparing the two design data Do and _DN with each other, the changed area R is obtained (FIG. 3 (c)). Then, as shown in FIG. 4 (b), new drawing data S _N is created for the change area R, and the drawing data S _N and the drawing data So other than the change area R shown in FIG. rendering data S _a of the whole when synthesizing the (drawing data excluding the modified area R by graphical operation from before the change drawing data) pattern is obtained, et al. (FIG. 4 (c)). Then, a photomask M is created using the drawing data S _A shown in FIG. 4 (c).

After the photomask M is prepared, including the embodiments described below, exposure is performed using the photomask M. Although the details will be described later, the exposure is to transfer a pattern formed on the photomask M onto the semiconductor wafer W to form a predetermined printed circuit. Each of the masks M is set at a predetermined position to perform pattern exposure.

Here, the process of obtaining the change region R (FIG. 3 (c)) shown in FIG. 2, the process of creating the drawing data S _N (FIG. 4 (b)) of the change region R, and the drawing data S _N Draw de overnight S. The details of each step of merging with (FIG. 4 (a)) will be described in order below.

First, a process of obtaining the change region R will be described. Here, a description will be given with reference to FIG. 5, which is a flowchart of the process, and FIG. 6, which shows an output figure of a changed region R obtained by executing the process.

As shown in FIG. 5, first, an EOR (Exclusive OR) area is obtained by graphic operation of the design data before the change and the design data after the change (201). As a result, as shown in FIG. 6, only different patterns Ρο and PN (in the illustrated case, the pattern PO before the change and the pattern P _N after the change) are extracted from the design data before and after the change.

Next, the minimum value (X) of the coordinate values of all output figures in the extracted EOR area _mi „, Y _min ) and the maximum value (X _m ,, .Y _m .x) are obtained (202).

Then, the obtained minimum value is rounded down to a coordinate value that is a multiple of the minimum drawing unit (for example, 0.025 m) of the drawing device (203). Specifically, for example, if the minimum value of the X coordinate is 1.53 m, set it to 1.525 / m. Similar processing is performed for the minimum value of the Y coordinate. As a result, the minimum correction value that can be handled accurately by the drawing device

i, Υπ ,, η-.d i).

Subsequently, the maximum value is rounded up to a coordinate value that is a multiple of the minimum drawing unit of the drawing device (204). This is done in the same way as finding the modified minimum, for example, if the maximum value of the X coordinate is 2.56 m, it will be 2.575 m. In this case, the same applies to the minimum value of the Y wing. As a result, the corrected maximum value (Xmu-i, Υα,.,-. Di) is obtained. Incidentally, modified maximum value _{(X m ,, H, Ym,} -.. Di) may be obtained earlier towards the.

Thus modified minimum value determined by (X _min -, «H,

n-.di) and modified maximum value (Xm, -., <n Y m .x- .. If j) and in the coordinates of the opposite corners of the make a rectangular (2 0 5), the broken line in FIG. 6 As a result, a change region R as shown in FIG. In the present embodiment, the corrected values are obtained by rounding up and down the coordinate values in order to execute the high-precision processing, but the obtained coordinate values can be used as they are. In this case,

The E 0 R area becomes the change area R as it is.

Next, a process of creating the drawing data of the change region R will be described with reference to FIGS.

As conceptually shown in FIG. 8, when the entire photomask M corresponding to the entire area (or a part of the functional area) of the semiconductor chip is represented by a block T, the blocks arranged in the block T a, B, each region of the C has a range surrounded by a broken line illustrated in the figure there range respectively have patterns P _a, PB, and Pc as a graphic data. Each block A, B, respectively block D in the C, E, block F, G, block H, I have cage containing Marete by a range surrounded by a broken line a figure existing range, respectively pattern P _D , PE, PF, PG, PH, P, as graphic data. Each graphic data is the coordinate system of the block to which it belongs (i.e., for example, the coordinate system of the pattern P _A block A, the coordinates of the pattern P _D block D System) is expressed. And wherein the pattern P _CN indicated by the chain line pattern P _c is two points is a graphic data of the block C are respectively changed to a pattern P _HN the pattern P _H is the graphic data of the block H is indicated by the two-dot chain line You. The shaded portion is the change area R.

FIG. 9 shows the arrangement relationship of FIG. As shown in this figure, FIG. 8 shows design data hierarchically designed with block T as a vertex. For example, block T is parent data of blocks A, B, and C, and block A is blocks D, E Parent data.

Assuming such a configuration, in this step, first, as shown in the flowchart of FIG. 7, design data of the smallest block including the change area R obtained as described above is obtained, This is set as parent data (301). Here, since the change area R is included in the block C, this is the parent data.

Next, it is verified whether the design data of the lower hierarchy of the parent data, that is, the child data is related to the change area R (302). As shown in Fig. 8, of the two blocks H and I, which are the design data of the lower hierarchy of the block C, the block H is the force applied to the change area scale, and the block I is not applied. Therefore, in this case, the graphic coordinates of the block H covering the change area R in the child data are converted into the coordinate system of the block C which is the parent data (303). Thereby, the relative positional relationship of the graphic data of the block H in the block C is determined. On the other hand, such processing is not performed on the block I that does not cover the change area R.

The above processing is performed for the following reason. That is, all figures in the drawing data are expressed in the coordinate system of the semiconductor chip, and the change region R is also expressed in this coordinate system. On the other hand, the design data is hierarchically designed as described above. Therefore, it is only necessary to convert only the part of the child data in which the figure exists in the change region R to the coordinate system of the parent data and change them. If the figure existence range does not extend to the change area R, the child data is not subjected to coordinate conversion. As a result, only the necessary design data can be extracted and processed, and the change processing can be performed at high speed.

Here, the data structure of the design data for performing the change processing is shown in FIG. Illustrated As shown, this data structure is composed of block I, child block list, parent block list, layout information, and graphic data. This structure will be described by taking block A in the hierarchical structure in FIG. 9 as an example.

In the list of blocks, the block name of the target block (Block A), the head address of the child block list of the block (Block D), the head address of the parent block list (Block T), the figure existence range (Minimum value of coordinates of block A (X _mi

„, Y _mi „), the maximum value (X _m ,,, Y m. X)), and the start address of the figure data of the block.

The child block list that has received the head address of the child block list stores the block list address (block D for block A) and the address of the next child block list (block E). Then, when the block list address is searched for the block list of the desired child block, various data centering on the block are expanded.

The parent block list that received the parent block list head address includes the block block K (block T for block A) and the address of the next parent block list (where block A has only block T as the parent block). There is none), and the location information address to the parent block (location information of block A in block T) is stored. And, as in the case of the child block list! If you search the block list of the desired parent block from the address, various data centered on that block will be developed.

The arrangement information stores the arrangement coordinates of the child block in the parent block (the arrangement coordinates of block A in block T). This data is used when the graphic coordinates are converted to the coordinate system of the parent block.

The figure data having received the figure data head address stores the layer name of the figure data, the next figure data address, the number of vertices of the figure data, and specific figure vertices.

By providing such a data structure to the design data, it becomes possible to immediately determine whether or not it is necessary to process design data of a lower hierarchy than a certain design data, and to perform coordinate conversion. When the coordinate transformation of the necessary child data is completed, the design is changed based on the parent data after the design change (here, block C) and the coordinate transformed child data (here, block H). Create new drawing data (304). If there is no child data subjected to coordinate conversion, a new drawing data is created only for the parent data. The created drawing data S. Corresponds to Fig. 4 (b).

Finally, the merging process will be described with reference to FIG. Since the design was changed after the drawing data was created, the drawing data before the design change already exists. Therefore, the drawing data before the change and the changed area obtained as described above are subjected to graphic calculation to obtain an area other than the changed area, that is, a SUB area (401). This SUB area corresponds to Fig. 4 (a) and is outside the design change range. Then, the drawing data S of the change area. (FIG. 4 (b)) and the drawing data _{SN of the} SUB area (FIG. 4 (a)) are subjected to graphic operation to obtain an OR area (402). As a result, the entire drawing data S _A as shown in FIG. 4 (c) is obtained. Thereafter, follower Bok mask if processing toward the drawing device the drawing data S _A is produced. The photomask M created by the above method is set in, for example, an exposure apparatus as shown in FIG. 12 and exposed. Note that a photomask (including a phase shift mask) M in the embodiment described below also has a pattern image transferred onto a semiconductor wafer W by the same procedure using, for example, the same exposure apparatus as in the present embodiment. You.

The illustrated exposure apparatus 10 is a reduced projection exposure apparatus that forms a mask pattern on a semiconductor wafer W by, for example, an area of 15 to 20 square meters by step and repeat. However, in addition to such a light exposure device, the photomask M is a step-and-scan type light exposure device employing a catadioptric reduction optical system, an X-ray exposure device using soft X-rays, The present invention can be applied to various types of exposure apparatuses such as an exposure apparatus using an excimer laser such as the KrF excimer wavelength (wavelength: l = 248 nm) or an ion beam exposure apparatus.

On the optical path from the exposure light source 11 to the semiconductor wafer W, a mirror 12, a shutter 13, an aperture 14, a short cut filter 15, a mirror 16, and a mask blind 17 , Condenser lens 18 and reduction projection lens 19 Is placed. Further, the above-described photomask M is set on a mask moving table 20 provided between the condenser lens 18 and the reduction projection lens 19, and the mask moving table 20 is operated in a horizontal direction by operating the mask moving table 20. It can be moved. The exposure light source 11 is, for example, a high-pressure mercury lamp that emits exposure light L of i-line (wavelength = 365 nm), which is monochromatic ultraviolet light, and a photo-sensitive light is exposed on the surface of the semiconductor wafer W. The registry is spin-coated. The semiconductor wafer W is placed on the housing 21 and is moved vertically and horizontally by the Z-axis carriage 22, the X-axis carriage 23, and the Y-axis carriage 24. It is designed to be step driven. The optical system in this device is set, for example, to NA (Numerical Aperture) = 0.5, P (process parameter) = 0.5, σ (coherence factor) = 0.5, and R (resolution) = Ρ (λΖΝΑ) = 365 nm , DO F (Depth Of Focus) = λ / (NA ² ) = 1.46 wm.

The photomask M for transferring a predetermined pattern onto the prebaked semiconductor wafer W is, for example, a reticle on which an original image of an integrated circuit pattern having a size five times the actual size is formed. Therefore, the pattern image is formed on the semiconductor wafer W. Exposure is performed by reducing the projection to 1/5.

In order to transfer the pattern of the photomask M to the semiconductor wafer W, the semiconductor wafer W is mounted on the wafer stage 21 and driven by the X, 軸, and Z-axis carriages 2, 2, 23, and 24. This is positioned at the exposure position. Further, the photomask M is set on the mask moving table 20 and is arranged on the optical path from the exposure light source 11 to the semiconductor wafer W, and is moved horizontally to perform the same positioning. After setting as described above, when the exposure light L is irradiated from the exposure light source 11, the exposure light L is incident on the photomask M, and is converted into a spot light beam by the reduction projection lens 19, and the light of the stage 21 is adjusted. The light is incident on the resist surface of the upper semiconductor wafer W. As a result, the pattern image is transferred to the semiconductor wafer W.

After exposure, the resist is developed using a developer to form a resist pattern. The developer and rinse remaining in the resist are removed by evaporation to cure the resist. Finally, the mask pattern is finally transferred through the following processes: ashing and oxidizing removal of the unnecessary resist. The obtained semiconductor wafer w is obtained.

Thus, according to this embodiment, when there is a design change in the follower Bok mask M, determine the change area R at the stage of design data, a new drawing Ede Isseki S _N This change area R After the creation, this is merged with the drawing data SO outside the changed area to manufacture the changed photomask M, so that the mask pattern of the photomask M accompanying the design change must be created in a short time. Becomes possible.

FIG. 13 is a flowchart showing an outline of a photomask manufacturing method according to another embodiment of the present invention. FIG. 14 is an explanatory view conceptually showing the details of a photomask design change. FIG. FIG. 15 is an explanatory diagram showing a hierarchical structure of design data constituting the photomask of FIG. 14.

In the present embodiment, the process up to the step of narrowing down the design data before and after the design change (600) and obtaining the change area in the design data after the change (700) is the same as that of the previously described embodiment. However, as the next step, the parent block, which is the design data of the minimum block including the change area, and the child block, which is the design data of the lower hierarchy, are extracted (80). 0).

That is, in the photomask M of FIG. 14 exemplified with the same contents as FIG. 8, each block has the same hierarchical structure as FIG. 9 as shown in FIG. The shaded portion is the change area R. In this configuration, the block C, which is the minimum block including the change area R, becomes the parent data, and the block C and the two blocks H.I, which are the design data of the lower hierarchy, are extracted. . Therefore, as shown in the hatched portion in FIG. 14 and the hatched portion in FIG. 5, the blocks to be changed are C, H, and I. In this embodiment, the change area R Block I, which is not affected by this, is different from the above-mentioned embodiment, which is excluded from the change.)

After the extraction, new drawing data is created for the parent data (in the illustrated case, block C) and the child data (similarly, blocks H and I) according to the changed contents (900). Then, in the manner described above, the created drawing data and the unchanged drawing data are merged (100), and a photomask M is created (110). In this way, the parent data for the change area R and all the child data of this parent data Even if data is extracted and new drawing data is created for them,

_ A mask pattern for the accompanying photomask M can be created in a short time.

FIG. 16 is a flowchart showing an outline of a method for manufacturing a phase shift mask (photomask) according to still another embodiment of the present invention. FIGS. 17 to 20 are explanatory diagrams of a phase shift mask with an auxiliary pattern, and FIG. 17 is an explanatory diagram showing a transfer pattern formed on a semiconductor wafer according to the flowchart of FIG. FIG. 18 is an explanatory view showing a mask pattern, FIG. 19 is an explanatory view showing a transfer pattern formed on a semiconductor substrate by the mask pattern of FIG. 18, and FIG. 20 is a transfer pattern of FIG. FIG. 4 is an explanatory diagram showing a mask pattern for forming a transfer pattern. FIGS. 21 to 24 are explanatory diagrams of a Levenson type phase shift mask, and FIG. 21 shows a transfer pattern formed on a semiconductor device in accordance with the flowchart of FIG. 22 is an explanatory view showing a mask pattern, FIG. 23 is an explanatory view showing a transfer pattern formed on a semiconductor substrate by the mask pattern of FIG. 22, and FIG. 24 is a transfer pattern of FIG. 21. FIG. 4 is an explanatory view showing a mask pattern for forming a mask.

In the following, the present embodiment will be described based on the flow chart of FIG. 16 and the phase shift mask with the auxiliary pattern of FIGS. 17 to 20, and then the Levenson type of FIGS. 21 to 24 will be described. The phase shift mask will be described. For example, a phase shift mask with an auxiliary pattern applied to the formation of a contact hole or the like is provided with an auxiliary opening having a size that is not transferred onto the substrate, and a phase shifter is provided at the opening or the auxiliary opening. And inverts the phase of light transmitted through the portion where the phase shifter is provided. Thereby, the spread of the skirt of the light intensity distribution of the transmitted light is suppressed, a steep light intensity distribution is obtained, and pattern formation is performed with good resolution. A Levenson-type phase shift mask applied to the formation of a wiring layer, for example, has a phase shifter for inverting the phase on one side adjacent to an opening on the mask. Since the phases of the adjacent transmitted lights are inverted, they act to cancel each other out, so that the light intensity at the boundary of the transfer region becomes 0, and the pattern is formed with good resolution. However, the present invention is not limited to a self-aligned phase shift mask or a transmission type phase shift mask. It is also applied to other phase shift masks such as a foot mask.

This embodiment is a method for manufacturing a phase shift mask for transferring a pattern onto a semiconductor substrate while selectively shifting the phase of light. As shown in FIG. 16, first, a provisional phase shift mask is prepared. Create typical drawing data (12000).

In other words, when the two square transfer patterns 30 shown in FIG. 17 are formed on a semiconductor wafer, the phase shift mask with the auxiliary pattern is a pattern to be formed as shown in FIG. 18 (a). At four locations around the transfer area 31, auxiliary apertures 32 are formed automatically in which a sub-resolution phase shifter made of, for example, PMMA (polymethyl methacrylate) or SiO ₂ film is formed. Figure 18 (b)). By synthesizing such a mask pattern, provisional drawing data S shown in FIG. 18 (c) is created.

Here, the phase shift mask has a defect peculiar to the phase structure called a shift pattern defect. Therefore, in order to prevent the occurrence of shift pattern defects, an exposure prediction operation is performed on the drawing data S shown in FIG. 18 (c) in the physical mask pattern state by, for example, the die ratio reduction method (1). 3 0 0), and compares the calculation result with the design pattern. Then, an area where a shift pattern defect occurs in the drawing data S, that is, an area requiring correction, that is, a correction area R is obtained from the exposure prediction calculation result (140).

FIG. 19 shows the prediction result based on the drawing data S in FIG. 18 (c), that is, the pattern formed on the semiconductor wafer. In the drawing data S of FIG. 18 (c), an unnecessary pattern is formed between two transfer patterns as shown in the figure. Therefore, in the drawing data S, the auxiliary opening 32 between the transfer regions 31 becomes the correction region R. When the correction area R is obtained, new drawing data S according to the correction contents is created only for the area R (1500). That is, data correction is performed by restricting the automatic generation mode of the auxiliary opening 32, and the correction region R is formed as an integrated auxiliary opening 32 as shown in FIG. 20 (b). Then, the entire area is merged with the part that does not need to be corrected to form an auxiliary opening 32 shown in FIG. 19 (b) (1600), which is a transfer area shown in FIG. 20 (a). (Same as 18 (a)) 31 Combined with the mask pattern of 31 to obtain drawing data S shown in FIG. 20 (c). And after creating new drawing data S. Exposure prediction calculation is again performed based on the drawing data S (1300), and the steps (1300 to 16000) are repeated until there is no area that needs correction. At this time, it is desirable to create appropriate drawing data S while performing an exposure prediction operation only for the correction region R in a limited manner. By performing the operation only on the necessary part, the amount of operation is reduced, and the operation result can be obtained more quickly. If the correction region R disappears and the operation result that the transfer pattern 30 shown in FIG. 17 is formed is obtained, a phase shift mask is created (1700). If there is no correction region R as a result of the first exposure prediction calculation, it goes without saying that the process immediately shifts from the step (1400) to the step of creating a phase shift mask (1700). Based on Fig. 16 and Fig. 21 to Fig. 24, a case where the correction area R is limited by the exposure prediction calculation in the phase shift mask and the correction is performed in a limited manner will be further explained using the Levenson type phase shift mask as an example. I do.

When a series of rectangular transfer patterns 30 as shown in FIG. 21 are formed on a semiconductor wafer, the Levenson-type phase shift mask is designed to invert the phase of the transmitted light between adjacent transfer areas. Every other phase shifter is provided. Therefore, in order to form such a transfer pattern 30, a mask pattern having a transfer region 31a without a phase shifter shown in FIG. 22 (a) and a phase shifter shown in FIG. The provisional drawing data S shown in FIG. 22 (c) is created using the mask pattern formed with the transfer region 31b having the following (1200).

Then, an exposure prediction calculation is performed on the drawing data S shown in FIG. 22 (c) (1300), and a correction area R is obtained (1400). Here, as shown in FIG. 23, in the drawing data S in FIG. 22 (c), it is assumed that, as shown in FIG.

Therefore, new drawing data S is created for the correction area R only in accordance with the correction contents (1500). In other words, as shown in Fig. 24 (c), a correction to form an auxiliary pattern 31c having a width W is made, and this is merged with Figs. 24 (a) and (b) to 4 The drawing data S shown in (d) is used (16000). As a result, the left transfer area 31a becomes wider than the others by the width W in anticipation of the pattern narrowing. Then, after creating new drawing data S, the process (1) is performed until there is no area that needs to be corrected. 3 0 0-1 6 0 0) is repeated. At this time, it is desirable to perform the exposure prediction calculation only for the correction region R. Then, when the operation result indicating that the transfer patterns 30 having the same width are all formed as shown in FIG. 21 is finally obtained, a phase shift mask is created (1700).

As described above, according to the present embodiment, in the manufacture of the phase shift mask, the correction region R is obtained based on the result of the exposure prediction calculation, and a new drawing data S is created only for the changed region R. Overtime correction work can be performed in a short time.

As described above, the invention made by the inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various changes can be made without departing from the gist of the invention. Needless to say. Industrial applicability

As described above, the method for manufacturing a photomask, the method for manufacturing a phase shift mask, and the method for manufacturing a semiconductor device according to the present invention are suitable for use in a technique for changing the layout of a photomask forming a circuit element.

Claims

The scope of the claims

1. A method for manufacturing a photomask on which a pattern to be transferred onto a semiconductor substrate is formed, the method including the following steps (a) to (e).

(a) comparing the design data before and after the design change with each other,

(b) determining, from the comparison result, a changed area in the design data after the change that is different from the design data before the change,

(c) a step of creating new drawing data in accordance with the content of the change for the changed area; (d) the drawing data of the changed area and the drawing data other than the changed area that has already been created before the design change. The process of synthesizing,

2. The method of manufacturing a photomasks of claim 1, wherein said step (c) as follows E (c,) ~ follower Bok mask manufacturing method according to Toku徵in that it consists of (c _3).

(c,) obtaining parent data that is the design data of the smallest block including the change area in the design data that has been hierarchically designed;

(C 2) a step of converting the graphic coordinates of the child data relating to the change area into the coordinate system of the parent data among the child data which is the design data of the lower hierarchy of the parent data, (c ₃ ) A step of creating new drawing data in accordance with the changed contents of the parent data and the coordinate-transformed child data.

3. A method for manufacturing a photomask on which a pattern to be transferred onto a semiconductor X is formed, the method comprising the following steps (a) to (f).

(b) obtaining a changed area in the design data after the change that is different from the design data before the change from the result of the comparison,

(c) Extract the parent data, which is the minimum block including the change area, and the child data, which is the design data of the lower hierarchy, from the hierarchically designed design data. Process,

(D) creating new drawing data for the extracted parent data and child data in accordance with the changed content;

(e) synthesizing the drawing data with drawing data already created before the design change and not changed,

(f) a step of manufacturing a photomask after the design change based on the synthesized drawing data.

4. A method for manufacturing a phase shift mask for transferring a pattern onto a semiconductor substrate while selectively shifting the phase of light, the method comprising the following steps (a) to (f): Shift mask manufacturing method.

(a) creating temporary drawing data for the phase shift mask;

(b) performing an exposure prediction operation based on the drawing data;

(c) a step of obtaining an area in the drawing data that requires correction from the exposure prediction calculation result,

(d) creating new drawing data in accordance with the correction content for the area if the area that needs correction exists, and moving to step (f) if it does not exist;

(e) combining the drawing data and the drawing data that does not require correction;

5. The method of manufacturing a phase shift mask according to claim 4, wherein, after creating new drawing data in the step (d), appropriately performing an exposure prediction calculation on the corrected region in a limited manner. A method for manufacturing a phase shift mask, characterized by creating the above-mentioned drawing data.

6. A method for manufacturing a semiconductor device in which a pattern formed on a photomask is transferred onto a semiconductor substrate to form a predetermined electronic circuit, the method comprising the following steps (a) to (h). Semiconductor device manufacturing method.

(a) the step of comparing design data before and after the photomask design change with each other,

(b) The design data before the change in the design data after the change based on the result of the hikenko The process of seeking a change area that is different from the evening,

„(C) a step of creating new drawing data in accordance with the changed contents for the changed area;

(d) synthesizing the drawing data of the changed area and the drawing data other than the changed area that has already been created before the design change,

(e) manufacturing a photomask after the design change based on the synthesized drawing data;

(f) mounting the photo resist coated semiconductor wafer on a wafer stage of an exposure apparatus and positioning the semiconductor wafer at an exposure position;

(h) irradiating the photomask with exposure light to expose the pattern formed on the photomask to the semiconductor wafer.

7. The method of manufacturing a semiconductor device according to claim 6, wherein the step (c) includes the following steps:

(C,) a method of manufacturing a semiconductor device characterized by consisting of ~ (C _3).

(c,) obtaining parent data that is the design data of the smallest block that includes the change area in the hierarchically designed design data;

(C 2) a step of converting the graphic coordinates of the child data relating to the change area into the coordinate system of the parent data among the child data which is the design data of the lower hierarchy of the parent data;

(C3) a step of creating new drawing data in accordance with the changed contents of the parent data and the coordinate-transformed child data.

8. A method for manufacturing a semiconductor device for forming a predetermined electronic circuit by transferring a pattern formed on a photomask onto a semiconductor wafer, comprising the following steps (a) to (i). Semiconductor device manufacturing method.

(a) comparing the design data before and after the photomask design change with each other,

(b) a step of determining a changed area in the design data after the change that is different from the design data before the change from the result of the ratio drawing,

(c) Extract the parent data which is the smallest block including the change area and the child data which is the design data of the lower hierarchy from the hierarchically designed design data. Process,

_ (d) a step of creating new drawing data according to the changed contents for the extracted parent data and the child data,

(f) manufacturing a photomask after the design change based on the synthesized drawing data;

(g) mounting the semiconductor wafer coated with the photo resist on a stage of an exposure apparatus and positioning the semiconductor wafer at an exposure position;

(h) arranging the manufactured photomask on an optical path from an exposure light source to the semiconductor wafer;

(i) irradiating the photomask with exposure light to expose the pattern formed on the photomask to the semiconductor wafer.

9. A method for manufacturing a semiconductor device in which a pattern formed on a phase shift mask for selectively shifting the phase of light is transferred onto a semiconductor wafer to form a predetermined electronic circuit, the method comprising: A method for manufacturing a semiconductor device, comprising the steps of:

(a) creating a provisional plotting image for the phase shift mask;

(b) performing an exposure prediction operation based on the drawing data;

(c) a step of determining an area in the drawing data that needs to be corrected from the exposure prediction calculation result,

(e) a step of combining the drawing data with the drawing data that does not require correction; (f) a step of manufacturing a phase shift mask based on the combined drawing data;

(g) loading the semiconductor wafer coated with the photo resist on a wafer stage of an exposure apparatus and positioning the semiconductor wafer at an exposure position;

(h) arranging the manufactured phase shift mask on an optical path from an exposure light source to the semiconductor substrate; (i) irradiating the phase shift mask with exposure light to expose the semiconductor wafer to the pattern formed on the phase shift mask.

10. The method of manufacturing a semiconductor device according to claim 9, further comprising: after creating new drawing data in the step (d), performing a limited exposure prediction operation on the corrected region. A method for manufacturing a semiconductor device, comprising: