WO1997045983A1

WO1997045983A1 - Addressing device for an auxiliary station of a serial bus system, and method of addressing an auxiliary station

Info

Publication number: WO1997045983A1
Application number: PCT/DE1997/000936
Authority: WO
Inventors: Volker Aab; Gerhard Knecht; Harald Buehren
Original assignee: Robert Bosch Gmbh
Priority date: 1996-05-25
Filing date: 1997-05-09
Publication date: 1997-12-04
Also published as: DE19621272A1

Abstract

The invention concerns an addressing device for an auxiliary station (slave) of a serial bus system which preferably comprises a main station (master), at least two slaves (5.1, 5.2) and a data line, with a control device (21) which is connected to the data line (9), and with a switching device (23) which is coupled into the data line (9) to the subsequent slave (5) in order to interrupt the data line (9) as a function of a switching signal of the control device (21). The invention further concerns a method of addressing a slave with the above-mentioned addressing device.

Description

Addressing device for a slave station of a serial bus system and method for addressing a slave station

State of the art

The invention relates to an addressing device for a secondary station of a serial bus system, which preferably comprises a main station, at least two secondary stations and a data line, with a control device which is connected to the data line. The invention also relates to a bus system, preferably for motor vehicles, with a main station and at least two secondary stations, and a method for addressing a secondary station.

A generic bus system is known from DE-OS 43 40 048. It comprises a main station (hereinafter referred to as the master) and a number of secondary stations (hereinafter referred to as slaves) which can access a common bus line and exchange data. The individual slaves are addressed using individual identifiers, for example serial numbers, which are usually specified by the manufacturer. When configuring the Bus systems must therefore store these hardware implementations in the slaves in a memory of the master and, for example, link them with a function-specific specification of the respective slave.

This type of addressing via markings stored in slaves is in need of improvement, in particular with a view to reducing the hardware expenditure. Simplification is also desirable with regard to the configuration process if πan assumes that different identification values (when using a different serial number for each slave) must be taken into account in each bus system.

The object of the invention is therefore to provide an addressing device which enables addressing to be carried out independently of identifiers implemented permanently in the slaves.

This object is achieved by the addressing device according to claim 1.

Another object of the invention is to provide a method for addressing slaves that is simple to carry out.

This task is solved by the method specified in the subordinate method claim.

Advantages of the invention

The addressing device according to the invention for a slave station of a serial bus system has the advantage that the deposit there is no individual, unique identification in each slave, for example during production. This simplifies the production of the slaves on the one hand and the configuration of a bus system having these slaves on the other.

Because the slaves provided in a serial bus system are addressed based on their position within the series connection of slaves, individual identifications in the slaves are superfluous. For this purpose, each slave has a switching device which is coupled into the data line leading to the subsequent slave. The switching device on its part can be controlled by the master via the data line in order to either close or open it. However, if the data line to the subsequent slave is switched through, the data still tapped by the control device are ignored.

The use of a transistor, preferably a field effect transistor, as a switching device is particularly advantageous.

The control device is preferably designed as a microprocessor, so that more complex tasks can be carried out independently of the master.

With the aid of the method according to the invention, it is possible to address a slave in a particularly simple manner and independently of markings stored in the slaves. For this purpose, the data line is switched through with the aid of the addressing devices, preferably starting from the secondary station adjacent to the master, until the desired secondary station Position and thus the desired secondary station is reached. Because the slaves ignore the incoming data with the data line configured, only the desired slave receives and responds to the commands sent by the master.

A "reset" is preferably carried out before each addressing, that is to say all switching devices are interrupted, so that only the slave adjacent to the master is ready to receive.

The method has proven to be particularly advantageous in so-called CAN bus systems, with actuators preferably being assigned to the slaves.

Further advantageous refinements and developments of the invention result from the further subclaims and in connection with the following description.

drawing

The invention will now be explained using an exemplary embodiment with reference to the drawings. Show:

FIG. 1 shows a schematic illustration of a section of a bus system;

FIG. 2 shows a schematic illustration of a secondary station (slave);

Figure 3 is a schematic representation of a switching device, and Figure 4 is a flowchart to explain the operation of addressing a slave station.

Exemplary embodiment

FIG. 1 shows a bus system 1 which comprises a modular main station 3, hereinafter also called the master, and three modular secondary stations 5.1, 5.2 and 5.3, also called slaves below. The individual stations 3, 5 are connected to a bus 7, which has a data line 9 and two power supply lines 11.

In the. Bus system 1 is a so-called CAN bus system, in which the number of data lines and the transmission protocol are defined. Such a CAN bus system is preferably used in the motor vehicle sector. For example, the different heating flap drives of a motor vehicle air conditioning system are each controlled via a slave 5, which receives control data from the master 3.

The master 3 has at least one computer 13 which is connected to a storage unit 15. The computer 13 itself contains the CAN interface, not shown, which is connected to the data line 9. The computer 13 takes over the higher-level coordination of the individual slaves 5, evaluates the data coming from the slaves and issues corresponding control commands which then trigger a specific control program in the respective slave. - 6 -

The slaves 5, which are of identical construction in the present exemplary embodiment, each have an addressing device 17.1, 17.2 or 17.3, which in turn are connected to a motor 19.1, 19.2 or 19.3 of an actuator.

FIG. 1 clearly shows that the data line 9 does not run continuously, as is the case with the power supply lines 11, but that the addressing devices 17 are coupled into the data line 9. This means that the data line 9 runs from the computer 13 of the master 3 to the addressing device 17.1 of the adjacent slave 5.1. The data line 9 is then led from the addressing device 17.1 to the addressing device 17.2 of the adjacent slave 5.2. This course of the data lines 9 is then repeated in accordance with the number of connected slaves 5.

In FIG. 2, an individual slave 5.1 is shown in more detail by way of example for all connected slaves. The addressing device 17.1 thus comprises a control device 21.1 and a switching device 23.1. The CAN interface necessary for the transmission of the data is not shown.

The control device 21.1 controls the motor 19.1 as a function of certain stored control programs. The commands for executing these control programs are received by the control device 21.1 via the data line 9, to which it is connected within the addressing device 17.1. This data line 9, which comes from the left in the figure, is led via the switching device 23.1 to the subsequent slave 5.2. Depending on a control signal of the control device 21 transmitted via a control line 25, the switching device 23 is opened or closed. This means that in the open state there is no connection between the left data line 9.1 and the right data line 9.2, while in the closed state a connection is established.

The use of a field effect transistor 27 as switching device 23 is particularly advantageous, as is shown schematically in FIG. The control line 25 is connected to the gate of the FET'ε, while the data lines 9.1 and 9.2 are connected to the drain or the source of the FET. Of course, other electrically controllable switches are also conceivable.

The functioning of the addressing device 17 and the method for addressing a specific slave 5 will now be explained with reference to the flow chart of FIG. 4.

In the present example, slave 5.3 is to be addressed by master 3. For this purpose, first all switching devices 23 of the slaves 5 are brought into the open state, for example via a "RESET". Thus, only the slave 5.1 is connected to the master 3 via the data line 9.

The program shown in FIG. 4 is now started. In step 101, an internal counter i is first set to the value 1. The master 3 then sends a command in step 102. - 8 ^•

or a "BUS CIRCUIT" message via data line 9. This command is only received by the control device 21.1 of the slave 5.1 and has the effect that the control device 21.1 sends a control signal via the control line 25, which leads to the switching device 23.1 being closed (step 103). A data line connection is thus established between the master 3 and the slave 5.2 arranged from the master's perspective in a second position.

Simultaneously with the switching of the switching device 23.1, the control device 21.1 is set in a mode in which it essentially ignores the data which continue to arrive via the data line 9.1. Only a general command "DISCONNECT BUS" leads to an action, namely the opening of the switching device 23.1. This command is sent, for example, in the event of a RESET ".

In step 104, the internal payer i is incremented by 1, in the present case from 1 to 2.

Then in step 105 this value i is compared with the number N of the slave to be addressed. Since slave 5.3 is to be addressed, N = 3 must be set.

The comparison in step 105 thus yields a "NO", so that a return is made to step 101.

Steps 101 to 105 just described are now carried out again, but slave 5.2 is not affected, but now slave 5.2. Its switching device 23.2 is also closed, so that after step 105 is reached , Q -

a data line connection between the master 3 and the slave 5.3 is established.

The comparison in step 105 now yields the result "YES" since the internal payer i has reached the value 3. It does not branch back to step 101, but to the subsequent step 106.

In this step, the master 3 issues the message intended for the slave 5.3 or the control command. This command is transmitted via the data line 9 connected through to the slave 5.3 and received by the control device 21.3 of the slave 5.3 in step 107 and evaluated accordingly. For example, this message can contain the indication of a direction of rotation and an angle of rotation which the motor 19.3 is to execute. Since the control devices 21.1 and 21.2 of the two upstream slaves 5.1 and 5.2 are in the "IGNORE" mode, the command issued by the master does not result in actuation of the motors 19.1 and 19.2.

In this state, the slave 5.3 can not only receive the messages sent by the master 3, but can in turn transmit certain measurement data to the master 3, for example.

In step 108, the master 3 checks whether it still has to send messages which relate to slaves which are subordinate to the slave 5.3 just addressed, that is to say, a case with an N> 3. If this is the case, the program branches again to step 101 in order to carry out the sequence of steps from 101. 7 5983 PC17DE97 / 00936

• 10 -

Otherwise, a branch is made to step 109, in which the master 3 sends the command "UNCONNECT". As already mentioned, all slaves 5 whose control devices 21 are connected to the data line 9 react to this command.

In the present case, this means that the switching devices 23 of the slaves 5.1 and 5.2 are opened. The basic state from which the previously described addressing process originated has thus been reached.

With the addressing of a slave just described, it is therefore no longer necessary to store hardware-implemented address numbers in the master in the slaves and to carry out the addressing using this address number. Rather, only the sequence number of a slave, which depends on the number of slaves arranged between it and the master, is stored in the memory unit 15 of the master 3. The hardware implementation of an address number can thus be omitted.

The aforementioned type of addressing offers further advantages, which will be explained below without reference to a figure.

The serial connection of the data line 9 for addressing a particular slave additionally enables simple localization of possible defects on the bus line 7. For this purpose, the master 3 sends a "DIAGNOSTICS" message which the currently ready-to-receive slave receives and evaluates. If the slave is in an error-free state, it sends an acknowledgment message back to the master. If the master 3 does not receive an acknowledgment message, either the data line 9 to the corresponding slave is interrupted, or the program run within the slave is disrupted. In order to distinguish between these two cases, the master 3 generates a "POWER ON RESET" in which the energy supply to the slaves is briefly interrupted. This brief interruption leads to a RESET in each slave, that is, to a restart of its respective program.

If the "DIAGNOSE" message that is subsequently sent to the previously non-guiding slave again does not lead to an acknowledgment message, it can be assumed with a high degree of probability that the data line 9 has been interrupted, namely between master 3 and the addressed slave. The master 3 can further narrow down the location of the error on the basis of the number of the slave that has been properly acknowledged last.

The described addressing method also offers the possibility of dispensing with the so-called "WATCHDOC" function within the slaves. This WATCHDOG function means that each slave sends a message to the user at regular time intervals Master sends to inform him of its correct function.

Because the slaves are addressed at regular time intervals in the aforementioned addressing method, the WATCHDOG function can be carried out by master 3: by sending the "DIAGNOSTIC" command after issuing a "BUS DIAL" command. This command must be from that now - 1 2 -

connected slave can be answered with the message ACKNOWLEDGMENT ".

With this acknowledgment signal, the sending slave can of course also send its own messages, for example status, counter readings, diagnostic messages and so on, to the master 3.

The aforementioned addressing can also be used to assign an address number to the individual slaves, via which they can be addressed directly during operation without prior switching. For this purpose, for example, the value of the payer I is stored in a memory in the corresponding slave. This payer then serves as the address number for the respective slave.

A new assignment of the address is necessary when the operating voltage has been switched off.

In this mode of operation, it should be noted that all slaves are switched through and that the "ignore" mode is exited when the respective slave has received a date that corresponds to its address number.

Claims

Expectations

1. Addressing device for a slave station of a serial bus system, which preferably comprises a main station (3), at least two slave stations (5.1, 5.2) and a data line, with a control device (21) which is connected to the data line (9), characterized by a switching device (23), which is coupled into the data line (9) to the subsequent secondary station (5), and to interrupt the data line (9) depending on a switching signal from the control device (21).

2. Addressing device according to claim 1, characterized in that the switching device (23) is a transistor, preferably a field effect transistor, the control input of which is connected to the control device (21).

3. Addressing device according to one of the preceding claims, characterized in that the control device (21) is designed as a microprocessor.

4. Addressing device according to one of the preceding claims, characterized in that the control device (21) is designed such that it ignores incoming data, provided that the switching device (23) is in the non-interrupted state.

5. Addressing device according to one of the preceding claims, characterized in that the

Control device (21) has a memory into which an address number can be written.

6. bus system, preferably for motor vehicles, with a main station (3) and at least two secondary stations (5), each having an addressing device (17) according to one of claims 1 to 4, characterized in that the main station ¬ tion comprises a storage unit (15) in which the number of upstream upstream stations is stored for each secondary station.

7. Bus system according to claim 6, characterized in that the allocation table can be entered manually.

8. Bus system according to claim 6 or 7, characterized in that it is a CAN bus system.

9. A method for addressing a secondary station (5) according to one of claims 1 to 5, characterized in that the selection of the secondary station to be addressed is carried out depending on its sequence position within the secondary stations arranged one behind the other.

10. The method according to claim 9, characterized gekennzeich¬ net that for the selection of the N-th slave station, beginning with the master adjacent to the first master station (5.1), the data line (9) in sequence from one slave station to the next is switched through to the Nth slave station.

11. The method according to claim 10, characterized in that, before each selection, all secondary stations (5) are uncoupled from the data line (9), so that only the secondary station (5.1) adjacent to the main station (3) is connected via the data line (9). Data received from the main station.

12. The method according to any one of claims 10 or 11, characterized in that each time a secondary station (5) is switched through, a DIAGNOSTIC message is sent from the main station (3), which the addressed secondary station functions correctly with an ACKNOWLEDGE signal answered.