WO1993011558A1 - Method of modifying contact resistance in semiconductor devices and articles produced thereby - Google Patents

Method of modifying contact resistance in semiconductor devices and articles produced thereby Download PDF

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Publication number
WO1993011558A1
WO1993011558A1 PCT/US1992/010213 US9210213W WO9311558A1 WO 1993011558 A1 WO1993011558 A1 WO 1993011558A1 US 9210213 W US9210213 W US 9210213W WO 9311558 A1 WO9311558 A1 WO 9311558A1
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WIPO (PCT)
Prior art keywords
tungsten
titanium nitride
substrate
layer
contact
Prior art date
Application number
PCT/US1992/010213
Other languages
French (fr)
Inventor
Eric C. Eichman
Steven D. Marcus
J. B. Price
James C. Blair
Original Assignee
Materials Research Corporation
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Filing date
Publication date
Application filed by Materials Research Corporation filed Critical Materials Research Corporation
Publication of WO1993011558A1 publication Critical patent/WO1993011558A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table

Definitions

  • the present invention relates to semiconduc ⁇ tor devices and more particularly to a process for improving the contact resistance of doped silicon junctions in semiconductor devices.
  • Semiconductor devices are typically fab ⁇ ricated starting with a substrate, e.g., a silicon wafer, having an insulating dielectric layer such as silicon dioxide on the surface thereof.
  • the silicon substrate has contact or junction regions in which the silicon is doped with boron, phosphorous, arsenic, or any other suitable doping compound.
  • the doped contact regions in the substrate are exposed by etching a desired pattern in the oxide layer to form contact or via holes therein. Such etching is performed using etching techniques well known in the art.
  • the contact holes are then filled with a conductor, such as aluminum, to provide electrical contact between the doped regions of the substrate and a conductive film which may be deposited over the dielectric insulating layer to serve as a low resistance interconnection within the semiconductor device.
  • a conductor such as aluminum
  • Such films may be aluminum, doped poly- crystalline silicon, tungsten, or another refractory metal.
  • the fabrication of semiconductor devices typically includes as a first step etching the insulating layer to form contact holes therein. Subsequently, the barrier layer is deposited in the contact holes, and thereafter the desired interconnect layer may be deposited.
  • the surfaces upon which the various layers are deposited be free from impurities such as oxide films which form upon exposure to oxygen, i.e.. native oxide films.
  • the failure to provide clean contact between the layers of conductive material results in undesirably high contact resistance of the semiconductor device at the location of the contact regions. This high contact resistance greatly limits overall device speed and limits the development of higher density semiconductor devices.
  • U.S. Patent No. 4,902,645 discloses a dry etching treatment in which the native oxide layer is removed by a sputtering process or, alternatively, is etched away using an activated halide in combination with microwaves, high frequency waves, or ultraviolet light. In either case, the native oxide layer and the adjacent oxide insulator layer are both simultaneously etched, which is unde ⁇ sirable in certain circumstances. Furthermore, such processes may require more complicated apparatus to achieve the desired result.
  • 5,023,201 discloses the removal of a native oxide layer on an exposed titanium silicide (TiSi ) surface by exposing that surface to a dilute hydrogen fluoride (HF) acid solution. This method is undesirable where the semiconductor devices being fabricated includes sensitive components and/or materials which are deleteriously affected by exposure to an acid solution.
  • HF hydrogen fluoride
  • the present invention overcomes the problems of the prior art processes mentioned above and improves the contact resistance of semiconductor devices by removing native oxide layers and providing a low contact resistance intermediary layer prior to depositing a titanium nitride barrier layer and a subsequent conductive interconnect layer thereon.
  • One aspect of the present invention is directed to a method wherein a thin film of tungsten (W) is selectively deposited by chemical vapor deposi ⁇ tion in the contact holes on the exposed doped regions of the semiconductor substrate. These exposed regions will have a native oxide film thereon due to their exposure to oxygen.
  • the thin tungsten film deterio ⁇ rates the native oxide present on the substrate surface and makes a clean contact to the doped silicon regions.
  • the tungsten is selectively deposited by silane (SiH.) reduction of tungsten hexafluoride ( F g ) in the presence of a suitable diluent carrier gas such as hydrogen, nitrogen or argon.
  • This selective tungsten deposition step is preferably carried out at a pressure in the range of 2 to 150 torr and at a temperature in the range of 240-400°C.
  • a titanium nitride (TiN) barrier layer is deposited on the exposed surface of the tungsten film in the contact hole.
  • the titanium nitride layer is deposited by low pres ⁇ sure chemical vapor deposition utilizing titanium tetrachloride (TiCl.) and ammonia (NH ) as reactant gases.
  • TiCl. titanium tetrachloride
  • NH ammonia
  • the deposition of titanium nitride is effected at a temperature in the range of 400-750°C. At this elevated temperature, any tungsten oxides present on the exposed tungsten surface are evolved, resulting in clean contact of the titanium nitride to the tungsten film.
  • the titanium nitride may be deposited utilizing suitable sputtering techniques.
  • the contact resis ⁇ tance of the resulting semiconductor device is less than about 5x10 -7 ohm cm2.
  • the contact resistance of the resulting semiconductor device is less than about 1x10 -7 ohm cm2.
  • the present invention encompasses semiconductor devices produced according to the method of this invention. More particularly, the semiconductor devices of this invention include a thin tungsten film deposited on the exposed doped regions of a semiconductor substrate in the contact holes. The tungsten film deteriorates or reduces any native oxide present on the substrate and makes a clean contact thereto.
  • the devices of the invention further include a titanium nitride barrier layer deposited over the thin tungsten film. The "titanium nitride barrier layer is deposited on the tungsten film at a sufficiently high temperature such that any tungsten oxides present on the exposed tungsten surface are evolved and the titanium nitride makes a clean contact to the tungsten layer.
  • the device of the invention has significantly reduced contact resistance vis-a-vis prior art devices.
  • Fig. 1 is a schematic sectional view of a silicon substrate, an etched insulating layer and a native oxide layer on the exposed substrate surface.
  • Fig. 2 is a schematic sectional view of the silicon substrate of Fig. 1 wherein a thin tungsten film has been deposited in the contact hole.
  • Fig. 3 is a schematic sectional view of the semiconductor device shown in Fig. 2 wherein a titan ⁇ ium nitride barrier layer has been deposited on the tungsten film and an additional blanket conductor layer has been deposited thereon.
  • Fig. 4 is a schematic sectional view of an alternative embodiment of the semiconductor device shown in Fig. 3 wherein the titanium nitride barrier layer is a thin blanket layer.
  • FIG. 1 shows a semiconductor device 10 which comprises a substrate 12, which is typically a silicon substrate.
  • Substrate 12 has a plurality (only one shown) of doped contact or junction regions 14, which are formed by techniques well known in the art and which do not form a part of the present invention.
  • a semiconductor device initially has a continuous dielectric insulating layer 16 formed on the substrate.
  • This dielectric insulating layer may be a doped or undoped, deposited or grown silicon dioxide insulating layer.
  • Insulating layer 16 is then selectively etched by known techniques to form contact holes 18 (only one shown) in which the doped regions 14 are exposed. Exposure of the device to oxygen oxidizes the silicon substrate and a thin layer of native oxide 20 is formed on the exposed surface of doped regions 14. This native oxide layer 20 must be removed since it increases the contact resistance of the semiconductor device.
  • native oxide layer 20 is removed or deteri ⁇ orated by selectively depositing a thin film of tungsten 21 in the contact hole 18 on the surface of the exposed silicon substrate at the location of the doped regions 14.
  • the deposition of tungsten removes the native oxide 20 and forms a clean contact with the doped region 14 of the substrate, as shown in Fig. 2.
  • Deposition of selective tungsten is accomplished by the silane reduction of tungsten hexafluoride in the presence of a diluent carrier gas such as hydrogen, nitrogen or argon at a pressure in the range of 2 to 150 m torr and a temperature in the range of 240-400°C.
  • silane is utilized at a flow rate of about 0.5 to 4.0 seem (standard cubic centi ⁇ meters)
  • tungsten hexafluoride is utilized at a rate of about 1.0 to 10.0 seem
  • hydrogen is utilized at a flow rate of about 6 to 50 seem.
  • a barrier layer 22 of titanium nitride is deposited by low pressure chemical vapor deposition on the exposed thin tungsten film 21, as shown in Fig. 3. Titanium nitride layer 22 is deposited using known techniques. More particularly, the deposition is effected at a temperature in the range of 400-750°C and at a pressure in the range of about 50-50,000 m torr.
  • the titanium nitride deposition preferably utilizes titanium tetrachloride at about 10-30 seem, ammonia at approx ⁇ imately 100 seem and argon at approximately 20-30,000 seem.
  • the titanium nitride acts as a barrier layer to inhibit aluminum spiking when aluminum is deposited as a blanket conductive interconnect layer 24 on the semiconductor device 10, as shown in Fig. 3. It will be appreciated that other materials may be used for interconnect layer 24, such as tungsten, or other suitable refractory metals. Additionally, the titanium nitride layer 22 may act as an adhesion layer for subsequent blanket tungsten deposition.
  • a semiconductor device 10 comprises a silicon wafer substrate 12, a dielectric insulating layer 16 having at least one contact hole 18 etched therein to expose doped regions 14 of the silicon substrate.
  • the device 10 further comprises a thin film 21 of tungsten selectively deposited by chemical vapor deposition on the exposed substrate surface and making clean contact thereto by the reduction or deterioration of any native oxide layer present.
  • the tungsten layer acts as a low contact resistance intermediary layer.
  • the device further comprises a titanium nitride barrier layer deposited in the contact hole 18 on the exposed surface of the tungsten layer 21.
  • the deposition of the titanium nitride barrier layer is sufficiently high (on the order of 400-750°C) that any tungsten oxides present on the exposed surface of tungsten layer 21 thus are evolved and the titanium nitride makes clean contact to the tungsten layer.
  • the device 10 may further comprise an additional blanket layer 24 of aluminum, tungsten, or any other suitable conductor.
  • the semiconductor device 10 of the present invention possesses superior contact resistance properties. More particularly, because of the clean contact between the thin tungsten film 21 and the doped region 14 of the silicon substrate 12, together with the clean contact between the titanium nitride layer 22 and the tungsten film 21, the contact resis-
  • _ 7 tance of the final product is less than about 5x10 ohm cm2 in the case of p-type dopants in the silicon substrate, and less than about 1x10 —7 ohm cm2 m the case of n-type dopants, both of which are significant ⁇ ly lower than prior art devices that may have contact resistance values on the order of 5x10 -5 ohm cm2.
  • Fig. 4 shows an alternative embodiment of the semiconductor device of the present invention.
  • the titanium nitride barrier layer 22 is a thin blanket layer which covers both the dielectric layer 16 as well as the tungsten film 21.
  • the subsequently applied conductor layer 24 covers the titanium nitride layer and fills in the remainder of contact hole 18.

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

A method is disclosed for modifying (reducing) the contact resistance in semiconductor devices having doped silicon junctions (14). The method includes selectively depositing a thin film of tungsten (21) on the exposed surface of a silicon wafer substrate (12) which has a native oxide layer thereon. The tungsten reduces or deteriorates the native oxide layer and makes clean contact to the silicon substrate. Subsequently a titanium nitride barrier layer (22) is deposited over the tungsten layer (21). Semiconductor devices produced according to the method of the invention have contact resistance values less than about 5x10?-7 ohm cm2¿.

Description

METHOD OP MODIFYING CONTACT RESISTANCE IN SEMICONDUCTOR DEVICES AND ARTICLES PRODUCED THEREBY
Field of the Invention
The present invention relates to semiconduc¬ tor devices and more particularly to a process for improving the contact resistance of doped silicon junctions in semiconductor devices. Background of the Invention
Semiconductor devices are typically fab¬ ricated starting with a substrate, e.g., a silicon wafer, having an insulating dielectric layer such as silicon dioxide on the surface thereof. In many applications, the silicon substrate has contact or junction regions in which the silicon is doped with boron, phosphorous, arsenic, or any other suitable doping compound. The doped contact regions in the substrate are exposed by etching a desired pattern in the oxide layer to form contact or via holes therein. Such etching is performed using etching techniques well known in the art. The contact holes are then filled with a conductor, such as aluminum, to provide electrical contact between the doped regions of the substrate and a conductive film which may be deposited over the dielectric insulating layer to serve as a low resistance interconnection within the semiconductor device. Such films may be aluminum, doped poly- crystalline silicon, tungsten, or another refractory metal.
The deposition of aluminum as the intercon¬ nect layer over an oxide insulating layer having contact holes therein has several drawbacks. One of these which is of particular concern is that aluminum diffuses rapidly or "spikes11 into the silicon contact or junction regions exposed in the contact holes. As a means for inhibiting aluminum spiking in doped silicon contacts, it is known to deposit a barrier layer in the contact holes over the silicon contacts. One suitable barrier material is titanium nitride (TiN) and it may be deposited by known chemical vapor deposition or sputtering techniques.
The fabrication of semiconductor devices including, among other things, a barrier layer and an interconnect layer, as described above, typically includes as a first step etching the insulating layer to form contact holes therein. Subsequently, the barrier layer is deposited in the contact holes, and thereafter the desired interconnect layer may be deposited. In such fabrication processes, it is imperative that the surfaces upon which the various layers are deposited be free from impurities such as oxide films which form upon exposure to oxygen, i.e.. native oxide films. The failure to provide clean contact between the layers of conductive material results in undesirably high contact resistance of the semiconductor device at the location of the contact regions. This high contact resistance greatly limits overall device speed and limits the development of higher density semiconductor devices.
Various techniques are known for removing native oxide films prior to performing chemical vapor deposition of subsequent layers over silicon contact regions. For example, U.S. Patent No. 4,902,645 discloses a dry etching treatment in which the native oxide layer is removed by a sputtering process or, alternatively, is etched away using an activated halide in combination with microwaves, high frequency waves, or ultraviolet light. In either case, the native oxide layer and the adjacent oxide insulator layer are both simultaneously etched, which is unde¬ sirable in certain circumstances. Furthermore, such processes may require more complicated apparatus to achieve the desired result. U.S. Patent No. 5,023,201 discloses the removal of a native oxide layer on an exposed titanium silicide (TiSi ) surface by exposing that surface to a dilute hydrogen fluoride (HF) acid solution. This method is undesirable where the semiconductor devices being fabricated includes sensitive components and/or materials which are deleteriously affected by exposure to an acid solution.
There is a need for semiconductor devices which have improved contact resistance and for a process of making such devices wherein native oxides present during fabrication are removed by steps which do not have the drawbacks associated with the prior art methods.
Summary of the Invention
The present invention overcomes the problems of the prior art processes mentioned above and improves the contact resistance of semiconductor devices by removing native oxide layers and providing a low contact resistance intermediary layer prior to depositing a titanium nitride barrier layer and a subsequent conductive interconnect layer thereon.
One aspect of the present invention is directed to a method wherein a thin film of tungsten (W) is selectively deposited by chemical vapor deposi¬ tion in the contact holes on the exposed doped regions of the semiconductor substrate. These exposed regions will have a native oxide film thereon due to their exposure to oxygen. The thin tungsten film deterio¬ rates the native oxide present on the substrate surface and makes a clean contact to the doped silicon regions. The tungsten is selectively deposited by silane (SiH.) reduction of tungsten hexafluoride ( Fg) in the presence of a suitable diluent carrier gas such as hydrogen, nitrogen or argon. This selective tungsten deposition step is preferably carried out at a pressure in the range of 2 to 150 torr and at a temperature in the range of 240-400°C.
Subsequently, a titanium nitride (TiN) barrier layer is deposited on the exposed surface of the tungsten film in the contact hole. Preferably, the titanium nitride layer is deposited by low pres¬ sure chemical vapor deposition utilizing titanium tetrachloride (TiCl.) and ammonia (NH ) as reactant gases. The deposition of titanium nitride is effected at a temperature in the range of 400-750°C. At this elevated temperature, any tungsten oxides present on the exposed tungsten surface are evolved, resulting in clean contact of the titanium nitride to the tungsten film. Alternatively, the titanium nitride may be deposited utilizing suitable sputtering techniques.
When the method of the present invention is used in connection with substrates having contact regions doped with p-type dopants, the contact resis¬ tance of the resulting semiconductor device is less than about 5x10 -7 ohm cm2. When the method is used in connection with substrates having contact regions doped with n-type dopants, the contact resistance of the resulting semiconductor device is less than about 1x10 -7 ohm cm2. Thi.s represents a substantial reduc¬ tion in the contact resistance of devices wherein the titanium nitride barrier layer is deposited directly onto the exposed substrate surface. Such devices have
-5 a contact resistance on the order of about 5x10 ohm cm 2. Thi.s signi.fi.cant reducti.on in contact resistance improves the speed at which the ultimate device can be operated.
In another aspect, the present invention encompasses semiconductor devices produced according to the method of this invention. More particularly, the semiconductor devices of this invention include a thin tungsten film deposited on the exposed doped regions of a semiconductor substrate in the contact holes. The tungsten film deteriorates or reduces any native oxide present on the substrate and makes a clean contact thereto. The devices of the invention further include a titanium nitride barrier layer deposited over the thin tungsten film. The "titanium nitride barrier layer is deposited on the tungsten film at a sufficiently high temperature such that any tungsten oxides present on the exposed tungsten surface are evolved and the titanium nitride makes a clean contact to the tungsten layer. The device of the invention has significantly reduced contact resistance vis-a-vis prior art devices.
Brief Description of the Drawings
Fig. 1 is a schematic sectional view of a silicon substrate, an etched insulating layer and a native oxide layer on the exposed substrate surface. Fig. 2 is a schematic sectional view of the silicon substrate of Fig. 1 wherein a thin tungsten film has been deposited in the contact hole.
Fig. 3 is a schematic sectional view of the semiconductor device shown in Fig. 2 wherein a titan¬ ium nitride barrier layer has been deposited on the tungsten film and an additional blanket conductor layer has been deposited thereon.
Fig. 4 is a schematic sectional view of an alternative embodiment of the semiconductor device shown in Fig. 3 wherein the titanium nitride barrier layer is a thin blanket layer.
Detailed Description of the Invention
For purposes of illustration and description of the present invention, a basic semiconductor device structure useful in the practice of the present invention will be described. It should be appreci¬ ated, however, that various other configurations and/or arrangements can be utilized.
Figure 1 shows a semiconductor device 10 which comprises a substrate 12, which is typically a silicon substrate. Substrate 12 has a plurality (only one shown) of doped contact or junction regions 14, which are formed by techniques well known in the art and which do not form a part of the present invention. Typically, a semiconductor device initially has a continuous dielectric insulating layer 16 formed on the substrate. This dielectric insulating layer may be a doped or undoped, deposited or grown silicon dioxide insulating layer. Insulating layer 16 is then selectively etched by known techniques to form contact holes 18 (only one shown) in which the doped regions 14 are exposed. Exposure of the device to oxygen oxidizes the silicon substrate and a thin layer of native oxide 20 is formed on the exposed surface of doped regions 14. This native oxide layer 20 must be removed since it increases the contact resistance of the semiconductor device.
In accordance with one aspect of the present invention, native oxide layer 20 is removed or deteri¬ orated by selectively depositing a thin film of tungsten 21 in the contact hole 18 on the surface of the exposed silicon substrate at the location of the doped regions 14. The deposition of tungsten removes the native oxide 20 and forms a clean contact with the doped region 14 of the substrate, as shown in Fig. 2. Deposition of selective tungsten is accomplished by the silane reduction of tungsten hexafluoride in the presence of a diluent carrier gas such as hydrogen, nitrogen or argon at a pressure in the range of 2 to 150 m torr and a temperature in the range of 240-400°C. Preferably, silane is utilized at a flow rate of about 0.5 to 4.0 seem (standard cubic centi¬ meters) , tungsten hexafluoride is utilized at a rate of about 1.0 to 10.0 seem, and hydrogen is utilized at a flow rate of about 6 to 50 seem. Once the thin tungsten film 21 has been deposited, a barrier layer 22 of titanium nitride is deposited by low pressure chemical vapor deposition on the exposed thin tungsten film 21, as shown in Fig. 3. Titanium nitride layer 22 is deposited using known techniques. More particularly, the deposition is effected at a temperature in the range of 400-750°C and at a pressure in the range of about 50-50,000 m torr. By depositing the titanium nitride at this elevated temperature, any tungsten oxides which may have formed on the exposed tungsten surface will be evolved and thus the titanium nitride layer will form a clean contact with the tungsten layer. The titanium nitride deposition preferably utilizes titanium tetrachloride at about 10-30 seem, ammonia at approx¬ imately 100 seem and argon at approximately 20-30,000 seem.
The titanium nitride acts as a barrier layer to inhibit aluminum spiking when aluminum is deposited as a blanket conductive interconnect layer 24 on the semiconductor device 10, as shown in Fig. 3. It will be appreciated that other materials may be used for interconnect layer 24, such as tungsten, or other suitable refractory metals. Additionally, the titanium nitride layer 22 may act as an adhesion layer for subsequent blanket tungsten deposition.
In accordance with a further aspect of the present invention, a semiconductor device 10 comprises a silicon wafer substrate 12, a dielectric insulating layer 16 having at least one contact hole 18 etched therein to expose doped regions 14 of the silicon substrate. The device 10 further comprises a thin film 21 of tungsten selectively deposited by chemical vapor deposition on the exposed substrate surface and making clean contact thereto by the reduction or deterioration of any native oxide layer present. The tungsten layer acts as a low contact resistance intermediary layer. The device further comprises a titanium nitride barrier layer deposited in the contact hole 18 on the exposed surface of the tungsten layer 21. The deposition of the titanium nitride barrier layer is sufficiently high (on the order of 400-750°C) that any tungsten oxides present on the exposed surface of tungsten layer 21 thus are evolved and the titanium nitride makes clean contact to the tungsten layer. The device 10 may further comprise an additional blanket layer 24 of aluminum, tungsten, or any other suitable conductor.
The semiconductor device 10 of the present invention possesses superior contact resistance properties. More particularly, because of the clean contact between the thin tungsten film 21 and the doped region 14 of the silicon substrate 12, together with the clean contact between the titanium nitride layer 22 and the tungsten film 21, the contact resis-
_7 tance of the final product is less than about 5x10 ohm cm2 in the case of p-type dopants in the silicon substrate, and less than about 1x10 —7 ohm cm2 m the case of n-type dopants, both of which are significant¬ ly lower than prior art devices that may have contact resistance values on the order of 5x10 -5 ohm cm2.
Fig. 4 shows an alternative embodiment of the semiconductor device of the present invention. In this embodiment, the titanium nitride barrier layer 22 is a thin blanket layer which covers both the dielectric layer 16 as well as the tungsten film 21. The subsequently applied conductor layer 24 covers the titanium nitride layer and fills in the remainder of contact hole 18.
It will be appreciated by persons skilled in the art that various modifications can be made to the method and device of the present invention without departing from the scope of the present invention as defined by the appended claims.
What is claimed is:

Claims

1. A method of modifying the contact resistance of wafers used for integrated circuits, comprising the steps of: selectively depositing, by chemical vapor deposition, a thin film of tungsten on the exposed surface of a silicon wafer substrate having a native oxide layer thereon, whereby said native oxide present on said exposed surface is reduced so that said tungsten film makes clean contact to said substrate; and depositing, by chemical vapor deposition, a titanium nitride barrier layer over the exposed surface of said tungsten film, wherein said titanium nitride deposition is effected at a sufficiently high temperature to evolve any tungsten oxide present on the exposed tungsten surface so that said titanium nitride layer makes clean contact to said tungsten film.
2. The method of claim 1 wherein said tungsten film is deposited by silane reduction of tungsten hexafluoride in the presence of a carrier gas selected from a group comprising hydrogen, nitrogen and argon.
3. The method of claim 2 wherein said deposi¬ tion takes place at a temperature in the range of about 240-400°C.
4. The method of claim 3 wherein said deposi¬ tion takes place at a pressure in the range of about 2-150 m torr.
5. The method of claim 1 wherein said titanium nitride layer is deposited by low pressure chemical vapor deposition utilizing titanium tetrachloride and ammonia as feactant gases.
6. The method of claim 5 wherein said titanium nitride deposition takes place at a temperature in the range of about 400-750°C.
7. The method of claim 6 wherein said titanium nitride deposition takes place at a pressure in the range of about 50 to 50,000 m torr.
8. A method of making wafers used for inte¬ grated circuits, said wafers having reduced contact resistance, comprising the steps of: selectively depositing, by chemical vapor deposition, a thin film of tungsten on the exposed surface of a silicon wafer substrate having a native oxide layer thereon, whereby said native oxide present on said exposed surface is reduced so that said tungsten film makes clean contact to said substrate; depositing, by chemical vapor deposition, a titanium nitride barrier layer over the exposed surface of said tungsten film, wherein said titanium nitride deposition is effected at a sufficiently high temperature to evolve any tungsten oxide present on the exposed tungsten surface so that said titanium nitride layer makes clean contact to said tungsten film; whereby the clean contact between said tungsten film and said substrate, and the clean contact between said titanium nitride layer and said tungsten film serve to reduce the contact resistance of said wafer at the location of said tungsten and titanium nitride layers.
9. The method of claim 8 wherein said contact resistance of said wafer is less than about 5x10 —7 ohm cm 2.
10. The method of claim 8 wherein said tungsten film is deposited by silane reduction of tungsten hexafluoride in the presence of a carrier gas selected from a group comprising hydrogen, nitrogen and argon.
11. The method of claim 10 wherein said deposi¬ tion takes place at a temperature in the range of about 240-400°C.
12. The method of claim 11 wherein said deposi¬ tion takes place at a pressure in the range of about 2-150 m torr.
13. The method of claim 8 wherein said titanium nitride layer is deposited by low pressure chemical vapor deposition utilizing titanium tetrachloride and ammonia as reactant gases.
14. The method of claim 13 wherein said titanium nitride deposition takes place at a temperature in the range of about 400-750°C.
15. The method of claim 14 wherein said titanium nitride deposition takes place at a pressure in the range of about 50 to 50,000 m torr.
16. A wafer for integrated circuits having reduced contact resistance, comprising: a substrate; an insulating layer on one surface of said substrate, said insulating layer having a contact hole formed therein such that a portion of said one surface of said substrate is exposed; a thin film of tungsten selectively depo¬ sited, by chemical vapor deposition, in said contact hole and on said exposed surface of said substrate, whereby any native oxide present on said exposed surface is reduced so that said tungsten film makes clean contact to said substrate; and a barrier layer of titanium nitride depo¬ sited, by chemical vapor deposition, over the exposed surface of said tungsten film, wherein said titanium nitride deposition is effected at a sufficiently high temperature to evolve any tungsten oxide present on said exposed tungsten surface so that said titanium nitride layer makes clean contact to said tungsten film.
17. The wafer of claim 16 wherein said wafer has a contact resistance less than about 5x10 -7 ohm cm2 at the location of said tungsten and titanium nitride layers.
18. The wafer of claim 17 wherein said substrate is silicon.
19. The wafer of claim 18 wherein said insulat¬ ing layer is a dielectric insulating layer.
20. The wafer of claim 19 wherein said substrate is doped at the location of the contact hole in said insulating layer.
PCT/US1992/010213 1991-11-26 1992-11-24 Method of modifying contact resistance in semiconductor devices and articles produced thereby WO1993011558A1 (en)

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WO1993025721A1 (en) * 1992-06-15 1993-12-23 Materials Research Corporation Method of nucleating tungsten on titanium nitride by cvd without silane
FR2707042A1 (en) * 1993-06-25 1994-12-30 Mitsubishi Electric Corp
WO2002037557A2 (en) * 2000-11-06 2002-05-10 Infineon Technologies Ag Method for producing an integrated circuit, at least partially transforming an oxide layer into a conductive layer
US10833199B2 (en) 2016-11-18 2020-11-10 Acorn Semi, Llc Nanowire transistor with source and drain induced by electrical contacts with negative Schottky barrier height
US10872964B2 (en) 2016-06-17 2020-12-22 Acorn Semi, Llc MIS contact structure with metal oxide conductor
US10879366B2 (en) 2011-11-23 2020-12-29 Acorn Semi, Llc Metal contacts to group IV semiconductors by inserting interfacial atomic monolayers
US10937880B2 (en) 2002-08-12 2021-03-02 Acorn Semi, Llc Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
US11043571B2 (en) 2002-08-12 2021-06-22 Acorn Semi, Llc Insulated gate field effect transistor having passivated schottky barriers to the channel

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