WO1993006676A1

WO1993006676A1 - Nonblocking point-to-point fast packet/circuit switching networks

Info

Publication number: WO1993006676A1
Application number: PCT/US1992/007979
Authority: WO
Inventors: Dong-Jye Shyy
Original assignee: Communications Satellite Corporation
Priority date: 1991-09-26
Filing date: 1992-09-25
Publication date: 1993-04-01

Abstract

A point-to-point multicast nonblocking self-routing switching apparatus (Fig. 4) receives input messages, each destined to a particular output of the switching apparatus. Each input message has a routing tag (Figs. 2b, 2c, 2d) made up of a plurality of one-bit sections (Figs. 2b, 2c, 2d), each section relating to a level (1-a) of a tree hierarchy (Fig. 2a) of the outputs of the switching apparatus. The input messages are distributed through the apparatus on their way to their respective outputs, by routing the messages through a plurality of switches. Input messages destined for odd-numbers outputs are initially sent to one group of switches and messages destined for even-numbered outputs are initially sent to another group of switches.

Description

NONBLOCKING POINT-TO-POINT FAST PACKET/CIRCUIT SWITCHING NETWORKS

FIELD OF THE INVENTION The present invention relates to non-blocking point-to-point fast packet/circuit switching networks, for example, for use in digital communications systems.

BACKGROUND OF THE INVENTION The following discussion focuses on packet switching, although the invented switching architecture can also be used for circuit switching. In this section, the possible blocking types a packet may encounter in a fast packet switching are introduced first. The invented switching network resolves one of the blocking types: internal blocking. The principles of several currently available switching architectures used to resolve internal blocking are described. The disadvantages of each switching architecture are discussed. Finally, the advantages of the invented switching architecture over the currently available switching architectures are addressed. Blocking Types

In a fast packet switch, there are three possible types of blocking a packet may encounter: internal blocking, output blocking, and head of line blocking. Not all blocking types exist in every switching architecture. However, the output blocking problem is an unavoidable situation of packet switching; therefore, it exists in every switching architecture. Internal Blocking The first type of blocking is internal blocking which occurs within the switching fabric. Basically, this happens because a link only can serve one packet at a time. If two packets contend for the same link, then only one is allowed to use the link and the other is blocked. Output Blocking

The second type of blocking is output blocking which occurs at the output ports of the switch. The key difference between internal blocking and output blocking is that output blocking is an unavoidable situation in the packet switching environment. But, with a careful design of the switching architecture, internal blocking can be avoided. Head of Line Blocking

The third type of blocking is head of line blocking which occurs at the output port queue or at the switching element's buffer within the switching fabric. This blocking is a side effect resulting from the previous two types of blocking. Assume one packet at the head of the queue cannot be transmitted due to internal blocking or output blocking. Then this blocked packet hinders the delivery of the next packet in the queue due to the first come first serve (FCFS) nature of the queue, even though the next packet can be transmitted to the destination without any blocking.

In the following discussion, the focus is to examine the conventional methods to resolve the internal blocking problem of point-to-point fast packet switching networks.

Many different point-to-point fast packet switching architectures have been proposed to resolve the internal contention problem such as the knockout switch, the tree network, and the sorted-based-banyan network. The design principles of these nonblocking switching networks will now be described. Knockout Switch

The basic design principle of the knockout switch is to have a disjoint path between every input-output pair such that there is no internal blocking (See Y.S. Yeh, M.G. Hiuchyj, and A.S. Acampora, "The Knockout Switch: A Simple, Modular Architecture for High- Performance Packet Switching," IEEE J. Select. Areas Commun. , vol. SAC-5, pp. 1274-1283, Oct. 1987). The knockout switch uses the bus approach to interconnect the inputs and outputs. There are N broadcast buses in the switch and there are N filters at each bus interface of the output port, where N is the number of input ports. The filter extracts the packets whose addresses are destined to the output port. The total number of filters for an N X N switch is N 2. Disadvantages of the Knockout Switch

Although the knockout switch does not have internal blocking, due to the square growth of the number of filters at the output ports with the size of the network, the knockout switch is not suitable for a larger switch. Tree Network

A tree network consists of two parts: a splitter and a combiner. There is one splitter for each input and one combiner for each output (See R.J. Reason, "Optical Space Switch Architectures Based Upon Lithium Niobate Crosspoints," Br. Telecom. Technol. J. , vol. 7, no. 1, pp. 83-91, Jan. 1989). The number of stages of 1 X 2 switching elements in the splitter is Log₂ N and the number of stages of 2 X 1 switching elements in the combiner is also Log₂ N. Therefore, the total number of stages in a tree network is 2 Log₂ N. The number of 1 X 2 switching elements in the splitter is N (N-l) and the number of 2 X 1 switching elements in the combiner is also N (N-l) . Disadvantages of the Tree Network

Although the tree network does not have internal blocking, due to the square growth of the number of switching elements with the size of the network, it is not suitable for a larger switch. Sorted-Banvan—Based Network

Before the sorted-banyan-based network is described, the banyan network and the sorting network are introduced first as background information. A banyan network is in the category of multistage interconnection networks (See L.R. Goke and G.J. Lipovski, "Banyan Networks for Partitioning Multiprocessing Systems," First Annual Computer Architecture, pp. 21-28, 1973). It can be constructed using any size of switching elements. If the banyan network is built using D X D switching elements, the number of switching elements at each stage is N/D, and the number of stages is Log_D N. The banyan network is an unique path network which means there is only one path between any input-output pair. The banyan network is a self-routing network, in which the path between each input-output pair .is determined by the binary representation of the destination address. For any switching element, if the corresponding address bit is zero, the data will be sent to the upper link of the element; otherwise, to the lower link. Although the banyan network has many advantages, it has an internal blocking problem.

The batcher sorting network is well-known and is in the category of bitonic sorting networks which produce sorted outputs from circular bitonic inputs (See K.E. Batcher, "Sorting Networks and Their Applications," AFIPS, vol. 32, pp. 307-314, 1968). A bitonic list is a list that monotonically increases from the beginning to the i-th element and then monotonically decreases from the i-th element to the end. A circular bitonic list is created by joining the beginning and the end of a bitonic list, and then breaking the circular structure into a linear structure at any desired point.

The sorting network has a similar property as a banyan network, i.e., a large network is constructed recursively using a smaller network. An N X N batcher sorting network has 1/2 Log₂ N (Log₂ N + 1) stages and each stage consists of N/2 sorting elements.

One of the important properties of the banyan network is that if the incoming packets are arranged either in ascending or descending orders and there is no inactive line between any two active lines, there is no internal blocking within the banyan network. An active line means that there is a packet waiting to be transmitted. A way of arranging the arriving packets in a descending order and assuring that there is no inactive line between any two active lines is to use a batcher sorting network. Therefore, cascading the batcher sorting network in front of the banyan network, the resulting sorted-banyan-based network is point-to-point nonblocking (See A. Hunag and S. Knauer, "Starlite: A Wideband Digital Switch," IEEE GLOBECOM, pp. 121-124, 1984).

Disadvantages of the Sorted-Banyan-Based Network

The first disadvantage of the sorted-banyan-based network is that two different types of routing elements are required to build the network: the 2 X 2 sorting elements and the 2 X 2 switching elements. The 2 X 2 sorting element has to examine the whole routing tag and the 2 X 2 switching element only checks one bit of the routing tag. The second disadvantage is the growth of the number of stages from a network of size N/2 to a network of size N is (Log₂ N + l) , where Log₂ N is the growth of the number of stages by the sorting network and 1 is the growth of the number of stages by the banyan network. SUMMARY OF THE INVENTION It is an object of the present invention to provide, as compared with the above three nonblocking switching networks, a nonblocking switching network which has the advantages of the smallest number of switching elements and the least hardware complexity. The number of switching elements required for the tree network, the sorted-banyan-based network, and the invented switching network is compared in Fig. 1. In the comparison, a 1 X 2 switching element or a 2 X 1 switching element in the tree network is counted as one switching element. In the sorted-banyan-based network, a 2 X 2 sorting element or a 2 X 2 switching element is counted as one switching element.

Compared with the sorted-banyan-based network, the invention requires only one type of switching element which checks one bit of the routing tag and the growth of the number of stages from a network of size N/2 to a network of size N is only Log₂ N. Note that the number of stages required for a 4 X 4 sorted- banyan-based network is 5 and the number of stages required for a 4 X 4 switching network according to the present invention is only 3. Therefore, the present invention provides for a great savings in hardware.

The above-objects, and others are obtained by the following structure.

A point-to-point self-routing non-blocking switching apparatus comprising: input means for receiving a plurality of input messages, each of said input messages having a routing tag which is split up into a plurality of routing tag sections, each of said sections corresponding to a particular level of an even/odd tree hierarchy involving even/odd groups related to an output of said switching apparatus; and distribution means for distributing said input messages based on said routing tag sections in such a way that input messages corresponding to the same even/odd group are not distributed to the same place. BRIEF DESCRIPTION OF THE DRAWINGS

Fig. 1 shows a graph for a comparison of the number of switching elements among the tree network, the sorted-banyan-based network, and the network according to the present invention; Fig. 2a shows the tree hierarchy of the routing tag according to the present invention;

Fig. 2b shows a general version of the routing tag format according to the present invention;

Fig. 2c shows an example of the routing tag according to the present invention;

Fig. 2d shows a second example of the routing tag according to the present invention;

Fig. 3 shows a 4 X 4 point-to-point self-routing nonblocking switching network according to the present invention;

Fig. 4 shows an 8 X 8 point-to-point self-routing nonblocking switching network according to the present invention;

Fig. 5 also shows also an 8 X 8 point-to-point self-routing nonblocking switching network;

Fig. 6 shows an example of an 8 X 8 point-to- point self-routing nonblocking switching network;

Fig. 7 shows a 16 X 16 point-to-point self- routing nonblocking switching network; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method according to the present invention is introduced below to create a nonblocking point-to- point switching network. It is assumed that input buffering is employed for the switching operation, i.e., the incoming packets are stored in the input buffers. It is assumed that the packet size is fixed. It is also assumed that a scheduling algorithm, such as the ring reservation scheme used in B. Bingham and H. Bussey, "Reservation-Based Contention Resolution Mechanism for Batcher-Banyan Packet Switches ," Electronic Letters, vol. 24, no. 13, pp. 772-773, June 1988., is applied to the incoming packets at each slot time to reserve the output ports. The result is there is no output contention for the packet transfer through the switch at each slot time, i.e., no two packets destined to the same output(s) at the same time.

Unicast Routing Tag The unicast routing tag format uses an even/odd group concept associated with the levels of the switching network (see Figs. 2a-2d) . The definition of levels and even/odd groups used in the proposed switching network is explained below. The 8 X 8 switching network is used as an example.

The number of levels in the N X N invented switching network is Log₂ N. The levels are numbered from 1 to Log₂ N. There are also Log₂ N routing fields in the routing tag corresponding to Log₂ N levels of the switching network. Routing field 1 is used as the routing information at level 1; routing field 2 is used as the routing information at level 2; and so on. Each routing field only consists of one bit. For the 8 X 8 switching networks, there are three routing fields for three levels. These three routing fields are indicated by reference numerals 1, 2 and 3 in Fig. 2b.

At level 1 of the 8 X 8 switching network, the even group consists of the output addresses whose modulo 2 results are 0; the odd group consists of the output addresses whose modulo 2 results are 1. Hence, at level 1 the even group consists of 0, 2, 4 and 6; the odd group consists of 1, 3, 5, and 7. The level-1 routing field consists of 1 bit which is used for routing at level 1 of the switching network. If the packet is destined to level-1 even group, the value of the level-1 routing field is 1; if the packet is destined to the level-1 odd group, the value of the level-1 routing field is 0. For example, in Fig. 2c, the first routing field 4 contains a binary 1 indicating that level-1 of the tree hierarchy is even (output 0 is being addressed by the routing tag example of Fig. 2c) . Likewise, in the Fig. 2d, the first routing field 7 contains a binary 0 indicating that level-1 is odd (output 3 is being addressed by the routing tag example of Fig. 2d) .

If the level-1 routing field 1 is destined to level-1 even group, the level-2 even group consists of the output addresses whose modulo 4 results are 0 and the level-2 odd group consists of the output addresses whose modulo 4 results are 2. For the 8 X 8 switching network, the level-2 even group consists of 0 and 4 and the level-2 odd group consists of 2 and 6.

If the level-1 routing field is destined to the level-1 odd group, the level-2 even group consists of the output addresses whose modulo 4 results are 1 and the level-2 odd group consists of the output addresses whose modulo 4 results are 3. For the 8 X 8 switching network, the level-2 even group consists of 1 and 5 and the level-2 odd group consists of 3 and 7. Repeating this procedure, if the routing fields at levels 1 and 2 are destined to even/even groups, the level-3 even group consists of the output addresses whose modulo 8 results are 0 and the level-3 odd group consists of the output addresses whose modulo 8 results are 4. For the 8 X 8 switching network, the level-3 even group consists of 0 and the level-3 odd group consists of 4.

If the routing fields at levels 1 and 2 are destined to even/odd groups, the level-3 even group consists of the output addresses whose modulo 8 results are 2 and the level-3 odd group consists of the output addresses whose modulo 8 results are 6. For the 8 X 8 switching network, the level-3 even group consists of 2 and level-3 odd group consists of 6.

If the routing fields at levels 1 and 2 are destined to odd/even groups, the level-3 even group consists of the output addresses whose modulo 8 results are 1 and the level-3 odd group consists of the output addresses whose modulo 8 results are 5. For the 8 X 8 switching network, the level-3 even group consists of 1 and the level-3 odd group consists of 5. If the routing fields at levels 1 and 2 are destined to odd/odd groups, the level-3 even group consists of the output addresses whose modulo 8 results are 3 and the level-3 odd group consists of the output addresses whose modulo 8 results are 7. For the 8 X 8 switching network, the level-3 even group consists of 3 and the ievel-3 odd group consists of 7.

In general, for a switching network with size N, the routing field at level m consists of 1 bit, where 1 < m < Log₂ N. The value of the routing field at level m is 1 if the packet destination address is in the level- even group. The value of the routing field at level m is 0 if the packet destination

. address is in the level-m odd group. The total size 5 of the unicast routing tag is Log₂ N. ' Nonblocking Unicast Switching Network Operation

To describe the general operation of the invented switching network, 4 X 4, 8 X 8, and 16 X 16 switching networks are used for illustration. ιo The basic switching element used to construct a larger network is a 2 X 2 switching element. The operation of the 2 X 2 switching element will be described later. The 4 X 4 switching network shown* in Fig. 3 is constructed using the Benes network topology

15 (See V.E. Benes, Mathematical Theory of Connecting Networks and Telephone Traffic. New York: Academic, 1965) . Level 1 of the 4 X 4 switching network consists of stages 1 and 2, where each stage consists of 2 switching elements. Level 2 of the 4 X 4

20 switching network consists of stage 3. Level 1 and level 2 are interconnected using a well-known shuffle pattern. Stages are numbered from left to right, i.e., 1 to 3. Switching elements at each stage are numbered from top to bottom, i.e., 1 to 2. The

25 position of each switching element can be represented as (i ,j) , where 1 < i < 3 and 1 < j < 2.

The operation of the switching elements at level 1 of the 4 X 4 switching network is described as follows. As shown in Fig. 3, level 1 consists of

30 stages 1 and 2. The function of stage 1 is to distribute the incoming packets in such a way that the packets destined to the same group will not appear at the same switching element at stage 2. To achieve the

» above purpose, the switching element at (1,1) routes

35 the packet to the upper output link if the level-1 routing field is destined to the even group and routes the packet to the lower output link if the level-1 routing field is destined to the odd group. If the two incoming packets are destined to the same group, the switching element simply routes the two packets to two different output links.

The switching element at (1,2) performs the reverse operation of the switching element at (1,1). It routes the packet to the lower output link if the level-1 routing field is destined to the even group and it routes the packet to the upper output link if the level-1 routing field is destined to the odd group. If the two incoming packets are destined to the same group, the switching element simply routes the two packets to two different output links.

After stage 1, the packets destined to the same group do not appear at the same switching element at stage 2.

The switching elements at stage 2 follow the same operation as that of the switching element at (1,1). The packet destined to the level-1 even group appears either at the first output of switching element at (2,1) or at the first output of the switching element at (2,2) . The packet destined to the level-1 odd group appears either at the second output of the switching element at (2,1) or at the second output of the switching element at (2,2).

Level 1 and level 2 are interconnected using the shuffle pattern. Using the shuffle interconnection, the two packets which are destined to the level-1 even group appear at the two inputs of the switching element (3,1); the two packets which are destined to the level-1 odd group appear at the two inputs of the switching element (3,2). The operation of the switching elements at level 2 is described as follows. Level 2 only consists of stage 3. At stage 3, the switching element checks the level-2 routing field. The switching elements at (3,1) and (3,2) follow the same operation as that of the switching element at (1,1). Since a 2 X 2 switching element is internally nonblocking, it has been shown that the proposed 4 X 4 switching network is a point-to-point self-routing nonblocking network.

As can be seen from the above operation, the switching element's logic at each stage is very simple, it only needs to check a 1-bit routing field.

The 8 X 8 switching network is built upon the 4 X 4 switching network. In the 8 X 8 switching network, as shown in Fig. 4, level 1 consists of three stages, level 2 consists of two stages, and level 3 consists of one stage. The function of level 1 of the 8 X 8 switching network is to distribute the incoming packets in such a way that all level-1 even packets are routed to the top 4 X 4 switching network of level 2 and the all level-1 odd packets are routed to the bottom 4 X 4 switching network of level 2. As shown in Figs. 4 and 5, level 1 of the 8 X 8 switching network consists of one stage of 2 X 2 switching elements and level 1 of the 4 X 4 switching network.

The switching elements at (1,1) and (1,2) route the packet to the upper output link if the level-1 routing field (1 in Fig. 2b) is destined to the level- 1 even group and route the packet to the lower output link if the level-1 routing field is destined to the level-1 odd group. If two incoming packets are destined to the same group, the switching element simply routes the two packets to two different output links. The switching elements at (1,3) and (1,4) perform the reverse operation of the switching elements at (1,1) and (1,2).

After level 1, the packets destined to the level- 1 even group appear at the first inputs of the switching elements at stage 3; the packets destined to the level-1 odd group appear at the second inputs of the switching elements at stage 3. Using a shuffle interconnection between level 1 and level 2 , the packets destined to the level-1 even group are routed to the upper subnetwork and the packets destined to the level-1 odd group are routed to the lower subnetwork. Level-2 routing field (2 in Fig. 2b) and level-3 routing field (3 in Fig. 2b) are used as the routing information at the X 4 switching network. The operation of the 4 X 4 switching^' network has been discussed above.

An example of the operation of an 8 X 8 nonblocking point-to-point switching network according to the above-detailed description is provided in Fig. 6.

Following the same principle, a larger network with size N can be constructed recursively using a smaller network. A 16 X 16 nonblocking point-to-point switching network is shown in Fig. 7. In general, the number of levels in the N X N invented switching network is Log₂ N. Level 1 of the switching network consists of Log₂ N stages; level 2 consists of Log₂ N - l stages; and so on. Let the total number of stages of 2 X 2 switching elements required for the switching network with size N be f(N). Then the relationship between f(N/2) and f(N) are: f(N) = Log₂ (N) + f(N/2), where f(4) = 3.

Solving the above equation, f(N) = 1/2 Log₂ N (Log₂ N + 1) . The total number of 2X2 switching elements required for the invented switching network with size N is N/2 f(N) .

The invented switching architecture can be used for both packet switching and circuit switching. For circuit switching, since there is no output conflict and the switching fabric is nonblocking, the result is a point-to-point nonblocking circuit switch. For packet switching, since the output conflict is an unavoidable situation, a scheduling algorithm is necessary to resolve the output contention.

Novel Features of the Invented Switching Networks

The following include some novel features of the invented switching networks.

1) The routing tag uses an even/odd routing field associated with each level of the switching network. With the invented switching structure, the packets are separated into two groups (even and odd groups) after each level of the switching network. This separation process is performed recursively. Each switching element only needs to check a 1-bit routing field instead of the whole address field as in the batcher sorting network of the prior art. The switching network only requires one type of switching element. 2) The invented nonblocking point-to-point switching network has less number of stages compared with the sorted-banyan-based network of the prior art. The invented switching network has the least number of switching elements compared with the sorted-banyan- based network and the tree network.

Claims

WHAT IS CLAIMED IS;

1. A point-to-point self-routing non-blocking switching apparatus comprising: input means for receiving a plurality of input messages, each of said input messages having a routing tag which is split up into a plurality of routing tag sections, each of said sections corresponding to a particular level of an even/odd tree hierarchy involving even/odd groups related to an output of said switching apparatus; and distribution means for distributing said input messages based on said routing tag sections in such a way that input messages corresponding to the same even/odd group are not distributed to the same place.

2. An apparatus according to claim 1 in which said distribution means further includes a plurality of switches, said distribution means further for routing input messages destined for even-numbered outputs of said apparatus to one group of switches and input messages destined for odd-numbered outputs to another group of switches.

3. An apparatus according to claim 2 in which said distribution means further includes checking means for checking the value of a single-bit of said routing tag to determine whether a corresponding input message is destined for an even-numbered output or an odd-numbered output of said apparatus.

4. An apparatus according to claim 2 in which each of said switches has two inputs and two outputs.

5. An apparatus according to claim 4 in which said distribution means further includes allocating means for allocating one input message input to a switch to one group of further switches and for allocating another input message also input to the same switch to another group of further switches when the two input messages input to the same switch are both destined to even-numbered outputs of said apparatus.

6. An apparatus according to claim 4 in which said distribution means further includes second allocating means for allocating one input message input to a switch to one group of further switches when said input message is destined for an even- numbered output of said apparatus and for allocating another input message input to the same switch to another group of further switches when said another input message is destined for an odd-numbered output.

7. An apparatus according to claim 1 wherein each routing tag section consists of a single bit.