US9355854B2 - Methods of fabricating printable compound semiconductor devices on release layers - Google Patents
Methods of fabricating printable compound semiconductor devices on release layers Download PDFInfo
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- US9355854B2 US9355854B2 US13/814,343 US201113814343A US9355854B2 US 9355854 B2 US9355854 B2 US 9355854B2 US 201113814343 A US201113814343 A US 201113814343A US 9355854 B2 US9355854 B2 US 9355854B2
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- 239000000758 substrate Substances 0.000 claims abstract description 113
- 238000005530 etching Methods 0.000 claims abstract description 79
- 239000000463 material Substances 0.000 claims abstract description 50
- AUCDRFABNLOFRE-UHFFFAOYSA-N alumane;indium Chemical compound [AlH3].[In] AUCDRFABNLOFRE-UHFFFAOYSA-N 0.000 claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 claims abstract description 15
- 239000010410 layer Substances 0.000 claims description 389
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 30
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 28
- 238000005538 encapsulation Methods 0.000 claims description 20
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 19
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims description 17
- KXNLCSXBJCPWGL-UHFFFAOYSA-N [Ga].[As].[In] Chemical compound [Ga].[As].[In] KXNLCSXBJCPWGL-UHFFFAOYSA-N 0.000 claims description 17
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 16
- 229910002601 GaN Inorganic materials 0.000 claims description 14
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 14
- 229910052738 indium Inorganic materials 0.000 claims description 14
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 14
- FTWRSWRBSVXQPI-UHFFFAOYSA-N alumanylidynearsane;gallanylidynearsane Chemical compound [As]#[Al].[As]#[Ga] FTWRSWRBSVXQPI-UHFFFAOYSA-N 0.000 claims description 10
- 238000004873 anchoring Methods 0.000 claims description 10
- 229920002120 photoresistant polymer Polymers 0.000 claims description 10
- 239000000203 mixture Substances 0.000 claims description 9
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 claims description 7
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- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
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- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 3
- 239000004094 surface-active agent Substances 0.000 description 3
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H01L21/7813—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate leaving a reusable substrate, e.g. epitaxial lift off
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- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
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- Y02E10/544—Solar cells from Group III-V materials
Definitions
- the present invention relates to compound semiconductor device fabrication, and more particularly, to the fabrication of compound semiconductor devices and structures that may be released from a growth substrate.
- etching is used in microfabrication processes to chemically remove layers from the surface of a wafer without etching or damaging underlying or overlying layers.
- a release layer may be used to separate one or more layers from a wafer or other substrate.
- United States Patent Application Publication No. 2009/0321881 and U.S. Pat. No. 4,846,931 describe the release of compound semiconductor devices and structures from a gallium arsenide (GaAs) substrate using aluminum gallium arsenide (AlGaAs) layers that have high aluminum content or pure aluminum arsenide (AlAs) as a release layer and hydrofluoric acid-based wet etches for the release agent.
- Such systems are typically successful because of the good etching selectivity of hydrofluoric acid with respect to high aluminum content arsenides over low aluminum content arsenides.
- Some shortcomings of such systems include that the release layer may have poor stability in air, and that it may be difficult to protect the top and sides of the transferrable devices and structures from hydrofluoric acid during the release process without thick (>20 micron) polymeric coatings or other masks.
- such systems may be nearly or totally incompatible with micro-transfer printing of compound semiconductor devices (as described for example in U.S. Pat. No.
- U.S. Pat. No. 5,641,381 describes the release of indium phosphide (InP) devices from an indium phosphide (InP) substrate using indium gallium arsenide (InGaAs) as a release layer.
- Some shortcomings of this approach may include that the etch rate of indium gallium arsenide (InGaAs) is relatively slow, and that the selectivity of certain wet chemical etches to indium gallium arsenide (InGaAs) over indium phosphide (InP) may be insufficient for very high aspect ratio release processes, in which the lateral expanse of the releasable device is roughly fifty or more times the thickness of the layer of the device above the release layer.
- United States Patent Application Publication No. 2008/0054296 describes the use of oxide release layers for nitride-based compound semiconductor light emitters that may be etched selectively using hydrochloric acid or other chemicals. This system may be used successfully when the device is not susceptible to attack by the release chemical.
- Some embodiments of the present invention are directed to a material that enables the release of printable compound semiconductor devices that are sensitive to other release processes.
- Some embodiments of the present invention are directed to a process that enables the release of printable compound semiconductor devices that are sensitive to other release processes.
- a method of fabricating transferable semiconductor devices includes providing a release layer including indium aluminum phosphide on a substrate, and providing a support layer on the release layer.
- the support layer and the substrate include respective materials such that the release layer has an etching selectivity relative to the support layer and the substrate.
- At least one device layer is provided on the support layer.
- the release layer is selectively etched without substantially etching the support layer and the substrate.
- the substrate and/or the support layer may be an arsenide-based material, and the release layer may contact and couple the support layer to the substrate.
- providing the release layer, the support layer, and the at least one device layers may include epitaxially growing the release layer comprising indium aluminum phosphide on the substrate comprising the arsenide-based material, epitaxially growing the support layer comprising the arsenide-based material on the release layer, and epitaxially growing the at least one device layer on the support layer.
- the support layer may be under compressive strain relative to the device layer, the release layer, and/or the substrate.
- a lattice mismatch between the release layer and the substrate may be less than about 500 parts-per-million (ppm).
- the substrate and/or the support layer may be a Group III arsenide material and/or a Group III-V arsenide material.
- the arsenide-based material may be indium gallium arsenide, gallium arsenide, indium gallium nitride arsenide, and/or indium gallium nitride arsenide antimonide.
- the indium aluminum phosphide release layer may be selectively laterally etched using an etching solution comprising hydrochloric acid.
- the etching solution may further include ethanol.
- the etching solution may further include a compound configured to form a self-assembled monolayer on the substrate and/or the support layer.
- the release layer may have a thickness of about 0.02 micrometers ( ⁇ m) to about 1 ⁇ m.
- the selective etching may be sufficient to etch the release layer at a rate of more than about 0.1 millimeters (mm) per hour.
- the at least one device layer may laterally extend on the support layer by a distance that is at least about 100 times greater than a thickness of the at least one device layer.
- semiconductor devices may be partially or fully formed on the at least one device layer and a portion of the release layer may be exposed by microfabrication techniques prior to selectively etching the release layer.
- an encapsulation layer may be formed on the at least one device layer prior to selectively etching the release layer.
- the encapsulation layer may be a photoresist material, and the photoresist material may be baked prior to selectively etching the release layer.
- anchoring and/or tethering structures may be formed within the encapsulation layer. In other embodiments, the anchoring and/or tethering structures may be formed within the support layer. The anchoring and/or tethering structures may be configured to maintain spatial orientation of the semiconductor devices during the selective etching.
- the at least one device layer may be an active layer of a photovoltaic cell.
- an indium aluminum phosphide window layer may be provided on the active layer, and a dielectric anti-reflective coating may be provided on the window layer.
- the at least one device layer may be indium aluminum phosphide and/or aluminum gallium arsenide.
- the support layer may be a Group III arsenide-based lateral conduction layer having a sheet resistance of less than about 50 ohms per square.
- the at least one device layer may be an active layer of a transferable photovoltaic cell, light emitting diode, radio frequency device, or wireless device.
- a transferable semiconductor device includes a support layer and at least one semiconductor device layer on the support layer.
- a surface of the support layer opposite the at least one device layer includes a portion of an indium aluminum phosphide-based release layer thereon.
- a compound semiconductor device structure includes a substrate, a release layer comprising indium aluminum phosphide on the substrate, a support layer on the release layer, and at least one transferable semiconductor device layer on the support layer.
- the substrate and the support layer include respective materials such that the release layer has an etching selectivity relative thereto.
- a compound semiconductor material epitaxial stack for the formation of a printable device includes a gallium arsenide substrate, an indium aluminum phosphide release layer on the substrate, an arsenide-based layer adjacent to the indium aluminum phosphide release layer, and device layers on the arsenide-based layer.
- the release layer may have a thickness between about 20 nanometers and about 1 micron.
- the arsenide-based layer adjacent to the release layer may be indium gallium arsenide, gallium arsenide, indium gallium nitride arsenide, and/or indium gallium nitride arsenide antimonide.
- the arsenide-based layer adjacent to the release layer may be grown in compression relative to some part of the device, the release layer, and/or the substrate.
- the device layers may form the active materials for photovoltaic cells, light-emitting diodes, lasers, radio-frequency or wireless devices.
- the device layers may include indium aluminum phosphide and/or aluminum gallium arsenide.
- a process of releasing printable devices from a gallium arsenide substrate includes selectively laterally etching a release layer of indium aluminum phosphide in a mixture of hydrochloric acid and ethanol.
- the mixture may further include a compound that forms self-assembled monolayers on compound semiconductors.
- a method of preparing a releasable printable device includes epitaxially growing on a gallium arsenide substrate an indium aluminum phosphide release layer, an arsenide-based layer adjacent to the release layer, and device layers, thereby forming an epi-stack; partially or fully forming functional devices on the epi-stack and exposing some portion of the release layer by microfabrication techniques; and selectively laterally etching the release layer in a mixture of hydrochloric acid and ethanol, thereby releasing the devices.
- the microfabrication techniques may further include the application and baking of photoresist to protect the partially or fully formed devices from chemical attack by the mixture of hydrochloric acid and ethanol.
- the microfabrication techniques may further include forming anchoring and tethering structures to maintain spatial orientation of the printable devices through the release process.
- FIGS. 1A-1C are cross-sectional views illustrating structures and methods for fabricating printable compound semiconductor devices according to some embodiments of the present invention.
- FIGS. 2A-2C are a cross-sectional views illustrating structures and methods for fabricating printable compound semiconductor devices according to further embodiments of the present invention that include an encapsulation layer.
- FIG. 3 is a flowchart illustrating methods for fabricating printable compound semiconductor devices according to some embodiments of the present invention.
- first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present invention.
- relative terms such as “under” or “lower” or “bottom,” and “over” or “upper” or “top,” may be used herein to describe one element's relationship to another element as illustrated in the Figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures. For example, if the device in one of the figures is turned over, elements described as being on the “lower” side of other elements would then be oriented on “upper” sides of the other elements. The exemplary term “lower”, can therefore, encompasses both an orientation of “lower” and “upper,” depending of the particular orientation of the figure.
- Embodiments of the invention are described herein with reference to cross-section illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the invention. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments of the invention should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. In other words, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the invention.
- semiconductor component semiconductor component
- semiconductor element semiconductor element
- semiconductor structure semiconductor material, structure, layer, device, and/or component of a device.
- Semiconductor elements include high quality single crystalline and polycrystalline semiconductors, semiconductor materials fabricated via high temperature processing, doped semiconductor materials, organic and inorganic semiconductors and composite semiconductor materials and structures having one or more additional semiconductor components and/or non-semiconductor components, such as dielectric layers or materials and/or conducting layers or materials.
- Semiconductor elements include semiconductor devices and device components including, but not limited to, transistors, photovoltaics including solar cells, diodes, light emitting diodes, lasers, p-n junctions, photodiodes, integrated circuits, and sensors.
- semiconductor elements refer to a part or portion that forms an end functional semiconductor.
- Print refers to a process of transferring a feature, such as a semiconductor component or element, from a first surface to a second surface.
- the first surface is a donor surface and the second surface a receiving surface, and the transfer is mediated by an intermediate surface, such as an elastomeric stamp, which is capable of releasing the elements to a receiving surface on a target substrate, thereby transferring the semiconductor element.
- the printing is dry transfer printing of printable semiconductors, wherein the adhesive force between a solid object and the stamp surface is rate-sensitive. Transfer printing methods are further described, for example, in U.S. patent application Ser. No. 11/145,574 filed Jun. 2, 2005, the disclosure of which is incorporated by reference herein.
- Some embodiments of the present invention provide a release layer that is compatible with methods for releasing printable or transferrable compound semiconductor devices.
- the release layer has a high etching selectivity relative to that of the semiconductor device layers and/or the support layer (such as an arsenide-based support layer) on which the semiconductor device layers are provided, and can be grown on a same substrate as the device layer(s) and/or support layer in some embodiments.
- the release layer includes indium aluminum phosphide (InAlP), and can be disposed between layers of arsenide-based Group III-V materials such as indium gallium arsenide, gallium arsenide, indium gallium nitride arsenide, indium gallium nitride arsenide antimonide or variants thereof.
- InAlP offers significant practical benefits in the fabrication of transferrable semiconductor devices in that it may be grown epitaxially on gallium arsenide substrates.
- Embodiments of the present invention also provide a wet chemical release process for selectively laterally etching a release layer including InAlP without substantially etching the arsenide-based materials adjacent to the InAlP layer, by using an etchant or etching solution that includes a mixture of hydrochloric acid (HCl) and ethanol.
- a hydrochloric acid-based etching solution to etch the release layer may offer several advantages over conventional hydrofluoric acid (HF)-based wet etching. For example, while HF may provide good etching selectivity with respect to high aluminum content arsenide-based release layers, it may be difficult to protect the active layers of the device from the HF-based etchant. HCl, in contrast, offer good etching selectivity to InAlP, and the active device layers may be more easily encapsulated against an HCl-based etchant.
- Embodiments of the invention may simultaneously provide several advantages.
- release layers in accordance with embodiments of the present invention may be satisfactorily stable in air, and may be lattice-matched to common compound semiconductor substrates.
- the release layers also provide a relatively high etch rate, for instance, to release devices at a rate greater than 0.1 millimeters per hour.
- the release layers described herein provide very good selectivity in the etch rate of the release layer relative to an adjacent arsenide device layer, sufficient to release devices with lateral expanse many hundreds or thousands of times greater than the thickness of the device layer adjacent to the release layer.
- Release processes according to embodiments of the present invention are compatible with readily-available encapsulation (e.g., using photoresist) of the device layers, and thus, are compatible with printable compound semiconductor devices that include materials that would otherwise be easily attacked by the release chemistry (e.g., InAlP, AlGaAs).
- the use of ethanol or other surfactants in the release process can reduce the size of bubbles evolved during the chemical etching process of the InAlP. Without ethanol or another suitable surfactant, the release process may produce large bubbles and can damage the printable and/or releasable devices.
- embodiments of the present invention can facilitate the fabrication of compound semiconductor devices (such as photovoltaic cells, light-emitting diodes, lasers, and radio-frequency or wireless devices) that can be transferred to or printed on a receiving/destination substrate different from a growth substrate or other donor/source substrate by micro-transfer printing using stamps or other conformable transfer elements.
- compound semiconductor devices such as photovoltaic cells, light-emitting diodes, lasers, and radio-frequency or wireless devices
- FIGS. 1A-1C illustrate compound semiconductor device structures and methods of fabrication according to some embodiments of the present invention.
- a printable compound semiconductor device structure 100 includes a wafer or substrate 101 , a release layer 105 on the substrate 101 , a support layer 110 on the release layer 105 , and one or more printable or transferrable device layers 115 on the support layer 110 .
- the release layer 105 contacts and couples the support layer 110 to the substrate 101 .
- the release layer 105 is an indium aluminum phosphide (InAlP) layer, and the substrate 101 and the support layer 110 are formed of arsenide-based materials.
- the InAlP release layer 105 may have a thickness between about 0.02 microns (or micrometers ( ⁇ m)) and about 1 micron.
- the layers 105 , 110 , and/or 115 may be epitaxially grown on the substrate 101 .
- the indium-phosphide release layer 105 may be epitaxially grown on the arsenide-based source substrate 101 .
- the InAlP release layer 105 may be epitaxially grown on and closely lattice-matched to (e.g., at a lattice mismatch of less than about 500 parts-per million (ppm) as measured by X-ray diffractometry) the GaAs substrate 101 .
- the arsenide based support layer 110 may be epitaxially grown on the release layer 105
- the device layer(s) 115 may be epitaxially grown on the support layer 110 .
- at least a portion of the support layer 110 exhibits compressive strain relative to the device layer(s) 115 , the release layer 105 , and/or the substrate 101 .
- at least a portion of the arsenide-based support layer 110 adjacent to the release layer 105 is grown in slight compression relative to some part of the release layer 105 , the substrate 101 , and/or the device layer(s) 115 .
- Semiconductor devices such as transistors, photovoltaic cells, light emitting diodes, and/or radio frequency or other wireless devices, may be partially or fully formed in or on the device layer(s) 115 by microfabrication techniques prior to separating the device layer(s) 115 from the growth substrate 101 .
- anchoring and/or tethering structures may be formed in the support layer 110 and/or other layers, and may be configured to maintain spatial orientation of the semiconductor devices during subsequent operations for separating the device layer(s) 115 from the substrate 101 .
- the fabrication of such anchoring and/or tethering structures are described, for example, in PCT Application Nos. PCT/US2011/029365 and PCT/US2011/029357 filed Mar.
- An encapsulation structure (not shown) may be further provided on the device layer(s) 115 to protect the partially or fully formed devices from chemical attack during subsequent processing.
- the release layer 105 can be selectively etched without substantially etching the support layer 110 , the device layer(s) 115 , and/or the substrate 101 .
- the substrate 101 and the support layer 110 respectively include a material having etching selectivity with respect to that of the release layer 105 .
- FIG. 1B illustrates a process of releasing printable devices formed in or on the device layer(s) 115 from an arsenide-based substrate 101 by selectively laterally etching the InAlP release layer 105 in a solution 120 including hydrochloric acid to separate the arsenide-based support layer 110 and the device layer(s) 115 thereon from the substrate 101 .
- the substrate 101 and/or the support layer 110 may include a Group III arsenide material (such as gallium arsenide (GaAs) and indium gallium arsenide (InGaAs)) and/or a Group III-V arsenide material (such as indium gallium nitride arsenide (InGaNAs) and indium gallium nitride arsenide antimonide (InGaNAsSb)).
- a Group III arsenide material such as gallium arsenide (GaAs) and indium gallium arsenide (InGaAs)
- a Group III-V arsenide material such as indium gallium nitride arsenide (InGaNAs) and indium gallium nitride arsenide antimonide (InGaNAsSb)
- the device layer(s) 115 may be formed of indium aluminum phosphide (InAlP), aluminum gallium arsenide (AlGaAs), and/or other materials that would be otherwise etched along with the release layer 105 .
- InAlP indium aluminum phosphide
- AlGaAs aluminum gallium arsenide
- the etching solution 120 may also include ethanol in some embodiments.
- the release process and/or the etching solution 120 described herein can further include a compound that is configured to form a self-assembled monolayer on compound semiconductor surfaces (e.g., 1-hexadecanethiol), to lubricate the surfaces of the structure 100 that become exposed during the release process and/or to change the surface tension of the etching solution 120 .
- a compound that is configured to form a self-assembled monolayer on compound semiconductor surfaces e.g., 1-hexadecanethiol
- the release process illustrated in FIG. 1B is sufficient to separate the support layer 110 from the substrate 101 at a relatively high etch rate of more than about 0.1 millimeters (mm) per hour.
- the InAlP release layer 105 described herein also provides very good selectivity in the relative to the arsenide-based layers 101 and 110 , which allows for release of device layer(s) 115 that laterally extend up to at least 100 times greater than a thickness of the device layer(s) 115 .
- embodiments of the present invention allow for selectively laterally etching an indium aluminum phosphide release layer 105 using an etching solution 120 including hydrochloric acid to separate the arsenide-based support layer 110 including the device layer(s) 115 thereon from the arsenide-based substrate 101 .
- FIG. 1C illustrates two transferable devices or chiplets 100 ′ and 100 ′′ after etching of the release layer 105 according to embodiments as described herein. As shown in FIG. 1C , the transferable devices 100 ′ and 100 ′′ are attached to a portion 140 of the support layer 110 by breakable micro-bridges or tethers 145 , and the portion 140 of the support layer 110 remains attached to the substrate 101 by a portion of the release layer 105 that remains after the selective etching process shown in FIG. 1B .
- the surface of the support layer 110 opposite the device layer(s) 115 may include at least some remaining portion or residue or trace amounts of the InAlP release layer 105 thereon (not shown).
- the released devices 100 ′ and 100 ′′ may be washed with an aqueous solution of hydrogen peroxide, some phosphorous-containing residues (e.g., products of the release layer etching reaction) may still persist on the surface of the support layer 110 .
- the devices 100 ′ and 100 ′′ can then be transferred to a different target substrate by pressing or contacting an elastomeric stamp (or other intermediary transfer element) against the devices 100 ′ and 100 ′′, where the stamp has an adhesive strength sufficient to sufficient to break the tethers 145 and transfer the devices 100 ′ and 100 ′′ to a desired destination substrate.
- an elastomeric stamp or other intermediary transfer element
- FIGS. 2A-2C illustrate compound semiconductor device structures and methods of fabrication according to further embodiments of the present invention.
- a printable compound semiconductor device structure 200 includes a wafer or substrate 201 , a release layer 205 on the substrate 201 , a support layer 210 on the release layer 205 , and one or more printable or transferrable device layers 215 on the support layer 210 .
- the release layer 205 is an InAlP-based layer
- the support layer 210 is a Group III arsenide-based lateral conduction layer adjacent to the release layer 205 that provides a relatively low sheet resistance (e.g., less than about 50 ohms per square).
- the support layer 210 may be formed of GaAs, InGaAs, InGaNAsSb, or InGaNAs in some embodiments.
- the substrate 201 may include a Group III arsenide material (such as gallium arsenide (GaAs) and indium gallium arsenide (InGaAs)) and/or a Group III-V arsenide material (such as indium gallium nitride arsenide (InGaNAs) and indium gallium nitride arsenide antimonide (InGaNAsSb)).
- a Group III arsenide material such as gallium arsenide (GaAs) and indium gallium arsenide (InGaAs)
- a Group III-V arsenide material such as indium gallium nitride arsenide (InGaNAs) and indium gallium nitride arsenide antimonide (InGaNAsSb)
- the substrate 201 may be a source or growth substrate, and the layers 205 , 210 , and/or 215 may be epitaxially grown on the substrate 201 in some embodiments.
- the structure 200 may further include a layer of GaAs, InGaAs, InGaNAsSb, and/or InGaNAs adjacent to the release layer 205 that is grown in slight compression (e.g., having a lattice mismatch of about 100 ppm to about 1000 ppm as measured by X-ray diffractometry) relative to some part of the device layer(s) 215 , the release layer 205 , and/or the substrate 201 .
- slight compression e.g., having a lattice mismatch of about 100 ppm to about 1000 ppm as measured by X-ray diffractometry
- the printable device layers(s) 215 provide active layers for one or more photovoltaic or solar cells.
- a partially transparent window layer 225 is provided on an upper surface of the device layers(s) 215 , and a dielectric anti-reflection coating 230 is provided on the window layer 225 .
- the dielectric anti-reflection coating 230 may further cover sidewalls of the device layers(s) 215 and the support layer 210 .
- the dielectric anti-reflection coating 230 may be a single- or multi-layer coating. In the embodiments of FIGS.
- the dielectric anti-reflection coating 230 is further covered by an encapsulation layer 235 that surrounds the solar cells in or on the device layer(s) 215 .
- the dielectric anti-reflection coating 230 may be covered with photoresist, and the photoresist may be subsequently baked to provide the encapsulation layer 235 that protects the device layers(s) 215 during a subsequent release process, as shown in FIG. 2B .
- the release layer 205 is selectively etched without substantially etching the support layer 210 , the device layer(s) 215 , and/or the substrate 201 .
- the release layer 205 is formed of a material (InAlP) that provides etching selectivity to the arsenide-based substrate 201
- the release layer 205 can be selectively laterally etched in a solution 220 including hydrochloric acid to separate the support layer 210 and the device layer(s) 215 thereon from the substrate 201 .
- the encapsulation layer 235 provides further protection for the device layer(s) 215 , the window layer 225 , and the dielectric anti-reflection coating 230 from attack by the solution 220 used to selectively etch the release layer 205 .
- the window layer 225 may be formed of InAlP and/or other materials that would otherwise be etched by the etching solution 220 in some embodiments.
- the device layer(s) may be formed of indium aluminum phosphide and/or aluminum gallium arsenide.
- the etching solution 220 may also include ethanol and/or a compound that is configured to form a self-assembled monolayer on compound semiconductor surfaces in some embodiments.
- the active layer(s) 215 of the solar cell may be separated from the arsenide-based substrate 201 without damage to the solar cell, window layer, and/or anti-reflective coating thereon.
- FIG. 2C illustrates two transferable solar cell devices or chiplets 200 ′ and 200 ′′ after etching of the release layer 205 according to embodiments as described herein.
- the transferable devices 200 ′ and 200 ′′ are attached to breakable tethers 245 that are attached to anchors 240 that are also attached to the substrate 201 throughout and after the selective etching process shown in FIG. 2B .
- the tethers 245 and anchors 240 are formed within the encapsulation layer 235 .
- the surface of the support layer 210 opposite the device layer(s) 215 may also include at least some remaining portion or residue of the InAlP release layer 205 thereon (not shown).
- the devices 200 ′ and 200 ′′ can then be transferred to a different target substrate by pressing or contacting an elastomeric stamp or other intermediary transfer element against the devices 200 ′ and 200 ′′ with a force sufficient to break the tethers 245 , where the stamp has an adhesive strength sufficient to transfer the devices 200 ′ and 200 ′′ to a desired destination substrate.
- FIG. 3 is a flowchart illustrating methods of fabricating printable compound semiconductor device structures and releasing such structures from a growth substrate or other donor substrate in accordance with embodiments of the present invention.
- an arsenide-based substrate is provided at block 305 .
- a release layer including indium aluminum phosphide (InAlP), an arsenide-based support layer, and at least one semiconductor device layer are sequentially provided on the arsenide-based substrate at blocks 310 , 315 , and 320 , respectively.
- the release layer, the support layer, and/or the device layer(s) may be epitaxially grown on the arsenide-based substrate in some embodiments to define an epi-stack structure.
- One or more semiconductor devices such as transistors, photovoltaic cells, and/or light-emitting diodes, may be formed in/on the device layer(s) using microfabrication techniques at block 322 . Also, one or more portions of the release layer may also be exposed using microfabrication techniques at block 322 .
- the material of the release layer provides an etching selectivity to the material(s) of the arsenide-based substrate and/or support layer.
- the release layer is selectively etched without substantially etching the substrate and/or support layer.
- an etchant including hydrochloric (HCl) acid may be used to selectively laterally etch the InAlP release layer without substantially etching the arsenide-based layers.
- the etchant may further include ethanol or another suitable surfactant to reduce the size of bubbles that may be produced during the etching of the InAlP release layer, thereby reducing the likelihood of damage to the device structure.
- an encapsulant layer may be provided on the device layer(s) and/or other portions of the device structure to protect layers that may be otherwise vulnerable to the etchant.
- the etchant including HCl and ethanol may selectively etch the release layer at a relatively high rate (for example, at more than about 0.1 millimeters (mm) per hour) to thereby separate the support layer from the substrate.
- the device layer(s) may then be transferred to a different substrate, for example, using micro-transfer printing techniques.
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Description
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CN103155114B (en) | 2016-10-12 |
WO2012018997A2 (en) | 2012-02-09 |
KR101916968B1 (en) | 2018-11-08 |
JP6076903B2 (en) | 2017-02-08 |
JP2013539211A (en) | 2013-10-17 |
CN103155114A (en) | 2013-06-12 |
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US20130196474A1 (en) | 2013-08-01 |
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