US8958868B2 - Systems and methods for multichannel wireless implantable neural recording - Google Patents
Systems and methods for multichannel wireless implantable neural recording Download PDFInfo
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- US8958868B2 US8958868B2 US12/468,015 US46801509A US8958868B2 US 8958868 B2 US8958868 B2 US 8958868B2 US 46801509 A US46801509 A US 46801509A US 8958868 B2 US8958868 B2 US 8958868B2
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B5/00—Measuring for diagnostic purposes; Identification of persons
- A61B5/0002—Remote monitoring of patients using telemetry, e.g. transmission of vital signals via a communication network
- A61B5/0031—Implanted circuitry
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B5/00—Measuring for diagnostic purposes; Identification of persons
- A61B5/0002—Remote monitoring of patients using telemetry, e.g. transmission of vital signals via a communication network
- A61B5/0004—Remote monitoring of patients using telemetry, e.g. transmission of vital signals via a communication network characterised by the type of physiological signal transmitted
- A61B5/0006—ECG or EEG signals
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- Embodiments of the present invention relate to neural monitoring and, more particularly, to an implantable wireless neural recording system.
- the commutator is also the bottleneck for achieving large channel counts in hardwired setups, and limits experiments to only one animal/human at a time due to twisting and tangling of the wires. Accordingly, providing a natural and enriched environment for animal/human subjects in a hardwired setup is not feasible, either with or without a commutator. Consequently, neuroscientists are interested in replacing the wire bundles with a wireless link and continue recording and processing the “entire” neural signals in their high performance computing clusters without losing any information.
- Such solutions typically consist of at least a transmitter and a receiver unit before digital signal processing.
- the transmitter is implanted inside or carried by the animal/human body. It is also responsible for conditioning (mainly amplification and filtering) of the acquired neural signals, and should include a power source with enough energy storage for the minimum duration of uninterrupted experiments.
- WNR wireless neural recording
- a first conventional system of wirelessly recording and transmitting neural signals is to read the neural signal with an electrode and ultimately transmit the received signal wirelessly in an analog domain.
- There are many advantages of transmitting in the analog domain including simplicity of the transmitter unit, preservation of the original waveform amplitudes, low power consumption to transmit information, and the ability to send large amounts of data in smaller packages.
- the disadvantages of transmitting in analog outweigh its advantages.
- the transmitted data is susceptible to noise and interference, which will ultimately reduce the quality of the transmitted signal and in some cases, renders it useless on the receiver side.
- a receiver can convert the analog signal to a digital signal to be analyzed by a digital signal processing (DSP) system, or a computer.
- DSP digital signal processing
- ADC analog to digital converter
- the power consumption and size of the device increases and adds to the complexity of the implantable device.
- Digitized data bit stream at high data rates require very accurate timing and synchronization between the transmitter and receiver. If the receiver loses its synchronization with the transmitter, the received data will be lost and cannot be easily recovered. Furthermore, data compression on the transmitter side is not always desired, because it can potentially result in the loss of useful information.
- one current system employs commercial off-the-shelf components in their WNR system, particularly to establish the wireless link using the ZigBee and Bluetooth standards. Even though this method can significantly reduce the development time, and has the added benefit of complying with the Federal Communications Commission (FCC) regulations, the size and power overhead in general purpose components may lose their competitive edge in high channel counts.
- FCC Federal Communications Commission
- LFP local field potential
- Yet another exemplary system can encode the neural signal amplitude above the noise level in a series of sharp pulses, which frequency is proportional to the signal amplitude. This is a low power encoding scheme and works well for a single or small number of channels. It is not clear, however, how the pulses generated from different channels would be combined to be transmitted across the wireless link.
- Still other exemplary systems can combine the sampled neural signals from different channels using time division multiplexing (TDM) and transmitting an analog signal.
- TDM time division multiplexing
- the advantage of this method is its simplicity and low power consumption.
- Analog signals however as mentioned earlier, are susceptible to noise, and the transitions from one channel to another in short sampling periods can result in significant crosstalk among adjacent channels on the receiver side.
- the neural signal spectrum spans from approximately 0.1 Hz to 10 kHz.
- the Nyquist rate requires 20 kilo-Samples per second per channel.
- recorded neural signals are often between 50 ⁇ V to 1 mV having a supply range of ⁇ 1.5 V, and the fact that even in a high quality recording there is often greater than 10 ⁇ V of background noise, a resolution of eight to ten bits should be sufficient in this application. Therefore, at least 160 kb/s of bandwidth is needed for raw data per recording channel.
- a 100 channel neural recording system for example, requires a wireless link with 10 Mega-bits per second bandwidth.
- embodiments of the present invention relate to systems and methods for a wireless neural recording system. Further, embodiments of the present invention relate to a flexible, clockless, plurality-channel simultaneous wireless neural recording system with adjustable resolution.
- the same system that is described here can be used for other biological signals with electrical nature such as electrocardiogram (ECG), electroencephalogram (EEG), electrocorticogram (ECoG), electromyogram (EMG), electro-oculo-gram (EOG), electrogastrogram (EGG), etc.
- the system tackles bandwidth problems while transferring the complexities from the implantable unit, where size and power are extremely limited, to the external unit.
- the system also provides a high level of flexibility, allowing a tradeoff among bandwidth, sampling rate, dynamic range, and resolution of the system, depending on the type of the neural signals and the number of active channels.
- a 32 channel wireless implantable neural recording (WINeR) system-on-a-chip (SoC) uses time division multiplexing (TDM) a pulse width modulated (PWM) sample from every channel, while eliminating the need for large off-chip components, digital buffers, and particularly, the high frequency on-chip clock of conventional systems. This reduces the overall system noise and lowers the complexity and power dissipation on a transmitter of the wireless unit.
- TDM time division multiplexing
- PWM pulse width modulated
- One aspect of the present invention is to provide a system for transmitting bioelectrical signals.
- the system includes an implantable bioelectrical sensor for receiving at least one bioelectrical signal; an analog-to-time converter for converting the received bioelectrical signal from an analog domain to a time domain signal; and a radio frequency (RF) modulator for transmitting the time domain signal.
- the analog-to-time converter and the RF modulator are implantable in a living being.
- FIG. 1 illustrates a block diagram of a wireless neural recording system, in accordance with an exemplary embodiment of the present invention.
- FIG. 2A illustrates a block diagram of a transmitter unit of the wireless neural recording system of FIG. 1 , in accordance with an exemplary embodiment of the present invention.
- FIG. 2B illustrates a block diagram of a receiver unit of the wireless neural recording system of FIG. 1 , in accordance with an exemplary embodiment of the present invention.
- FIG. 3 illustrates a more detailed partial schematic of the transmitter of FIG. 2A , in accordance with an exemplary embodiment of the present invention.
- FIG. 4 illustrates a schematic of a low noise amplifier (LNA) of the transmitter of FIG. 2A , in accordance with an exemplary embodiment of the present invention.
- LNA low noise amplifier
- FIG. 5 illustrates a schematic of pulse width modulator (PWM), in accordance with an exemplary embodiment of the present invention.
- PWM pulse width modulator
- FIG. 6A illustrates a schematic of a triangular waveform generator (TWG), in accordance with an exemplary embodiment of the present invention.
- TWG triangular waveform generator
- FIG. 6B illustrates a schematic of a P-type current source operational transconductance amplifier (OTAP) for the triangular waveform generator, in accordance with an exemplary embodiment of the present invention.
- OTP operational transconductance amplifier
- FIG. 6C illustrates a schematic of an N-type current sink operational transconductance amplifier (OTAN) for the triangular waveform generator, in accordance with an exemplary embodiment of the present invention.
- OTAN operational transconductance amplifier
- FIGS. 7A-7B illustrate exemplary graphical representations of triangular waveforms generated with the TWG of FIG. 6A , in accordance with an exemplary embodiment of the present invention.
- FIG. 8 illustrates a schematic of a voltage controlled oscillator (VCO) of the transmitter of FIG. 2A , in accordance with an exemplary embodiment of the present invention.
- VCO voltage controlled oscillator
- FIG. 9 illustrates a graphical representation of a frequency shift keying (FSK) spectrum, in accordance with an exemplary embodiment of the present invention.
- FSK frequency shift keying
- FIG. 10 illustrates graphical representations of various measured waveforms, including a low noise amplifier output, a TWG output, an intermediate frequency (IF) stage-time division multiplexed-pulse width modulated (TDM-PWM) output, a demodulated time division multiplexed-pulse width modulated output, a transmitted low noise amplifier output, and a received digital to analog output, in accordance with an exemplary embodiment of the present invention.
- IF intermediate frequency
- TDM-PWM stage-time division multiplexed-pulse width modulated
- FIG. 11 illustrates a graphical user interface (GUI) representation of 32 arbitrary and four monitoring signals being simultaneously recorded, in accordance with an exemplary embodiment of the present invention.
- GUI graphical user interface
- FIG. 12 illustrates graphical representations of waveforms depicting the effects of changing the sampling rate, which changes the time to digital conversion (TDC) resolution, in accordance with an exemplary embodiment of the present invention.
- FIG. 13 illustrates graphical representations of amplitude of a triangular wave adjusted to the amplitude of an input signal to improve resolution, in accordance with an exemplary embodiment of the present invention.
- FIG. 14 illustrates graphical representations of an effect of increasing the sampling rate on reducing the system resolution, which has been compensated by adjusting the amplitude of the triangular wave, in accordance with an exemplary embodiment of the present invention.
- FIG. 15 illustrates a graphical representation of crosstalk among different channels from the low noise amplifiers to the processing block of the system in the computer, in accordance with an exemplary embodiment of the present invention.
- FIG. 16 illustrates a graphical representation of power consumption of the transmitter of the wireless neural recording system, in accordance with an exemplary embodiment of the present invention.
- FIG. 17 illustrates a time to digital converter (TDC) of a receiver unit of FIG. 2B of the wireless neural recording system, in accordance with an exemplary embodiment of the present invention.
- TDC time to digital converter
- FIGS. 18A-18C illustrate graphical representations of a transmitter frequency shift keying-pulse width modulated-time division multiplexed (FSK-PWM-TDM) signal in both time (left) and frequency (right) domains, in accordance with an exemplary embodiment of the present invention.
- FSK-PWM-TDM transmitter frequency shift keying-pulse width modulated-time division multiplexed
- FIGS. 19A-19C illustrate graphical representations of a receiver pulse width modulated-time division multiplexed (PWM-TDM) signal in both time (left) and frequency (right) domains, in accordance with an exemplary embodiment of the present invention.
- PWM-TDM pulse width modulated-time division multiplexed
- FIG. 20A illustrates a graphical representation of effects of receiver bandwidth limitation on the spectrum of the recovered pulse width modulated signal in a constant sampling frequency with a reduced pulse width modulated duty cycle, in accordance with an exemplary embodiment of the present invention.
- FIG. 20B illustrates a graphical representation of effects of receiver bandwidth limitation on the spectrum of the recovered pulse width modulated signal in a constant pulse width modulated duty cycle with an increased sampling rate, in accordance with an exemplary embodiment of the present invention.
- FIG. 21A illustrates a graphical representation of a theoretical pulse width modulated duty cycle error due to receiver bandwidth limits at approximately 5, 10, 20, 36, and 75 MHz for an approximate 320 kHz sampling rate, in accordance with an exemplary embodiment of the present invention.
- FIG. 21B illustrates a graphical representation of a theoretical pulse width modulated duty cycle error due to receiver bandwidth limits at approximately 5, 10, 20, 36, and 75 MHz for an approximate 640 kHz sampling rate, in accordance with an exemplary embodiment of the present invention.
- FIG. 22 illustrates a graphical representation of dependence of the pulse width modulated duty cycle error on sampling rate, PWM duty cycle, and receiver bandwidth, in accordance with an exemplary embodiment of the present invention.
- FIG. 23 illustrates a block diagram for an experimental setup for the wireless pulse width modulated technique using the transmitter of FIG. 2A , and wideband receivers of FIG. 2B from 5 to 75 MHz, in accordance with an exemplary embodiment of the present invention.
- FIG. 24A illustrates a graphical representation of simulated ramp input and pulse width modulated-time division multiplexed (PWM-TDM) signal on a transmitter, and an intermediate frequency-frequency shifting keying-pulse width modulated (IF-FSK-PWM) signal on the receiver, in accordance with an exemplary embodiment of the present invention.
- PWM-TDM pulse width modulated-time division multiplexed
- IF-FSK-PWM intermediate frequency-frequency shifting keying-pulse width modulated
- FIG. 24B illustrates a graphical representation of measured ramp input and PWM-TDM) signal on a transmitter, and an IF-FSK-PWM signal on the receiver, in accordance with an exemplary embodiment of the present invention.
- FIG. 25A illustrates a graphical representation of simulated variations in the recovered pulse width modulated waveform due to receiver bandwidth, in accordance with an exemplary embodiment of the present invention.
- FIG. 25B illustrates a graphical representation of simulated pulse width modulated duty cycle error versus pulse width modulated duty cycle for different receiver bandwidths, in accordance with an exemplary embodiment of the present invention.
- FIG. 26 illustrates a graphical representation of measured wireless pulse width modulated duty cycle error versus pulse width modulated duty cycle for different receiver bandwidth at an approximate 320 kHz sampling rate, in accordance with an exemplary embodiment of the present invention.
- Embodiments of the present invention are not limited to use in the described systems. Rather, embodiments of the present invention can be used when a small, low power, and short range wireless recording system is desired or necessary.
- the system described hereinafter as a wireless implantable neural recording system method can also find utility as a system for many applications beyond neural signals, including but not limited to other analog bioelectrical signals.
- Embodiments of the present invention overcome the deficiencies in the prior art.
- Embodiments of the present invention overcome the current multi-channel neural recording systems, whether for research on animal subjects or for a clinical application on human, that are hard wired.
- embodiments of the present invention improve the signal to noise ratio (SNR), reduce the tethering effect on the animal/human subject, and allow behavioral neuroscience researchers to use multiple animals/humans in their experiments/clinical trials.
- SNR signal to noise ratio
- the benefits include hiding the instrumentalities for better aesthetics, additional comfort of not having transcutaneous wires breaking through the skin, and reducing, if not eliminating, the risk of potential harmful contaminants from entering the body, e.g., the brain.
- embodiments of the present invention improve SNR; reduce motion artifacts; eliminate the tethering effect, which can bias animal/human behavior; allow a wider range of experiments with multiple animal/human subjects versus other wired or other wireless systems; reduce the risk of infection on the animal/human; reduce the risk of damage both to the animal/human and to the implanted system; improve a user (animal/human) comfort level; enhance mobility of the animal/human; and makes the system more cosmetically acceptable/pleasing.
- extracellular neural signals are weak and have one of the widest bandwidth of bioelectrical signals in the body.
- the neural signals include peak-to-peak amplitude of approximately 50 to 1000 microVolts ( ⁇ V), a neural background noise of approximately 5 to 10 microVolts root-mean-squared ( ⁇ V rms ), frequency contents of 0.1 Hertz (Hz) to 10 kiloHertz (kHz), and a direct current (DC) baseline drifts up to several hundreds of millivolts (mV).
- any system that is implantable inside the body can cause tissue damage if it increases the local temperature by more than 2 degrees centigrade (° C.), so the power must be less than approximately 80 mW/cm 2 (milliWatts per square centimeter).
- Embodiments of the present invention do not increase the temperature of the living being in which the system is implanted by more than three degrees centigrade.
- the system should have an extended battery life for chronic experiments, as the user (animal/human) does not want to face numerous surgeries to replace the power source therein. Accordingly, ultra low power consumption is needed for long battery life and to eliminate tissue damage due to high temperatures (heat).
- the system must have a small footprint.
- the system should be less than one cubic centimeter (1 cm 3 ), depending on the anatomical position.
- the less invasive the system is on the body the easier the surgery for implanting the system, the less discomfort of the user, and, accordingly, the higher the safety levels of implanting the same.
- a wide bandwidth is needed throughout the system. Specifically, a wide bandwidth is needed from the electrodes through the processing system. For example, for a single channel, having a sampling rate of 20 kSps (kiloSamples per second) and 8 bits of resolution, a data rate of approximately 0.16 Mbps is needed. For 32 channels, however, with a sampling rate of 640 kSps, a data rate of 5.12 Mbps (up to 7 Mbps if the wireless transmission overhead is considered) is needed. Further, unlike air, electromagnetic power absorption in tissue increases as the frequency is squared. Consequently, embodiments of the present invention prefer the carrier frequency to be as low as possible to minimize losses.
- Embodiments of the present invention relate to an implantable transmitter in a brain of a test subject or a user, e.g., an animal or a human, that is as simple, small, and low power as possible for recording neural signals.
- the simplicity, size and low power consumption of the transmitter is preferably simplified, at the cost of making the external receiver to be more complex.
- the size and power of the implantable transmitter can be controlled and, thus, reduced.
- the size and power are not as critical as the implanted transmitter which is inside the body.
- Embodiments of the present invention relate to a wireless implantable neural recording system.
- the system 100 includes a front-end or implantable transmitter 200 , and a back-end, or external receiver 300 .
- the transmitter 200 receives a neural (or biological, or bioelectrical) signal or a plurality of neural (or biological) signals 202 from one or more electrodes 110 implanted in the brain.
- An electrode 110 can be coupled directly to a neuron or, alternatively, be placed within neural circuitry and thus nearby a number of neurons.
- An analog to time converter (ATC) 210 can receive the neural signals 202 , which are converted to a pulse width modulated time division multiplexer (PWM-TDM) signal 220 .
- a radio frequency (RF) modulator 230 transmits a signal 240 , e.g., frequency shift keyed (FSK), therefrom.
- a signal 240 e.g., frequency shift keyed (FSK)
- the receiver 300 receives the signal 240 and directs it to a RF demodulator 310 to recover the base band PWM-TDM signal 315 , which can be a replica of the PWM-TDM signal 220 sent by the transmitter 200 .
- the recovered PWM-TDM signal 315 is converted to a digital signal 330 with a time to digital converter (TDC) 320 , which is then processed by a processing system that receives the digital signal 330 , such a computer or like device.
- TDC time to digital converter
- the transmitter 200 converts an analog sample to time by pulse width modulation (PWM), and carries the data in the pulse duty cycle, which is the ratio between the duration of the signal when it is high to the total duration of a cycle (high+low).
- PWM-TDM signal 220 can then be frequency modulated (FM) and the resulting FSK signal 240 is transmitted across a wireless link.
- FM frequency modulated
- the receiver 300 converts the pulse duty cycle to digital data 330 .
- the transmitter 200 coverts the analog neural (or biological) signal 202 to a time events, and the receiver 300 coverts the time events to a digital signal 330 .
- the result is simple to implement, robust, and monotonic.
- the transmitter 200 does not require an on-chip clock, which is required in conventional wireless solutions and can contaminate analog samples, require additional power consumption, and further increase its footprint.
- the transmitter can include an analog to asynchronous converter, which like the ATC does not need a clock signal.
- the bioelectrical signals can be received by an analog to asynchronous converter for converting the received bioelectrical signal to an asynchronous signal, which can ultimately be transmitted. By transmitting an asynchronous converted signal can be wirelessly transmitted, and the data transferred, like in the ATC system, is not lost.
- the transmitter 200 includes a front end amplifier block 250 comprising a plurality of low noise amplifiers (LNAs) 252 , a pulse width modulator block 260 comprising a plurality of pulse width modulators 264 , a multiplexer 270 , a pulse width modulation mask 280 , a voltage controlled oscillator (VCO) 290 , a power-on reset circuit 292 , a bandgap reference 294 , a power source, such as battery 296 , and a triangular waveform generator 400 .
- LNAs low noise amplifiers
- VCO voltage controlled oscillator
- neural signals 202 from one or more microelectrode arrays 110 are amplified and bandpass filtered by the front-end amplifier 250 comprising the array of tunable LNAs 252 .
- the conditioned neural signals are then pulse width modulated by the pulse width modulators 264 , each comprising an array of high speed comparators 262 , which can also receive a precision triangular waveform from the triangular waveform generator 400 .
- the pulse width modulated samples are time-division multiplexed by the multiplexer 270 along with samples of the monitoring signals, including V DD , V SS , the bandgap reference voltage (V BG ) and the temperature voltage (V T ).
- a plurality of sampled pulses of TDM-PWM signal are masked with a pulse width modulation mask 280 , and fed into a voltage controlled oscillator 290 .
- the transmitter 200 can receive a plurality of channels, via a plurality of electrodes 110 (e.g., an electrode array). For example, there can be 32 electrodes positioned in a user's brain receiving neural signals 202 , and then prepared for transmission and thus ultimately transmitted by the transmitter 200 .
- the transmitter 200 can be implemented as a 32 channel application specific integrated circuit (ASIC).
- ASIC application specific integrated circuit
- the analog front-end amplifier 250 of the transmitter 200 can include a plurality of two-stage capacitively coupled LNAs 252 .
- Each LNA 252 includes built-in bandpass filtering capability. Accordingly, the LNAs amplify the received neural signals, preferably in the frequency range of approximately 0.1 Hz to approximately 10 kHz.
- each pulse width modulator 264 of the plurality of pulse width modulators 260 includes a rail-to-rail comparator 262 .
- the 32 signals which have been amplified and filtered by the front-end amplifier block 250 , are fed to a pulse width modulator 260 , and the four monitoring signals 256 , 257 , 258 , 259 are also each fed to the same pulse width modulator 260 .
- the result are pulse width modulated samples 265 .
- Each of the pulse width modulated samples 265 are next fed to a time division multiplexer (TDM MUX) 270 .
- the samples 265 are time-division multiplexed along with the samples of the four monitoring signals 256 , 257 , 258 , and 259 (i.e. placed back-to-back in series) to form a PWM-TDM signal 275 .
- the 32 pulse width modulated samples and the samples of the four monitoring signals are selected one at a time to create the TDM-PWM signal 275 by a circular shift register (CSR) running a 36:1 MUX.
- the CSR receives a time base from the triangular waveform generator 400 as its clock signal.
- FIG. 4 shows a detailed schematic diagram of one of the LNAs which can both amplify and filter the neural or biological signals.
- the triangular waveform generator (TWG) 400 is provided.
- the TWG 400 which is shown in more detail in FIG. 5 , directly affects the noise, accuracy, and resolution of the system.
- a precision TWG 400 includes a binary weighted, high voltage compliance, large output impedance complementary current source/sink (CCSS) pair, which linearly charges/discharges a capacitor (C S ) having a capacitance of approximately 10 pico Farad (pF).
- CCSS complementary current source/sink
- the CCSS circuit of the TWG 400 utilizes MOSFETs in deep triode region.
- I Source and I Sink can each be varied in approximately 16 steps.
- Controlling both charging and discharging of the capacitor not only avoids substrate charge injection, but also provides programmability over the sampling rate in a wide range.
- a window detector limits the TWG output and generates the switching signals for the CCSS, CSR, and TDM blocks.
- the lower and upper voltage limits, V low and V high can be either generated internally (V SS +0.1 V and V DD ⁇ 0.1 V) or adjusted externally based on the dynamic range of the amplified neural signals.
- the resulting PWM-TDM signal 275 is fed to a PWM mask 280 .
- the PWM mask 280 can be responsible for limiting the PWM-TDM signal to either rising or falling ramps of the triangular wave by masking the opposing side. This synchronizes the PWM pulses at their rising or falling edges, improving the system accuracy and facilitating data recovery on the receiver 300 .
- Another function of the mask 280 is enforcing the minimum and maximum widths of the PWM pulses, to reduce the required wireless link bandwidth and improve the system resolution by avoiding pulse widths that are too narrow.
- VCO voltage controlled oscillator
- trimmed PWM-TDM samples drive the VCO 290 , which may include an off-chip surface mount device (SMD) inductor.
- the VCO 290 can operate in two modes: 1) wideband frequency shift keying (FSK) when the varactor input is driven, or 2) wideband on-off keying (OOK) when the VCO enable input is driven.
- the samples from the VCO 290 are then transmitted from an antenna 295 .
- the receiver 300 can receive the transmitted sample with its own antenna 305 .
- the receiver 300 down converts the RF-FSK and FM demodulates it through, for example, a disciminator.
- the recovered TDM-PWM 315 is then fed to a TDC for converting the time signal to a digital signal.
- the TDC can be implemented on a FPGA board for digitization.
- Digital values can be buffered in a memory, e.g., 2 MB SRAM, ensuring continuity and then forwarded to processing system, such as a computer, via an interface, such as a USB (universal serial bus) interface or like system.
- each sample frame received by the computer can be detected using the unique pattern of the monitoring samples, and a graphical user interface (GUI) can illustrate the individual channels after time division demultiplexing.
- GUI graphical user interface
- the receiver 300 may be equipped with an X number of channel—(e.g., four) digital to analog converter (DAC), which can directly generate X analog neural signal outputs to be observed on an oscilloscope.
- DAC digital to analog converter
- at least one of these channels may be further amplified to drive a loudspeaker.
- the receiver 300 can include the antenna 305 for receiving the samples; the receiver 300 is adapted to convert the time sample to a digital signal. Initially, the receiver 300 receives the transmitted signal 240 . Then, the received signal, e.g., the FSK-TDM-PWM carrier, can be amplified and filtered by a wideband receiver RF front-end. A mixer can down convert the received carrier to an intermediate frequency (IF) band, which is power stabilized by an automatic gain control (AGC) block within approximately ⁇ 0.5 dB. The IF-TDM-PWM may be rectified and low pass filtered with selectable bandwidths, for example, of one of approximately 9, 18, or 36 MHz, to recover the baseband TDM-PWM 315 .
- IF intermediate frequency
- AGC automatic gain control
- TDC time-to-digital converter
- DAC digital to analog converter
- the neural signal 202 is received by the transmitter 200 and both amplified and filtered by the front-end amplifier block 250 .
- the amplified signal is then fed to the pulse width modulator block 260 , which can also receive the triangular waveform from the TWG 400 .
- the PWM samples 265 are fed to the TDM-PWM MUX 270 , and then to the PWM mask 280 , and ultimately to the VCO 290 before being transmitted.
- the plurality of LNAs 252 can include two stages.
- a first stage of the LNA can be fully differential with a fixed approximately 40 dB gain and common-mode feedback (CMFB).
- the first stage can dissipate approximately 16.4 ⁇ A from an approximate ⁇ 1.5 V supply.
- a second stage of the LNA is a differential to single-ended amplifier with a one-bit adjustable gain, e.g., approximately 28 or 37 dB, and can draw approximately 8.1 ⁇ A.
- the low-cutoff of the LNA stage is continuously tunable by changing gate voltages (e.g., V gate1,2 ) of the bidirectional current sources, driving a pair of pseudo-resistors across the capacitive feedback.
- the high-cutoff is four-bit programmable.
- each pulse width modulator 264 comprises a comparator 262 .
- the comparators 262 within the PWM block 260 are enabled one at a time by circulating a “1” in the CSR 285 , converting the conditioned analog signals into pulses by comparing them with the output of a precision TWG 400 .
- the substrate is quiet and there is no digital transition, reducing the substrate noise and dynamic power dissipation.
- the monitoring signals provide a unique pattern that can be used to indicate the beginning of each TDM packet on the receiver 300 .
- the TDM-PWM MUX 270 receives the pulse width sample 265 .
- the CSR 285 is loaded with 36-bit binary 10 . . . 00.
- the single “1” circulates in the CSR 285 and connects one out of the 36 comparator PWM pulses 265 to the MUX 270 output.
- the resulting signal is a TDM-PWM signal 275 , which is buffered and fed into the VCO 290 after being trimmed and synchronized.
- This architecture significantly facilitates the extension of the system, e.g., to 64 or 128 or more channels, without requiring much additional circuitry.
- the PWM mask 280 is responsible for limiting the PWM-TDM signal to either rising or falling ramps of the triangular wave by masking the other side. It synchronizes the PWM pulses at their rising or falling edge, improving the accuracy and facilitating data recovery on the receiver 300 .
- the PWM mask 280 further enforces minimum and maximum widths of the PWM pulses 220 , to reduce the required wireless link bandwidth and improve the system resolution by avoiding too narrow pulse widths.
- the VCO 290 receives the trimmed PWM-TDM signal to output a signal, such as a FSK signal or an OOK signal.
- the antenna 295 is adapted to transmit such a signal.
- each LNA 252 has a novel gain control. As illustrated in FIG. 4 , the LNA 252 comprises two OTAs: a first OTA (OTA 1 ) 253 and a second OTA (OTA 2 ) 254 .
- the gain of the first OTA 253 is constant, and can be approximately 40 dB (i.e., 100).
- the gain of the second OTA 254 is programmable, and can be approximately 28 or 37 dB (i.e., 25 or 70).
- each LNA 252 includes a two-stage LNA block with a total gain of approximately 68 or 77 dB (i.e. 2500 or 7000).
- the LNA 252 has a low cutoff frequency, which is continuously tunable from approximately 0.1 Hz to approximately 1 kHz through V gate1 and V gate2 , and a high cutoff frequency that can be digitally tuned from 0.7 to 10 kHz through BW 0 to BW 3 .
- the LNA 252 input referred noise can be approximately 3.9 ⁇ V rms in an approximately 10 Hz to approximately 10 kHz frequency range.
- the LNA 252 includes a first bias circuit 255 , a second bias circuit 256 , OTA 1 253 , OTA 2 254 , and connection circuitry. Both bias circuits provide bidirectional current sources.
- the feedback of the OTA 1 253 and OTA 2 254 create very high impedance.
- a PMOS transistor M P and a NMOS transistor M N are in series and their combination is in parallel with a fixed capacitor C OTA1 .
- Such feedbacks can be implemented across both the positive and negative ends of the fully differential OTA 253 .
- OTA 2 254 has a programmable feedback that can be changed.
- the feedback across OTA 2 254 also includes the PMOS transistor M P and the NMOS transistor M N in series. These transistors, however, are in parallel with a first capacitor C OTA2A , which is in series with a second capacitor C OTA2B that is in parallel with a switch SW 1 .
- the feedback across OTA 2 254 is essentially a resistor-capacitive delay.
- the transistors (M P and M N ) provide the resistance
- the first and second capacitors (C OTA2A and C OTA2B ) provide the capacitance.
- the switch SW 1 is off (i.e. open)
- the second capacitor C OTA2B which is parallel with switch SW 1 , can charge and thus the total capacitance in parallel with M P and M N is smaller.
- the switch SW 1 when the switch SW 1 is on (i.e. closed), the second capacitor C OTA2B does not charge, and thus is shorted for a larger capacitance in parallel with M P and M N .
- the switch is controlled by the Gain signal.
- FIG. 5 illustrates a simplified schematic of a TWG 400 and PWM that may be implemented with the present system.
- the PWM 260 receives the amplified and filtered neural signals, as well as the signal from the TWG 400 .
- FIG. 6 illustrates a schematic of an exemplary triangular waveform generator (TWG), in accordance with an exemplary embodiment of the present invention.
- TWG triangular waveform generator
- a variety of generators may be used to generate a triangular waveform; the present example is to show but one suitable design.
- the TWG 400 includes a pair of programmable complementary current source and sink (CCSS), which have large compliance voltages that may be close to the supply levels.
- CCSS programmable complementary current source and sink
- the output impedance of the current source and the current sink are quite high, e.g., approximately 17.6 M ⁇ and 26.6 M ⁇ , respectively.
- the CCSS linearly charge and discharge a capacitor (C S ), e.g., approximately 6 pF, at an adjustable rate from approximately 58 kHz to approximately 680 kHz.
- DP 0 is an input for a first switch 401 controlling the status (“on” and “off”) of a PMOS transistor 405 , which has an exemplary size of 3 ⁇ m/3 ⁇ m
- DP 1 is an input for a second switch 402 controlling the status of a PMOS transistor 406 , which has an exemplary size of 6 ⁇ m/3 ⁇ m
- DP 2 is an input for a third switch 403 controlling the status of a PMOS transistor 407 having an exemplary size of 12 ⁇ m/3 ⁇ m
- DP 3 is an input for a fourth switch 404 controlling the status of a PMOS transistor 408 which has an exemplary size of 24 ⁇ m/3 ⁇ m.
- V BP1 and V BP2 Two voltage signals (V BP1 and V BP2 ) are inputs from a reference voltage generator, which are inputs to another bias generator (V SOURCE ) 415 that prepares inputs for the first, second, third, and fourth switches 401 , 402 , 403 , 404 .
- a first PMOS transistor 405 comprises a gate, source and drain. The gate of the first PMOS transistor 405 is coupled to the first switch 401 . The source of the first PMOS transistor 405 is coupled to V DD .
- a second PMOS transistor 406 comprises a gate, a source, and a drain. The gate of the second PMOS transistor 406 is coupled to the second switch 402 , and its source is coupled to V DD .
- a third PMOS transistor 407 comprises a gate, a source, and a drain.
- the gate of the third PMOS transistor 407 is coupled to the third switch 403 , and its source is coupled to V DD .
- a fourth PMOS transistor 408 comprises a gate, a source, and a drain.
- the gate of the fourth PMOS transistor 408 is coupled to the fourth switch 404 , and its source is coupled to V DD .
- the drain of the first, second, third, and fourth PMOS transistors 405 , 406 , 407 , and 408 are coupled to a source of a fifth transistor 409 and a negative input to a OTAP 410 .
- the OTAP 410 also receives V H and a V BN1 voltage signals.
- a fifth switch 411 receives the output of OTAP 410 and En p signal.
- the fifth switch 411 is also coupled to the gate of the fifth transistor 409 .
- the drain of the fifth transistor 409 generates a SOURCE current signal, which charges a capacitor C S .
- the capacitor C S is coupled between the SOURCE signal and V SS .
- DN 0 is an input for a sixth switch 421 controlling the status (“on” and “off”) of a NMOS transistor 425 , which has an exemplary size of 3 ⁇ m/3 ⁇ m;
- DN 1 is an input for a seventh switch 422 , controlling the status of a NMOS transistor 426 , which has an exemplary size of 6 ⁇ m/3 ⁇ m;
- DN 2 is an input for an eighth switch 423 , controlling the status of a NMOS transistor 427 , which has an exemplary size of 12 ⁇ m/3 ⁇ m; and
- DN 3 is an input for a ninth switch 424 controlling the status of a NMOS transistor 428 , which has an exemplary size of 24 ⁇ m/3 ⁇ m.
- V BN1 and V BN2 Two voltage signals (V BN1 and V BN2 ) are inputs from a reference voltage generator, which are inputs to another bias generator (V SINK ) 435 that prepares inputs for the sixth, seventh, eighth, and ninth switches 421 , 422 , 423 , 424 .
- a first NMOS transistor 425 comprises a gate, source and drain. The gate of the first NMOS transistor 425 is coupled to the sixth switch 421 . The drain of the first NMOS transistor 425 is coupled to V SS .
- a second NMOS transistor 426 comprises a gate, a source, and a drain. The gate of the second NMOS transistor 426 is coupled to the seventh switch 422 , and its drain is coupled to V SS .
- a third NMOS transistor 427 comprises a gate, a source, and a drain.
- the gate of the third NMOS transistor 427 is coupled to the eighth switch 423 , and its drain is coupled to V SS .
- a fourth NMOS transistor 428 comprises a gate, a source, and a drain.
- the gate of the fourth NMOS transistor 428 is coupled to the ninth switch 424 , and its drain is coupled to V SS .
- the source of the first, second, third, and fourth NMOS transistors 425 , 426 , 427 , and 428 are coupled to a source of a fifth NMOS transistor 429 and a negative input to a OTAN 430 .
- the OTAN 430 also receives V L and a V BP1 voltage signals.
- a tenth switch 431 receives the output of OTAN 430 and the En N signal.
- the tenth switch 431 is also coupled to the gate of the fifth NMOS transistor 429 .
- the source of the fifth NMOS transistor 429 generates a SINK current signal, which discharges the capacitor C S .
- the capacitor C S is coupled between the SINK signal and V SS .
- the SOURCE and the SINK signal are connected together and both connected to the capacitor C S .
- a D-flip flop circuit 440 can help drive the charging and discharging of the capacitor C S .
- FIGS. 6B-6C are exemplary schematics of features of the OTAP 410 and OTAN 430 .
- FIGS. 7A-7B illustrate exemplary graphical representations of triangular waveforms generated with the triangular waveform generator 400 of FIG. 6A , in accordance with an exemplary embodiment of the present invention.
- the system resolution and dynamic range of the system can be adjusted by changing the frequency and amplitude of the triangular waveform, based on the characteristics of the neural signal and user preferences. For example, if the amplified and filtered neural signal (by LNA) is between V 1 and V 2 of FIGS. 7A-7B , the V high and V low of the triangular waveform can be adjusted to be slightly above and below these levels. This can increase the time-to-digital converter resolution by a certain number of bits.
- the input signal range is between V 1 and V 2
- changing the V high , V low , I source , and I sink in the CCSS of the TWG 400 can adjust the triangular waveform to increase the PWM dynamic range. Consequently, the system resolution can improve by log 2 [(V DD ⁇ V SS )/(v 1 ⁇ v 2 )] bits.
- the sampling rate can be similarly adjusted by changing the triangular wave frequency by varying V high , V low , I source , and I sink to desired levels.
- FIG. 8 illustrates an exemplary VCO 290 for use in accordance with exemplary embodiments of the present invention.
- the VCO 290 can be a hybrid VCO with a bank of binary-scaled on-chip varactors (e.g., PMOS), and an off-chip coil.
- PMOS binary-scaled on-chip varactors
- the FSK carrier can be tuned at approximately 898 MHz or 926 MHz.
- FIG. 9 is a graphical representation of the received FSK spectrum around 900 MHz at the input of the mixer block. As graphically represented in the figure, the SNR is approximately 57.3 dB.
- FIG. 10 illustrates graphical representations of various measured waveforms, including (from the top bottom), a low noise amplifier output on the transmitter side, a triangular waveform generator output on the transmitter side, an intermediate frequency-time division multiplexed-pulse width modulated (IF-PWM-TDM) output on the receiver side, a demodulated time division multiplexed-pulse width modulated output on the receiver side, a low noise amplifier output on the transmitter side, and a received and reconstructed version of the same signal at the digital to analog converter (DAC) output, in accordance with an exemplary embodiment of the present invention.
- IF-PWM-TDM intermediate frequency-time division multiplexed-pulse width modulated
- DAC digital to analog converter
- graphical representations are some of the measured waveforms at nodes on the transmitter and receiver sides when an approximately 1.3 mV, 30 Hz artificial ECG signal is applied to the input of the system 100 .
- graphical representation 1000 is the LNA output on the transmitter side
- graphical representation 1010 is the TWG output on the transmitter side
- graphical representation 1020 is the IF-TDM-PWM signal on the receiver side
- graphical representation 1030 is the demodulated TDM-PWM signal on the receiver side
- graphical representation 1040 is the transmitter LNA output
- graphical representation 1050 is the receiver digital to analog converter output.
- FIG. 11 illustrates a graphical representation of 32 arbitrary and four monitoring signals being simultaneously recorded, in accordance with an exemplary embodiment of the present invention.
- This graphical representation depicts a recording sample when three arbitrary waveforms from three function generators are divided below approximately 1 mV and applied to two or three input channels, each. For this measurement, the distance between the transmitter and the receiver antennas was approximately one meter.
- FIG. 12 illustrates graphical representations of waveforms depicting the effects of changing the sampling rate, which changes the time to digital converter resolution, in accordance with an exemplary embodiment of the present invention.
- These waveforms show the effect of changing the sampling rate, which also changes the TDC resolution.
- the upper waveform is approximately 1.3 mV and sampled at approximately 12.2 kSps. This creates a TDC resolution of 12 bits.
- the lower waveform is the same signal sampled at approximately 3.9 kSps. By lowering the triangular waveform frequency, the resolution is increased to 14 bits.
- FIG. 13 illustrates graphical representations of the amplitude of a triangular wave is adjusted to the amplitude of an input signal to improve resolution, in accordance with an exemplary embodiment of the present invention.
- These waveforms show the effect of changing the dynamic range.
- the amplitude of the triangular wave is adjusted to the amplitude of the input signal to improve the resolution.
- the input signals are approximately 400 ⁇ V, and the sampling rates are approximately 12.2 kSps.
- FIG. 14 illustrates graphical representations of an effect of increasing the sampling rate on reducing resolution, in accordance with an exemplary embodiment of the present invention.
- the effect of increasing the sampling rate on reducing the resolution has been compensated by adjusting the dynamic range of the system.
- FIG. 15 illustrates a graphical representation of crosstalk from low noise amplifiers to the processing system, in accordance with an exemplary embodiment of the present invention.
- one of the 32 channels was provided with a 1 kHz sine wave, and the remaining channels were grounded. Then the ratio between the amplitude of the signal received from every channel and the channel with sine wave was measured. The worst case crosstalk through the entire system was approximately ⁇ 34 dB.
- FIG. 16 illustrates a graphical representation of power consumption of the transmitter 200 of the wireless neural recording system 100 , in accordance with an exemplary embodiment of the present invention.
- the power chart shows that the front-end amplifier 250 consumes most of the power, followed by the VCO 290 and the TWG 400 .
- the estimated total power consumption of the transmitter 200 is approximately 5.6 mW at ⁇ 1.5V.
- FIG. 17 illustrated a time to digital converter (TDC) of a receiver of the wireless neural recording system, in accordance with an exemplary embodiment of the present invention.
- the TDC includes a coarse counter using approximately 48 MHz FPGA main clock and including a fine counter that uses logic delay chain.
- a goal of many embodiments of the present invention is to indicate the signal to noise ratio (SNR) of the signal arrived at the processing unit (e.g., the computer), which represents the noise in the entire system.
- SNR signal to noise ratio
- Various sources of error in the reconstructed signal can be divided into those that are related to a) the implantable transmitter unit and b) the external receiver unit.
- Transmitter errors include errors in generating the triangular waveform, PWM comparator noise, offset, and hysteresis, and the VCO phase noise.
- error is mostly due to the bandwidth limitation and internal noise, particularly at the RF front end of the receiver. Since the amplitude data is encoded in the pulse width, in this system the main purpose of the receiver is not to reconstruct the exact transmitted PWM waveform but to accurately measure the time intervals between every two successive transitions in the received FSK carrier frequency.
- the PWM noise includes both the TWG noise and the PWM comparator noise.
- a complementary current source/sink CCSS linearly charges/discharges a capacitor C S between V high and V low .
- the resulting triangular wave is compared with V in and generates the PWM pulse width
- dw T D ( dC C - I Sink ⁇ I Source I Source + I Sink ⁇ ( dI Source I Source 2 + dI Sink I Sink 2 ) ) + d V i ⁇ ⁇ n V high - V low , ( 2 )
- T the sampling period
- dw the changes in the PWM pulse width
- Variations in the TWG capacitor over time are often very small.
- dV in is the equivalent input referred noise of the comparator. Because the noise on V high and V low will also affect dw, comparator noises may need to be considered.
- the dI Source and dI Sink can be the noise contributions of the CCSS. Although the finite output impedance of the CCSS also contributes to dw, it mostly causes distortion, which can be compensated in calibration.
- comparators are assumed to be identical with an input referred noise of V n,comp 2
- the VCO is the block that should be driven by the PWM comparator to create, in an exemplary embodiment, a FSK-PWM-TDM carrier signal (see FIGS. 18A-18B ).
- the PWM spectrum can be shifted from baseband to FSK frequencies, f 1 and f 2 .
- a single square pulse with width w can be described in time and frequency domains.
- the VCO phase noise results in a frequency noise of ⁇ f rms , which after frequency demodulation turns into an rms voltage noise, ⁇ V rms . Due to the rising and falling slopes of the recovered PWM signal, ⁇ V rms causes a pulse width error of ⁇ T VCO , which can be found from
- T f/r the sum of the rise and fall times
- V PP the peak to peak voltage of the recovered PWM signal.
- f is the offset frequency at which VCO phase noise has been measured. Therefore, increasing the FSK modulation index and reducing T f/r can help reducing the VCO error.
- VCO drift does not affect the FSK-PWM signal, because it does not affect the pulse width.
- VCO settling time is an important parameter determined by the VCO bandwidth and phase margin, which in turn depend on the VCO's tail current, LC tank quality factor, and loading (see FIG. 8 ).
- the receiver thermal noise, the local oscillator phase noise, and the receiver bandwidth limitation should be considered.
- the maximum noise power transfer occurs when there is impedance matching between successive blocks. This is usually the case in commercial devices because they are mostly designed for approximately 50 ⁇ floating.
- equation 12 in dBm becomes P n,dBm[ ⁇ 174+10 log( ⁇ f )]dBm (13)
- the amplified FSK-PWM signal can be down converted to IF-FSK-PWM by multiplication with a local oscillator (f LO ).
- the resulting signal will be similar to equation 6 when shifting the carrier frequencies from f 1 and f 2 to f 1 -f LO and f 2 -f LO , respectively (see FIGS. 19A-19C ), and the error analysis will be similar to that of the VCO.
- the commercial LO however, often has a much lower phase noise compared to the transmitter VCO, and the LO contribution to pulse width jitter can be ignored.
- FIGS. 19A-19C shows the received IF and baseband PWM signal in time and frequency domains.
- ⁇ n - M + M ⁇ ⁇ sin ⁇ ⁇ ⁇ ⁇ ⁇ nD ⁇ ⁇ cos ⁇ ⁇ ⁇ ⁇ ⁇ nD ⁇ ⁇ n T from both sides yields
- the numerator of equation 23 includes the even terms of the PWM Fourier series in equation 5 that are left outside of the RBW and decreases with increasing the RBW.
- the denominator of equation 23 increases with M, which is proportional to RBW.
- ⁇ D decreases with increasing RBW
- AD depends on D and consequently on T as shown in FIG. 20 .
- T if D decreases (i.e. W 2 ⁇ W 1 in FIG. 20 a ), the PWM spectrum spreads further out along with a reduction in the amplitude of its in-band components. Therefore, if the RBW is fixed, more power will be outside of the RBW and AD increases. A similar situation can occur if D ⁇ 1. Because in that case, the denominator of equation 23 becomes small, resulting in higher ⁇ D. This makes sense because when D ⁇ 1 the “low” pulses in PWM signal become quite narrow. Therefore, we need to limit 0 ⁇ D ⁇ 1 from both ends.
- FIG. 21 a graphical representation of the plot of ⁇ D vs. D based on equation 23 for various RBWs from 5 to 75 MHz, and sampling rates of 320 and 640 kHz is illustrated.
- D has been limited to approximately 10 to 90%.
- FIG. 22 illustrates theoretical worst cases of ⁇ D variations with RBW and D for 16 channel and 32 channel PWM-TDM systems, sampled at approximately 20 kHz/ch.
- ⁇ D which can eventually define the overall resolution of the system in wireless PWM techniques, can be adjusted based on the number of active channels and the desired sampling rate per channel. Therefore, unlike digital approaches, depending on the application, characteristics of the biological signal and quality of the recording, the user can establish a tradeoff among the accuracy of the system, bandwidth per channel, and total number of active channels.
- a 32 channel ASIC was fabricated in the AMI 0.5- ⁇ m 3M2P standard CMOS process, and measured 3.3 ⁇ 3 mm 2 . When recording channels are active, it consumes approximately 5.6 mW from approximately ⁇ 1.5 V supplies, as shown in FIG. 16 .
- the front-end amplifier first and second stages of the LNA block had a measured gain of approximately 40 dB and approximately 27.7/37.1 dB, respectively.
- the low-cutoff was continuously tunable in the approximately 0.1 Hz to 1 kHz range, while the high-cutoff was 4-bit programmable from approximately 0.7 to 10 kHz.
- This topology provides approximately 1% THD at approximately 17.4 mV input.
- the fully differential design leads to approximately 65 dB power supply rejection ratio (PSRR) and approximately 139 dB common-mode rejection ratio (CMRR) with approximately 3.9 ⁇ V rms input referred noise in approximately 10 Hz to 10 kHz range. Because of capacitive coupling, the amplifiers are robust against input baseline variations and random first stage offset.
- the crosstalk for adjacent channels was smaller than approximately ⁇ 42 dB.
- the CCSS has a maximum I Source and I Sink of approximately 34.6 and 123.3 PA, and provides voltage compliance from approximately ⁇ 1.4 V to 1.4 V. Measurements indicated that the TWG operates as expected and the triangular wave can vary from approximately 0 to ⁇ 1.4 V. For the maximum output swing (approximately 2.8 V p-p ), the system sampling rate could be adjusted in 225 steps from 58 kHz to 680 kHz using DP 0-3 and DN 0-3 digital inputs.
- the functionality of the entire system was bench-top tested using three function generators creating an approximate 30 Hz cardiac signal (reference 1000 in FIG. 10 ), approximately 80 Hz triangular waveform and an approximately 100 Hz sine wave, which were attenuated and voltage divided to generate four equally spaced amplitude levels below approximately one mV. Eight out of 12 signals were given to three channels each (a total of 24 inputs), and the other four signals were given to two channels each (the rest of eight inputs). These signals were amplified and filtered by the LNA block at approximately 67.7 dB and approximately 0.1 Hz to 10 kHz, respectively. The TWG output signal was adjusted at approximately ⁇ 1.4 V and approximately 640 kHz, which indicates the overall sampling rate of the system (reference 1010 in FIG.
- the PWM block compared the 32 LNA outputs and four monitoring signals with the TWG output, and the MUX organized the resulting PWM samples into frames of 36 pulses.
- the PTS was set to mask the TWG falling ramp in the resulting TDM-PWM signal.
- This signal drove the on-chip MOS varactor of the hybrid LC-VCO, running at approximately 898/926 MHz in the FSK mode.
- the transmitted FSK-TDM-PWM carrier was picked up at approximately one meter from the system by the receiver.
- the receiver amplified and down converted the FSK signal to approximately 42/70 MHz IF-TDM-PWM (reference 1020 in FIG. 10 ), and further rectified and filtered to a baseband TDM-PWM signal with approximately 18 MHz bandwidth. It was then translated to TTL levels (reference 1030 in FIG. 10 ), and sent to the FPGA-based TDC for digitization.
- the 16-bit digitized samples were buffered in SDRAM and sent to a processing system, e.g., a PC, through its USB port.
- Table I shows a summary of the specifications of the transmitter for the 32 channel system on an ASIC.
- the input referred noise of the entire 32 channel system was measured by grounding most of the channels and conducting fast Fourier analysis on the recorded signals from three channels (e.g., Ch. 4, Ch. 14 and Ch. 24) in approximately 1.28 s at an approximately one meter distance.
- the input referred noise spectrum density had a noise corner at approximately 10 kHz. Integration of these curves from approximately 1 Hz to 10 kHz resulted in an input referred noise of approximately 4.90, 4.95, and 4.93 ⁇ V rms for the measured channels, respectively.
- Noise contributed at each major stage was also analyzed and measured.
- Table II shows a summary of noise contributions by each major block.
- This example presents a highly flexible 32 channel wireless implantable neural recording system based on time division multiplexing of pulse width modulated signals.
- the substrate noise was suppressed using a novel TWG block that eliminates the on-chip high frequency clock.
- Measurement results indicate that the system is fully functional and can simultaneously record 32+4 channels wirelessly at 640 kSample/s in an approximately one meter distance, with more than 8 bits of resolution. This is equivalent to a bandwidth of 5.12 Mb/s throughout the system.
- the plurality-channel prototype ASIC can be fabricated in the AMI 0.5- ⁇ m standard CMOS process and wire bonded on a PGA 132-pin package.
- V high , V low , I Source , and I Sink of the PWM were adjusted for a total sampling rate of f PWM approximately 640 kHz or 20 kHz per channel.
- the transmitter chip can be battery powered at approximately ⁇ 1.5 V, consuming approximately 5.6 mW, and the VCO was tuned to operate at 880/915 MHz when receiving a rail to rail PWM signal.
- vector signal analyzer e.g., Agilent 89600 VXI series
- tunable bandwidth from approximately 5 to 36 MHz in addition to the wideband receiver with 75 MHz bandwidth.
- the down converted IF-FSK-PWM signal was digitized at approximately 4 GSps using an oscilloscope (e.g., Agilent MSO6104A) and the digitized data was further processed offline in a PC.
- an oscilloscope e.g., Agilent MSO6104A
- FIGS. 24A-24B compare sample simulated versus measured waveforms when a ramp was applied to LNA inputs (e.g., 16 or 32 of them).
- f LO was tuned to approximately 952 MHz
- the IF-FSK-PWM signal was centered on approximately 37 and 72 MHz ( FIG. 19A ).
- the approximate 37 MHz signal was located at the center of the receiver pass-band and receiver preserved most of its power, while the approximate 72 MHz signal was located outside and was attenuated by the IF filters ( FIG. 19B ). This signal can be easily envelope detected and sharpened by passing through a comparator to recover the PWM-TDM.
- FIG. 25A shows simulated samples of recovered PWM pulses when changing the RBW from 5 to 75 MHz.
- the PWM comparator error was examined.
- the PWM comparator error was evaluated by applying a DC voltage and a rail-to-rail sawtooth waveform from a precision function generator (e.g., Agilent 33250A) with approximately 0.1% of peak linearity to the comparator inputs.
- the ideal pulse width when the sawtooth is greater than the DC voltage, and the actual output pulse width were compared for DC values swept from approximately ⁇ 1.4 to 1.4 V in approximately 0.1 V steps.
- the rms value for ⁇ D due to comparator error was found to be less than 7 ⁇ 10 4 .
- the TWG error was examined.
- equation 3 when V high and V low are constant, the TWG jitter is mainly due to the thermal noise of the CCSS and comparators.
- the TWG output was sampled at approximately 2.5 GHz, then subtracted from a straight line with the same slope (ideal TWG waveform), and calculated the rms noise.
- the current noise is related to the voltage noise by a factor of C/T. Once the current noise is known, it can be used in equation 3 along with the comparator noise. Measurements showed that the rms ⁇ D from TWG was less than 10 ⁇ 3 .
- the receiver thermal noise figure is usually determined by the RF front-end LNA stages.
- the entire receiver SNR was expected to be very close to the SNR at the RF LNA output.
- this ⁇ D is not dominant in these measurement conditions, if the receiver SNR decreases as a result of increasing d or a strong interference, it has the potential to become the dominant source of noise and inaccuracy in the system.
- Proper matching between the receiver antenna and LNA input is also a crucial factor in improving the receiver sensitivity.
- the RBW is one of the most effective parameters in defining the wireless PWM resolution, and it can dominate other sources of error if it is not wide enough.
- the main alternative to our proposed TDM-PWM based architecture is the conventional digitization of the acquired neural signals before wireless transmission.
- the ADC should take approximately 640 kS/s and produce approximately 5.12 Mbps of raw data, which has to be delivered across the wireless link.
- the advantages of the ATC system outweigh the advantages of the conventional ADC system.
- the TDM-PWM signal directly drives the VCO.
- digitized raw data has to be serialized, encoded, packetized, and combined with preamble and error detection bits. Even though these are routine tasks, the required digital circuitry can occupy a considerable chip area particularly in processes with large feature length, which are more suitable for low noise analog circuit blocks.
- Low power wireless links such as Bluetooth 2.0 can offer data rates close to 2.56 Mbps by relying on accurate time base generators that are crystal based. Crystals, however, cannot be integrated and occupy a large volume off chip. Transferring serial data at Mbps range with free-running VCOs does not seem to be feasible, and any effort in stabilizing the VCO frequency by using a phase-locked loop (PLL), for example, significantly increases the power consumption in the transmitter unit.
- PLL phase-locked loop
- the FSK-PWM-TDM signal has similar characteristics to digital FSK in being resistant to noise and interference. However, it does not need synchronization on a bit by bit basis. The VCO phase noise does not limit the system resolution, and its gradual drift can be compensated by tracking capability of the receiver.
- Embodiments of the present invention transfer the digital blocks and their associated area/power consumption outside of the body by dividing the ADC process into ATC on the transmitter unit and TDC on the receiver unit.
- an effective architecture is presented for simultaneously acquiring wideband neural signals from a large number of sites.
- the system operates based on pulse width modulation of time division multiplexed samples (PWM-TDM), which can reduce the complexity, size, and power consumption of the implantable transmitter at the cost of adding to the complexity of the receiver without compromising the accuracy, robustness, or bandwidth of the entire system. It also provides the user with a high level of flexibility over the system resolution, sampling rate, and dynamic range.
- PWM-TDM pulse width modulation of time division multiplexed samples
- One aspect of the present invention is to provide a system for transmitting bioelectrical signals.
- the system includes an implantable bioelectrical sensor for receiving at least one bioelectrical signal; an analog-to-time converter for converting the received bioelectrical signal from an analog domain to a time domain signal; and a radio frequency (RF) modulator for transmitting the time domain signal.
- the analog-to-time converter and the RF modulator are implantable in a living being.
- the system consumes no more than approximately 6 mW at approximately ⁇ 1.5V.
- the implantable bioelectrical sensor includes an electrode for receiving at least one neural signal.
- the analog-to-time converter and the RF modulator are implantable in a brain of an animal or human.
- the surface area of the system is less than approximately 10 mm by 10 mm or smaller, e.g., 3 mm by 3 mm.
- the analog-to-time converter includes a low noise amplifier having built-in bandpass filtering characteristics to amplify and filter the received bioelectrical signal.
- the RF modulator is adapted to transmit a frequency shift keying signal.
- the received bioelectrical signal has a frequency range of approximately 0.1 Hz to 10 kHz.
- the analog-to-time converter includes a waveform generator for providing a consistent triangular waveform having a predetermined shape and amplitude. The system can increase the temperature of the living being by less than two degrees Centigrade.
- Another aspect of the present invention relates to a method of monitoring one or more bioelectrical signals.
- the method comprises receiving the bioelectrical signals using an analog bioelectrical sensor implanted in a living being; converting the analog bioelectrical signals from an analog domain to a time domain signal; and wirelessly transmitting the time domain signal.
- the method may further comprise modulating the time domain signal for transmission.
- the method may further comprise receiving receiving the wirelessly transmitted time domain signal and converting the received time domain signal to a digital domain signal for processing by a processing system.
- receiving the bioelectrials signals includes a frequency range of approximately 0.1 Hz to 10 kHz.
- Yet another aspect of the present invention relates to a system for recording neural signals of a brain.
- the system comprises a plurality of implanted electrode sensors placed in juxtaposition to one or more neural circuits for receiving at least one neural signal; a signal converter for converting the received neural signals to a asynchronous signal; and a radio frequency (RF) modulator for transmitting the asynchronous signal, wherein the signal converter and the RF modulator implantable in a living being.
- RF radio frequency
- the system has a power consumption of less than approximately 6 millwatts at approximately ⁇ 1.5V.
- the signal converter and the RF modulator are implantable in a brain of an animal or human.
- the system includes a surface area of less than 10 mm by 10 mm, or smaller, e.g., 3 mm by 3 mm.
- the signal converter includes a low noise amplifier system comprising a plurality of low noise amplifiers, each of the low noise amplifiers in communication with at least one of the plurality of implanted electrode sensors, each low noise amplifier for amplifying and filtering at least one received neural signal; a pulse width modulator system comprising a plurality of comparators, the pulse width modulator system converting an amplitude of the received amplified and filtered neural signals to a pulse width sample, the number of the plurality of comparators of the pulse width modulator system is at least greater than or equal to the number of the plurality of low noise amplifiers of the low noise amplifier system; a programmable triangular waveform system feeding a predetermined frequency and amplituded triangular waveform to the pulse width modulator system; a time division multiplexer for arranging the plurality of pulse width samples in a synchronous orientation; a masking system for limiting the pulse width modulated-time division multiplexed signal to either rising or falling ramps of a triangular wave by mask
- the receiver includes a asynchronous to digital converter for converting the received wirelessly transmitted signal of the transmitter system to a digital signal.
- the receiver further includes a processing system for processing the digital signal for interpretation and recording purposes.
- the system can be embedded within an enclosure, which is adapted to be embedded in a living being.
- the system can have a temperature range of less than three degree Centigrade.
Abstract
Description
The pulse width jitter can be expressed as
where T is the sampling period, dw is the changes in the PWM pulse width, and D=w/T is the PWM duty cycle. Variations in the TWG capacitor over time are often very small. In addition, dVin is the equivalent input referred noise of the comparator. Because the noise on Vhigh and Vlow will also affect dw, comparator noises may need to be considered. The dISource and dISink can be the noise contributions of the CCSS. Although the finite output impedance of the CCSS also contributes to dw, it mostly causes distortion, which can be compensated in calibration.
where in,Source 2 and in,Sink 2 are the current noise for the CCSS current source and sink, respectively.
For a simple analysis, assume Vin is constant and the PWM period is T. The analysis for more complicated PWM signals with variable pulse width can be found in the prior art [R. Guinee and C. Lyden, “A novel Fourier series time function for modeling and simulation of PWM,” IEEE Trans. on Circuits and Sys. I, vol. 52, no. 11, pp. 2427-2435, November 2005.]. The PWM pulse train can be written as illustrated in
where δ(f) is the delta function. The FSK-PWM spectrum can then be found by shifting
In the frequency domain, the VCO output will be the convolution of
For white noise sources, frequency stability of the VCO is often characterized by the relative jitter,
where Δτrms is the rms jitter, fosc and Tosc are VCO carrier frequency and period. Using
where Tf/r is the sum of the rise and fall times and VPP is the peak to peak voltage of the recovered PWM signal. Using
where f is the offset frequency at which VCO phase noise has been measured. Therefore, increasing the FSK modulation index and reducing Tf/r can help reducing the VCO error.
P n =kTΔf, (12)
where Δf is the receiver RF front-end bandwidth. At room temperature,
P n,dBm[−174+10 log(Δf)]dBm (13)
Every stage in
If the first two stages have a high enough gain, considering the first 3 terms in
P n,Rx,dBm =P n,dBm+10 log(F−1)[−174+10 log(Δf)+10 log(F−1)]dBm. (15)
If the input signal RF power (Psig) is known, we can find the SNR for each stage. For PWM signal, the SNR is the reciprocal of pulse width duty cycle error.
Hence, the total receiver thermal noise contribution to the pulse width duty cycle error would be
where fBWT−1<M (integer)≦fBWT, and A is the amplitude of the recovered pulses. To find the pulse width error due to the RBW limitation,
Subtracting
from both sides yields
which simplifies to
Defining DRx−D=ΔD, and assuming πnΔD<<1, where n≦M, then
Using
TABLE I |
SUMMARY OF TRANSMITTER ASIC SPECIFICATIONS |
Number of |
32 recording + 4 monitoring |
LNA gain (dB) | 67.7 and 77.1 |
LNA CMRR and PSRR (dB) | 139 and 65 |
LNA input referred noise (μVrms) | 3.9 |
LNA low cutoff (Hz) | 0.01~1000 (continuous) |
LNA high cutoff (kHz) | 0.7~10 (16 levels) |
Sampling rate (kHz) | 58~680 |
FSK carrier frequency (MHz) | 898/926 |
Entire system input referred noise (μVrms) | 4.9 @ 1 m distance |
Total power dissipation (mW) | 5.6 |
Power supply (V) | ±1.5 |
Technology | 0.5-μm 3M2P Std. CMOS |
Die size (mm) | 3.3 × 3 |
TABLE II |
SUMMARY OF NOISE CONTRIBUTIONS* |
Transmitter | Receiver |
Compa- | Bandwidth | LNA/Mixer/IF | |||
Circuit | TWG | rator | VCO | limitation | Stage |
Pulse width | 1.3 | 1.05 | 0.024 | 0.97 | 2.13 |
Noise (ns) | |||||
Equivalent | 61.5 | 63.5 | 96.4 | 64.2 | 57.3 |
SNR (dB) | |||||
ENOB** | 10.2 | 10.5 | 16.0 | 10.7 | 9.5 |
Entire System | 8.8 |
Resolution: | |
*At approximately 640 kHz sampling rate, approximately 18 MHz receiver bandwidth and approximately 10% to 90% PWM duty cycle range; | |
**Equivalent number of bits. |
TABLE III |
SUMMARY OF CALCULATED DUTY CYCLE ERROR |
CONTRIBUTIONS FROM MEASURED PARAMETERS |
IN THE SYSTEM* |
System |
Receiver |
Transmitter | RBW |
Block | TWG | Comparator | VCO | limitation | |
ΔD | |||||
10−3 | 7 × 10−4 | 10−5 | 2.4 × 10−3 | 1.4 × 10−3 | |
Equivalent | 60 dB | 63.1 |
100 dB | 52.4 dB | 57.3 dB |
SNR | |||||
Equivalent | 10.0 | 10.5 | 16.6 | 8.7 | 9.5 |
NOB |
System | 8.4 bits |
Resolution | |
*fPWM = 320 kHz, f1/f2 = 915/880 MHz, 0.3 < D < 0.7, RBW = 75 MHz |
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