US5874366A - Method for etching a semiconductor substrate and etching system - Google Patents
Method for etching a semiconductor substrate and etching system Download PDFInfo
- Publication number
- US5874366A US5874366A US08/863,371 US86337197A US5874366A US 5874366 A US5874366 A US 5874366A US 86337197 A US86337197 A US 86337197A US 5874366 A US5874366 A US 5874366A
- Authority
- US
- United States
- Prior art keywords
- semiconductor substrate
- etching
- front side
- rear side
- resist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 76
- 239000000758 substrate Substances 0.000 title claims abstract description 74
- 238000005530 etching Methods 0.000 title claims abstract description 63
- 238000000034 method Methods 0.000 title claims abstract description 40
- 230000001681 protective effect Effects 0.000 claims description 12
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 9
- 238000010438 heat treatment Methods 0.000 claims description 4
- 238000005507 spraying Methods 0.000 claims description 4
- 239000000243 solution Substances 0.000 description 14
- 239000007789 gas Substances 0.000 description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910052681 coesite Inorganic materials 0.000 description 3
- 229910052906 cristobalite Inorganic materials 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 229910052682 stishovite Inorganic materials 0.000 description 3
- 229910052905 tridymite Inorganic materials 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 1
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02052—Wet cleaning only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67075—Apparatus for fluid treatment for etching for wet etching
- H01L21/6708—Apparatus for fluid treatment for etching for wet etching using mainly spraying means, e.g. nozzles
Definitions
- a method for etching a rear side of a semiconductor substrate having a resist-free front side which comprises the following steps:
- an etching system for etching the rear side of a semiconductor substrate having a resist-free front side comprising:
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Weting (AREA)
- Drying Of Semiconductors (AREA)
- ing And Chemical Polishing (AREA)
Abstract
The method and system of the invention allow etching even relatively thick layers on the rear side of a semiconductor substrate where the front side is resist-free. An etching solution is sprayed in fine droplets onto the rear side of the semiconductor substrate. The semiconductor substrate may thereby be heated to a temperature ≦100° C.
Description
1. Field of the Invention
The invention relates to a method for etching a rear side of a semiconductor substrate having a resist-free front side, and an etching system suitable therefor.
2. Description of the Related Art
There has become known from German patent publication DE-A19502777.9 (U.S. application Ser. No. 08/764,703) a method and a device, in which the layers on the rear side of the semiconductor substrate which are to be removed can be etched with a microwave-excited or RF-excited chemical down-stream method with the use of compounds that contain fluorine. A disadvantage with this method is that thick thermal oxide layers cannot be removed because of the insufficient etching rates.
It is accordingly an object of the invention to provide a method of etching a semiconductor substrate and a corresponding etching plant, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which allows the efficient removal of even thick oxide layers, in particular thick thermal oxide layers.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for etching a rear side of a semiconductor substrate having a resist-free front side, which comprises the following steps:
a) introducing a semiconductor substrate with a resist-free front side and a rear side into a process chamber;
b) flowing a protective gas over the front side of the semiconductor substrate;
c) spraying etching solution onto the rear side of the semiconductor substrate, and removing etching products and excess etching-solution.
By introducing this "quasi-dry" method, even relatively thick layers can be removed economically.
In accordance with an added mode of the invention, the semiconductor substrate and/or the chamber is heated to a temperature of ≦100° C. This ensures that the etching solution can chemically react well with the layer to be removed on the rear side of the semiconductor substrate, and no drops of etching solution are formed on the semiconductor substrate or on the walls of the process chamber. Further cleaning of the semiconductor substrate and the chamber can be omitted.
With the above and other objects in view there is further provided, in accordance with the invention, an etching system for etching the rear side of a semiconductor substrate having a resist-free front side, comprising:
a) an etching reactor defining a process chamber receiving a semiconductor substrate;
b) wherein the semiconductor substrate received in the process chamber divides the process chamber into a first process-chamber portion, containing a resist-free front side of the semiconductor substrate, and a second process-chamber portion, containing a rear side of the semiconductor substrate;
c) the first process-chamber portion communicating with a protective-gas inlet issuing into the process chamber for feeding protective gas onto the resist-free front side of the semiconductor substrate and for protecting the resist-free front side against etching attack; and
d) an etching-solution atomizer communicating with the second process-chamber portion for spraying etching solution onto the rear side of the semiconductor substrate.
In accordance with an additional feature of the invention, there are provided means for heating at least one of the semiconductor substrate and the process chamber. A suitable device for heating the system is a heat lamp. Moreover, however, it is also possible to heat the semiconductor substrate by means of heat transfer through the protective gas to the semiconductor substrate. For this reason, a temperature of about 100° C. has proved particularly suitable because excess etchant droplets, on reaching the vicinity of the semiconductor substrate, then immediately vaporize and thus the semiconductor substrate and the process chamber are dry immediately after the etching has ended.
In accordance with again an additional feature of the invention, there is provided a suction device or evacuation device communicating with an annular gap formed in the process chamber in vicinity of an edge of the semiconductor substrate. Accordingly, the etching products and excess etchant are removed immediately from the area where they are formed.
In accordance with again a further feature of the invention, there is provided a retaining device disposed in the second process-chamber portion for supporting the semiconductor substrate. The preferred retaining device includes at least three pins on which the rear side of the semiconductor substrate rests.
In accordance with yet an additional feature of the invention, there is provided a head plate disposed in the first process-chamber portion above the front side of the semiconductor substrate, the head plate having at least one opening formed therein through which the protective gas flows towards the front side of the semiconductor substrate. The at least one opening formed in the head plate is preferably a central opening centrally above the semiconductor substrate. On the one hand it is ensured that the semiconductor substrate is supported securely in the process chamber, without covering relatively large parts of the rear side of the semiconductor substrate that is to be etched. On the other hand it is ensured that the protective gas flows properly over the front side of the semiconductor substrate.
In accordance with again another feature of the invention, the etching reactor is a multi-chamber reactor with a plurality of etching chambers. The introduction and the withdrawal of the semiconductor substrate to be etched may be fully automated in such a multi-chamber system, and other subsequent or preceding process steps may also take place directly within this multi-chamber system.
Finally, in accordance with a concomitant feature of the invention, there is provided a method of etching a thermal oxide layer from a rear side of a semiconductor substrate having a resist-free front side; the method comprises: exposing the rear side of the semiconductor substrate to an aqueous etching solution which contains up to 50% by weight of hydrofluoric acid and etching the thermal oxide layer.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a method of etching a semiconductor substrate and a corresponding etching system, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
The sole figure of the drawing is a schematic side elevational view of the device according to the invention.
Referring now to the figures of the drawing in detail and first, particularly, to FIG. 1 thereof, an etching system according to the invention comprises an evacuation device 17 which communicates with an etching reactor defining a process chamber 2.
A semiconductor substrate 11, having a rear side 13 and a resist-free front side 12, is placed and supported in the process chamber 2.
In the present illustrative embodiment, the resist-free front side 12 of the semiconductor device has its face pointing upward, i.e. it has been introduced into the process chamber in its natural position.
The process chamber 2 is divided, by the semiconductor substrate 11, into a first process-chamber portion 3, containing the front side 12 of the semiconductor substrate, and a second process-chamber portion 4, containing the rear side 13 of the semiconductor substrate.
In the second process-chamber portion 4 there is provided a retaining device which consists of three pins 8 and on which the rear side 13 of the semiconductor substrate rests.
A head plate 9 is disposed in the first process-chamber portion 3. The head plate 9 is formed with a central opening 10 centrally above the front side 12 of the semiconductor device.
A protective gas inlet 5 opens into the process-chamber portion 3 from above. Protective gas 16 which enters at the inlet 5 flows through the opening 10 and onto the resist-free front side 12 of the semiconductor substrate and protects it from etching attack.
An etching-solution atomizer 6 is disposed below the second process-chamber portion 4. The atomizer 6 sprays etching solution 15 in the form of fine droplets onto the rear side 13 of the semiconductor substrate.
The etching products which are formed during the actual etching process, as well as excess etching solution, are aspirated off through an annular gap 7 formed at the same level with an edge 14 of the semiconductor substrate. The necessary evacuation vacuum is provided by the diagrammatically indicated evacuation device 17 which communicates with the annular gap 7.
The semiconductor substrate 11 is heated to a temperature of about 100° C. by heat transfer from the protective gas 16. In the present case, the layer on the rear side of the semiconductor substrate which is to be removed is a thick thermal SiO2 layer, and the etching solution 15 employed is primarily an aqueous solution that contains about 50% by weight hydrofluoric acid (HF). The etching solution 15 is then sprayed from below in fine droplets onto the heated semiconductor substrate during the etching of this SiO2 layer. The etching solution reacts there with the SiO2 on the rear side 13 of the semiconductor substrate and, together, etching product, water and excess hydrofluoric acid vaporize on the hot semiconductor substrate 11 and are then withdrawn out via the annular gap 7.
Nitrogen is used as protective gas 16 in the present case. It is, however, also possible to use argon or other inert gases. Since the actual etching reaction takes place at relatively high temperatures, the etching is residue-free, particularly when alcohol is added to the etching solution.
Claims (11)
1. A method for etching a rear side of a semiconductor substrate having a resist-free front side, which comprises the following steps:
a) introducing a semiconductor substrate with a resist-free front side and a rear side into a process chamber;
b) flowing a protective gas over the front side of the semiconductor substrate;
c) spraying etching solution onto the rear side of the semiconductor substrate, and removing etching products and excess etching-solution.
2. The method according to claim 1, which comprises heating the semiconductor substrate to a temperature of ≦100° C.
3. An etching system for etching a rear side of a semiconductor substrate having the rear side and a resist-free front side, comprising:
a) an etching reactor defining a process chamber receiving a semiconductor substrate;
b) wherein the semiconductor substrate received in the process chamber divides the process chamber into a first process-chamber portion, containing a resist-free front side of the semiconductor substrate, and a second process-chamber portion, containing a rear side of the semiconductor substrate;
c) said first process-chamber portion communicating with a protective-gas inlet issuing into said process chamber for feeding protective gas onto the resist-free front side of the semiconductor substrate and for protecting the resist-free front side against etching attack; and
d) an etching-solution atomizer communicating with said second process-chamber portion for spraying etching solution onto the rear side of the semiconductor substrate.
4. The etching system according to claim 3, including means for heating at least one of the semiconductor substrate and said process chamber.
5. The etching system according to claim 3, wherein the semiconductor substrate has an edge, and including a suction device communicating with an annular gap formed in said process chamber in vicinity of the edge of the semiconductor substrate.
6. The etching system according to claim 3, which further comprises a retaining device disposed in said second process-chamber portion for supporting the semiconductor substrate.
7. The etching system according to claim 6, wherein said retaining device includes at least three pins.
8. The etching system according to claim 3, which further comprises a head plate disposed in said first process-chamber portion above the front side of the semiconductor substrate, said head plate having at least one opening formed therein through which the protective gas flows towards the front side of the semiconductor substrate.
9. The etching system according to claim 8, wherein said at least one opening formed in said head plate is a central opening centrally above the semiconductor substrate.
10. The etching system according to one claim 3, wherein said etching reactor is a multi-chamber reactor defining a plurality of etching chambers.
11. A method of etching a thermal oxide layer from a rear side of a semiconductor substrate having a resist-free front side, which comprises: exposing the rear side of the semiconductor substrate to an aqueous etching solution which contains up to 50% by weight of hydrofluoric acid and etching the thermal oxide layer.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19621399A DE19621399A1 (en) | 1996-05-28 | 1996-05-28 | Process for etching a semiconductor substrate and etching system |
| DE19621399.1 | 1996-05-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| US5874366A true US5874366A (en) | 1999-02-23 |
Family
ID=7795505
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US08/863,371 Expired - Fee Related US5874366A (en) | 1996-05-28 | 1997-05-27 | Method for etching a semiconductor substrate and etching system |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5874366A (en) |
| EP (1) | EP0810642A3 (en) |
| JP (1) | JP3161996B2 (en) |
| KR (1) | KR970077289A (en) |
| DE (1) | DE19621399A1 (en) |
| TW (1) | TW373260B (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5993681A (en) * | 1998-05-08 | 1999-11-30 | Lucent Technology, Inc. | Method and apparatus for aiming a spray etcher nozzle |
| US6090721A (en) * | 1998-08-21 | 2000-07-18 | Micron Technology, Inc. | Aqueous solutions of ammonium fluoride in propylene glycol and their use in the removal of etch residues from silicon substrates |
| US6147004A (en) * | 1998-07-21 | 2000-11-14 | Advanced Micro Devices, Inc. | Jet vapor reduction of the thickness of process layers |
| US6197150B1 (en) * | 1998-12-29 | 2001-03-06 | Samsung Electronics Co., Ltd. | Apparatus for wafer treatment for the manufacture of semiconductor devices |
| US6395646B1 (en) * | 1999-07-19 | 2002-05-28 | Winbond Electronics Corp. | Machine for etching the edge of a wafer and method of etching the edge of a wafer |
| US20030170997A1 (en) * | 2002-03-06 | 2003-09-11 | Winbond Electronics Corp. | Method for removing Si-needles of wafer |
| US20050170090A1 (en) * | 2004-02-03 | 2005-08-04 | Matsushita Electric Industrial Co., Ltd. | Chemical vapor deposition apparatus and film deposition method |
| US20050202678A1 (en) * | 2003-04-15 | 2005-09-15 | International Business Machines Corporation | Semiconductor wafer front side protection |
| WO2022151719A1 (en) * | 2021-01-18 | 2022-07-21 | 长鑫存储技术有限公司 | Method for processing semiconductor device |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4350562A (en) * | 1980-07-23 | 1982-09-21 | Siemens Aktiengesellschaft | Method for etching semiconductor wafers on one side |
| US4600463A (en) * | 1985-01-04 | 1986-07-15 | Seiichiro Aigo | Treatment basin for semiconductor material |
| US4857142A (en) * | 1988-09-22 | 1989-08-15 | Fsi International, Inc. | Method and apparatus for controlling simultaneous etching of front and back sides of wafers |
| EP0444714A1 (en) * | 1987-11-09 | 1991-09-04 | SEZ Semiconductor-Equipment Zubehör für die Halbleiterfertigung Gesellschaft m.b.H. | Holder device for processing disc-like articles |
| EP0609069A1 (en) * | 1993-01-29 | 1994-08-03 | Canon Kabushiki Kaisha | Method for manufacturing semiconductor devices |
| DE3811068C2 (en) * | 1988-03-31 | 1995-07-20 | Telefunken Microelectron | Device for unilaterally processing bodies that are extended over a large area, in particular semiconductor wafers |
| EP0668609A2 (en) * | 1994-02-22 | 1995-08-23 | Siemens Aktiengesellschaft | Process for plasma etching the backside of a semiconductor wafer, the front surface not being coated with a protective resin |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19502777A1 (en) * | 1994-02-22 | 1995-08-24 | Siemens Ag | Method for plasma-assisted backside etching of a semiconductor wafer in the case of a lacquer-free front surface of a pane |
-
1996
- 1996-05-28 DE DE19621399A patent/DE19621399A1/en not_active Ceased
-
1997
- 1997-05-22 EP EP97108338A patent/EP0810642A3/en not_active Withdrawn
- 1997-05-24 TW TW086107037A patent/TW373260B/en active
- 1997-05-26 JP JP15158597A patent/JP3161996B2/en not_active Expired - Fee Related
- 1997-05-27 US US08/863,371 patent/US5874366A/en not_active Expired - Fee Related
- 1997-05-28 KR KR1019970021115A patent/KR970077289A/en not_active Application Discontinuation
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4350562A (en) * | 1980-07-23 | 1982-09-21 | Siemens Aktiengesellschaft | Method for etching semiconductor wafers on one side |
| US4600463A (en) * | 1985-01-04 | 1986-07-15 | Seiichiro Aigo | Treatment basin for semiconductor material |
| EP0444714A1 (en) * | 1987-11-09 | 1991-09-04 | SEZ Semiconductor-Equipment Zubehör für die Halbleiterfertigung Gesellschaft m.b.H. | Holder device for processing disc-like articles |
| DE3811068C2 (en) * | 1988-03-31 | 1995-07-20 | Telefunken Microelectron | Device for unilaterally processing bodies that are extended over a large area, in particular semiconductor wafers |
| US4857142A (en) * | 1988-09-22 | 1989-08-15 | Fsi International, Inc. | Method and apparatus for controlling simultaneous etching of front and back sides of wafers |
| EP0609069A1 (en) * | 1993-01-29 | 1994-08-03 | Canon Kabushiki Kaisha | Method for manufacturing semiconductor devices |
| EP0668609A2 (en) * | 1994-02-22 | 1995-08-23 | Siemens Aktiengesellschaft | Process for plasma etching the backside of a semiconductor wafer, the front surface not being coated with a protective resin |
Non-Patent Citations (6)
| Title |
|---|
| "Spin Etcher for Removal of Backside Depositions" (Gaulhofer), 400 Solid State Technology, vol. 34, No. 5, May 1991, pp. 57-58 and 219. |
| Japanese Patent Abstract No. 2 94435 (Miyamoto), dated Sep. 29, 1988. * |
| Japanese Patent Abstract No. 2-94435 (Miyamoto), dated Sep. 29, 1988. |
| Japanese Patent Abstract No. 3 6823 (Kamibayashi), dated Jan. 14, 1991. * |
| Japanese Patent Abstract No. 3-6823 (Kamibayashi), dated Jan. 14, 1991. |
| Spin Etcher for Removal of Backside Depositions (Gaulhofer), 400 Solid State Technology, vol. 34, No. 5, May 1991, pp. 57 58 and 219. * |
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5993681A (en) * | 1998-05-08 | 1999-11-30 | Lucent Technology, Inc. | Method and apparatus for aiming a spray etcher nozzle |
| US6147004A (en) * | 1998-07-21 | 2000-11-14 | Advanced Micro Devices, Inc. | Jet vapor reduction of the thickness of process layers |
| US6165314A (en) * | 1998-07-21 | 2000-12-26 | Advanced Micron Devices, Inc. | Apparatus for performing jet vapor reduction of the thickness of process layers |
| US6090721A (en) * | 1998-08-21 | 2000-07-18 | Micron Technology, Inc. | Aqueous solutions of ammonium fluoride in propylene glycol and their use in the removal of etch residues from silicon substrates |
| US6197150B1 (en) * | 1998-12-29 | 2001-03-06 | Samsung Electronics Co., Ltd. | Apparatus for wafer treatment for the manufacture of semiconductor devices |
| US6395646B1 (en) * | 1999-07-19 | 2002-05-28 | Winbond Electronics Corp. | Machine for etching the edge of a wafer and method of etching the edge of a wafer |
| US20030170997A1 (en) * | 2002-03-06 | 2003-09-11 | Winbond Electronics Corp. | Method for removing Si-needles of wafer |
| US6780780B2 (en) * | 2002-03-06 | 2004-08-24 | Winbond Electronics Corp. | Method for removing Si-needles of wafer |
| US20050202678A1 (en) * | 2003-04-15 | 2005-09-15 | International Business Machines Corporation | Semiconductor wafer front side protection |
| US7288465B2 (en) * | 2003-04-15 | 2007-10-30 | International Business Machines Corpoartion | Semiconductor wafer front side protection |
| US20080064185A1 (en) * | 2003-04-15 | 2008-03-13 | International Business Machines Corporation | Semiconductor wafer front side protection |
| US20050170090A1 (en) * | 2004-02-03 | 2005-08-04 | Matsushita Electric Industrial Co., Ltd. | Chemical vapor deposition apparatus and film deposition method |
| US6994887B2 (en) * | 2004-02-03 | 2006-02-07 | Matsushita Electric Industrial Co., Ltd. | Chemical vapor deposition apparatus and film deposition method |
| WO2022151719A1 (en) * | 2021-01-18 | 2022-07-21 | 长鑫存储技术有限公司 | Method for processing semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0810642A2 (en) | 1997-12-03 |
| JPH1070102A (en) | 1998-03-10 |
| KR970077289A (en) | 1997-12-12 |
| JP3161996B2 (en) | 2001-04-25 |
| EP0810642A3 (en) | 1998-04-29 |
| TW373260B (en) | 1999-11-01 |
| DE19621399A1 (en) | 1997-12-04 |
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