US3571739A

US3571739A - Multimode hybrid-coupled fan-out and fan-in array

Info

Publication number: US3571739A
Application number: US768708A
Authority: US
Inventors: Harold Seidel
Original assignee: Bell Telephone Laboratories Inc
Current assignee: AT&T Corp
Priority date: 1968-10-18
Filing date: 1968-10-18
Publication date: 1971-03-23
Anticipated expiration: 1988-03-23

Abstract

In a typical hybrid-coupled fan-out, fan-in array, one port of each hybrid junction is resistively terminated and the array is restricted to one mode of operation. By removing some or all of these terminations and utilizing the previously unavailable ports, the array can be operated in additional modes. Various arrangements are disclosed for simultaneously handling a plurality of different signals; for utilizing the array in a self-cascaded manner; and for operating in a manner which combines features of both arrangements.

Description

United States Patent Inventor Harold Seidel Warren Towmhip, Somerset County, NJ.

Appl. No. Filed Patented Assignee Murray Hill, NJ.

MULTIMODE HYBRID-COUPLED FAN-OUT AND FAN-IN ARRAY 13 Claims, 12 Drawing Figs.

US. Cl

[56] References Cited UNITED STATES PATENTS 3,480,885 I l/ 1969 Schrank 330/124 3,423,688 1/1969 Seidel 330/124 Primary Examiner-Roy Lake Assistant Examiner-Darwin R. Hostetter Attorneys-R. J. Guenther and Arthur J. Torsig'lieri ABSTRACT: In a typical hybrid-coupled fan-out, fan-in array, one port of each hybrid junction is resistively terminated and the array is restricted to one mode of operation. By removing some or all of these terminations and utilizing the previously 325/486 unavailable ports, the array can be operated in additional Int. Cl H03f 7/04 modes various arrangements are disclosed for Simultaneously 03f 3/68 handling a plurality of different signals; for utilizing the array Field of Search 330/124 self-cascaded manner; and Warming a manner 45, 6 which combines features of both arrangements.

4Ei l ISOLgAgTO RS 95 95 A INPUT 9 I T nLEVEL n '7 n- FAN-OUT FAN-IN OUTPUT 2 PORTS INPUT l 2" BRANCHES PO RTS I K ouTPgT g 7 I 2 97' l PATENJT EU W23 :91:

saw 1 s or e5 FIG. /0

YISOLATORS' 2" BRANCHES INPUT AMPLIFIED OUTPUT l SIGNAL HYBRID JUNCTION do INPUT FIG. /2 INPUT SIGNAL l JUNCTION lso HYBRID PUMP SOURCE MULTIMODE i'lYBRllD-CQUFLED FAN-GUT AND FAN-IN ARRAY BACKGROUND OF THE INVENTION Until very recently, the utilization of many solid-state active circuit components, such as transistors and tunnel diodes, for example, has been limited to relatively low power applications. This was due to the low power handling capability of such devices and their relatively high cost which discouraged their use in large numbers as a means of overcoming their limited power handling capacity. Recently, however, there has been a substantial reduction in the cost of many solid-state devices which, in turn, now makes it commercially feasible to use them in relatively large numbers.

The technical problems associated with operating large numbers of active elements in a parallel array are problems of synchronization and stabilization. Stating the problem briefly, the many independent active elements must be synchronized so as to cooperate in a manner to produce maximum output power for the desired mode of operation, while, at the same time, the active elements must be incapable of cooperating at all other possible modes of operation-The suppression of spurious modes must be insured both outside the frequency range of interest as well as within the frequency range of interest, thus insuring unconditionally stable operation.

In accordance with the prior art, large microwave power has been generated with the requisite economy by operating large numbers of active elements in a binary fan-out, fan-in array. While such a system possesses 2" active elements capable of operating in 2" modes, the requisite stability has been realized by suppressing all save the desired mode by resistively terminating the conjugate of the input port of each of the hybrids in the fan-out portion of the array, and by resistively terminating the conjugate of the output port of the fan-in portion of the array. In such an arrangement, all energy reaching the resistively-terminated ports is deemed spurious and its dissipation effected.

SUMMARY OF THE INVENTION Experience has shown, however, that a single mode fan-out, fan-in system is unduly restrictive. Current fabricating techniques are such that both passive and active circuit components are sufiiciently uniform to permit an increase in the number of modes that a fan-out, fan-in array is capable of supporting without unduly increasing the risk of instability or loss of synchronization. In accordance with the present invention, this is done by removing some or all of the resistive terminations and utilizing the now-available, additional hybrid ports. in the limit, all 2"-l previously terminated ports are made available, thus permitting the fan-out, fan-in array to operate in all 2" possible modes. More generally, and depending upon the particular situation, a trade off between the stability requirements of the system and the number of permissible modes is effectuated.

Bmically, the system can be used in a variety of ways. In a i signals applied to 2 different input ports, where 23 $11 Because of the orthogonality of the array, each one of these 2" different signals, corresponding to a different mode of operation, is handled by the array independently of every other signal. Specifically, each signal is divided into 2" signal components in the fan-out portion of the array. The signal components of each of the signals are then amplified (or otherwise operated upon) in the 2" signal branches connecting the fanout and fan-in portions of the array. Finally, the individual components of each of the separate signals are recombined in proper phase in different output ports of the array to produce 2 amplified output signals.

In a second class of applications, a single signal is applied to each of the 2 active elements, where the latter are utilized and reutilized 2 times as part of a self-cascaded system, achieving 2* times as much gain as for a single pass. Clearly,

systems employing features of both systems can also be devised, as will be described hereinbelow.

' These and other objects and advantages, the nature of the present invention, and its various features, will appear more fully upon consideration of the various illustrative embodi ments now to be described in detail in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 shows a typical three-level, eight-branch fan-out, fan-in array in accordance with the prior art;

FIG. 2 shows the fan-out portion of the array of FIG. I with the resistive terminals removed from each of the hybrids;

FIG. 3 shows the fan-out array of FIG. 2 to which an additional hybrid junction has been added;

FIG. 4 shows the fan-out of the array of FIG. 3 to which three additional hybrid junctions have been added;

FIG. 5 shows a fully harnessed fan-out array in accordance with the invention;

FIG. 6 shows one arrangement for converting a hybrid junction to a conjugate hybrid junction;

FIG. 7 shows a conjugateof the fully harnessed fan-out of FIG. 5;

FIG. 8 shows a fully harnessed fan-in, fan-out array; and

FIGS. 9, 10, 11 and 12 show various uses for a multimode fan-out, fan-in array DETAILED DESCRIPTION Referring to the drawings, FIG. I shows a typical threelevel, eight-branch fan-out, fan-in array in accordance with the prior art, comprising: a first grouping of seven hybrid junctions ll, 12, 22, 13, 23, 33 and 43 arranged in a fan-out for dividing an input signal into eight signal components; a second grouping of seven hybrid junctions I3, 23', 33', 43, I2, 22' and II arranged in a fan-in configuration for recombining the eight signal components; and eight branch circuits 101-108 for connecting the fan-out and fan-in portions of the array.

The terms hybrid junction" and hybrid coupler are used herein in their accepted sense to describe a power dividing network having four ports in which the ports are arranged in pairs, with the ports comprising each pair being conjugate to each other and in coupling relationship with the ports of the other of said pairs.

Hybrid junctions can be divided into two general classes. In one class, which includes the so-called magic tee and the rat race bridge the input signal is divided into two com ponents that are either in phase or 180 out of phase, depending upon which port is energized. The second class of hybrid junctions, which includes the Riblet coupler, the multihole directional coupler, the semioptical directional coupler, the strip transmission line coupler, and the lumped-element couplers described by HR. Beurrier in his copending application Ser. No. 709,091, filed Feb. 28, I968, U.S. Pat. No. 3,506,932 and assigned to applicants assignee, are quadrature phase shift devices in which the output signals are always out of phase.

In each of the various embodiments of the invention to be described hereinbelow, the hybrids are all of the same class. More particularly, they are 3 db couplers of their class in which the input signal, at center frequency, is divided equally between the two output ports.

Each of the interconnecting branches 101-108 typically includes an amplifier, '7077, or some other device for operating upon the signal component in each of the branches. In addition, where quadrature hybrids are used corresponding" branches, as defined in my copending application Ser. No. 632,058, U.S. Pat. No. 3,444,475 filed Apr. I0. 1967, will also include an additional phase shift 80-83 for reasons to be explained more fully hereinbelow. In all other respects, the several branches are identical, and operate upon the branch signals in an identical fashion.

As can be seen from FlG. 1, only three of the four ports as sociated with each hybrid are utilized, with the fourth port being resistively terminate. in portion of the array, port 4, which is conjugate to the input port of each of the hybrids, is resistively terminated. Similarly, in the fan-in portion of the array, port 4, which is conjugate to the output port of each of the hybrids, is resistively terminated. It will also be noted that in the array shown in FIG. 1, there is only one input port (i.e., port 1 of hybrid 11) and only one output port (i.e., port 1 of hybrid 11'). The array, accordingly, is capable of handling only one independent signal at a time and, hence, operates in but a single mode.

To provide additional degrees of freedom to such an array, in accordance with the present invention, some or all of the resistive terminations included as part of the prior art array, are removed, and the corresponding ports made available. For example, if the resistive termination is removed from port 4 of input hybrid 11, a second signal could be coupled to this port and the array energized in a second mode. This is indicated in FlG. 2, which shows the fan-out portion of the array of FIG. 1 with the resistive terminations removed from each of the hybrids and, in particular, from port 4 of hybrid 11.

As is readily apparent, by making port 4 available, separate signal sources Sill and 51 can now be applied, respectively, to either port 1 or port 4 of hybrid 11. In either case, the input signal is divided into eight branch signals which appear in branches 101 to 108. More generally, signal sources 511 and 51 can be simultaneously applied to both

branches

1 and 4 of hybrid 11 and branch signals produced by both sources. Thus, the fan-out array of FIG. 2 has an additional degree of freedom or, as compared to the fan-out of FIG. 1, a second mode of operation.

To provide two additional modes of operation, another hybrid is added to the array as shown in FIG. 3. in this figure, the hybrids common to both FIG. 2 and FIG. 3 are shown shaded for easy identification. The additional hybrid 21 is added at the first level of division and has its

output ports

2 and 3 connected respectively to port 4 of hybrid 12 and port 4 of hybrid 22 in the second level of division. This additional hybrid feeds two previously unexcited ports in the second level, creating the possiblity of two new modes, orthogonal both to each other and to the original two modes as well. That is, because of the conjugate nature of

ports

1 and 4 of each of the hybrids, these ports are isolated from each other and a signal applied to either port is operated upon by the hybrid independently of any signal applied to the other port. Thus, signals applied to port 1 of hybrid 11 and port 1 of hybrid 21 are divided into two components by these hybrids independently of any signals applied to port 4 of either of the hybrids. Similarly, the components, derived from

ports

2 and 3 of hybrid 11 and coupled to branch ll of hybrids l2 and 22, are operated upon independently of any signals coupled to port 4 of these hybrids by hybrid 21. Thus, four different signals, coupled simultaneously to

ports

1 and 4 of

hybrids

11 and 21, respectively, produce, in each of the array branches, four signal components corresponding to the four input signals. Hence, the array of FIG. 3 operates in four of a possible maximum of 2" 8 modes, where n, equal to 3, is the number of levels of division in the fan-out shown.

It will be noted that with the addition of hybrid 21, there still remain four unexcited ports. These are energized by the addition of a four-way divider comprising three hybrids 31. 32 and 42, as shown in FIG. 4. As before, for ease of identification, the hybrids previously included in FIG. 3 are shown shaded. f the additional hybrids, two of them, 32 and 42, are added in the second level of division. The'third hybrid, 31, is added at the first level of division. More specifically,

ports

2 and 3 of hybrid 32 connect, respectively, to port 4 of hybrid l3 and port 4i of hybrid 23. Similarly,

ports

2 and 3 of hybrid 42 connect, respectively, to port 4 of hybrid 33 and port 4 of hybrid 43.

Ports

2 and 3 of hybrid 31 connect, respectively, to port 1 of hybrid 32 and port of hybrid 42. The resulting fan-out now has six input terminals and can operate in six of eight possible modes.

It will be noted that in FIG. 4, there are, as yet, no connections to port 4 of hybrid 32 and port 4 of hybrid 42. Accordingly, the array is completed by the addition of one more hybrid 41, as shown in FIG. 5, wherein hybrid 41 is added at the first level of division. Specifically,

ports

2 and 3 of hybrid 41 connect, respectively, to port 4 of hybrid 32 and port 4 of hybrid 42. The resulting fully harnessed fan-out comprises an array of (n) by (2") hybrids, where n is the number of binary levels of division in the fan-out. In the illustrative embodiment there are three levels of division and, hence, the array comprises a total of (3) (2 12 hybrids. Since a separate signal can be applied to all of the

input ports

1 and 4 of hybrids ll, 21, 31 and 41, a total of eight signals can be applied to the array simultaneously to produce, at each of the

output ports

2 and 3 of

hybrids

13, 23, 33 and 43, eight branch signals that include components of each of the input signals.

Having provided an array capable of dividing as many as 2" separate input signals into 2" branch components, the problem of sorting out the intermingled signal components in each of the respective branches and recombining them so that only related signal components are combined at each output port, is now considered. To do this, the principle of time-reversibility is utilized, as was done in applicants copending application, Ser. No. 717,341, filed Mar. 29, 1968. This principle states that, in a reactive network when time is reversed, all outgoing power is reversed, and emerges at what, in forward time, had been the input ports. As noted in the above-identified application, rather than attempting to trace all the signal components through a recombining, or fan-in network to detennine what conditions must be established in order to insure that all the signal components associated with each of the signals combine in proper phase at one of the output ports, let us rather view the passage of the incident signals through the power-dividing fan-out as a sequence of events, such as, for example, a sequence of events as they unfold in a motion picture. It is clear that a motion picture evolves, no matter how complex the story or how disruptive the events depicted, when the film is run backwards all that has transpired is unraveled, and the initial conditions are restored when the film returns to the initial frame. The only difference to be noted between running the film forward and running the film backward is that the sequence of events depicted is reverse. That is, there is a phase reversal in that what leads in the forward running, lags in the reverse running.

if magic tee type hybrids are used, all branch signals are either in phase or 180 out of phase and, hence, there is no way to distinguish between leading and lagging. Hence, operationally, the fan-in network is simply the mirror image of the fan-out network. if, on the other hand, quadrature couplers are used, the circuit must be modified so that the fan-in and fan-out networks are conjugates of each other. Such a conjugate network can always be realized by replacing each of the hybrids in the fan-in with hybrids whose scattering coefficients are the complex conjugates of the hybrids in the fan-out. (For purpose of this discussion, constant phase angle differences are neglected.) This is conveniently done, for example, by introducing 180 of additional phase shift in series with a pair of selected hybrid ports in the manner'shown in FIG. 6. In an unmodified hybrid, a signal applied to either

input port

1 or 4 produces, in the

output ports

2 and 3, signal components proportional toT and 75 where:

ris the goefficient of transmission of the coupler equal to lil 0; and k is the coefficient of coupling of the coupler equal to Lklgilg, 0 and being relative phases, differing, respective- Iytfrom the actual phases by a constant angle.

By including

phase shifters

60 and 61 in series with ports 1 and 2 (or 4 and 3) of hybrid 65, a signal applied to either

input port

1 or 4 produces signal components proportional to Y and k at

ports

2 and 3. That is, hybrid 65, as modified by the inclusion of 180 phase shifters 6i and 61, is converted to the relative conjugate of itself.

When this is done for all the hybrids, and after all internal pairs of 180 phase shifters are collected, the resulting fan-out produced is as shown in FIG. 7. This fan-out, which includes i180"

phase shifters

110, 111, 112 and 113 in selected branches, is the conjugate of the fan-out of FlG. 5, and can be combined with the latter, as in FlG. 8, to produce a fully harnessed fan-out, fan-in array. ltwill be noted that the fan-out and fan-in portions of the array, exclusive of the phase shifters, are the mirror images of each other. it will also be noted from an examination of FIG. 8 that the arrangement of phase shifters is exactly the same as is described more generally in my copending application, Ser. No. 632,058 filed Apr. 19,

1967. As explained therein, for all pairs of symmetrically-situated input and output hybrids, the electrical length of every branch located along one of the two wavepaths connecting said pair of hybrids, differs by 180 from the electric length of the corresponding branch located along the other wavepath connecting said hybrids. Referring to FIG. 8, symmetrically located hybrids are readily identified since the fan-out and fan-in networks are the mirror image of each other. For ease of identification, symmetrically located hybrids are similarly numbered, with the hybrid in the fan-in portion of the network being primed, (i.e., 13-13, 41-41, etc.).

Corresponding branches are branches arrived at by going through an equal number of t and k transformations, respectively. For example, as between symmetrically-located hybrids 31 and 31', there are two interconnecting

paths

120 and 121. Along path 120, the signal is divided into components which ultimately reach

branches

101, 102, 103 and 104. Similarly, wavepath 121 divides among

branches

105, 106, 107 and 108. More specifically, the signal reaching branch 101 is proportional to tlc. A corresponding branch along wavepath 121 would also produce a signal proportional to lk. This would include both

branches

105 and 108 and, as will be noted, the electrical lengths of both these branches differ from that of branch 101 by 180.

An alternative procedure for determining which branches shall include an additional 180 of phase shift involves tracing the paths between any one of the input ports and all of the 2" branches to determine the signal distribution in the several paths. in general, the signal in each of the branches is proportional to t k", where m and p are integers between zero and n. For example, starting at input port 1 of hybrid 11, the signal goes through three I transformations and no k transformations to reach branch 101. Thus, m=3, p= and the signal is proportional to 2 k". Similarly, the signal in branch 103 is proportional to t k. Under this second procedure there is a choice. An additional 180 phase shift is added to those branches for which p is even (including zero) or, alternatively,to those branches for which p is odd. 1n the embodiment of FIG. 8, phase shifters are added to branches 101 104, 106 and 107, for which p is even. Alternatively, the phase shifters could have been added instead to branches I02, I 03 I O5 and 108, for which p is odd. Thus FIG. 8 shows one of the two possible arrangements of phase shifters for the particular array illustrated. More generally, the arrangement of phase shifters for any level array can be ascertained in accordance with either of the rules set forth hereinabove.

efore proceeding with a discussion of a few of the uses to which the multimode array of FlG. 8 can be put, a brief discussion of its properties should be noted. in the fully harnessed array shown, all ports are utilized. That is, signal input means are provided at both input ports of each of the

hybrids

11, 21, 31 and 41 in the first level of division. Accordingly, a difierent signal can be applied to each of these eight ports. For example, a signal e, applied at input port 1 of hybrid 11, will divide among the eight branches of the array and, because of the mirror image symmetry, recombine in output port 1 of hybrid 11'. None of the energy associated with input signal e, will appear at any of the other output ports. Port 1 of hybrid 11 and port 1 of hybrid Eli. are, therefore, referred to as coupled ports. Similarly, a signal e coupled to port 4 of hybrid 21 will, after division and recombination, appear at port 4 of the symmetrically located hybrid 21. Thus, port 4 of hybrid 21 and port 4 of hybrid 21 are also coupled parts. It should also be noted that signals e and e can be applied independently or simultaneously.

In summary, the array of FIG. 8 provides a means for simultaneously accepting as many as 2" independent signals, dividing each of them into 2" components, operating upon these components, then sorting the individual components of each signal and reassembling them in one of 2" different output ports.

As indicated hereinabove, a multimode fan-out, fan-in array of the type just described can be used in a variety of ways. For purposes of illustration, we will consider a fully-hamessed nlevel binary fan-out, fan-in array having 2" input, 2" output ports, and 2" branches. Such anarray is represented in block diagram in FIG. 9, wherein an nlevel fan-out is shown connected to an n-level fan-in 91 by means of 2" branch circuits, each of which includes an amplifier 92. As explained above, the fan-out and fan-in networks are conjugate networks.

In its simplest, application, 2" different input signals e e ...e2n are applied, respectively, to the 2" input ports of

fanout

90, and 2" amplified output signals E E E n are derived at the 2" output ports. In this arrangement, each signal passes through the array once, thus experiencing only one stage of gain. Obviously, the power handling capability of each amplifier must be such as to handle all 2" input signal components simultaneously.

In the second application shown in FIG. 10, the array is used in a self-cascaded manner in which a single input signal is applied to one of the input ports 95. The output derived at coupled port is then fed back to the next input port 96 and, as before, the output derived at coupled port 96' is fed back to the next input port. This process is repeated until each of 2"-1 output ports is coupled back to a different one of 2"l input ports. The output signal E, is then taken at the last remaining output port 97'. In this arrangement one signal makes 2" passes through amplifiers 92 for a total gain of 2nG, where G is the gain per pass. When used in this manner, the power han dling capability of each amplifier is essentially determined by the signal power during the last stage of amplification.

it will be noted that each of the 2 1 feedback loops is provided with an isolator 93 Since fan-out 90 and fan-in 91 were characterized as fully-harnessed arrays, there are no longer dummy ports to absorb amplified reflections. Accordingly, provision for external isolation is advantageously made for such absorption by including an isolator in some or all of the feedback loops.

FIG. 11, which is a self-pumping parametric amplifier, illustrates the simultaneous use of a multimode fan-out, fan-in array in both the self-cascaded and multi-signal manner of operation. In this embodiment, an input signal is coupled to one of the input ports 95 and, as in H6. 10, the output at coupled port 95 is fed back to the next input port 96. This process is repeated until 2"2 of the output ports are coupled to 2"2 of the input ports to produce a self-cascaded circuit in which the signal makes 2"-1 passes. The amplified output signal is taken from port 93. The remaining input port 97 and its coupled output port 97 are connected together through an external circuit to form an oscillator. Circuit 1120, which includes a frequency-selective network and an amplifier stage, induces oscillations in the array for pumping the nonlinear reactive elements 119.

it is apparent from the above that a multimode array can be used in a variety of multifunction configurations. An example of another fruitful area of use, involving push-pull class B transistor amplifiers, is illustrated in FlG. 12, which, for purposes of illustration, is depicted as a single level fan-out, fan-in array comprising an input hybrid and an output hybrid 130' coupled together by means of a pair of

transistor arnplifiers

132 and 133. When quadrature hybrids are used, a degree phase shifter 131 is included in one of the interconnecting branches.

in cw applications, a significant problem arises in stabilizing the transistor bias relative to the junction contact potential threshold since the average current is signal dependent. By providing an out-of-band pumping signal to each of the amplifiers, however, low level linearity can be significantly improved, and a more stable, higher efiiciency class B transistor amplifier obtained. Accordingly, the signal to be amplified is coupled to port I of input hybrid 130, and an out-of-band pump source is coupled to port 4 of hybrid 130. The amplified signal appears at coupled port 1 of output hybrid 130'. Port 4 of hybrid 130 is resistively terminated to dissipate the pump energy. Alternatively, the pump signal could be generated internally by means of a suitable feedback loop that connects output port 4 to input port 4 in a manner similar to that shown in FIG. 1 1.

In each of the embodiments shown .in FIGS. 9, 10, 11 and 12, a fully harnessed array is used. Recognizing that in such an array there are no dummy ports to absorb amplifier reflections, isolators are shown included in the feedback loops in FIG. 10. It will be recognized that isolators can also be included in any of the other embodiments where necessary. If, on the other hand, the use of isolators is considered to be undesirable for any reason, the same purpose can be served by retaining a resistive termination on one of the two input ports of each of the hybrids in the last level of division, such as port 4 of

hybrids

13, 23, 3, 33 and 43, in FIG. 8, and omitting

hybrids

31, 32, 41 and 42 which feed these ports. The price paid for this arrangement, however, is to reduce by one-half the number of operating modes.

It will also be noted that the particular interconnections between hybrids in adjacent levels of division shown in FIG. are merely illustrative. More generally, the output ports of each hybrid in each of the first rr-I levels of binary division can be connected to either one of the input ports of any two hybrids in the next level of division such that there is one and only one path between each input port and each of the 2" branch circuits. Thus, in all cases it is understood that the above-described arrangements are illustrative of a small number of the many possible specific embodiments which can represent applications of the principles of the invention. Numerous and varied other arrangements can readily be devised in accordance with these principles by those skilled in the art without departing from the spirit and scope of the invention.

I claim:

1. An amplifier comprising:

a first plurality of 3 db hybrid junctions connected in a fanout configuration having n levels of binary division to form 2" branches;

each of said hybrids having a pair of conjugate input ports and a pair of conjugate output ports;

each of the output ports of each hybrid in each of the first n-I levels of binary division being connected to an input port of a different hybrid in the next level of binary division such that each input port of said fan-out connects to each branch through only one wavepath;

amplifying means included in each of said branches;

a second plurality of 3 db hybrid junctions connected in a fan-in configuration coupled to said 2" branches;

said fan-in configuration being the conjugate of said fan-out configuration such that each input port of said fan-out has only one coupled port at the output of said fan-in;

and signal input means provided at at least two input ports of said fan-out whereby signals are applied, simultane ously, to said two input ports.

2. The circuit according to claim I, wherein said hybrid junction divide an applied signal into two components that are either in phase or out of phase.

3. The circuit according to claim 1 wherein said hybrid junctions are quadrature couplers.

4. The circuit according to claim I wherein said hybrids form an n by 2"" array, and an input signal is coupled to each of the input ports of the hybrids in the first level of division of said fan-out.

5. The circuit according to claim I wherein a separate signal is coupled to each of the input ports of said fan-out; and wherein separate output circuits are coupled to each of the output ports of said fan-in.

6. The circuit according to claim 1 wherein a signal is applied to one of the input ports of said fan-out:

wherein selected output ports of said fan-in are coupled to selected input ports of said fan-out to produce a selfcascaded array; and

wherein means are coupled to one of the output ports of said fan-in for extracting signal energy from said array.

7. The circuit according to claim 1 wherein a first signal is applied to one of the input ports of said fan-out wherein selected output ports of said fan-in are coupled to selected input ports of said fan-out to produce a self-cascaded array and wherein a second signal is applied to another input port of said fan-out.

8. The circuit according to claim 7 wherein said other input port and its coupled output port are interconnected by means of a feedback circuit to form an oscillatory circuit.

9. The circuit according to claim 8 wherein each branch includes a nonlinear reactive element and wherein said oscillatory circuit provides a pump signal for producing parametric amplification of said first signal.

10. The circuit according to claim I wherein the first level of binary division includes only one hybrid and wherein a different signal source is coupled to each input port of said one hybrid.

II. The circuit according to claim 1 wherein the first level of binary division includes m hybrids, where m is an integer between one and 2"".

12. The circuit according to claim 1 wherein all said hybrids are quadrature hybrids and wherein the electrical length of each branch located along any one wavepath connecting pairs of symmetrically located hybrids differs by 180 degrees from the length of a corresponding branch located along the other of said pairs of wavepaths.

13. The circuit according to claim 1 wherein each branch includes a class B operated transistor amplifier and wherein one of said signals is an out-of-band pump.

Claims

1. An amplifier comprising: a first plurality of 3 db hybrid junctions connected in a fanout configuration having n levels of binary division to form 2n branches; each of said hybrids having a pair of conjugate input ports and a pair of conjugate output ports; each of the output ports of each hybrid in each of the first n-1 levels of binary division being connected to an input port of a different hybrid in the next level of binary division such that each input port of said fan-out connects to each branch through only one wavepath; amplifying means included in each of said branches; a second plurality of 3 db hybrid junctions connected in a fanin configuration coupled to said 2n branches; said fan-in configuration being the conjugate of said fan-out configuration such that each input port of said fan-out has only one coupled port at the output of said fan-in; and signal input means provided at at least two input ports of said fan-out whereby signals are applied, simultaneously, to said two input ports.

2. The circuit according to claim 1, wherein said hybrid junction divide an applied signal into two components that are either in phase or 180* out of phase.

4. The circuit according to claim 1 wherein said hybrids form an n by 2n 1 array, and an input signal is coupled to each of the input ports of the hybrids in the first level of division of said fan-out.

5. The circuit according to claim 1 wherein a separate signal is coupled to each of the input ports of said fan-out; and wherein separate output circuits are coupled to each of the output ports of said fan-in.

6. The circuit according to claim 1 wherein a signal is applied to one of the input ports of said fan-out: wherein selected output ports of said fan-in are coupled to selected input ports of said fan-out to produce a self-cascaded array; and wherein means are coupled to one of the output ports of said fan-in for extracting signal energy from said array.

10. The circuit according to claim 1 wherein the first level of binary division includes only one hybrid and wherein a different signal source is coupled to each input port of said one hybrid.

11. The circuit according to claim 1 wherein the first level of binary division includes m hybrids, where m is an integer between one and 2n 1.