US3216005A

US3216005A - Analog voltage translating apparatus

Info

Publication number: US3216005A
Application number: US175060A
Authority: US
Inventors: Leslie E Hoffman; James S Bowker
Original assignee: Philco Ford Corp
Current assignee: Space Systems Loral LLC
Priority date: 1962-02-23
Filing date: 1962-02-23
Publication date: 1965-11-02
Anticipated expiration: 1982-11-02

Description

NOV- 2, 1965 l.. E. HOFFMAN ETAL 3,216,005

ANALOG VOLTAGE TRANSLATING APPARATUS NOV- 2, 1965 l.. E. HOFFMAN ETAL 3,216,005

ANALOG VOLTAGE TRANSLATING APPARATUS 2 Sheets-Sheet 2 Filed Feb. 23, 1962 ATTORNEY United States Patent O 3,216,005 ANALOG VOLTAGE TRANSLATING APPARATUS Leslie E. Hoffman, Morton, and James S. Bowker, Flourtown, Pa., assignors to Philco Corporation, Philadelphia, Pa., a corporation of Delaware Filed Feb. 23, 1962, Ser. No. 175,060 4 Claims. (Cl. 340-347) This invention relates generally to translation of analog voltages, and more particularly to translation of analog voltages by the use of current switching devices in which a common input current may be routed into either of two circuit branches.

As is well understood, an analog voltage is representative of an amplitude within an overall amplitude range which may be represented by a digit code, and it is frequently desired to convert an analog voltage to digital form, which involves comparison of the analog voltage with reference voltages that are representative of amplitude levels in said range. In one mode of translation, the analog voltage may be converted to a level-representative quantity which may then be converted to digital form. In another mode of translation the analog voltage may be converted directly to digital form.

One object of the present invention is to provide improved apparatus for translation of an analog voltage according to either of said modes.

Another object of the invention is to provide apparatus for the stated purpose which has the advantages of simplicity and high speed of operation.

Other objects of the invention will become apparent as the description proceeds.

A novel feature of the invention is the provision of apparatus comprising: a plurality of successive comparators each including a pair of circuit branches, a common current input to said branches, and means for routing the input current through one or the other of said branches depending on whether the analog voltage to be translated is less or greater than a predetermined reference voltage; means connecting one of the circuit branches of each comparator except the last to the current input of the next succeeding comparator; and an output connection extending from each of the other circuit branches.

Another novel feature of the invention is the provision of apparatus comprising: a plurality of analog-to-digital converters corresponding in number to the number of digits in a pre-selected digit code, each of said converters comprising a number of comparators .corresponding to the number of changes of the digit represented by the converter, there being plural successive comparators in at least some of said converters, each of said comparators including a pair of circuit branches, a common current input to said branches, and means for routing the input current through one or the other of said branches as a result of comparison of two applied voltages; means for applying to each comparator a reference voltage representing a digit change; means for applying the analog voltage to each of said comparators for comparison with the reference voltage applied thereto; means connecting one of the circuit branches of each comparator except the last of plural comparators of a converter to the current input of the next succeeding comparator; and a voltage output connection extending from each of the other circuit branches.

The invention may be fully understood from the following detailed description with reference to the accompanying drawings wherein- FIG. 1 is a block diagram of apparatus according to this invention for translation of an analog voltage to a level-representative quantity;

FIG. 2 is a schematic illustration of two successive comparators in accordance with this invention, as employed in the apparatus of FIG. 1;

FIG. 3 shows a digit code according to which an analog voltage is to be converted to digital form; and

FIG. 4 is a block diagram of a system according to the invention for converting an analog voltage to digital form according to the digit code of FIG. 3.

Referring iirst to FIG. 1, suppose that the overall amplitude range of an analog voltage is represented by m levels each of which represents a number of a digit code. Suppose further that t-he reference voltages are produced each of which has an amplitude intermediate two consecutive ones of said levels. In the apparatus of FIG. l there are m-l comparators C1 to Cm 1, and there are m-1 reference voltages r1 to rm 1 applied respectively to the comparators, for example by means of a battery 10 and a potentiometer 11. The analog voltage V from a source 12 is applied simultaneously to all of the comparators for comparison with the reference voltages. Each of the comparators has two circuit branches as hereinafter described. A constant current I is supplied to the rst comparator C1 as by means of a. battery 13 and a resistor 14.

In operation of the apparatus shown in FIG. 1, if the analog voltage V is less than the reference voltage r1, the current I is routed so that an output voltage appears at output connection al. However if the analog voltage V is greater than the reference voltage r1, current I is routed through voltage translation block T to comparator C2 where the analog voltage V is compared with the reference voltage r2. If the analog voltage V is less than the reference voltage r2, the the current is routed so that an output voltage appears at output connection a2. However if the analog voltage V is greater than the reference voltage r2, the current is routed on to the next comparator. If the anal-og voltage V is of such amplitude that current is routed to the inal comparator Cm 1, the analog voltage is compared with reference voltage rm 1, and an ouput voltage appears either at output connection am 1 or am depending on whether the analog voltage is less or greater than the reference voltage rm 1.

From the foregoing description it will be seen that in any instance an output voltage will appear at one end only one of the output connection a1 to am, depending on the amplitude of the analog voltage. This output voltage may be readily converted, if desired, to the digital number which it represents, as will be well understood by those skilled in the art.

Referring now to FIG. 2, there are shown schematically the comparators C1 and C2 of FIG. 1 which are typical of any two consecutive comparators in an apparatus of the character shown in FIG. 1. Comparators C1 comprises

transistors

15 and 16 whose emitters are connected to the common current input. The analog voltage is applied to the base of transistor 15, while the reterence voltage r1 is applied to the base of transistor 16. The input current I is routed through either of the circuit branches which include the transistors, according to Whether the analog voltage is less or greater than the reference voltage r1. If the analog voltage is greater than the reference voltage r1 the current is routed through transistor 16 to comparator C2 via a voltage translating arrangement including in Zener diode 17 and a resistor 18. Comparator C2 comprises

transistors

19 and 20 through either of which the input current is routed depending on whether the analog voltage is less or greater than the reference voltage r2.

Referring now to FIG. 3, there is shown a three-digit code whose digits are designated D1 ,D2 and D3. It will be noted that digit D1 changes once, digit D2 changes twice, and digit D3 changes four times. In converting an analog voltage to digital form according to the code shown, seven reference voltages r1 to rq are utilized as hereinafter described.

FIG. 4 shows a system according to this invention for converting an analog voltage directly to digital form according to 4the digit code of FIG. 3. In this system there are three analog-to-digital converters 21 to 23 corresponding respectively to the digits D1, D2 and D3 of the code of FIG. 3. Since digit D1 changes only once, converter 21 comprises a single comparator 24 which is similar to one of the comparators in FIGS. 1 and 2 as above-described. Since digit D2 changes twice, converter 22 comprises two `

comparators

25 and 26 and a voltage translation block 27. Since digit D3 changes four times, convert-er 23 comprises our comparators 28 to 31 and three voltage translating blocks 32 to 34. Constant current I is supplied 'to the three converters, as by means of a battery 35 and resistors 36 to 38.

The reference voltages r1 to rf, as represented in FIG. 3

are supplied to the comparators from a source 39 which may comprise a battery and a potentiometer, as in FIG. 1, with seven taps on the potentiometer for deriving the seven reference voltages. The reference voltage r4 reppresents the change of digit D1 (between 0 and 1) and it is applied to comparator 24 over connection 40. Reference voltages r2 and r6 represent the changes of digit D2 and they are applied respectively to

comparators

25 and 26 over

connections

41 and 42. Reference voltages r1, r3, f and rq represent the changes of digit D3 and they are applied respectively to comparators 28 to 31 over connections 43 to l46.

Block 47 represents any source of analog voltage which is supplied simultaneously to the comparators of the three converters over connections 48 to 50.

In operation, comparator 24 determines whether the analog voltage is less or greater than reference voltage r4, and an output voltage appears either at output connection 51 representing ZERO or at output connection 52 representing ONE.

Comparators

25 and 26 compare the analog voltage with reference voltages r2 and r6. If the analog voltage is less than r2 an output voltage appears at output connection 53 representing ZERO. If the analog voltage is greater than r2 but less than r6 an output voltage appears at output connection 54 representing ONE. If the analog voltage is greater than r6 an output voltage appears at output connection 55 representing ZERO.

Comparators 28 to 31 compare the analog voltage with reference voltages r1, r2, r5 and rq. If the analog voltage is less than r1 an output voltage appears at output connection 56 representing ZERO. If the analog voltage is ,greater than r1 but less than r3 an output voltage appears ing ONE. If the analog voltage is greater than r2 an output voltage appears at output connection 60 representing ZERO.

While a system for analog-to-digital conversion according to a three-digit code has been described, it will be apparent that the invention is applicable for conversion according to other codes Such as -a four-digit code.

In some instances it may be desirable to equalize as far as possible :the number of comparators in the converters. This can be done by rearranging the code so as to minimize the number of changes of each digit. One advantage of this is that it minimizes the encoding time.

While the invention has been described with particular reference to the illustrated embodiments, it will be understood that the invention is not limited thereto but contemplates such modifications and further embodiments as may occur to those skilled in the art.

We claim:

1. In a system for translation of an analog voltage, the combination comprising: a rst comparator comprising a pair of transistors having their emitters connected to a common current input, means for supplying constant current to said input, means for applying said analog voltage to the base of only one of said transistors, an output connection extending from the collector of said one transistor, means for applying a lirst reference voltage to the base of only the other of said transistors, a second comparator comprising a second pair of transistors having their emitters connected together and coupled to the collector of said other transistor, means for applying said analog voltage to the base of only one of said second pair of transistors, an output connection extending from the collector of the same transistor, means for applying a second reference voltage to the base of only the other of said second pair of transistors, and an output connection extending from the collector of the same transistor.

2. A system according to claim 1, including a Zener diode interconnecting said comparators, and a resistor having one end connected to the emitters of said second pair of transistors and having its other end connected to a voltage source.

3. In a system for translation of an analog voltage, the combination comprising: a rst comparator comprising a pair of transistors having their emitters connected to a common current input, means for supplying constant current to said input, means for applying said analog voltage to the base of only one of said transistors, an output connection extending from the collector of said one transistor, means providing plural reference voltages comprising a D.C. source and a voltage divider connected in series, means for applying a first reference voltage from said divider to the base of only the other of said transistors, a second comparator comprising a second pair of transistors having their emitters connected together and coupled to the collector of said other transistor, means Ifor applying said analog voltage to the base of only one of said second pair of transistors, an output connection extending from the collector of the same transistor, means for applying a second reference voltage from said divider to the base of only the other of said second pair of transistors, and an output connection extending from the collector of the same transistor.

4. A system for converting an analog voltage to digi' tal form according to a binary digit code wherein each digit changes from 0 to 1 or vice versa a predetermined number of times, comprising: a plurality of analog-to-digital converters corresponding in number to the number of digits in the code, each of said converters comprising a number of comparators corresponding to the number of changes of the digit represented by the converter, each of said comparators comprising a pair of transistors having their emitters connected to a common input, there being plural successive comparators in at least some of said converters with each succeeding comparator having its common input coupled to the collector of one of the transistors of the preceding comparator, output connections extending from all of the other collectors of the transistors constituting said converters, means for applying said analog voltage to the base of one of the transistors of each Iof said comparators, means for applying to the base of the other transistor of each comparator a reference voltage representing a digit change in said digit code, and means for supplying constant current to the input of each of said converters, whereby said current is routed in each converter according to the amplitude of said analog voltage and an output voltage appears at one of the output connections of each converter representing the corresponding digit of the digital value of said analog voltage.

References Cited by the Examiner UNITED STATES PATENTS 2,922,151 1/60 Reiling t.. t c 340-347 10 MA-LCOLM A. MORRISON, Primary Examiner.

Claims

4. A SYSTEM FOR CONVERTING AN ANALOG VOLTAGE TO DIGITAL FORM ACCORDING TO A BINARY DIGIT CODE WHEREIN EACH DIGIT CHANGES FROM 0 TO 1 OR VICE VERSA A PREDETERMINED NUMBER OF TIMES, COMPRISING: A PLURALITY OF ANALOG-TO-DIGITAL CONVERTERS CORRESPONDING IN NUMBER TO THE NUMBER OF DIGITS IN THE CODE, EACH OF SAID CONVERTERS COMPRISING A NUMBER OF COMPARATORS CORRESPONDING TO THE NUMBER OF CHANGES OF THE DIGIT REPRESENTED BY THE CONVERTER, EACH OF SAID COMPARATORS COMPRISING A PAIR OF TRANSISTORS HAVING THEIR EMITTERS CONNECTED TO A COMMON INPUT, THERE BEING PLURAL SUCCESSIVE COMPARATORS IN AT LEAST SOME OF SAID CONVERTERS WITH EACH SUCCEEDING COMPARATOR HAVING ITS COMMON INPUT COUPLED TO THE COLLECTOR OF ONE OF THE TRANSISTORS OF THE PRECEDING COMPARATOR, OUTPUT CONNECTIONS EXTENDING FROM ALL OF THE OTHER COLLECTORS OF THE TRANSISTORS CONSTITUTING SAID CONVERTERS, MEANS FOR APPLYING SAID ANALOG VOLTAGE TO THE BASE OF ONE OF THE TRANSISTORS OF EACH OF SAID COMPARATORS, MEANS FOR APPLYING TO THE BASE OF THE OTHER TRANSISTOR OF EACH COMPARATOR A REFERENCE VOLTAGE REPRESENTING A DIGIT CHANGE IN SAID DIGIT CODE, AND MEANS FOR SUPPLYING CONSTANT CURRENT TO THE INPUT OF EACH OF SAID CONVERTERS, WHEREBY SAID CURRENT IS ROUTED IN ECH CONVERTER ACCORDING TO THE AMPLITUDE OF SAID ANALOG VOLTAGE AND AN OUTPUT VOLTAGE APPEARS AT ONE OF THE OUTPUT CONNECTIONS OF EACH CONVERTER REPRESENTING THE CORRESPONDING DIGIT OF THE DIGITAL VALUE OF SAID ANALOG VOLTAGE.