US2704361A - Receiving circuit arrangement - Google Patents

Description

March l5, 1955 w. H. P. POULIART ET AL 2,704,361

RECEIVING CIRCUIT ARRANGEMENT Filed Feb. 19, 1954. 2 sheets-sheet 1 sPL )E/F/Q/ CL/ DF G PE c AMP M/x CLI' DF SPL tlorney March 15, 1955 w. H. P. POULIART ET AL 2,704,361

RECEIVING CIRCUIT ARRANGEMENT Filed F'eb. 19, '1954 Inventors W H,P. POULLART' E MMICHIELS )L Attorney United States Patent C RECEIVING CIRCUIT ARRANGEMENT Willy Hortense Prosper Pouliart and Franciscus Marcel Michiels, Antwerp, Belgium, assiguors to International Standard Electric Corporation, New York, N. Y., a corporation of Delaware Application February 19, 1954, Serial No. 411,522

Claims priority, application Netherlands February 27, 1953 4 Claims. (Cl. 340-174) The invention relates to a receiving circuit arrangement for an electrical waveform alternately exhibiting positive and negative variations about a predetermined level.

It has particularly in view an application to magnetic drum recording technique and more precisely a reading circuit arrangement therefor.

An object of the invention is to produce an accurate and relatively simple reading circuit.

A more particular object is to have a reading arrangement which is not affected by impurities in the nickel coating on the drum which might cause spurious signals. An arrangement is envisaged here in which a drum of nonmagnetic material has an outer coating of nickel.

In accordance with a feature of the invention, the receiving circuit arrangement comprises a first channel accepting only the positive variations and a second channel accepting only the negative variations, a storage circuit with a short time constant with respect to the minimum time duration of any positive or negative variation inserted serially in each of said channels, each storage circuit having a charging path and a discharging path, and means interconnecting the charging path of each storage circuit with the discharging path of the other and responsive to a variation at said charging path for causing the discharge of the other storage circuit.

The above mentioned and other objects and features of the invention will become more apparent and the invention itself will be best understood by referring to the following description of an embodiment taken in conjunction with the accompanying drawings in which:

Fig. 1 is a block schematic of a receiving circuit arrangement;

Fig. 2 is a detailed embodiment of two parts of the circuit shown in block schematic form in Fig. 1; and

Fig. 3 shows various wave forms which appear at different points of the circuit shown in Fig. 1.

Various methods have already been employed for recording intelligence on magnetic drums by using at least two different states of magnetization of elemental areas of said drum as significant intelligence. Wave form (a) in Fig. 3 shows an example of recording wherein two senses of magnetization are used. It therefore represents the variations of the current in the storage coil.

In accordance with a preferred scheme which has been disclosed in the copending patent application, Serial No. 411,523, filed February 19, 1954, for Method of Storing Electrical Intelligence, a change of current in the storage coil and accordingly a change in the sense of magnetization for the elemental length of track on the magnetic drum is used to represent one of the two binary digits, e. g. 0, while the absence of such a change characterizes the other binary digit, e. g. 1. In Fig. 4 a diagram is shown representing this scheme of changing the magnetization of elemental lengths of track in accordance with a binary number. The vertical dotted lines separate the individual time elements t1 to tis which represent the time necessary for elemental lengths of track, each elemental length of track requiring one of the time elements for it to pass under the recording head. Immediately below the representation of the time elements is a binary number assumed to be recorded on the drum. At a the section of the magnetic track is indicated. As long as successive digits are 1 the elemental sections of track will be magnetized in the same sense, but whenever a digit having a value of is reached, the correrice sponding elemental portion of track is magnetized in the opposite sense. Thus it will be seen that there is always a shift in the magnetization at each time representing a digit having a 0 value, while there is no shift at time elements representing digits having a Value of 1. At b is shown a series of pulses which are derived from the curve of a during the reading ofi process. Each of these pulses whether positive or negative represents a O digit; the absence of a pulse during any time element will indicate a 1 digit. Thus the original information stored on the drum can be recovered.

The flux around the reproduction coil does not assume in practice the ideal form shown in Fig. 3 (a), but can be more correctly represented by a wave form having a shape, such as shown in (b) in the same figure.`

The electromotive force induced in the reproduction coil is proportional to the rate of change of the flux, and accordingly the sudden changes of magnetization on the nickel drum surface will, when passing under the reproduction head, produce voltage peaks in the reproduction coil. These voltage peaks constitute an extremely precise indication of the presence or the nature of a recorded signal and should therefore be used to produce an output wave form of the shape and nature suitable for use in circuits associated with the magnetic drum. However, any spurious signals are apt to mar the said maximum or minimum peaks and they make it very difficult to record these with suitable precision. In particular, any impurities on the magnetic drum surface are apt to cause such spurious signals.

The shape of the curve of the electromotive force induced in the reproduction coil is shown at (c) in Fig. 3, and for the part shown, it is seen to reverse at instants t1, t2, I3, t4 and t5. This wave form may be assumed to be present at the input of the amplifier AMP, shown in Fig. 1.

If the said amplifier has an odd number of stages, the plate output will have the form indicated at (d) in Fig. 3 and it will be applied to a splitting arrangement SPL with two outputs, the upper one, leading to rectifier REi, producing a wave form, such as (e), and the lower one, leading to rectifier REi, producing a wave form, such as (e) in Fig. 3.

It should be realized that in passing from the wave form (a) in Fig. 3 which represents the original information, as it was stored on the magnetic drum, to the wave form shown by (c) in the same figure, there has been no distortion of information and the moments, such as t1, Where the electromotive force, shown at (c), changes its sign, are fully characteristic to reproduce the wave form shown by (a).

The upper output of circuit SPL delivers only the negative half waves, shown at (d), but reversed, as shown at (e), so that they become positive with respect to ground. At time t1, a storage circuit comprising the condenser C1, which is connected between the cathode of rectifier RE; and ground, will begin to charge, and as the charge time constant is very small, due to the low resistance value of REi, when conductive, the voltage across condenser C1 will increase, as shown by (g). The voltage is seen to follow that provided at the input of rectifier REi until such Voltage starts to decrease, at which moment rectifier REi becomes blocked causing, therefore, the voltage across condenser C1 to remain stationary until time t2. This assumes, of course, that any leakage path across the condenser at that moment is not important enough to cause any significant decrease until time tz.

At this moment, the lower output of circuit SPL will emit a positive pulse having the shape shown at (e), as it emits only the positive half waves of the wave form fed at its input and shown at (d). The application of this positive pulse to the device G1 will cause the latter to change its output D. C. potential which was previously sufliciently high to prevent rectifier REz, connected at its output, from presenting a low resistance value. The first positive pulse shown at (e) will, however, so lower the D. C. potential at the cathode of rectifier REZ, that the latter, the anode of which is connected to the junction point between rectifier REi and condenser C1, will now afford a discharge path for the storage circuit comprising condenser C1, whereby from time t2, the voltage C1 will quickly decrease back to ground level, as shown at (g). On the other hand, and in the same way, as described in relation to condenser C1, at time t2 the storage circuit comprising condenser Ci will have charged, due to the first positive pulse, shown at (e). As soon as the pulse shown has reached its maximum positive value, the voltage across Ci will be stabilized to that value, since rectifier REi becomes blocked, and condenser C1 will not discharge until the device G provides a discharge path through rectifier REz, similarly to the operation of the device G. The voltage Wave form across condenser C1 is shown at (g).

The voltages across condensers C1 and C1 will be respectively applied to the circuits CLI and CLI', which are essentially amplifying and clipping or slicing devices, whereby their respective output wave forms will have the shapes indicated at (h) and (h). These are substantially ideal rectangular wave forms which are complementary, and the time intervals between successive changes of voltage levels accurately correspond to the time intervals between successive passages of the electromotive force shown at (c) through the zero value.

These pulses are thus characteristic of the original information, and they can then be respectively applied to differentiating devices, such as DF and DF', which will produce outputs, respectively shown at (i) and (i). These two outputs will be fed to the circuit MIX which is essentially a mixing circuit but which suppresses the negative pulses. Therefore, its output will have the form indicated at (i), and the spacings between the successive trigger pulses are characteristic of the original information, since an ideal differentiated form of the wave, shown at (a), has been obtained.

Fig. 2 shows detailed circuits for SPL and G. Circuit SPL is seen to comprise a pentode VA1 which is arranged in a conventional manner as a push-pull phase splitter, the value of resistor R1 being equal to the sum of the values of resistors R2 and R3, included in the cathode circuit, whereby, upon the circuit receiving wave form (d) of Fig. 3 through coupling condenser C3, wave forms indicated by (e) and (e') are respectively applied to the control grids of the triodes VAz and VA3, via coupling condensers C4 and C5. The triodes VAz and As are arranged as cathode followers and may feed directly into the rectifiers RE1 and RE1.

From the cathode of the triode VAz, a connection leads to the control grid of the triode VA4 in circuit G, which triode is provided with negative feedback by way of the non-decoupled cathode resistor R4. form, shown at (e) applied at the grid of VA2, will be found practically unchanged at the grid of VA4, but it will be amplified and reversed at the plate of this latter tube, as shown at (f). From there, it passes to the control grid of triode VAs, via coupling condenser Ce. This latter triode is arranged as a cathode follower, and its cathode is connected to the cathode of the rectifier REz. Normally, the potential at the cathode of VAs is sufficiently high to prevent rectifier REz from becoming conductive, and it is also higher than the potential which prevails at the cathode of VAs in the absence of an input at the grid of this latter tube. The leading edge of the negative amplified pulse, shown at (f), will be able to cause the cathode potential of VA5 to drop abruptly, since for such a voltage change at the grid of VAs, rectifier REa, in shunt with resistor R5, con- The wave nected between said grid and the positive pole of a D. C. bias source decoupled by condenser C7, will constitute a high impedance. Therefore, at times t1 and t3, it is clear that the high conductivity of rectifier REz will not permit a voltage to remain established across condenser Cl, as clearly shown at (g) in Fig. 3. Circuit G is, of course, identical to G, and the waveform at (f') corresponds to that at (f).

It will be remarked that, if the interval between one current reversal and the next (Fig. 3a) is kept below a maximum value, e. g. in the ways disclosed in the above mentioned copending patent application, the storage circuits, such as condenser C1, will not be able to discharge appreciably. Ideally, of course, there is no discharge until the rectifier, such as RE'i is made conductive, but its backward resistance is finite and the input resistance of CLI, although very high, is finite also. Therefore, there is a slight discharge, but when the time interval between reversals is kept below a maximum much lower than the high discharge time constant at that time, spurious signals will remain masked.

While the principles of the invention have been dcscribed above in connection with specific apparatus, it is to be clearly understood that this description is made only by way of example and not as a limitation on the scope of the invention.

What is claimed is:

l. A receiving circuit arrangement for an electrical waveform alternately exhibiting positive and negative variation about a predetermined level, comprising a first channel accepting only said positive variations and a second channel accepting only said negative variations, a storage circuit with a short time constant with respect to the minimum time duration of any positive or neg ative variation inserted serially in each of said channels, each storage circuit having a charging path and a dis charging path, and means interconnecting the charging path of each storage circuit with the discharging path of the other and responsive to a variation at said charging path for causing the discharge of the other storage circuit.

2. A receiving circuit arrangement, as claimed in claim l, in which the interconnecting means constitutes a twoelectrical-condition device with two inputs and two outputs.

3. A receiving circuit arrangement, as claimed in claim 1, wherein the storage circuits each comprise a series rectifier and a shunt condenser, a second rectifier in shunt across each condenser connected to the interconnecting means and adapted to change from a low conductivity state to a high one upon said means receiving a variation at the charging path of the storage circuit formed by the other condenser.

4. Receiving circuit arrangement, as claimed in claim 3, that the time interval between successive variations is very low with respect to the discharge time constant of said shunt condenser in parallel with its associated shunt rectifier in its non-conductive condition and with ny other output impedance branched across said conenser.

References Cited in the file of this patent UNITED STATES PATENTS

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