US2701216A - Method of making surface-type and point-type rectifiers and crystalamplifier layers from elements - Google Patents

Method of making surface-type and point-type rectifiers and crystalamplifier layers from elements Download PDF

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US2701216A
US2701216A US154064A US15406450A US2701216A US 2701216 A US2701216 A US 2701216A US 154064 A US154064 A US 154064A US 15406450 A US15406450 A US 15406450A US 2701216 A US2701216 A US 2701216A
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Seiler Karl
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • C—CHEMISTRY; METALLURGY
    • C01—INORGANIC CHEMISTRY
    • C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
    • C01B35/00—Boron; Compounds thereof
    • C01B35/02—Boron; Borides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/08—Reaction chambers; Selection of materials therefor
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
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    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H—ELECTRICITY
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    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/006—Apparatus
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/067—Graded energy gap
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/925—Fluid growth doping control, e.g. delta doping
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/935—Gas flow control
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/936—Graded energy gap

Definitions

  • the relative impurity concentration throughout the semiconductor should be a minimum in the zone of increased resistance immediately adjacent the metallic electrode, in order to avoid short-circuits. Any increase in the number of impurities in this zone means great probability of short-circuits due to so-called by-passes.
  • the disassociation level of the impurity atoms should be low (the impurity atoms should not diffuse readily), while the mobility of the electric carriers should be high. That only a few surface-type rectifications effects have been realized so far, derives from the fact that these two demands have not, or have hardly, been possible of fulfilment so far, for the known methods of making specified layer patterns are based exclusively on such processes where the space distribution of the impurities, is only obtained by modifications introduced by a secondary process by removing impurities at a suitable temperature, by chemical reaction (f. i. dissolving, lacquer-layers applied later on, etc.).
  • the substances intended to produce the desired effects are placed at their respective locations in a first operation where no attention can be paid as to obtaining any specified space distribution of impurities, while that specified distribution, essential for proper performance, is brought about only subsequently in a second process governed by laws different from those of the rst one.
  • a second process governed by laws different from those of the rst one.
  • A, B, C, and D refer schematically to devices where the substances needed for assembling the rectifying layer are obtained in their purest form by available processes according to what has been described above. As indicated schematically, these substances are then fed through pipes La, Lb, Lc, and Ld to the device E where the layer pattern is formed. In Fig. l, these pipes La and Lb directly feed the device E with no prior intermixing of the substances being possible. Of course, one, two, or even all of the pipes could be joined in a common duct whenever intermixing of the substances is desired or permissible at such a relatively early stage of the production process.
  • control mechanisms Ra, Rb, Rc, and Rd are shown at some arbitrary point along the ducts which allow any desired decrease or increase in the feeding rate of any of the ingredients while the semiconducting system is being built up. It is by no means essential that these controlling devices be inserted somewhere between the units A and E, B and E, etc., these controlling facilities may as well be incorporated straight in the units A, B, C, D or any additional units that might be present. Care will have to be taken, however, to prevent undesired reactions on the other devices B, C, D whenever at the junction of the pipes or individual pipe ducts the gas or Vapor rate of device A is increased.
  • the elements boron, silicon, germanium, or tellurium may be used because of the high mobility of their electric carriers.
  • the impurity concentration at the back or counterelectrode is chosen large enough to prevent virtually any barrier layer from forming there.
  • silicon may be reduced with hydrogen from silicon, tetrachloride or with zinc, in order to obtain pure silicon.
  • the reaction product deposits on a conducting foundation, (for example, carbon, or other high-melting material not alloying with the basic material) or on some insulating foundation (aluminum oxide, or similar substances).
  • a conducting foundation for example, carbon, or other high-melting material not alloying with the basic material
  • some insulating foundation aluminum oxide, or similar substances
  • boron is used in very low concentrations only, one preferably uses a mixture of boron chloride and silicon tetrachloride in the second feeder current.
  • Silicon may be provided with a small percentage of tin or germanium by adding SnCl4 or GeCl4 to the ow of SiCl4.
  • the impurity material may consist for example of thermal decomposition out of a suitable compound or in adding it as an element to the outgoing ow.
  • the essential feature is that the impurity concentration is open to any programmed control during the buildingup of the semi-conducting layer.
  • the reducing agent will he so chosen that small amounts of it when dissolved, in the semiconductor will not result in any marked degree of conductivity, or that if such is the case -they will cause if possible the kind of conductivity that is wanted anyhow when adding the impurity.
  • Hydrogen is a reducing agent of relatively very neutral character.
  • O refers to an electrically-operated tubular oven with two separate windings in series-connection.
  • zinc vapor is generated which ows in the opposite direction to the mixture of silicon tetrachloride and boron chloride, or silicon tetrachloride and germanium tetrachloride, the fractional composition of which may be varied any time.
  • the reaction zone are again the bases on which the semiconducting material deposits.
  • Fig. 4 shows only the part indicated by E in Fig. l.
  • the inner tubing Ri closed at one end--when required it may also be open at either end-there is fed from one side simultaneously some halogen compound or halogen compounds of the basic material as well as of the impurity material at suitable rates which undergo control during the reaction process as desired, and they are brought to reaction with some material reacting with either halogen (i. e. with that of the basic material as well as with that of the impurity material) so they deposit on bases placed in the reaction zone at a point where reducing material is not, or almost entirely not, deposited.
  • halogen i. e. with that of the basic material as well as with that of the impurity material
  • pipe Rl may for instance be entered from the left by silicon tetrachloride and boron chloride while at the right aluminum is vaporized, so that from the right aluminum vapor or low-order aluminum halogens ows in a current opposing that of the aforenamed compounds.
  • aluminum chloride is formed which has to flow left through the open end of the tube in a countercurrent to the entering substances.
  • the carriers or bases are then placed in such a section of the reaction zone where no aluminum deposits as in this process it is boron that has to serve as the impurity admixture. If required, even tin or germanium may be deposited as impurity substances.
  • Tube R1 is surrounded by some outer shell Ra to which the vacuum pump connects at the right.
  • the entire assembly is accommodated in an oven (not shown).
  • partition the tube up to the reaction zone by a horizontal wall to feed silicon halogen and boron halogen in the lower half While the upper half serves for the return of the formed aluminum chlorides.
  • partition the tube up to the reaction zone by a horizontal wall to feed silicon halogen and boron halogen in the lower half While the upper half serves for the return of the formed aluminum chlorides.
  • tube Rr in Fig. 4 which is conveniently made of quartz, is corroded by aluminum so it becomes useless before long. This even introduces changes in the reaction conditions which even may lead to a displacement of the reaction zone.
  • the aluminum is conveniently inserted in a short tubular socket of sintered corundum-aluminum oxide--so the quartz tubing is protected.
  • the process of the present invention permits making surface-type rectiers with entirely symmetrical electrical characteristics (so-called limiters), if the local impurity concentration is held low not at the outside (i. e. the interface to an adjacent electrode) but in the center-layer of the semi-conductor.
  • Fig. 5 shows the overall structural pattern of such a limiter where the impurity concentration is minimized in the center-layer over a layer thickness d.
  • the thickness of the marginal zone bordering at the low-concentration zone is some lO-7 centimeters, or a few atoms across.
  • Fig. 6 The effect of the thickness d of the low-concentration zone on the properties of the limiter, i. e. on the diffusion voltage level Vd (cutoff-voltage) is shown in Fig. 6.
  • the current J has been plotted versus the voltage, and this for two different values of a'. Herewith, 1(2) exceeds d0), so even Va@ exceeds Vdl).
  • Electron-conducting germanium crystals which at the surface are modified for hole-conduction (p-type) have been described.
  • This structure gives rise to a barrier layer at the interface of the n-type and p-type conducting germanium layers so the current of the emitter electrode is forced radially into the surface. It is only then that the barrier layer under the collector is so affected that the known power-amplifying control of same takes place.
  • a transistor from its basic elements so that on the foundation there is rst applied the layer of the basic material (such as germanium), along with a donor causing electron conduction, with the change in the type of conduction subsequently brought about in that the donor, at a specified stage of the layer-assembly, is replaced by an acceptor, which causes hole-conduction in the basic material when it is deposited along with the latter.
  • the layer of the basic material such as germanium
  • acceptor which causes hole-conduction in the basic material when it is deposited along with the latter.
  • One also may begin by making a p-type conducting foundation to coat it subsequently with a thin n-type conducting lm.

Description

Feb. 1, 19,55 K SE|LER 2,701,216
METHOD OF MAKING SURFACEI-TYPE AND POINT-TYPE RECTIFIERS AND CRYSTAL-AMPLIFIER LAYERS FROM ELEMENTS Filed April 5. 1950 (ar/1 Gemor-n SI1 74) .Sftl H1861: mpemu/'ef A I ,n l 2 DB reacfimzane l -ll PUMP 8 Cl, 42!
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mem] mefu/ ydlf) Mn) v Maly/$8 1 mary/'name2 mlnimiz/'ngzane United States Patent O METHOD F MAKING SURFACE-TYPE AND POINT-TYPE RECTIFIERS AND CRYSTAL- AMPLIFIER LAYERS FROM ELEMENTS Karl Seiler, Numberg, Germany, assignor to International Standard Electric Corporation, New York, N. Y., a corporation of Delaware Application April 5, 1950, Serial No. 154,064
Claims priority, application Germany April 6, 1949 4 Claims. (Cl. 117-106) Unlike the large variety of point-type rectifiers (crystal diodes) there are only a few combinations of metals and semiconductors which exhibit a surface-type rectifying effect. Schottkys analysis of semiconductor rectification (see f. i. Zeitschrift fr Physik, vol. 118, 1942, pp. 539-592) sets forth several reasons which may serve to clarify this fact.
(1) The relative impurity concentration throughout the semiconductor should be a minimum in the zone of increased resistance immediately adjacent the metallic electrode, in order to avoid short-circuits. Any increase in the number of impurities in this zone means great probability of short-circuits due to so-called by-passes.
(2) In the adjacent semi-conducting zone, however, adequate conductivity has to be provided by lattice-disturbing (impurity) atoms sufiicient in number to greatly accentuate the zone mentioned in paragraph (l) where the so-called borderline effects take place.
To fulfil this requirement the disassociation level of the impurity atoms should be low (the impurity atoms should not diffuse readily), while the mobility of the electric carriers should be high. That only a few surface-type rectifications effects have been realized so far, derives from the fact that these two demands have not, or have hardly, been possible of fulfilment so far, for the known methods of making specified layer patterns are based exclusively on such processes where the space distribution of the impurities, is only obtained by modifications introduced by a secondary process by removing impurities at a suitable temperature, by chemical reaction (f. i. dissolving, lacquer-layers applied later on, etc.). Hence in making some specified layer pattern, the substances intended to produce the desired effects are placed at their respective locations in a first operation where no attention can be paid as to obtaining any specified space distribution of impurities, while that specified distribution, essential for proper performance, is brought about only subsequently in a second process governed by laws different from those of the rst one. Thus one has been forced to simply accept as given whatever impurity concentration and distribution resulted from that second process without the possibility of introducing such corrective action of ones own as might be desirable to secure optimum distribution of impurities across the layer. With regard to the fact that very delicate arrangements are involved with layers present only as extremely thin films, it is obvious that the probability of inadequate results is rather large if these two essential processes are practiced one after the other.
In rectiiiers involving compound-type semiconductors (in particular cuprous oxide) this fact is particularly pronounced as here the change in impurity concentration is caused by a chemical reaction which in turn is to introduce the stoichiometric unbalance of the semiconductor compound.
Generally a high impurity concentration is provided in the zones of the semiconductor more remote from the metallic electrode. But a certain maximum impurity concentration should not be exceeded in the zone of the semiconductor immediately adjacent the metallic electrode. This means that along the main direction of current ow the impurity concentration will have to obey a specified functional law, i. e. the dependence of the impurity concentration at a particular layer level will de- 8 pend on the distance between that layer and the metallic 2,701,216 Patented Feb. 1, 1955 ice electrode. This distance, however, is extremely small so it is obvious that rather erratic results are liable to occur in the few processes available for controlling the impurity concentration.
The drawbacks of the known methods are avoided in this invention by providing that the ultimate structure of the layer pattern is no longer obtained from two independent individual processes, but that the basic and the impurity substances are deposited simultaneously on the provided foundation, and that the specified relative impurity concentration lis controlled to lit the needs of each particular layer while the layer is being built, so thje desired space distribution of impurities is brought a out.
It is known that the elements boron, silicon, germanium, and tellurium have semiconducting properties. In view of the delicacy of the processes to be controlled, the degree of chemical purity of the substances coated on the foundation electrode is of outstanding importance in making rectifiers.
In order to achieve uniform results and to control the porportion of the impurity admixture, it might seem desirable to vaporize the semiconductor materials and the impurity substances and deposit them from the vaporous state onto a suitable foundation. However, due to the high vaporizing temperatures of the materials involved there is induced the hazards of chemical reactions of the basic material or even the impurity contents with the material of the Crucible which would produce uncontrolled and undesirable etfects on the rectifying properties.
In order to avoid such high temperatures in production, one starts out in the known way from a liquid compound of the elements involved which by chemical rectification and customary chemical purifying methods can be prepared with a very high degree of purity and which in turn may be reduced chemically under proper conditions upon reaction with some equally pure reducing agent. Simultaneously with this reduction, the impurity substance may be treated in the same manner. With the relatively ample choice present in selecting admixtures to semiconducting elements, there is usually found some suitable chemical reaction mechanism which enables simultaneously synthesizing the impurity admixture. In a functional schematic, the nature of the process to be adopted is indicated in Fig. l. A, B, C, and D refer schematically to devices where the substances needed for assembling the rectifying layer are obtained in their purest form by available processes according to what has been described above. As indicated schematically, these substances are then fed through pipes La, Lb, Lc, and Ld to the device E where the layer pattern is formed. In Fig. l, these pipes La and Lb directly feed the device E with no prior intermixing of the substances being possible. Of course, one, two, or even all of the pipes could be joined in a common duct whenever intermixing of the substances is desired or permissible at such a relatively early stage of the production process. Equally in a schematic manner are shown control mechanisms Ra, Rb, Rc, and Rd at some arbitrary point along the ducts which allow any desired decrease or increase in the feeding rate of any of the ingredients while the semiconducting system is being built up. It is by no means essential that these controlling devices be inserted somewhere between the units A and E, B and E, etc., these controlling facilities may as well be incorporated straight in the units A, B, C, D or any additional units that might be present. Care will have to be taken, however, to prevent undesired reactions on the other devices B, C, D whenever at the junction of the pipes or individual pipe ducts the gas or Vapor rate of device A is increased.
To practice this method, the elements boron, silicon, germanium, or tellurium may be used because of the high mobility of their electric carriers. To provide optimum efficiency, the impurity concentration at the back or counterelectrode is chosen large enough to prevent virtually any barrier layer from forming there.
As an example of the preparation of the semiconducting substance in building of a layer pattern, silicon may be reduced with hydrogen from silicon, tetrachloride or with zinc, in order to obtain pure silicon.
right, respectively, of silicon in the periodic table of elements act as acceptors anddonors, respectively, in the semiconductor. To synthetize a surface-type rectifying silicon layer, the basic material (silicon) and the impurity admixture (for example boron) are reduced simultaneously under the equations The production setup will have about the appearance outlined in Fig. 2. In the reaction oven O, the reaction product deposits on a conducting foundation, (for example, carbon, or other high-melting material not alloying with the basic material) or on some insulating foundation (aluminum oxide, or similar substances).
As boron is used in very low concentrations only, one preferably uses a mixture of boron chloride and silicon tetrachloride in the second feeder current.
Silicon may be provided with a small percentage of tin or germanium by adding SnCl4 or GeCl4 to the ow of SiCl4.
Other methods of introducing into the reaction the impurity material may consist for example of thermal decomposition out of a suitable compound or in adding it as an element to the outgoing ow.
The essential feature is that the impurity concentration is open to any programmed control during the buildingup of the semi-conducting layer.
In a similar way one may make surface-type rectifying discs from germanium, by reducing germanium tetrachloride along with tin tetrachloride or silicon tetrachloride or boron chloride in the presence of hydrogen, or by adding arsenic or antimonium to the current in the shape of a compound of these elements, with hydrogen.
The reducing agent will he so chosen that small amounts of it when dissolved, in the semiconductor will not result in any marked degree of conductivity, or that if such is the case -they will cause if possible the kind of conductivity that is wanted anyhow when adding the impurity. Hydrogen is a reducing agent of relatively very neutral character.
In case some metal having relatively high vapor pressure is being reduced, such as zinc, one may operate without a ilow. In Fig. 3, O refers to an electrically-operated tubular oven with two separate windings in series-connection. In the rear section, zinc vapor is generated which ows in the opposite direction to the mixture of silicon tetrachloride and boron chloride, or silicon tetrachloride and germanium tetrachloride, the fractional composition of which may be varied any time. In the reaction zone are again the bases on which the semiconducting material deposits. These mentioned methods may be extended to boron as well.
Another example is illustrated in Fig. 4, which however shows only the part indicated by E in Fig. l. In the inner tubing Ri, closed at one end--when required it may also be open at either end-there is fed from one side simultaneously some halogen compound or halogen compounds of the basic material as well as of the impurity material at suitable rates which undergo control during the reaction process as desired, and they are brought to reaction with some material reacting with either halogen (i. e. with that of the basic material as well as with that of the impurity material) so they deposit on bases placed in the reaction zone at a point where reducing material is not, or almost entirely not, deposited.
Thus pipe Rl may for instance be entered from the left by silicon tetrachloride and boron chloride while at the right aluminum is vaporized, so that from the right aluminum vapor or low-order aluminum halogens ows in a current opposing that of the aforenamed compounds. In the reaction zone, aluminum chloride is formed which has to flow left through the open end of the tube in a countercurrent to the entering substances. The carriers or bases are then placed in such a section of the reaction zone where no aluminum deposits as in this process it is boron that has to serve as the impurity admixture. If required, even tin or germanium may be deposited as impurity substances.
Tube R1 is surrounded by some outer shell Ra to which the vacuum pump connects at the right. The entire assembly is accommodated in an oven (not shown).
As obviously'the halogens entering the tube and those leaving it pass each other in opposite directions, it is convenient to direct these opposite ows by appropriate partitions. One may thus for example, partition the tube up to the reaction zone by a horizontal wall to feed silicon halogen and boron halogen in the lower half While the upper half serves for the return of the formed aluminum chlorides. Again, one may take to a concentric subdivision of tube R up to the reaction zone, in order to feed through the inner tubeA silicon tetrachloride and boron chloride, and to remove through the concentric ring space the halogens produced in the reaction. But one may even avoid this opposite current pattern by designing all of the rectier-making process as a like-current operation, with all of the agents participating in the reactions passing through the tube left or right in the same direction of flow. In this case, and in the selected example, aluminum or low-order chlorides of aluminum would be fed from the left to the reaction zone in a vaporized state through an extra duct, while all of the ingredients and those substances as are set up leave to the right with of course the depositing pure basic and impurity substances settling out somewhere at a suitable place on appropriate deposit-carriers. With the described process, one not only can expect uniformity of the output material, but there is further facilities for making rectiers with optimum properties by varying the percentages of the mixing basic and impurity substances.
In addition to aluminum, as a reducing agent there may be used zinc, hydrogen, etc. With aluminum as a reducing agent, the drawback is encountered that tube Rr in Fig. 4, which is conveniently made of quartz, is corroded by aluminum so it becomes useless before long. This even introduces changes in the reaction conditions which even may lead to a displacement of the reaction zone. To avoid this, the aluminum is conveniently inserted in a short tubular socket of sintered corundum-aluminum oxide--so the quartz tubing is protected.
The process of the present invention permits making surface-type rectiers with entirely symmetrical electrical characteristics (so-called limiters), if the local impurity concentration is held low not at the outside (i. e. the interface to an adjacent electrode) but in the center-layer of the semi-conductor. Fig. 5 shows the overall structural pattern of such a limiter where the impurity concentration is minimized in the center-layer over a layer thickness d. The thickness of the marginal zone bordering at the low-concentration zone is some lO-7 centimeters, or a few atoms across.
The effect of the thickness d of the low-concentration zone on the properties of the limiter, i. e. on the diffusion voltage level Vd (cutoff-voltage) is shown in Fig. 6. The current J has been plotted versus the voltage, and this for two different values of a'. Herewith, 1(2) exceeds d0), so even Va@ exceeds Vdl).
Particularly interesting is a layer pattern which results in a transistor effect. To this end it is essen-tial that the type of electric carriers changes right under the surface. Electron-conducting germanium crystals (n-type) which at the surface are modified for hole-conduction (p-type) have been described. This structure gives rise to a barrier layer at the interface of the n-type and p-type conducting germanium layers so the current of the emitter electrode is forced radially into the surface. It is only then that the barrier layer under the collector is so affected that the known power-amplifying control of same takes place.
In making such a transistor, known techniques start from solid n-type conducting germanium and then the surface is made p-type conducting by some particular treatment thereof. Such surface treatment obeys laws of its own, so only in the most exceptional cases will it perform the conversion from the n-type to the p-type in the Way required for optimum transistor operation. Hence, it is advantageous as provided in this invention to assemble a transistor from its basic elements so that on the foundation there is rst applied the layer of the basic material (such as germanium), along with a donor causing electron conduction, with the change in the type of conduction subsequently brought about in that the donor, at a specified stage of the layer-assembly, is replaced by an acceptor, which causes hole-conduction in the basic material when it is deposited along with the latter. One also may begin by making a p-type conducting foundation to coat it subsequently with a thin n-type conducting lm.
I claim:
1. In the method of making semi-conductors each having a plurality of diierent conductivity zones therein, the
steps of simultaneously depositing from the vapor state onto a base material a semi-conducting substance commingled with an impurity substance selected from a group consisting of donor and acceptor impurities, and varying the proportion of said substances while applying them to the base in the form of a. composite layer of said substances graduated in its cross-section as between amounts of the two substances applied.
2. Method according to claim 1, in which the semiconducting substances are chosen from the group consisting of boron, silicon, germanium and tellurium.
3. Method according to claim 1, in which the highest amount of impurity substance is applied adjacent the base material.
4. Method according to claim 1, in which the lowest amount of impurity substance is placed in the center portion of the layer.
References Cited in the ile of this patent UNITED STATES PATENTS Van Arkel Aug. 26, 1930 Hyde June 26, 1934 Prescott Oct. 8, 1940 Walther Mar. 9, 1943 Sanlaw Nov. 28, 1944 Essig Apr. 19, 1949 Martin Oct. 11, 1949 Henderson et al Mar. 2l, 1950 Fisher et al May 15, 1951 Teal June 12, 1951

Claims (1)

1. IN THE METHOD OF MAKING SEMI-CONDUCTORS EACH HAVING A PLURALITY OF DIFFERENT CONDUCTIVITY ZONES THEREIN, THE STEPS OF SIMULTANEOUSLY DEPOSITING FROM THE VAPOR STATE ONTO A BASE MATERIAL A SEMI-CONDUCTING SUBSTANCE COMMINGLED WITH AN IMPURITY SUBSTANCE SELECTED FROM A GROUP CONSISTING OF DONOR AND ACCEPTOR IMPURITIES, AND VARYING THE PROPORTION OF SAID SUBSTANCES WHILE APPLYING THEM TO THE BASE IN THE FORM OF A COMPOSITE LAYER OF SAID SUBSTANCES GRADUATED IN ITS CROSS-SECTION AS BETWEEN AMOUNTS OF THE TWO SUBSTANCES APPLIED.
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US3101280A (en) * 1961-04-05 1963-08-20 Ibm Method of preparing indium antimonide films
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US3168422A (en) * 1960-05-09 1965-02-02 Merck & Co Inc Process of flushing unwanted residue from a vapor deposition system in which silicon is being deposited
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US3170825A (en) * 1961-10-02 1965-02-23 Merck & Co Inc Delaying the introduction of impurities when vapor depositing an epitaxial layer on a highly doped substrate
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US3152932A (en) * 1962-01-29 1964-10-13 Hughes Aircraft Co Reduction in situ of a dipolar molecular gas adhering to a substrate
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US2762730A (en) * 1952-06-19 1956-09-11 Sylvania Electric Prod Method of making barriers in semiconductors
US2780569A (en) * 1952-08-20 1957-02-05 Gen Electric Method of making p-nu junction semiconductor units
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US2910394A (en) * 1953-10-02 1959-10-27 Int Standard Electric Corp Production of semi-conductor material for rectifiers
US3015590A (en) * 1954-03-05 1962-01-02 Bell Telephone Labor Inc Method of forming semiconductive bodies
US2854364A (en) * 1954-03-19 1958-09-30 Philips Corp Sublimation process for manufacturing silicon carbide crystals
US2928761A (en) * 1954-07-01 1960-03-15 Siemens Ag Methods of producing junction-type semi-conductor devices
US2868678A (en) * 1955-03-23 1959-01-13 Bell Telephone Labor Inc Method of forming large area pn junctions
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US3098774A (en) * 1960-05-02 1963-07-23 Mark Albert Process for producing single crystal silicon surface layers
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US3242018A (en) * 1960-07-01 1966-03-22 Siemens Ag Semiconductor device and method of producing it
US3101280A (en) * 1961-04-05 1963-08-20 Ibm Method of preparing indium antimonide films
US3211583A (en) * 1961-09-19 1965-10-12 Melpar Inc Pyrolytic deposition of germanium
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