US20170154905A1 - Thin film transistor and preparation method thereof, array substrate, and display panel - Google Patents
Thin film transistor and preparation method thereof, array substrate, and display panel Download PDFInfo
- Publication number
- US20170154905A1 US20170154905A1 US15/122,155 US201515122155A US2017154905A1 US 20170154905 A1 US20170154905 A1 US 20170154905A1 US 201515122155 A US201515122155 A US 201515122155A US 2017154905 A1 US2017154905 A1 US 2017154905A1
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- Prior art keywords
- layer
- thin film
- metal
- gate electrode
- drain electrode
- Prior art date
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- 239000010409 thin film Substances 0.000 title claims abstract description 231
- 239000000758 substrate Substances 0.000 title claims abstract description 70
- 238000002360 preparation method Methods 0.000 title claims abstract description 43
- 229910052751 metal Inorganic materials 0.000 claims abstract description 107
- 239000002184 metal Substances 0.000 claims abstract description 107
- 239000002082 metal nanoparticle Substances 0.000 claims abstract description 96
- 238000000034 method Methods 0.000 claims abstract description 73
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 61
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 61
- 238000002161 passivation Methods 0.000 claims abstract description 26
- 238000005530 etching Methods 0.000 claims abstract description 25
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 18
- 239000001301 oxygen Substances 0.000 claims abstract description 18
- 238000000059 patterning Methods 0.000 claims abstract description 17
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 11
- 230000001590 oxidative effect Effects 0.000 claims abstract description 7
- 239000010410 layer Substances 0.000 claims description 351
- 239000002105 nanoparticle Substances 0.000 claims description 31
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 25
- 239000010408 film Substances 0.000 claims description 24
- 239000002131 composite material Substances 0.000 claims description 17
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 15
- 229910052750 molybdenum Inorganic materials 0.000 claims description 15
- 239000011733 molybdenum Substances 0.000 claims description 15
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 14
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 14
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 14
- 238000005240 physical vapour deposition Methods 0.000 claims description 13
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 12
- 239000004642 Polyimide Substances 0.000 claims description 12
- 229910052802 copper Inorganic materials 0.000 claims description 12
- 239000010949 copper Substances 0.000 claims description 12
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 12
- UZLYXNNZYFBAQO-UHFFFAOYSA-N oxygen(2-);ytterbium(3+) Chemical compound [O-2].[O-2].[O-2].[Yb+3].[Yb+3] UZLYXNNZYFBAQO-UHFFFAOYSA-N 0.000 claims description 12
- 229920001721 polyimide Polymers 0.000 claims description 12
- 229910003454 ytterbium oxide Inorganic materials 0.000 claims description 12
- 229940075624 ytterbium oxide Drugs 0.000 claims description 12
- 229910052782 aluminium Inorganic materials 0.000 claims description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 11
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 11
- 230000004888 barrier function Effects 0.000 claims description 10
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 10
- 229910052737 gold Inorganic materials 0.000 claims description 10
- 239000010931 gold Substances 0.000 claims description 10
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 10
- -1 polyethylene naphthalate Polymers 0.000 claims description 9
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 8
- 229910052738 indium Inorganic materials 0.000 claims description 8
- 239000010936 titanium Substances 0.000 claims description 8
- 229910052719 titanium Inorganic materials 0.000 claims description 8
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 claims description 7
- 230000003139 buffering effect Effects 0.000 claims description 7
- 229910052759 nickel Inorganic materials 0.000 claims description 7
- 229920003229 poly(methyl methacrylate) Polymers 0.000 claims description 7
- 239000004926 polymethyl methacrylate Substances 0.000 claims description 7
- 229910052725 zinc Inorganic materials 0.000 claims description 7
- 229910052790 beryllium Inorganic materials 0.000 claims description 6
- ATBAMAFKBVZNFJ-UHFFFAOYSA-N beryllium atom Chemical compound [Be] ATBAMAFKBVZNFJ-UHFFFAOYSA-N 0.000 claims description 6
- 239000010941 cobalt Substances 0.000 claims description 6
- 229910017052 cobalt Inorganic materials 0.000 claims description 6
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 6
- 229910052733 gallium Inorganic materials 0.000 claims description 6
- 239000011521 glass Substances 0.000 claims description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 5
- FOIXSVOLVBLSDH-UHFFFAOYSA-N Silver ion Chemical compound [Ag+] FOIXSVOLVBLSDH-UHFFFAOYSA-N 0.000 claims description 5
- 238000000137 annealing Methods 0.000 claims description 5
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 claims description 5
- 229910052697 platinum Inorganic materials 0.000 claims description 5
- 229910052709 silver Inorganic materials 0.000 claims description 5
- 239000004332 silver Substances 0.000 claims description 5
- 239000002356 single layer Substances 0.000 claims description 5
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 claims description 5
- 229910000838 Al alloy Inorganic materials 0.000 claims description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 4
- 229910052804 chromium Inorganic materials 0.000 claims description 4
- 239000011651 chromium Substances 0.000 claims description 4
- 239000011888 foil Substances 0.000 claims description 4
- 229920003207 poly(ethylene-2,6-naphthalate) Polymers 0.000 claims description 4
- 239000011112 polyethylene naphthalate Substances 0.000 claims description 4
- 229920000139 polyethylene terephthalate Polymers 0.000 claims description 4
- 239000005020 polyethylene terephthalate Substances 0.000 claims description 4
- 238000005118 spray pyrolysis Methods 0.000 claims description 4
- 229910052715 tantalum Inorganic materials 0.000 claims description 4
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 4
- 229910052718 tin Inorganic materials 0.000 claims description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- 239000010937 tungsten Substances 0.000 claims description 4
- 238000005229 chemical vapour deposition Methods 0.000 claims description 3
- 238000001027 hydrothermal synthesis Methods 0.000 claims description 3
- 238000003980 solgel method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 32
- 238000000151 deposition Methods 0.000 description 16
- 230000007797 corrosion Effects 0.000 description 11
- 238000005260 corrosion Methods 0.000 description 11
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 6
- 239000000243 solution Substances 0.000 description 6
- 239000011701 zinc Substances 0.000 description 6
- 229910052681 coesite Inorganic materials 0.000 description 5
- 229910052906 cristobalite Inorganic materials 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 229910052682 stishovite Inorganic materials 0.000 description 5
- 229910052905 tridymite Inorganic materials 0.000 description 5
- 238000001039 wet etching Methods 0.000 description 5
- 230000002349 favourable effect Effects 0.000 description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 4
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000010030 laminating Methods 0.000 description 3
- 239000011259 mixed solution Substances 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 229910052593 corundum Inorganic materials 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 229910001845 yogo sapphire Inorganic materials 0.000 description 2
- 229920001621 AMOLED Polymers 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 230000002378 acidificating effect Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/08—Oxides
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- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/14—Metallic material, boron or silicon
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/223—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating specially adapted for coating particles
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
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- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/02—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by thermal decomposition
- C23C18/12—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by thermal decomposition characterised by the deposition of inorganic material other than metallic material
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- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/02—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by thermal decomposition
- C23C18/12—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by thermal decomposition characterised by the deposition of inorganic material other than metallic material
- C23C18/125—Process of deposition of the inorganic material
- C23C18/1258—Spray pyrolysis
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- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/02—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by thermal decomposition
- C23C18/12—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by thermal decomposition characterised by the deposition of inorganic material other than metallic material
- C23C18/125—Process of deposition of the inorganic material
- C23C18/1262—Process of deposition of the inorganic material involving particles, e.g. carbon nanotubes [CNT], flakes
- C23C18/127—Preformed particles
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- C23C20/00—Chemical coating by decomposition of either solid compounds or suspensions of the coating forming compounds, without leaving reaction products of surface material in the coating
- C23C20/02—Coating with metallic material
- C23C20/04—Coating with metallic material with metals
Definitions
- This disclosure relates to the technical field of semiconductors, and particularly to a thin film transistor and the preparation method thereof, an array substrate, and a display panel.
- Flat panel displays have become mainstream products in the market, and the types of flat panel displays are more and more, such as liquid crystal displays(LCDs), organic light-emitting diode (OLED) displays, plasma display panels (PDPs), field emission displays (FEDs), etc.
- LCDs liquid crystal displays
- OLED organic light-emitting diode
- PDPs plasma display panels
- FEDs field emission displays
- the thin film transistor (TFT) back panel technology is also experiencing deep revolution.
- MOTFTs metal oxide thin film transistors
- MOTFTs because of the characteristics of high mobility (approximately 5 to 50 centimeter 2 /volt ⁇ second), simple manufacture process, relatively low cost, excellent large-area uniformity, etc., the MOTFT technology has attracted a large number of attentions since it brought out.
- the structures mainly used in MOTFTs include a back channel etching structure and an etching barrier layer structure. Since the MOTFT of back channel etching structure has a relatively simple manufacture process which is the same as the conventional manufacture process of amorphous silicon and has relatively low equipment investment and production cost, it is considered to be the necessary development direction in which the large-scale mass production and wide utilization of MOTFTs are achieved.
- a MOTFT of back channel etching structure after an active layer is generated, a metal layer is deposited on the active layer and is patterned into a source electrode and a drain electrode.
- an etching barrier layer structure As for an etching barrier layer structure, after an active layer is generated, an etching barrier layer is first produced, and then a metal layer is deposited thereon and is patterned into a source electrode and a drain electrode.
- the problem of the active layer being corroded i.e., damage of MOTFT back channel, will occur by using either dry etching or wet etching.
- dry etching the active layer composed of metal oxide is prone to be damaged by ions, such that carrier traps are generated on the surface of exposed channels and the concentration of oxygen vacancies increases, resulting in poor device stability.
- wet etching the active layer composed of metal oxide is relatively sensitive to most acidic etching solutions and is prone to be corroded in the process of etching, such that the device performance will be greatly affected.
- An object of this disclosure is to provide a thin film transistor and the preparation method thereof, an array substrate, and a display panel, so as to solve the problem in the prior art that the active layer is prone to be corroded when a metal oxide thin film transistor is produced by using a back channel etching process.
- An embodiment of this disclosure provides a preparation method of a thin film transistor, comprising:
- a gate electrode metal thin film on a base substrate, and allowing the gate electrode metal thin film to form a gate electrode metal layer comprising a gate electrode by a patterning process;
- a source and drain electrode metal thin film on the base substrate on which the above processes are finished, and allowing the source and drain electrode metal thin film to form a source and drain electrode metal layer comprising a source electrode and a drain electrode by a patterning process, wherein the source electrode and the drain electrode cover a part of the metal nanoparticle layer;
- the metal nanoparticle layer as a protection layer of the active layer, the active layer can be protected when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer; and at the meanwhile, the metal nanoparticle layer has a good conductivity and good thermal stability, and the requirements for the preparation process of the metal oxide thin film transistor are relatively low, such that the preparation of the metal oxide thin film transistor by a simple process and a low cost is achieved.
- the metal nanoparticle layer is prepared by using at least one material of gold nanoparticles, silver nanoparticles, platinum nanoparticles, beryllium nanoparticles, nickel nanoparticles, and cobalt nanoparticles.
- the metal nanoparticle layer is prepared by using gold nanoparticles, silver nanoparticles, platinum nanoparticles, beryllium nanoparticles, nickel nanoparticles, cobalt nanoparticles, or the like, and the active layer can be protected when the source electrode and the drain electrode are subsequently etched, so as to prevent device badness caused by the corrosion of the active layer.
- the preparation of the metal nanoparticle layer on the active layer specifically comprises:
- preparing the metal nanoparticle layer on the active layer by using a physical vapor deposition, a chemical vapor deposition, a hydrothermal method, a sol-gel method, a spray pyrolysis method, or a hot wall method.
- the metal nanoparticle layer is prepared in a thickness of 1 to 5 nanometers.
- removing or oxidizing the part of the metal nanoparticle layer which is not covered by the source electrode and the drain electrode is performed by using oxygen plasma.
- a glass substrate having a buffering layer is used as the base substrate.
- a flexible substrate having a water-oxygen barrier layer is used as the base substrate, and polyethylene naphthalate, polyethylene terephthalate, a polyimide, or a metal foil is used as the material of the flexible substrate.
- the gate electrode metal thin film is prepared by using a single film layer of any one of an aluminum thin film, a copper thin film, a molybdenum thin film, a titanium thin film, a silver thin film, a gold thin film, a tantalum thin film, a tungsten thin film, a chromium thin film, and an aluminum alloy thin film, or a composite film layer composed of at least two of the thin films, and the gate electrode metal thin film is prepared in a thickness of 100 to 2000 nanometers.
- the gate electrode insulating layer is prepared by using a monolayer of a silicon oxide thin film, a silicon nitride thin film, an aluminum oxide thin film, a tantalum pentoxide thin film, or an ytterbium oxide thin film, or the gate electrode insulating layer is prepared by using a composite thin film composed of at least two monolayers of the thin films, and the gate electrode insulating layer is prepared in a thickness of 50 to 500 nanometers.
- the active layer is prepared by using a metal oxide containing at least one of In, Zn, Ga, and Sn, and the active layer is prepared in a thickness of 10 to 200 nanometers.
- the source and drain electrode metal thin film is prepared by using a single film layer of any one of an aluminum thin film, a copper thin film, a molybdenum thin film, and a titanium thin film, or a composite film layer composed of at least two or more of the thin films, and the source and drain electrode metal thin film is prepared in a thickness of 100 to 2000 nanometers.
- the passivation layer may be a single film layer of any one of or a composite film layer composed of at least two or more of silicon oxide, silicon nitride, aluminum oxide, ytterbium oxide, polyimides, benzocyclobutene, or polymethyl methacrylate.
- the passivation layer has a thickness of 50 to 2000 nanometers.
- An embodiment of this disclosure provides a thin film transistor, comprising:
- a gate electrode metal layer formed on the base substrate, wherein the gate electrode metal layer comprises a gate electrode
- a source and drain electrode metal layer formed on the metal nanoparticle layer, wherein the source and drain electrode metal layer comprises a source electrode and a drain electrode;
- An embodiment of this disclosure provides an array substrate, comprising the thin film transistor as provided by the above embodiment.
- An embodiment of this disclosure provides a display panel, comprising the array substrate as provided by the above embodiment.
- the embodiments of this disclosure have the advantageous effects as follows.
- the active layer may be protected when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer; and at the meanwhile, the metal nanoparticle layer has a good conductivity and good thermal stability, and the requirements for the preparation process of the metal oxide thin film transistor are relatively low, such that the preparation of the metal oxide thin film transistor by a simple process and a low cost is achieved.
- FIG. 1 is a flow chart of a preparation method of a metal oxide thin film transistor provided by an embodiment of this disclosure
- FIG. 2 is a structural schematic diagram of the metal oxide thin film transistor in which the gate electrode is prepared in an embodiment of this disclosure
- FIG. 3 is a structural schematic diagram of the metal oxide thin film transistor in which the gate electrode insulating layer is prepared in an embodiment of this disclosure
- FIG. 4 is a structural schematic diagram of the metal oxide thin film transistor in which the active layer is prepared in an embodiment of this disclosure
- FIG. 5 is a structural schematic diagram of the metal oxide thin film transistor in which the metal nanoparticle layer is prepared in an embodiment of this disclosure
- FIG. 6 is a structural schematic diagram of the metal oxide thin film transistor in which the source and drain electrode metal thin film is prepared in an embodiment of this disclosure
- FIG. 7 is a structural schematic diagram of the metal oxide thin film transistor in which the source electrode and the drain electrode are prepared in an embodiment of this disclosure
- FIG. 8 is a structural schematic diagram of the metal oxide thin film transistor in which the metal nanoparticle layer not covered by the source electrode and the drain electrode is removed in an embodiment of this disclosure
- FIG. 9 is a structural schematic diagram of the metal oxide thin film transistor in which the passivation layer is prepared in an embodiment of this disclosure.
- an embodiment of this disclosure provides a preparation method of a thin film transistor, comprising:
- a gate electrode metal thin film on a base substrate, and allowing the gate electrode metal thin film to form a gate electrode metal layer comprising a gate electrode by a patterning process.
- a glass substrate having a buffering layer may be used as the base substrate, and a flexible substrate having a water-oxygen barrier layer may also be used as the base substrate, preferably, polyethylene naphthalate, polyethylene terephthalate, a polyimide, or a metal foil is used as the material of the flexible substrate.
- a SiO 2 buffering layer or a Si 3 N 4 layer is used as the buffering layer on the glass substrate.
- an Al 2 O 3 layer, a Si 3 N 4 layer, a SiCN layer, a SiO x layer, a SiON layer, and a stacked composite structure thereof may be used as the water-oxygen barrier layer.
- the gate electrode metal thin film is prepared by using a single film layer of any one of an aluminum thin film, a copper thin film, a molybdenum thin film, a titanium thin film, a silver thin film, a gold thin film, a tantalum thin film, a tungsten thin film, a chromium thin film, and an aluminum alloy thin film, or a composite film layer composed of at least two of the thin films, and the gate electrode metal thin film is prepared in a thickness of 100 to 2000 nanometers.
- the gate electrode insulating layer is prepared by using a monolayer of a silicon oxide thin film, a silicon nitride thin film, an aluminum oxide thin film, a tantalum pentoxide thin film, or an ytterbium oxide thin film, or the gate electrode insulating layer is prepared by using a composite thin film composed of at least two monolayers of the thin films, and the gate electrode insulating layer is prepared in a thickness of 50 to 500 nanometers.
- the active layer is prepared by using a metal oxide containing at least one of In, Zn, Ga, and Sn, and the active layer is prepared in a thickness of 10 to 200 nanometers.
- the metal nanoparticle layer may be deposited by using a process such as a physical vapor deposition, a chemical vapor deposition, a hydrothermal method, a sol-gel method, a spray pyrolysis method, a hot wall method, etc.
- the metal nanoparticle layer is prepared by using at least one material of gold nanoparticles, silver nanoparticles, platinum nanoparticles, beryllium nanoparticles, nickel nanoparticles, and cobalt nanoparticles.
- the metal nanoparticle layer is prepared in a thickness of 1 to 5 nanometers.
- beryllium nanoparticles, nickel nanoparticles, and cobalt nanoparticles having lower cost may also be used for the metal nanoparticle layer.
- the metal nanoparticle layer may further comprise a process of performing annealing treatment on the metal nanoparticle layer.
- the active layer can be protected by the metal nanoparticle layer when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer.
- a source and drain electrode metal thin film on the base substrate on which the above processes are finished, allowing the source and drain electrode metal thin film to form a source and drain electrode metal layer comprising a source electrode and a drain electrode by a patterning process, wherein the source electrode and the drain electrode cover a part of the metal nanoparticle layer.
- the source and drain electrode metal thin film is prepared by using a single film layer of any one of an aluminum thin film, a copper thin film, a molybdenum thin film, and a titanium thin film, or a composite film layer composed of at least two of the thin films, and the source and drain electrode metal thin film is prepared in a thickness of 100 to 2000 nanometers.
- removing or oxidizing the part of the metal nanoparticle layer which is not covered by the source electrode and the drain electrode is performed by using oxygen plasma.
- the passivation layer is prepared by using a single film layer of any one of silicon oxide, silicon nitride, aluminum oxide, ytterbium oxide, polyimides, benzocyclobutene, and polymethyl methacrylate, or a composite film layer composed of at least two of silicon oxide, silicon nitride, aluminum oxide, ytterbium oxide, polyimides, benzocyclobutene, and polymethyl methacrylate, and the passivation layer is prepared in a thickness of 50 to 2000 nanometers.
- a method for protecting the active layer by using an organic conductive thin film in a back channel etching process of a metal oxide thin film transistor is also provided in the prior art, but the conductivity of silicon or carbon in the organic conductive thin film is relatively poor, which may lead to bad contact of the active layer with the source electrode and the drain electrode, such that the metal oxide thin film transistor is instable; and at the meanwhile, the thermal stability of the organic conductive thin film is poor and will be decomposed in subsequent procedures, resulting in instable or bad metal oxide thin film transistors, and the decomposed organic conductive thin film may contaminate the preparation equipment.
- the metal nanoparticle layer has a better thermal stability, is capable of protecting the active layer, enables the metal oxide thin film transistor thus prepared to be more stable, and will not contaminate the preparation equipment.
- the embodiments of this disclosure have the advantageous effects as follows.
- the metal nanoparticle layer as a protection layer of the active layer, the active layer can be protected when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer; and at the meanwhile, the metal nanoparticle layer has a good conductivity and is favorable to the achievement of good conductive contact with the source electrode and the drain electrode; the metal nanoparticle layer has a better thermal stability compared to the organic conductive thin film, and the requirements for the preparation process of the metal oxide thin film transistor are relatively low, such that the preparation of the metal oxide thin film transistor by a simple process and a low cost is achieved.
- This embodiment of this disclosure provides a first particular preparation method of a metal oxide thin film transistor, comprising:
- Step 1 depositing three layers of metal thin films of molybdenum/aluminum/molybdenum as a gate electrode metal thin film on a base substrate 1 by using a physical vapor deposition method, wherein the three layers of metal thin films of molybdenum/aluminum/molybdenum have thicknesses of 25/100/25 nanometers respectively, and allowing the gate electrode metal thin film to form a gate electrode 2 by a patterning process.
- the base substrate 1 is an alkali-free glass substrate with a SiO 2 buffering layer having a thickness of 200 nanometers.
- the schematic diagram after the gate electrode 2 is prepared on the base substrate 1 is shown in FIG. 2 .
- Step 2 depositing a gate electrode insulating layer 3 by using a plasma enhanced chemical vapor deposition method, on the base substrate 1 on which the above step is finished.
- the schematic diagram after the gate electrode insulating layer 3 is prepared is shown in FIG. 3 .
- the gate electrode insulating layer 3 is formed by laminating 300-nanometer SiN x and 30-nanometer SiO 2 .
- Step 3 depositing a metal oxide thin film on the gate electrode insulating layer 3 by using a physical vapor deposition method, and allowing the metal oxide thin film to form a pattern of an active layer 4 by a patterning process.
- the metal oxide thin film is an indium zinc oxide (IZO) thin film, wherein the atomic ratio of indium to zinc is 1:1.
- IZO indium zinc oxide
- Step 4 depositing a gold nanoparticle layer having a thickness of 5 nanometers as a metal nanoparticle layer 5 on the active layer 4 by using a physical vapor deposition method.
- the schematic diagram in which the metal nanoparticle layer 5 is prepared is shown in FIG. 5 .
- the active layer 4 can be protected by the metal nanoparticle layer 5 when the source electrode 7 and the drain electrode 8 (as shown in FIG. 7 ) are subsequently etched, so as to prevent the badness of the metal oxide thin film transistor caused by the corrosion of the active layer 4 .
- Step 4 it may further comprise a process of annealing the metal nanoparticle layer 5 in Step 4.
- Step 5 depositing laminated layers of molybdenum/aluminum/molybdenum, which have thicknesses of 25/100/25 nanometers respectively, as a source and drain electrode metal thin film 6 on the base substrate 1 on which the above processes are finished, by using a physical vapor deposition method.
- the schematic diagram in which the source and drain electrode metal thin film 6 is prepared is shown in FIG. 6 .
- a mixed solution of 30% H 2 O 2 and 1% KOH is used as a wet etching solution for etching the source and drain electrode metal thin film 6 to form a source electrode 7 and a drain electrode 8 , wherein the source electrode 7 and the drain electrode 8 cover a part of the metal nanoparticle layer 5 .
- the schematic diagram in which the source electrode 7 and the drain electrode 8 are prepared is shown in FIG. 7 .
- Step 6 removing the part of the metal nanoparticle layer 5 which is not covered by the source electrode 7 and the drain electrode 8 by using oxygen plasma.
- the schematic diagram after the part of the metal nanoparticle layer 5 not covered by the source electrode 7 and the drain electrode 8 is removed is shown in FIG. 8 .
- Step 7 depositing 300-nanometer SiO 2 as a passivation layer 9 on the base substrate 1 on which the above processes are finished, by using a plasma enhanced chemical vapor deposition method, i.e., forming a passivation layer 9 on the source and drain electrode metal layer comprising the source electrode 7 and the drain electrode 8 .
- a plasma enhanced chemical vapor deposition method i.e., forming a passivation layer 9 on the source and drain electrode metal layer comprising the source electrode 7 and the drain electrode 8 .
- the schematic diagram in which the passivation layer 9 is prepared is shown in FIG. 9 .
- the protection of the active layer 4 in the back channel etching process by using the metal nanoparticle layer 5 is more stable compared to the protection by an organic conductive thin film, and the metal nanoparticle layer 5 has a good conductivity, large surface roughness, and is very favorable to the achievement of good contact of the active layer 4 with the source electrode 7 and the drain electrode 8 .
- This embodiment of this disclosure provides a second particular preparation method of a metal oxide thin film transistor, comprising:
- Step 1 depositing a copper metal thin film as a gate electrode metal thin film on a base substrate 1 by using a physical vapor deposition method, wherein the copper metal thin film has a thickness of 500 nanometers, and allowing the gate electrode metal thin film to form a gate electrode 2 by a patterning process.
- the base substrate 1 is a flexible substrate with a water-oxygen barrier layer of Al 2 O 3 having a thickness of 50 nanometers.
- the schematic diagram after the gate electrode 2 is prepared on the base substrate 1 is shown in FIG. 2 .
- Step 2 depositing a gate electrode insulating layer 3 by using a plasma enhanced chemical vapor deposition method, on the base substrate 1 on which the above step is finished.
- the schematic diagram after the gate electrode insulating layer 3 is prepared is shown in FIG. 3 .
- the gate electrode insulating layer 3 is formed by laminating 200-nanometer aluminum oxide and 100-nanometer ytterbium oxide.
- Step 3 depositing a metal oxide thin film on the gate electrode insulating layer 3 by using a physical vapor deposition method, and allowing the metal oxide thin film to form a pattern of an active layer 4 by a patterning process.
- the metal oxide thin film is an 80-nanometer indium gallium zinc oxide (IGZO) thin film, wherein the atomic ratio of indium, gallium, and zinc is 1:1:1.
- IGZO indium gallium zinc oxide
- Step 4 preparing a nickel nanoparticle layer having a thickness of 2 nanometers as a metal nanoparticle layer 5 on the active layer 4 , by using a spray pyrolysis method.
- the schematic diagram in which the metal nanoparticle layer 5 is prepared is shown in FIG. 5 .
- the active layer 4 can be protected by the metal nanoparticle layer 5 when the source electrode 7 and the drain electrode 8 (as shown in FIG. 7 ) are subsequently etched, so as to prevent the badness of the metal oxide thin film transistor caused by the corrosion of the active layer 4 .
- Step 4 it may further comprise a process of annealing the metal nanoparticle layer 5 in Step 4.
- Step 5 depositing a copper metal thin film having a thicknesses of 500 nanometers as a source and drain electrode metal thin film 6 on the base substrate 1 on which the above processes are finished, by using a physical vapor deposition method.
- the schematic diagram in which the source and drain electrode metal thin film 6 is prepared is shown in FIG. 6 .
- a mixed solution of H 2 O 2 and H 2 SO 4 is used as a wet etching solution for etching the source and drain electrode metal thin film 6 to form a source electrode 7 and a drain electrode 8 , wherein the source electrode 7 and the drain electrode 8 cover a part of the metal nanoparticle layer 5 .
- the schematic diagram in which the source electrode 7 and the drain electrode 8 are prepared is shown in FIG. 7 .
- Step 6 removing the part of the metal nanoparticle layer 5 which is not covered by the source electrode 7 and the drain electrode 8 by using oxygen plasma.
- the schematic diagram after the part of the metal nanoparticle layer 5 not covered by the source electrode 7 and the drain electrode 8 is removed is shown in FIG. 8 .
- Step 7 depositing 800-nanometer polyimide as a passivation layer 9 on the base substrate 1 on which the above processes are finished, by using a plasma enhanced chemical vapor deposition method, i.e., forming a passivation layer 9 on the source and drain electrode metal layer comprising the source electrode 7 and the drain electrode 8 .
- a plasma enhanced chemical vapor deposition method i.e., forming a passivation layer 9 on the source and drain electrode metal layer comprising the source electrode 7 and the drain electrode 8 .
- the schematic diagram in which the passivation layer 9 is prepared is shown in FIG. 9 .
- the protection of the active layer 4 in the back channel etching process by using the metal nanoparticle layer 5 is more stable compared to the protection by an organic conductive thin film, and the metal nanoparticle layer has a good conductivity, a rough surface, and is very favorable to the achievement of good contact of the active layer 4 with the source electrode 7 and the drain electrode 8 .
- This embodiment of this disclosure provides a third particular preparation method of a metal oxide thin film transistor, comprising:
- Step 1 depositing an ITO thin film as a gate electrode metal thin film on a base substrate 1 by using a physical vapor deposition method, wherein the ITO thin film has a thickness of 200 nanometers, and allowing the gate electrode metal thin film to form a gate electrode 2 by a patterning process.
- the base substrate 1 is a flexible substrate with a water-oxygen barrier layer of Si 3 N 4 having a thickness of 200 nanometers.
- the schematic diagram after the gate electrode 2 is prepared on the base substrate 1 is shown in FIG. 2 .
- Step 2 depositing a gate electrode insulating layer 3 by using a plasma enhanced chemical vapor deposition method on the base substrate 1 on which the above step is finished.
- the schematic diagram after the gate electrode insulating layer 3 is prepared is shown in FIG. 3 .
- the gate electrode insulating layer 3 is formed by laminating 100-nanometer silicon oxide, 90-nanometer tantalum pentoxide, and 20-nanometer silicon dioxide.
- Step 3 depositing a metal oxide thin film on the gate electrode insulating layer 3 by using a physical vapor deposition method, and allowing the metal oxide thin film to form a pattern of an active layer 4 by a patterning process.
- the metal oxide thin film is a 50-nanometer IZO thin film, wherein the atomic ratio of indium to zinc is 1:1.
- the schematic diagram in which the active layer 4 is prepared is shown in FIG. 4 .
- Step 4 preparing a silver nanoparticle layer having a thickness of 3 nanometers as a metal nanoparticle layer 5 on the active layer 4 by using a solution treatment method.
- the schematic diagram in which the metal nanoparticle layer 5 is prepared is shown in FIG. 5 .
- the active layer 4 can be protected by the metal nanoparticle layer 5 when the source electrode 7 and the drain electrode 8 (as shown in FIG. 7 ) are subsequently etched, so as to prevent the badness of the metal oxide thin film transistor caused by the corrosion of the active layer 4 .
- Step 4 it may further comprise a process of annealing the metal nanoparticle layer 5 in Step 4.
- Step 5 depositing a copper metal thin film, which is a monolayer molybdenum thin film and has a thicknesses of 200 nanometers, as a source and drain electrode metal thin film 6 on the base substrate 1 on which the above processes are finished, by using a physical vapor deposition method.
- the schematic diagram in which the source and drain electrode metal thin film 6 is prepared is shown in FIG. 6 .
- a mixed solution of H 2 O 2 and H 2 SO 4 is used as a wet etching solution for etching the source and drain electrode metal thin film 6 to form a source electrode 7 and a drain electrode 8 , wherein the source electrode 7 and the drain electrode 8 cover a part of the metal nanoparticle layer 5 .
- the schematic diagram in which the source electrode 7 and the drain electrode 8 are prepared is shown in FIG. 7 .
- Step 6 removing the part of the metal nanoparticle layer 5 which is not covered by the source electrode 7 and the drain electrode 8 by using oxygen plasma.
- the schematic diagram after the part of the metal nanoparticle layer 5 not covered by the source electrode 7 and the drain electrode 8 is removed is shown in FIG. 8 .
- Step 7 depositing 300-nanometer SiO 2 as a passivation layer 9 on the base substrate 1 on which the above processes are finished, by using a plasma enhanced chemical vapor deposition method, i.e., forming a passivation layer 9 on the source and drain electrode metal layer comprising the source electrode 7 and the drain electrode 8 .
- a plasma enhanced chemical vapor deposition method i.e., forming a passivation layer 9 on the source and drain electrode metal layer comprising the source electrode 7 and the drain electrode 8 .
- the schematic diagram in which the passivation layer 9 is prepared is shown in FIG. 9 .
- the protection of the active layer 4 in the back channel etching process by using the metal nanoparticle layer 5 is more stable compared to the protection by an organic conductive thin film, and the metal nanoparticle layer has a good conductivity, a rough surface, and is very favorable to the achievement of good contact of the active layer 4 with the source electrode 7 and the drain electrode 8 .
- the above embodiments 1 to 3 are merely a part of specific embodiments provided to illustrate this disclosure, and this disclosure is not limited thereto.
- the prepared metal oxide thin film transistors may be used in liquid crystal displays and active matrix organic light-emitting diode displays. Thicknesses of thin films, constituent materials, proportioning ratios, etc., involved in each step in embodiments 1 to 3 may be adjusted according to practical requirements.
- one embodiment of this disclosure further provides a thin film transistor, which is a metal oxide thin film transistor, comprising:
- a gate electrode metal layer formed on the base substrate 1 , wherein the gate electrode metal layer comprises a gate electrode 2 ;
- a source and drain electrode metal layer formed on the metal nanoparticle layer 5 , wherein the source and drain electrode metal layer comprises a source electrode 7 and a drain electrode 8 ;
- the part indicated by the dashed frame 10 is the removed part of metal nanoparticle layer 5 , which is removed after the source electrode 7 and the drain electrode 8 are formed.
- This part of the metal nanoparticle layer 5 which should be removed, can protect the active layer 4 when the source electrode 7 and the drain electrode 8 are prepared.
- the metal nanoparticle layer 5 comprises at least one material of gold nanoparticles, silver nanoparticles, platinum nanoparticles, beryllium nanoparticles, nickel nanoparticles, and cobalt nanoparticles.
- the metal nanoparticle layer 5 has a thickness of 1 to 5 nanometers.
- the base substrate 1 is a glass substrate having a buffering layer.
- the base substrate 1 is a flexible substrate having a water-oxygen barrier layer, and the material of the flexible substrate is polyethylene naphthalate, polyethylene terephthalate, a polyimide, or a metal foil.
- the gate electrode metal layer is a single film layer of any one of an aluminum thin film, a copper thin film, a molybdenum thin film, a titanium thin film, a silver thin film, a gold thin film, a tantalum thin film, a tungsten thin film, a chromium thin film, and an aluminum alloy thin film, or a composite film layer composed of at least two of the thin films, and the gate electrode metal layer has a thickness of 100 to 2000 nanometers. It is to be indicated that the material and the thickness of the gate electrode metal layer herein are those of the gate electrode metal thin film in the preparation method.
- the gate electrode insulating layer 3 is a monolayer of a silicon oxide thin film, a silicon nitride thin film, an aluminum oxide thin film, a tantalum pentoxide thin film, or an ytterbium oxide thin film, or the gate electrode insulating layer 3 is a composite thin film composed of at least two monolayers of the thin films, and the gate electrode insulating layer 3 has a thickness of 50 to 500 nanometer.
- the active layer 4 contains a metal oxide of at least one of In, Zn, Ga, and Sn, the active layer 4 has a thickness of 10 to 200 nanometers.
- the source and drain electrode metal layer is a single film layer of any one of an aluminum thin film, a copper thin film, a molybdenum thin film, and a titanium thin film, or a composite film layer composed of at least two of the thin films, the source and drain electrode metal layer has a thickness of 100 to 2000 nanometers. It is to be indicated that the material and the thickness of the source and drain electrode metal layer herein are those of the source and drain electrode metal thin film in the preparation method.
- the passivation layer 9 may be a single film layer of any one of silicon oxide, silicon nitride, aluminum oxide, ytterbium oxide, polyimides, benzocyclobutene, and polymethyl methacrylate, or a composite film layer composed of at least two of silicon oxide, silicon nitride, aluminum oxide, ytterbium oxide, polyimides, benzocyclobutene, and polymethyl methacrylate.
- the passivation layer 9 has a thickness of 50 to 2000 nanometers.
- the embodiment of this disclosure has the advantageous effects as follows.
- the metal nanoparticle layer as a protection layer of the active layer, the active layer can be protected when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer; and at the meanwhile, the metal nanoparticle layer has a good conductivity and good thermal stability, and the requirements for the preparation process of the metal oxide thin film transistor are relatively low, such that the preparation of the metal oxide thin film transistor by a simple process and a low cost is achieved.
- one embodiment of this disclosure further provides an array substrate, comprising the thin film transistor as provided by the above embodiment.
- the metal oxide thin film transistor uses the metal nanoparticle layer as a protection layer of the active layer, and the active layer can be protected when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer; and at the meanwhile, the metal nanoparticle layer has a good conductivity and good thermal stability, and the requirements for the preparation process of the metal oxide thin film transistor are relatively low, such that the preparation of the metal oxide thin film transistor by a simple process and a low cost is achieved.
- one embodiment of this disclosure provides a display panel, comprising the array substrate as provided by the above embodiment.
- the metal oxide thin film transistor uses the metal nanoparticle layer as a protection layer of the active layer, and the active layer can be protected when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer; and at the meanwhile, the metal nanoparticle layer has a good conductivity and good thermal stability, and the requirements for the preparation process of the metal oxide thin film transistor are relatively low, such that the preparation of the metal oxide thin film transistor by a simple process and a low cost is achieved.
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Abstract
Description
- This disclosure relates to the technical field of semiconductors, and particularly to a thin film transistor and the preparation method thereof, an array substrate, and a display panel.
- Flat panel displays (FPD) have become mainstream products in the market, and the types of flat panel displays are more and more, such as liquid crystal displays(LCDs), organic light-emitting diode (OLED) displays, plasma display panels (PDPs), field emission displays (FEDs), etc.
- The thin film transistor (TFT) back panel technology, as the core technology in FPD industry, is also experiencing deep revolution. In particular, with respect to metal oxide thin film transistors (MOTFTs), because of the characteristics of high mobility (approximately 5 to 50 centimeter2/volt·second), simple manufacture process, relatively low cost, excellent large-area uniformity, etc., the MOTFT technology has attracted a large number of attentions since it brought out.
- At present, the structures mainly used in MOTFTs include a back channel etching structure and an etching barrier layer structure. Since the MOTFT of back channel etching structure has a relatively simple manufacture process which is the same as the conventional manufacture process of amorphous silicon and has relatively low equipment investment and production cost, it is considered to be the necessary development direction in which the large-scale mass production and wide utilization of MOTFTs are achieved. In a MOTFT of back channel etching structure, after an active layer is generated, a metal layer is deposited on the active layer and is patterned into a source electrode and a drain electrode. As for an etching barrier layer structure, after an active layer is generated, an etching barrier layer is first produced, and then a metal layer is deposited thereon and is patterned into a source electrode and a drain electrode. However, when the source electrode and the drain electrode are etched on the active layer, the problem of the active layer being corroded, i.e., damage of MOTFT back channel, will occur by using either dry etching or wet etching. For example, when dry etching is used, the active layer composed of metal oxide is prone to be damaged by ions, such that carrier traps are generated on the surface of exposed channels and the concentration of oxygen vacancies increases, resulting in poor device stability. For further example, when wet etching is used, the active layer composed of metal oxide is relatively sensitive to most acidic etching solutions and is prone to be corroded in the process of etching, such that the device performance will be greatly affected.
- An object of this disclosure is to provide a thin film transistor and the preparation method thereof, an array substrate, and a display panel, so as to solve the problem in the prior art that the active layer is prone to be corroded when a metal oxide thin film transistor is produced by using a back channel etching process.
- The object of this disclosure is achieved by the following technical solutions.
- An embodiment of this disclosure provides a preparation method of a thin film transistor, comprising:
- forming a gate electrode metal thin film on a base substrate, and allowing the gate electrode metal thin film to form a gate electrode metal layer comprising a gate electrode by a patterning process;
- forming a gate electrode insulating layer on the gate electrode metal layer;
- forming a metal oxide thin film on the gate electrode insulating layer, and allowing the metal oxide thin film to form a pattern of an active layer by a patterning process;
- preparing a metal nanoparticle layer on the active layer, said metal nanoparticle layer being used as an etching protection layer;
- forming a source and drain electrode metal thin film on the base substrate on which the above processes are finished, and allowing the source and drain electrode metal thin film to form a source and drain electrode metal layer comprising a source electrode and a drain electrode by a patterning process, wherein the source electrode and the drain electrode cover a part of the metal nanoparticle layer;
- removing or oxidizing the part of the metal nanoparticle layer which is not covered by the source electrode and the drain electrode in an oxygen-containing atmosphere; and
- forming a passivation layer on the source and drain electrode metal layer.
- In this embodiment, by using the metal nanoparticle layer as a protection layer of the active layer, the active layer can be protected when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer; and at the meanwhile, the metal nanoparticle layer has a good conductivity and good thermal stability, and the requirements for the preparation process of the metal oxide thin film transistor are relatively low, such that the preparation of the metal oxide thin film transistor by a simple process and a low cost is achieved.
- Preferably, the metal nanoparticle layer is prepared by using at least one material of gold nanoparticles, silver nanoparticles, platinum nanoparticles, beryllium nanoparticles, nickel nanoparticles, and cobalt nanoparticles. In this embodiment, the metal nanoparticle layer is prepared by using gold nanoparticles, silver nanoparticles, platinum nanoparticles, beryllium nanoparticles, nickel nanoparticles, cobalt nanoparticles, or the like, and the active layer can be protected when the source electrode and the drain electrode are subsequently etched, so as to prevent device badness caused by the corrosion of the active layer.
- Preferably, the preparation of the metal nanoparticle layer on the active layer specifically comprises:
- preparing the metal nanoparticle layer on the active layer by using a physical vapor deposition, a chemical vapor deposition, a hydrothermal method, a sol-gel method, a spray pyrolysis method, or a hot wall method.
- Preferably, the metal nanoparticle layer is prepared in a thickness of 1 to 5 nanometers.
- Preferably, removing or oxidizing the part of the metal nanoparticle layer which is not covered by the source electrode and the drain electrode is performed by using oxygen plasma.
- Preferably, a glass substrate having a buffering layer is used as the base substrate.
- Preferably, a flexible substrate having a water-oxygen barrier layer is used as the base substrate, and polyethylene naphthalate, polyethylene terephthalate, a polyimide, or a metal foil is used as the material of the flexible substrate.
- Preferably, the gate electrode metal thin film is prepared by using a single film layer of any one of an aluminum thin film, a copper thin film, a molybdenum thin film, a titanium thin film, a silver thin film, a gold thin film, a tantalum thin film, a tungsten thin film, a chromium thin film, and an aluminum alloy thin film, or a composite film layer composed of at least two of the thin films, and the gate electrode metal thin film is prepared in a thickness of 100 to 2000 nanometers.
- Preferably, the gate electrode insulating layer is prepared by using a monolayer of a silicon oxide thin film, a silicon nitride thin film, an aluminum oxide thin film, a tantalum pentoxide thin film, or an ytterbium oxide thin film, or the gate electrode insulating layer is prepared by using a composite thin film composed of at least two monolayers of the thin films, and the gate electrode insulating layer is prepared in a thickness of 50 to 500 nanometers.
- Preferably, the active layer is prepared by using a metal oxide containing at least one of In, Zn, Ga, and Sn, and the active layer is prepared in a thickness of 10 to 200 nanometers.
- Preferably, the source and drain electrode metal thin film is prepared by using a single film layer of any one of an aluminum thin film, a copper thin film, a molybdenum thin film, and a titanium thin film, or a composite film layer composed of at least two or more of the thin films, and the source and drain electrode metal thin film is prepared in a thickness of 100 to 2000 nanometers.
- Preferably, the passivation layer may be a single film layer of any one of or a composite film layer composed of at least two or more of silicon oxide, silicon nitride, aluminum oxide, ytterbium oxide, polyimides, benzocyclobutene, or polymethyl methacrylate. Preferably, the passivation layer has a thickness of 50 to 2000 nanometers.
- An embodiment of this disclosure provides a thin film transistor, comprising:
- a base substrate;
- a gate electrode metal layer formed on the base substrate, wherein the gate electrode metal layer comprises a gate electrode;
- a gate electrode insulating layer formed on the gate electrode metal layer;
- an active layer formed on the gate electrode insulating layer;
- a metal nanoparticle layer formed on the active layer, wherein the metal nanoparticle layer is used as an etching protection layer;
- a source and drain electrode metal layer formed on the metal nanoparticle layer, wherein the source and drain electrode metal layer comprises a source electrode and a drain electrode; and
- a passivation layer formed on the source and drain electrode metal layer.
- An embodiment of this disclosure provides an array substrate, comprising the thin film transistor as provided by the above embodiment.
- An embodiment of this disclosure provides a display panel, comprising the array substrate as provided by the above embodiment.
- The embodiments of this disclosure have the advantageous effects as follows. By using the metal nanoparticle layer as a protection layer of the active layer, the active layer may be protected when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer; and at the meanwhile, the metal nanoparticle layer has a good conductivity and good thermal stability, and the requirements for the preparation process of the metal oxide thin film transistor are relatively low, such that the preparation of the metal oxide thin film transistor by a simple process and a low cost is achieved.
-
FIG. 1 is a flow chart of a preparation method of a metal oxide thin film transistor provided by an embodiment of this disclosure; -
FIG. 2 is a structural schematic diagram of the metal oxide thin film transistor in which the gate electrode is prepared in an embodiment of this disclosure; -
FIG. 3 is a structural schematic diagram of the metal oxide thin film transistor in which the gate electrode insulating layer is prepared in an embodiment of this disclosure; -
FIG. 4 is a structural schematic diagram of the metal oxide thin film transistor in which the active layer is prepared in an embodiment of this disclosure; -
FIG. 5 is a structural schematic diagram of the metal oxide thin film transistor in which the metal nanoparticle layer is prepared in an embodiment of this disclosure; -
FIG. 6 is a structural schematic diagram of the metal oxide thin film transistor in which the source and drain electrode metal thin film is prepared in an embodiment of this disclosure; -
FIG. 7 is a structural schematic diagram of the metal oxide thin film transistor in which the source electrode and the drain electrode are prepared in an embodiment of this disclosure; -
FIG. 8 is a structural schematic diagram of the metal oxide thin film transistor in which the metal nanoparticle layer not covered by the source electrode and the drain electrode is removed in an embodiment of this disclosure; -
FIG. 9 is a structural schematic diagram of the metal oxide thin film transistor in which the passivation layer is prepared in an embodiment of this disclosure. - The processes for achieving embodiments of this disclosure are described below in detail in conjunction with the accompanying drawings. It is to be noted that the same or similar numerals represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are merely used for explaining the present invention, and cannot be construed to be limitations of this invention.
- With reference to
FIG. 1 , an embodiment of this disclosure provides a preparation method of a thin film transistor, comprising: - 101, forming a gate electrode metal thin film on a base substrate, and allowing the gate electrode metal thin film to form a gate electrode metal layer comprising a gate electrode by a patterning process.
- According to different particular applications of the metal oxide thin film transistor, a glass substrate having a buffering layer may be used as the base substrate, and a flexible substrate having a water-oxygen barrier layer may also be used as the base substrate, preferably, polyethylene naphthalate, polyethylene terephthalate, a polyimide, or a metal foil is used as the material of the flexible substrate. Preferably, a SiO2 buffering layer or a Si3N4 layer is used as the buffering layer on the glass substrate. Preferably, an Al2O3 layer, a Si3N4 layer, a SiCN layer, a SiOx layer, a SiON layer, and a stacked composite structure thereof may be used as the water-oxygen barrier layer.
- Preferably, the gate electrode metal thin film is prepared by using a single film layer of any one of an aluminum thin film, a copper thin film, a molybdenum thin film, a titanium thin film, a silver thin film, a gold thin film, a tantalum thin film, a tungsten thin film, a chromium thin film, and an aluminum alloy thin film, or a composite film layer composed of at least two of the thin films, and the gate electrode metal thin film is prepared in a thickness of 100 to 2000 nanometers.
- 102, forming a gate electrode insulating layer on the gate electrode metal layer.
- Preferably, the gate electrode insulating layer is prepared by using a monolayer of a silicon oxide thin film, a silicon nitride thin film, an aluminum oxide thin film, a tantalum pentoxide thin film, or an ytterbium oxide thin film, or the gate electrode insulating layer is prepared by using a composite thin film composed of at least two monolayers of the thin films, and the gate electrode insulating layer is prepared in a thickness of 50 to 500 nanometers.
- 103, forming a metal oxide thin film on the gate electrode insulating layer, and allowing the metal oxide thin film to form a pattern of an active layer by a patterning process.
- Preferably, the active layer is prepared by using a metal oxide containing at least one of In, Zn, Ga, and Sn, and the active layer is prepared in a thickness of 10 to 200 nanometers.
- 104, preparing a metal nanoparticle layer on the active layer, said metal nanoparticle layer being used as an etching protection layer.
- Specifically, the metal nanoparticle layer may be deposited by using a process such as a physical vapor deposition, a chemical vapor deposition, a hydrothermal method, a sol-gel method, a spray pyrolysis method, a hot wall method, etc.
- The metal nanoparticle layer is prepared by using at least one material of gold nanoparticles, silver nanoparticles, platinum nanoparticles, beryllium nanoparticles, nickel nanoparticles, and cobalt nanoparticles. Preferably, the metal nanoparticle layer is prepared in a thickness of 1 to 5 nanometers. Of course, in view of cost, one or more of beryllium nanoparticles, nickel nanoparticles, and cobalt nanoparticles having lower cost may also be used for the metal nanoparticle layer.
- It is to be indicated that after the metal nanoparticle layer is deposited, it may further comprise a process of performing annealing treatment on the metal nanoparticle layer.
- In this embodiment, the active layer can be protected by the metal nanoparticle layer when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer.
- 105, forming a source and drain electrode metal thin film on the base substrate on which the above processes are finished, allowing the source and drain electrode metal thin film to form a source and drain electrode metal layer comprising a source electrode and a drain electrode by a patterning process, wherein the source electrode and the drain electrode cover a part of the metal nanoparticle layer.
- Preferably, the source and drain electrode metal thin film is prepared by using a single film layer of any one of an aluminum thin film, a copper thin film, a molybdenum thin film, and a titanium thin film, or a composite film layer composed of at least two of the thin films, and the source and drain electrode metal thin film is prepared in a thickness of 100 to 2000 nanometers.
- 106, removing or oxidizing the part of the metal nanoparticle layer which is not covered by the source electrode and the drain electrode in an oxygen-containing atmosphere.
- Preferably, removing or oxidizing the part of the metal nanoparticle layer which is not covered by the source electrode and the drain electrode is performed by using oxygen plasma.
- 107, forming a passivation layer on the source and drain electrode metal layer.
- Preferably, the passivation layer is prepared by using a single film layer of any one of silicon oxide, silicon nitride, aluminum oxide, ytterbium oxide, polyimides, benzocyclobutene, and polymethyl methacrylate, or a composite film layer composed of at least two of silicon oxide, silicon nitride, aluminum oxide, ytterbium oxide, polyimides, benzocyclobutene, and polymethyl methacrylate, and the passivation layer is prepared in a thickness of 50 to 2000 nanometers.
- It is to be indicated that a method for protecting the active layer by using an organic conductive thin film in a back channel etching process of a metal oxide thin film transistor is also provided in the prior art, but the conductivity of silicon or carbon in the organic conductive thin film is relatively poor, which may lead to bad contact of the active layer with the source electrode and the drain electrode, such that the metal oxide thin film transistor is instable; and at the meanwhile, the thermal stability of the organic conductive thin film is poor and will be decomposed in subsequent procedures, resulting in instable or bad metal oxide thin film transistors, and the decomposed organic conductive thin film may contaminate the preparation equipment. Compared to the organic conductive thin film, the metal nanoparticle layer has a better thermal stability, is capable of protecting the active layer, enables the metal oxide thin film transistor thus prepared to be more stable, and will not contaminate the preparation equipment.
- The embodiments of this disclosure have the advantageous effects as follows. By using the metal nanoparticle layer as a protection layer of the active layer, the active layer can be protected when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer; and at the meanwhile, the metal nanoparticle layer has a good conductivity and is favorable to the achievement of good conductive contact with the source electrode and the drain electrode; the metal nanoparticle layer has a better thermal stability compared to the organic conductive thin film, and the requirements for the preparation process of the metal oxide thin film transistor are relatively low, such that the preparation of the metal oxide thin film transistor by a simple process and a low cost is achieved.
- In order to describe the preparation method of the metal oxide thin film transistor provided by this disclosure in more detail, embodiments are provided in conjunction with
FIG. 2 toFIG. 9 as follows. - This embodiment of this disclosure provides a first particular preparation method of a metal oxide thin film transistor, comprising:
-
Step 1, depositing three layers of metal thin films of molybdenum/aluminum/molybdenum as a gate electrode metal thin film on abase substrate 1 by using a physical vapor deposition method, wherein the three layers of metal thin films of molybdenum/aluminum/molybdenum have thicknesses of 25/100/25 nanometers respectively, and allowing the gate electrode metal thin film to form agate electrode 2 by a patterning process. Thebase substrate 1 is an alkali-free glass substrate with a SiO2 buffering layer having a thickness of 200 nanometers. The schematic diagram after thegate electrode 2 is prepared on thebase substrate 1 is shown inFIG. 2 . -
Step 2, depositing a gateelectrode insulating layer 3 by using a plasma enhanced chemical vapor deposition method, on thebase substrate 1 on which the above step is finished. The schematic diagram after the gateelectrode insulating layer 3 is prepared is shown inFIG. 3 . - The gate electrode insulating
layer 3 is formed by laminating 300-nanometer SiNx and 30-nanometer SiO2. -
Step 3, depositing a metal oxide thin film on the gateelectrode insulating layer 3 by using a physical vapor deposition method, and allowing the metal oxide thin film to form a pattern of anactive layer 4 by a patterning process. The metal oxide thin film is an indium zinc oxide (IZO) thin film, wherein the atomic ratio of indium to zinc is 1:1. The schematic diagram in which theactive layer 4 is prepared is shown inFIG. 4 . -
Step 4, depositing a gold nanoparticle layer having a thickness of 5 nanometers as ametal nanoparticle layer 5 on theactive layer 4 by using a physical vapor deposition method. The schematic diagram in which themetal nanoparticle layer 5 is prepared is shown inFIG. 5 . - The
active layer 4 can be protected by themetal nanoparticle layer 5 when thesource electrode 7 and the drain electrode 8 (as shown inFIG. 7 ) are subsequently etched, so as to prevent the badness of the metal oxide thin film transistor caused by the corrosion of theactive layer 4. - It is to be indicated that it may further comprise a process of annealing the
metal nanoparticle layer 5 inStep 4. -
Step 5, depositing laminated layers of molybdenum/aluminum/molybdenum, which have thicknesses of 25/100/25 nanometers respectively, as a source and drain electrode metalthin film 6 on thebase substrate 1 on which the above processes are finished, by using a physical vapor deposition method. The schematic diagram in which the source and drain electrode metalthin film 6 is prepared is shown inFIG. 6 . - A mixed solution of 30% H2O2 and 1% KOH is used as a wet etching solution for etching the source and drain electrode metal
thin film 6 to form asource electrode 7 and adrain electrode 8, wherein thesource electrode 7 and thedrain electrode 8 cover a part of themetal nanoparticle layer 5. The schematic diagram in which thesource electrode 7 and thedrain electrode 8 are prepared is shown inFIG. 7 . -
Step 6, removing the part of themetal nanoparticle layer 5 which is not covered by thesource electrode 7 and thedrain electrode 8 by using oxygen plasma. The schematic diagram after the part of themetal nanoparticle layer 5 not covered by thesource electrode 7 and thedrain electrode 8 is removed is shown inFIG. 8 . -
Step 7, depositing 300-nanometer SiO2 as apassivation layer 9 on thebase substrate 1 on which the above processes are finished, by using a plasma enhanced chemical vapor deposition method, i.e., forming apassivation layer 9 on the source and drain electrode metal layer comprising thesource electrode 7 and thedrain electrode 8. The schematic diagram in which thepassivation layer 9 is prepared is shown inFIG. 9 . - It is practically found that the protection of the
active layer 4 in the back channel etching process by using themetal nanoparticle layer 5 is more stable compared to the protection by an organic conductive thin film, and themetal nanoparticle layer 5 has a good conductivity, large surface roughness, and is very favorable to the achievement of good contact of theactive layer 4 with thesource electrode 7 and thedrain electrode 8. - This embodiment of this disclosure provides a second particular preparation method of a metal oxide thin film transistor, comprising:
-
Step 1, depositing a copper metal thin film as a gate electrode metal thin film on abase substrate 1 by using a physical vapor deposition method, wherein the copper metal thin film has a thickness of 500 nanometers, and allowing the gate electrode metal thin film to form agate electrode 2 by a patterning process. Thebase substrate 1 is a flexible substrate with a water-oxygen barrier layer of Al2O3 having a thickness of 50 nanometers. The schematic diagram after thegate electrode 2 is prepared on thebase substrate 1 is shown inFIG. 2 . -
Step 2, depositing a gateelectrode insulating layer 3 by using a plasma enhanced chemical vapor deposition method, on thebase substrate 1 on which the above step is finished. The schematic diagram after the gateelectrode insulating layer 3 is prepared is shown inFIG. 3 . - The gate electrode insulating
layer 3 is formed by laminating 200-nanometer aluminum oxide and 100-nanometer ytterbium oxide. -
Step 3, depositing a metal oxide thin film on the gateelectrode insulating layer 3 by using a physical vapor deposition method, and allowing the metal oxide thin film to form a pattern of anactive layer 4 by a patterning process. The metal oxide thin film is an 80-nanometer indium gallium zinc oxide (IGZO) thin film, wherein the atomic ratio of indium, gallium, and zinc is 1:1:1. The schematic diagram in which theactive layer 4 is prepared is shown inFIG. 4 . -
Step 4, preparing a nickel nanoparticle layer having a thickness of 2 nanometers as ametal nanoparticle layer 5 on theactive layer 4, by using a spray pyrolysis method. The schematic diagram in which themetal nanoparticle layer 5 is prepared is shown inFIG. 5 . - The
active layer 4 can be protected by themetal nanoparticle layer 5 when thesource electrode 7 and the drain electrode 8 (as shown inFIG. 7 ) are subsequently etched, so as to prevent the badness of the metal oxide thin film transistor caused by the corrosion of theactive layer 4. - It is to be indicated that it may further comprise a process of annealing the
metal nanoparticle layer 5 inStep 4. -
Step 5, depositing a copper metal thin film having a thicknesses of 500 nanometers as a source and drain electrode metalthin film 6 on thebase substrate 1 on which the above processes are finished, by using a physical vapor deposition method. The schematic diagram in which the source and drain electrode metalthin film 6 is prepared is shown inFIG. 6 . - A mixed solution of H2O2 and H2SO4 is used as a wet etching solution for etching the source and drain electrode metal
thin film 6 to form asource electrode 7 and adrain electrode 8, wherein thesource electrode 7 and thedrain electrode 8 cover a part of themetal nanoparticle layer 5. The schematic diagram in which thesource electrode 7 and thedrain electrode 8 are prepared is shown inFIG. 7 . -
Step 6, removing the part of themetal nanoparticle layer 5 which is not covered by thesource electrode 7 and thedrain electrode 8 by using oxygen plasma. The schematic diagram after the part of themetal nanoparticle layer 5 not covered by thesource electrode 7 and thedrain electrode 8 is removed is shown inFIG. 8 . -
Step 7, depositing 800-nanometer polyimide as apassivation layer 9 on thebase substrate 1 on which the above processes are finished, by using a plasma enhanced chemical vapor deposition method, i.e., forming apassivation layer 9 on the source and drain electrode metal layer comprising thesource electrode 7 and thedrain electrode 8. The schematic diagram in which thepassivation layer 9 is prepared is shown inFIG. 9 . - It is practically found that the protection of the
active layer 4 in the back channel etching process by using themetal nanoparticle layer 5 is more stable compared to the protection by an organic conductive thin film, and the metal nanoparticle layer has a good conductivity, a rough surface, and is very favorable to the achievement of good contact of theactive layer 4 with thesource electrode 7 and thedrain electrode 8. - This embodiment of this disclosure provides a third particular preparation method of a metal oxide thin film transistor, comprising:
-
Step 1, depositing an ITO thin film as a gate electrode metal thin film on abase substrate 1 by using a physical vapor deposition method, wherein the ITO thin film has a thickness of 200 nanometers, and allowing the gate electrode metal thin film to form agate electrode 2 by a patterning process. Thebase substrate 1 is a flexible substrate with a water-oxygen barrier layer of Si3N4 having a thickness of 200 nanometers. The schematic diagram after thegate electrode 2 is prepared on thebase substrate 1 is shown inFIG. 2 . -
Step 2, depositing a gateelectrode insulating layer 3 by using a plasma enhanced chemical vapor deposition method on thebase substrate 1 on which the above step is finished. The schematic diagram after the gateelectrode insulating layer 3 is prepared is shown inFIG. 3 . - The gate electrode insulating
layer 3 is formed by laminating 100-nanometer silicon oxide, 90-nanometer tantalum pentoxide, and 20-nanometer silicon dioxide. -
Step 3, depositing a metal oxide thin film on the gateelectrode insulating layer 3 by using a physical vapor deposition method, and allowing the metal oxide thin film to form a pattern of anactive layer 4 by a patterning process. The metal oxide thin film is a 50-nanometer IZO thin film, wherein the atomic ratio of indium to zinc is 1:1. The schematic diagram in which theactive layer 4 is prepared is shown inFIG. 4 . -
Step 4, preparing a silver nanoparticle layer having a thickness of 3 nanometers as ametal nanoparticle layer 5 on theactive layer 4 by using a solution treatment method. The schematic diagram in which themetal nanoparticle layer 5 is prepared is shown inFIG. 5 . - The
active layer 4 can be protected by themetal nanoparticle layer 5 when thesource electrode 7 and the drain electrode 8 (as shown inFIG. 7 ) are subsequently etched, so as to prevent the badness of the metal oxide thin film transistor caused by the corrosion of theactive layer 4. - It is to be indicated that it may further comprise a process of annealing the
metal nanoparticle layer 5 inStep 4. -
Step 5, depositing a copper metal thin film, which is a monolayer molybdenum thin film and has a thicknesses of 200 nanometers, as a source and drain electrode metalthin film 6 on thebase substrate 1 on which the above processes are finished, by using a physical vapor deposition method. The schematic diagram in which the source and drain electrode metalthin film 6 is prepared is shown inFIG. 6 . - A mixed solution of H2O2 and H2SO4 is used as a wet etching solution for etching the source and drain electrode metal
thin film 6 to form asource electrode 7 and adrain electrode 8, wherein thesource electrode 7 and thedrain electrode 8 cover a part of themetal nanoparticle layer 5. The schematic diagram in which thesource electrode 7 and thedrain electrode 8 are prepared is shown inFIG. 7 . -
Step 6, removing the part of themetal nanoparticle layer 5 which is not covered by thesource electrode 7 and thedrain electrode 8 by using oxygen plasma. The schematic diagram after the part of themetal nanoparticle layer 5 not covered by thesource electrode 7 and thedrain electrode 8 is removed is shown inFIG. 8 . -
Step 7, depositing 300-nanometer SiO2 as apassivation layer 9 on thebase substrate 1 on which the above processes are finished, by using a plasma enhanced chemical vapor deposition method, i.e., forming apassivation layer 9 on the source and drain electrode metal layer comprising thesource electrode 7 and thedrain electrode 8. The schematic diagram in which thepassivation layer 9 is prepared is shown inFIG. 9 . - It is practically found that the protection of the
active layer 4 in the back channel etching process by using themetal nanoparticle layer 5 is more stable compared to the protection by an organic conductive thin film, and the metal nanoparticle layer has a good conductivity, a rough surface, and is very favorable to the achievement of good contact of theactive layer 4 with thesource electrode 7 and thedrain electrode 8. - The
above embodiments 1 to 3 are merely a part of specific embodiments provided to illustrate this disclosure, and this disclosure is not limited thereto. The prepared metal oxide thin film transistors may be used in liquid crystal displays and active matrix organic light-emitting diode displays. Thicknesses of thin films, constituent materials, proportioning ratios, etc., involved in each step inembodiments 1 to 3 may be adjusted according to practical requirements. - As shown in
FIG. 9 , one embodiment of this disclosure further provides a thin film transistor, which is a metal oxide thin film transistor, comprising: - a
base substrate 1; - a gate electrode metal layer formed on the
base substrate 1, wherein the gate electrode metal layer comprises agate electrode 2; - a gate
electrode insulating layer 3 formed on the gate electrode metal layer; - an
active layer 4 formed on the gate electrode insulating layer; - a
metal nanoparticle layer 5 formed on theactive layer 4, wherein themetal nanoparticle layer 5 is used as an etching protection layer; - a source and drain electrode metal layer formed on the
metal nanoparticle layer 5, wherein the source and drain electrode metal layer comprises asource electrode 7 and adrain electrode 8; and - a
passivation layer 9 formed on the source and drain electrode metal layer. - It is to be indicated that the part indicated by the dashed
frame 10 is the removed part ofmetal nanoparticle layer 5, which is removed after thesource electrode 7 and thedrain electrode 8 are formed. This part of themetal nanoparticle layer 5, which should be removed, can protect theactive layer 4 when thesource electrode 7 and thedrain electrode 8 are prepared. - Preferably, the
metal nanoparticle layer 5 comprises at least one material of gold nanoparticles, silver nanoparticles, platinum nanoparticles, beryllium nanoparticles, nickel nanoparticles, and cobalt nanoparticles. - Preferably, the
metal nanoparticle layer 5 has a thickness of 1 to 5 nanometers. - Preferably, the
base substrate 1 is a glass substrate having a buffering layer. - Preferably, the
base substrate 1 is a flexible substrate having a water-oxygen barrier layer, and the material of the flexible substrate is polyethylene naphthalate, polyethylene terephthalate, a polyimide, or a metal foil. - Preferably, the gate electrode metal layer is a single film layer of any one of an aluminum thin film, a copper thin film, a molybdenum thin film, a titanium thin film, a silver thin film, a gold thin film, a tantalum thin film, a tungsten thin film, a chromium thin film, and an aluminum alloy thin film, or a composite film layer composed of at least two of the thin films, and the gate electrode metal layer has a thickness of 100 to 2000 nanometers. It is to be indicated that the material and the thickness of the gate electrode metal layer herein are those of the gate electrode metal thin film in the preparation method.
- Preferably, the gate
electrode insulating layer 3 is a monolayer of a silicon oxide thin film, a silicon nitride thin film, an aluminum oxide thin film, a tantalum pentoxide thin film, or an ytterbium oxide thin film, or the gateelectrode insulating layer 3 is a composite thin film composed of at least two monolayers of the thin films, and the gateelectrode insulating layer 3 has a thickness of 50 to 500 nanometer. - Preferably, the
active layer 4 contains a metal oxide of at least one of In, Zn, Ga, and Sn, theactive layer 4 has a thickness of 10 to 200 nanometers. - Preferably, the source and drain electrode metal layer is a single film layer of any one of an aluminum thin film, a copper thin film, a molybdenum thin film, and a titanium thin film, or a composite film layer composed of at least two of the thin films, the source and drain electrode metal layer has a thickness of 100 to 2000 nanometers. It is to be indicated that the material and the thickness of the source and drain electrode metal layer herein are those of the source and drain electrode metal thin film in the preparation method.
- Preferably, the
passivation layer 9 may be a single film layer of any one of silicon oxide, silicon nitride, aluminum oxide, ytterbium oxide, polyimides, benzocyclobutene, and polymethyl methacrylate, or a composite film layer composed of at least two of silicon oxide, silicon nitride, aluminum oxide, ytterbium oxide, polyimides, benzocyclobutene, and polymethyl methacrylate. Preferably, thepassivation layer 9 has a thickness of 50 to 2000 nanometers. - The embodiment of this disclosure has the advantageous effects as follows. By using the metal nanoparticle layer as a protection layer of the active layer, the active layer can be protected when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer; and at the meanwhile, the metal nanoparticle layer has a good conductivity and good thermal stability, and the requirements for the preparation process of the metal oxide thin film transistor are relatively low, such that the preparation of the metal oxide thin film transistor by a simple process and a low cost is achieved.
- Based on the same inventive concept, one embodiment of this disclosure further provides an array substrate, comprising the thin film transistor as provided by the above embodiment.
- The embodiment of this disclosure has the advantageous effects as follows. In this array substrate, the metal oxide thin film transistor uses the metal nanoparticle layer as a protection layer of the active layer, and the active layer can be protected when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer; and at the meanwhile, the metal nanoparticle layer has a good conductivity and good thermal stability, and the requirements for the preparation process of the metal oxide thin film transistor are relatively low, such that the preparation of the metal oxide thin film transistor by a simple process and a low cost is achieved.
- Based on the same inventive concept, one embodiment of this disclosure provides a display panel, comprising the array substrate as provided by the above embodiment.
- The embodiment of this disclosure has the advantageous effects as follows. In the array substrate used by the display panel, the metal oxide thin film transistor uses the metal nanoparticle layer as a protection layer of the active layer, and the active layer can be protected when the source electrode and the drain electrode are etched, so as to prevent device badness caused by the corrosion of the active layer; and at the meanwhile, the metal nanoparticle layer has a good conductivity and good thermal stability, and the requirements for the preparation process of the metal oxide thin film transistor are relatively low, such that the preparation of the metal oxide thin film transistor by a simple process and a low cost is achieved.
- Obviously, a person skilled in the art may perform various modifications and variations on this invention without departing from the spirit and the scope of this invention. Thus, if these modifications and variations of the invention are within the scope of the claims of this application and equivalent techniques thereof, this invention also intends to encompass these modifications and variations.
Claims (17)
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CN201510232985.5A CN104934330A (en) | 2015-05-08 | 2015-05-08 | Film transistor and preparation method thereof, array substrate and display panel |
PCT/CN2015/091540 WO2016179951A1 (en) | 2015-05-08 | 2015-10-09 | Thin-film transistor and preparation method therefor, array substrate, and display panel |
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Also Published As
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EP3121840A1 (en) | 2017-01-25 |
WO2016179951A1 (en) | 2016-11-17 |
EP3121840B1 (en) | 2020-08-12 |
CN104934330A (en) | 2015-09-23 |
EP3121840A4 (en) | 2017-11-22 |
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