US20160055853A9 - Method for processing sound data and circuit therefor - Google Patents
Method for processing sound data and circuit therefor Download PDFInfo
- Publication number
- US20160055853A9 US20160055853A9 US14/242,585 US201414242585A US2016055853A9 US 20160055853 A9 US20160055853 A9 US 20160055853A9 US 201414242585 A US201414242585 A US 201414242585A US 2016055853 A9 US2016055853 A9 US 2016055853A9
- Authority
- US
- United States
- Prior art keywords
- sound data
- memory element
- program
- memory
- reading
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 238000012545 processing Methods 0.000 title claims abstract description 67
- 238000000034 method Methods 0.000 title claims abstract description 29
- 230000015654 memory Effects 0.000 claims abstract description 137
- 230000005236 sound signal Effects 0.000 claims description 4
- 230000004044 response Effects 0.000 claims 8
- 239000004065 semiconductor Substances 0.000 description 3
- 230000001413 cellular effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000010485 coping Effects 0.000 description 1
- 238000013523 data management Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10L—SPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
- G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
- G10L19/008—Multichannel audio signal coding or decoding using interchannel correlation to reduce redundancy, e.g. joint-stereo, intensity-coding or matrixing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/16—Sound input; Sound output
- G06F3/162—Interface to dedicated audio devices, e.g. audio drivers, interface to CODECs
Definitions
- the present invention relates to a sound data processing apparatus for reading sound data stored in an external memory to process the read sound data.
- the configuration of a related art sound data processing apparatus 100 is shown in FIG. 3 .
- the sound data processing apparatus 100 includes a central processing unit (CPU) 10 , a decoder 12 , an interface unit (IF unit) 14 , and a NOR-type flash memory 16 .
- a NAND-type external memory 102 such as a flash memory, is detected by the CPU 10 by connecting the external memory 102 to the IF unit 14 .
- the CPU 10 reads a driver for accessing the external memory 102 , the driver being stored in the flash memory 16 , and accesses the external memory 102 by means of the driver. That is, the CPU 10 reads the sound data stored in the external memory 102 in advance through the IF unit 14 on the basis of an instruction by a user or the like, and transfers the read sound data to the decoder 12 at predetermined timing.
- the decoder 12 decodes the sound data transferred from the CPU 10 in accordance with a predetermined format, and outputs the decoded sound data as an audio output.
- the technique of providing an audio system compatible with a multi-codec coping with a plurality of audio codecs was disclosed.
- the technique was also disclosed that used a CPU to judge whether an audio codec program stored in a RAM incorporated in a digital signal processing unit (DSP) was compatible with music information to be decoded by the digital signal processing unit or not, and that changed the processing of the program according to the compatibility.
- DSP digital signal processing unit
- An aspect of the present invention is a sound data processing apparatus, including: a rewritable first memory; a decoder for performing sound data decoding processing; an interface unit connected to a second memory storing the sound data and a driver; a read only third memory for storing a boot program executed for reading the driver from the second memory connected to the interface unit and storing the read driver into the first memory; and a central processing unit for controlling processing of the first memory, the third memory, the decoder, and the interface unit, wherein the central processing unit performs control so as to read the driver from the second memory connected to the interface unit based on the boot program and storing the read driver into the first memory, to read the sound data from the second memory connected to the interface unit by means of the driver stored in the first memory, and to transfer the read sound data to the decoder.
- FIG. 1 is a block diagram showing the configuration of a sound data processing apparatus of an embodiment of the present invention
- FIG. 2 is a flow chart showing a processing method of the sound data processing apparatus of the embodiment of the present invention.
- FIG. 3 is a block diagram showing the configuration of a related art sound data processing apparatus.
- a sound data processing apparatus 200 of an embodiment of the present invention is composed of a central processing unit (CPU) 20 , a decoder 22 , an interface unit (IF unit) 24 , a volatile memory (RAM) 26 , and a nonvolatile memory (ROM) 28 , as shown in FIG. 1 .
- CPU central processing unit
- decoder 22 decoder
- IF unit interface unit
- RAM volatile memory
- ROM nonvolatile memory
- the CPU 20 , the decoder 22 , the IF unit 24 , the RAM 26 , and the ROM 28 are connected with one another through a bus so as to be able to mutually exchange data.
- the sound data processing apparatus 200 is connected to an external memory 102 through the IF unit 24 .
- a memory chip, such as a flash memory, and a memory card can be used as the external memory 102 .
- the CPU 20 is a semiconductor device to generally control a piece of electronic equipment including the sound data processing apparatus 200 .
- the electronic equipment to be mounted with the sound data processing apparatus 200 for example, a cellular phone equipped with wireless communication means, a portable music reproducing apparatus, and a personal digital assistant (PDA) for performing data management can be cited.
- the CPU 20 can be constituted by, for example, an application specific integrated circuit (ASIC).
- ASIC application specific integrated circuit
- the CPU 20 controls the electronic equipment by accessing a boot program and a library, both stored in the ROM 28 .
- the CPU 20 accepts the key input of a user from an operation unit (not shown) connected to the bus, and controls the processing of the wireless transmission and reception of sound signals and electronic mail according to the key input.
- the present embodiment has a feature of sound data processing in which the sound data stored in the external memory 102 is read to be processed, but the control of the processing will be described later.
- the decoder 22 takes in the sound data subjected to coding processing and compressing processing in a predetermined format from the bus, and performs the expanding processing and the decoding processing of the sound data in accordance with the format.
- coding system of sound data for example, WMA, AMR, Div X, G.723, and MP3 can be cited.
- the IF unit 24 is composed of an adapter unit mounting the external memory 102 therein, a connector unit electrically connected with an external terminal of the external memory 102 , and a data processing unit performing the reading and the writing of data with the external memory 102 .
- the adapter unit of the IF unit 24 is configured to have an insertion space adjusted to the external form of the external memory 102 .
- the connector unit of the IF unit 24 touches an electrode provided on the external memory 102 when the external memory 102 is mounted in the adapter unit, and as a result the connector unit electrically connects the internal electric circuits of the external memory 102 with the data processing unit of the IF unit 24 .
- the external memory 102 stores a primitive driver necessary for the sound data processing apparatus 200 to access the external memory 102 , and an application program necessary for the sound data processing apparatus 200 to perform processing for music data reproduction and the like.
- the external memory 102 is a memory card, for example, a control program or a control logic circuit in the data processing unit of the IF unit 24 interprets an instruction for data reading and the like from the CPU 20 through a register in conformity with a PC card ATA standard interface, and converts the instruction into a command according to the type of external memory 102 mounted on the adapter unit. The command is transmitted to the internal electric circuits of the external memory 102 , and the data (sound data) stored in the external memory 102 is read.
- the sound data processing apparatus 200 performs the processing, such as music data reproduction, by means of the application program stored in the external memory 102 and a basic program, which will be described later, stored in the ROM 28 .
- the external memory 102 is a rewritable memory, a developer can rewrite the application program to update the program, or correct bugs. That is, it is preferable to use a program that is capable of being rewritten as the application program stored in the external memory 102 .
- the RAM 26 is a volatile semiconductor memory. As the RAM 26 , an SRAM can be used.
- the primitive driver and the application program, both read from the external memory 102 , are expanded in the RAM 26 , and are subjected to processing according to each program by the CPU 20 .
- the ROM 28 is a nonvolatile semiconductor memory.
- the ROM 28 stores a boot program for automatically performing a series of processing steps at the time of starting the access to the external memory 102 , a library to be used by the driver of the external memory 102 , and the basic program necessary for operating the sound data processing apparatus 200 .
- each driver for each of a plurality of types of external memories 102 is stored in the ROM 28 . That is, a library particularly referred to by each driver is not stored in the ROM 28 . Moreover, it is preferable to uses a program having no possibility of being rewritten as the basic program stored in the ROM 28 . This prevents wastefully using up the memory capacity of the ROM 28 .
- the external memory 102 is detected by the CPU 20 .
- the CPU 20 is electrically connected to the external memory 102 through the IF unit 24 .
- the electrical connection of the IF unit 24 with the external memory 102 can be detected.
- the primitive driver is read from the external memory 102 in accordance with the boot program.
- the CPU 20 reads a program called an initial program loader (IPL), which is previously stored in the ROM 28 .
- IPL initial program loader
- the CPU 20 invokes the boot program recorded in an area called a boot sector of the area called a master boot record (MBR) of the ROM 28 .
- MLR master boot record
- the boot program is a program for reading the primitive driver stored in the external memory 102 .
- the primitive driver is stored in common memory spaces in various types of the external memories 102 .
- the CPU 20 accesses the predetermined memory space of the external memory 102 and reads the stored primitive driver to store the read primitive driver into the RAM 26 in accordance with the boot program.
- the application program is read from the external memory 102 to be expanded in the RAM 26 , and an instruction of the reproduction processing of sound data is accepted on the basis of the basic program stored in the ROM 28 and the application program expanded in the RAM 26 .
- the CPU 20 accepts a sound data reproduction processing instruction through a user interface (not shown), such as the operation unit, and specifying information for specifying the sound data of a reading object.
- the specifying information is, for example, a file name or the like that is specifically added to the sound data.
- the sound data processing apparatus 200 may be adapted so that the CPU 20 may display a file name list of sound data that has been previously read from the external memory 102 mounted in the IF unit 24 on the display unit (not shown) of the user interface, to allow a user to select the file name of the sound data of the reproduction object in the list.
- the CPU 20 accesses the external memory 102 in accordance with the read primitive driver, and performs the reproduction processing for the sound data.
- the CPU 20 accesses the header area in which the information expressing the memory area storing each sound data therein is registered by means of the primitive driver stored in the RAM 26 at Step S 12 , and ascertains the starting address and the ending address of the memory area in which the sound data specified by the specifying information input at Step S 14 is stored.
- the CPU 20 then sequentially reads the data from the starting address to the ending address, and transmits the read data to the decoder 12 .
- the decoder 12 receives the transmitted sound data, the decoder 12 decodes the sound data and converts it into an audio signal in accordance with the format of the sound data, and outputs the converted sound signal.
- the primitive driver if it is necessary for the primitive driver to refer to a library, it is preferable for the primitive driver to perform the processing, referring to the library stored in the RAM 26 or the ROM 28 . That is, because the library commonly referred to by a plurality of drivers is previously stored in the ROM 28 , the primitive driver can refer to the library. Moreover, because the library specific to a primitive driver has been read from the external memory 102 at Step S 12 to be stored in the RAM 26 , the primitive driver can refer to the library in the RAM 26 .
- the present embodiment reads the primitive driver stored in the external memory 102 and stores the read primitive driver into the built-in memory, and accesses the external memory 102 on the basis of the primitive driver. It therefore becomes unnecessary to store numerous drivers in the sound data processing apparatus 200 in advance. Consequently, the memory capacity of the built-in memory can be reduced in comparison with that of the related art.
- the present embodiment is configured to store the boot program, the library, and the basic program in the ROM 28 , and to store the primitive driver and the application program in the external memory 102 . Because some of the programs are transformed as library and stored in the ROM 28 , the size of the programs stored in the external memory 102 can be reduced. Therefore the storage capacity of the RAM 26 , in which the programs stored in the external memory 102 are expanded, can be reduced so that the circuit size can be reduced. If the ROM 28 is made of a mask ROM and the RAM 26 is made of an SRAM, the mask ROM can make the circuit size thereof smaller than that of the SRAM. Consequently, the circuit size of the sound data processing apparatus 200 can be reduced more in comparison with that in the case of storing all the programs in the external memory 102 .
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Multimedia (AREA)
- Health & Medical Sciences (AREA)
- Audiology, Speech & Language Pathology (AREA)
- Human Computer Interaction (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Health & Medical Sciences (AREA)
- Mathematical Physics (AREA)
- Computational Linguistics (AREA)
- Signal Processing (AREA)
- Acoustics & Sound (AREA)
- Stored Programmes (AREA)
- Electrophonic Musical Instruments (AREA)
- Reverberation, Karaoke And Other Acoustics (AREA)
- Storage Device Security (AREA)
Abstract
Description
- The entire disclosure of Japanese Patent Application No. 2007-056530 filed on Mar. 7, 2007 including the specification, claims, drawings, and abstract is incorporated herein by reference.
- 1. Field of the Invention
- The present invention relates to a sound data processing apparatus for reading sound data stored in an external memory to process the read sound data.
- 2. Description of the Related Art
- In recent years, a sound data processing apparatus for reading sound data stored in an external memory, such as a flash memory, by connecting the external memory to the apparatus, and for performing decoding processing and the like for the read sound data, has been widely used.
- The configuration of a related art sound
data processing apparatus 100 is shown inFIG. 3 . The sounddata processing apparatus 100 includes a central processing unit (CPU) 10, adecoder 12, an interface unit (IF unit) 14, and a NOR-type flash memory 16. A NAND-typeexternal memory 102, such as a flash memory, is detected by theCPU 10 by connecting theexternal memory 102 to theIF unit 14. - The
CPU 10 reads a driver for accessing theexternal memory 102, the driver being stored in theflash memory 16, and accesses theexternal memory 102 by means of the driver. That is, theCPU 10 reads the sound data stored in theexternal memory 102 in advance through theIF unit 14 on the basis of an instruction by a user or the like, and transfers the read sound data to thedecoder 12 at predetermined timing. Thedecoder 12 decodes the sound data transferred from theCPU 10 in accordance with a predetermined format, and outputs the decoded sound data as an audio output. - Moreover, the technique of providing an audio system compatible with a multi-codec coping with a plurality of audio codecs was disclosed. The technique was also disclosed that used a CPU to judge whether an audio codec program stored in a RAM incorporated in a digital signal processing unit (DSP) was compatible with music information to be decoded by the digital signal processing unit or not, and that changed the processing of the program according to the compatibility.
- Now, various types of NAND-type
external memories 102 have been developed in recent years. It is necessary to store numerous drivers compatible with respective types ofexternal memories 102 in theflash memory 16 in advance in order to cope with the variousexternal memories 102. The memory capacity of theflash memory 16 should accordingly be enlarged with every increase in the types ofexternal memory 102. - An aspect of the present invention is a sound data processing apparatus, including: a rewritable first memory; a decoder for performing sound data decoding processing; an interface unit connected to a second memory storing the sound data and a driver; a read only third memory for storing a boot program executed for reading the driver from the second memory connected to the interface unit and storing the read driver into the first memory; and a central processing unit for controlling processing of the first memory, the third memory, the decoder, and the interface unit, wherein the central processing unit performs control so as to read the driver from the second memory connected to the interface unit based on the boot program and storing the read driver into the first memory, to read the sound data from the second memory connected to the interface unit by means of the driver stored in the first memory, and to transfer the read sound data to the decoder.
- Preferred embodiments of the present invention will be described in detail based on the following drawings, wherein:
-
FIG. 1 is a block diagram showing the configuration of a sound data processing apparatus of an embodiment of the present invention; -
FIG. 2 is a flow chart showing a processing method of the sound data processing apparatus of the embodiment of the present invention; and -
FIG. 3 is a block diagram showing the configuration of a related art sound data processing apparatus. - A sound
data processing apparatus 200 of an embodiment of the present invention is composed of a central processing unit (CPU) 20, adecoder 22, an interface unit (IF unit) 24, a volatile memory (RAM) 26, and a nonvolatile memory (ROM) 28, as shown inFIG. 1 . - The
CPU 20, thedecoder 22, theIF unit 24, theRAM 26, and theROM 28 are connected with one another through a bus so as to be able to mutually exchange data. The sounddata processing apparatus 200 is connected to anexternal memory 102 through theIF unit 24. A memory chip, such as a flash memory, and a memory card can be used as theexternal memory 102. - The
CPU 20 is a semiconductor device to generally control a piece of electronic equipment including the sounddata processing apparatus 200. As the electronic equipment to be mounted with the sounddata processing apparatus 200, for example, a cellular phone equipped with wireless communication means, a portable music reproducing apparatus, and a personal digital assistant (PDA) for performing data management can be cited. TheCPU 20 can be constituted by, for example, an application specific integrated circuit (ASIC). TheCPU 20 controls the electronic equipment by accessing a boot program and a library, both stored in theROM 28. For example, if the sounddata processing apparatus 200 is the cellular phone, then theCPU 20 accepts the key input of a user from an operation unit (not shown) connected to the bus, and controls the processing of the wireless transmission and reception of sound signals and electronic mail according to the key input. - Incidentally, the present embodiment has a feature of sound data processing in which the sound data stored in the
external memory 102 is read to be processed, but the control of the processing will be described later. - The
decoder 22 takes in the sound data subjected to coding processing and compressing processing in a predetermined format from the bus, and performs the expanding processing and the decoding processing of the sound data in accordance with the format. As the coding system of sound data, for example, WMA, AMR, Div X, G.723, and MP3 can be cited. - The
IF unit 24 is composed of an adapter unit mounting theexternal memory 102 therein, a connector unit electrically connected with an external terminal of theexternal memory 102, and a data processing unit performing the reading and the writing of data with theexternal memory 102. - The adapter unit of the
IF unit 24 is configured to have an insertion space adjusted to the external form of theexternal memory 102. The connector unit of theIF unit 24 touches an electrode provided on theexternal memory 102 when theexternal memory 102 is mounted in the adapter unit, and as a result the connector unit electrically connects the internal electric circuits of theexternal memory 102 with the data processing unit of theIF unit 24. - The
external memory 102 stores a primitive driver necessary for the sounddata processing apparatus 200 to access theexternal memory 102, and an application program necessary for the sounddata processing apparatus 200 to perform processing for music data reproduction and the like. If theexternal memory 102 is a memory card, for example, a control program or a control logic circuit in the data processing unit of theIF unit 24 interprets an instruction for data reading and the like from theCPU 20 through a register in conformity with a PC card ATA standard interface, and converts the instruction into a command according to the type ofexternal memory 102 mounted on the adapter unit. The command is transmitted to the internal electric circuits of theexternal memory 102, and the data (sound data) stored in theexternal memory 102 is read. - Incidentally, the sound
data processing apparatus 200 performs the processing, such as music data reproduction, by means of the application program stored in theexternal memory 102 and a basic program, which will be described later, stored in theROM 28. Because theexternal memory 102 is a rewritable memory, a developer can rewrite the application program to update the program, or correct bugs. That is, it is preferable to use a program that is capable of being rewritten as the application program stored in theexternal memory 102. - The
RAM 26 is a volatile semiconductor memory. As theRAM 26, an SRAM can be used. The primitive driver and the application program, both read from theexternal memory 102, are expanded in theRAM 26, and are subjected to processing according to each program by theCPU 20. - The
ROM 28 is a nonvolatile semiconductor memory. TheROM 28 stores a boot program for automatically performing a series of processing steps at the time of starting the access to theexternal memory 102, a library to be used by the driver of theexternal memory 102, and the basic program necessary for operating the sounddata processing apparatus 200. - Incidentally, only the library commonly referred to by each driver for each of a plurality of types of
external memories 102 is stored in theROM 28. That is, a library particularly referred to by each driver is not stored in theROM 28. Moreover, it is preferable to uses a program having no possibility of being rewritten as the basic program stored in theROM 28. This prevents wastefully using up the memory capacity of theROM 28. - Next, the control of the sound
data processing apparatus 200 of the present embodiment will be described with reference to the flow chart shown inFIG. 2 . - At Step S10, the
external memory 102 is detected by theCPU 20. When theexternal memory 102 is mounted on theIF unit 24, theCPU 20 is electrically connected to theexternal memory 102 through theIF unit 24. By always outputting a signal o allow theCPU 20 to detect the mounting of theexternal memory 102 into theIF unit 24, the electrical connection of theIF unit 24 with theexternal memory 102 can be detected. - At Step S12, the primitive driver is read from the
external memory 102 in accordance with the boot program. When theexternal memory 102 is detected by theCPU 20 at Step S10, theCPU 20 reads a program called an initial program loader (IPL), which is previously stored in theROM 28. By executing the IPL, theCPU 20 invokes the boot program recorded in an area called a boot sector of the area called a master boot record (MBR) of theROM 28. - The boot program is a program for reading the primitive driver stored in the
external memory 102. The primitive driver is stored in common memory spaces in various types of theexternal memories 102. TheCPU 20 accesses the predetermined memory space of theexternal memory 102 and reads the stored primitive driver to store the read primitive driver into theRAM 26 in accordance with the boot program. - Moreover, if there is information, such as the library, peculiar to the primitive driver, then it is preferable to store also this information into the
external memory 102 in advance, and to read the information together with the primitive driver and store them in theRAM 26. - At Step S14, the application program is read from the
external memory 102 to be expanded in theRAM 26, and an instruction of the reproduction processing of sound data is accepted on the basis of the basic program stored in theROM 28 and the application program expanded in theRAM 26. TheCPU 20 accepts a sound data reproduction processing instruction through a user interface (not shown), such as the operation unit, and specifying information for specifying the sound data of a reading object. The specifying information is, for example, a file name or the like that is specifically added to the sound data. Moreover, the sounddata processing apparatus 200 may be adapted so that theCPU 20 may display a file name list of sound data that has been previously read from theexternal memory 102 mounted in theIF unit 24 on the display unit (not shown) of the user interface, to allow a user to select the file name of the sound data of the reproduction object in the list. - At Step S16, the
CPU 20 accesses theexternal memory 102 in accordance with the read primitive driver, and performs the reproduction processing for the sound data. TheCPU 20 accesses the header area in which the information expressing the memory area storing each sound data therein is registered by means of the primitive driver stored in theRAM 26 at Step S12, and ascertains the starting address and the ending address of the memory area in which the sound data specified by the specifying information input at Step S14 is stored. TheCPU 20 then sequentially reads the data from the starting address to the ending address, and transmits the read data to thedecoder 12. When thedecoder 12 receives the transmitted sound data, thedecoder 12 decodes the sound data and converts it into an audio signal in accordance with the format of the sound data, and outputs the converted sound signal. - Incidentally, if it is necessary for the primitive driver to refer to a library, it is preferable for the primitive driver to perform the processing, referring to the library stored in the
RAM 26 or theROM 28. That is, because the library commonly referred to by a plurality of drivers is previously stored in theROM 28, the primitive driver can refer to the library. Moreover, because the library specific to a primitive driver has been read from theexternal memory 102 at Step S12 to be stored in theRAM 26, the primitive driver can refer to the library in theRAM 26. - As described above, the present embodiment reads the primitive driver stored in the
external memory 102 and stores the read primitive driver into the built-in memory, and accesses theexternal memory 102 on the basis of the primitive driver. It therefore becomes unnecessary to store numerous drivers in the sounddata processing apparatus 200 in advance. Consequently, the memory capacity of the built-in memory can be reduced in comparison with that of the related art. - Moreover, the present embodiment is configured to store the boot program, the library, and the basic program in the
ROM 28, and to store the primitive driver and the application program in theexternal memory 102. Because some of the programs are transformed as library and stored in theROM 28, the size of the programs stored in theexternal memory 102 can be reduced. Therefore the storage capacity of theRAM 26, in which the programs stored in theexternal memory 102 are expanded, can be reduced so that the circuit size can be reduced. If theROM 28 is made of a mask ROM and theRAM 26 is made of an SRAM, the mask ROM can make the circuit size thereof smaller than that of the SRAM. Consequently, the circuit size of the sounddata processing apparatus 200 can be reduced more in comparison with that in the case of storing all the programs in theexternal memory 102. - Because the programs having the possibility of being rewritten are stored in the
external memory 102, it is possible to rewrite the programs for updating the programs or for correcting bugs.
Claims (27)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/242,585 US20160055853A9 (en) | 2007-03-07 | 2014-04-01 | Method for processing sound data and circuit therefor |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JPJP2007-056530 | 2007-03-07 | ||
JP2007056530 | 2007-03-07 | ||
US12/039,884 US8694138B2 (en) | 2007-03-07 | 2008-02-29 | Sound data processing appartus |
US14/242,585 US20160055853A9 (en) | 2007-03-07 | 2014-04-01 | Method for processing sound data and circuit therefor |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/039,884 Continuation US8694138B2 (en) | 2007-03-07 | 2008-02-29 | Sound data processing appartus |
Publications (2)
Publication Number | Publication Date |
---|---|
US20140214434A1 US20140214434A1 (en) | 2014-07-31 |
US20160055853A9 true US20160055853A9 (en) | 2016-02-25 |
Family
ID=39740325
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/039,884 Active 2031-10-05 US8694138B2 (en) | 2007-03-07 | 2008-02-29 | Sound data processing appartus |
US14/242,585 Abandoned US20160055853A9 (en) | 2007-03-07 | 2014-04-01 | Method for processing sound data and circuit therefor |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/039,884 Active 2031-10-05 US8694138B2 (en) | 2007-03-07 | 2008-02-29 | Sound data processing appartus |
Country Status (3)
Country | Link |
---|---|
US (2) | US8694138B2 (en) |
JP (1) | JP2008250992A (en) |
CN (1) | CN101261574A (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008191473A (en) * | 2007-02-06 | 2008-08-21 | Sanyo Electric Co Ltd | Sound data processing device |
JP2016062172A (en) * | 2014-09-16 | 2016-04-25 | 株式会社リコー | Information processor |
KR20180092582A (en) | 2017-02-10 | 2018-08-20 | 삼성전자주식회사 | WFST decoding system, speech recognition system including the same and Method for stroing WFST data |
CN112463108B (en) * | 2020-12-14 | 2023-03-31 | 美的集团股份有限公司 | Voice interaction processing method and device, electronic equipment and storage medium |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09265444A (en) * | 1996-03-28 | 1997-10-07 | Aiwa Co Ltd | Data processor |
JP3991458B2 (en) * | 1998-07-31 | 2007-10-17 | ヤマハ株式会社 | Musical sound data processing apparatus and computer system |
JP2001202094A (en) | 1999-11-12 | 2001-07-27 | Sony Corp | Reproducing device, method, and system |
JP3574078B2 (en) * | 2001-03-16 | 2004-10-06 | 東京エレクトロンデバイス株式会社 | Storage device and storage device control method |
US6987947B2 (en) * | 2001-10-30 | 2006-01-17 | Unwired Technology Llc | Multiple channel wireless communication system |
JP2005056237A (en) | 2003-08-06 | 2005-03-03 | Sony Corp | Memory device, recording medium for recording data processing program, program thereof, and data processing system and method |
KR100601684B1 (en) | 2004-06-03 | 2006-07-14 | 삼성전자주식회사 | external storage device, image aquisition device, method and system for driving driver |
JP4788191B2 (en) | 2005-05-10 | 2011-10-05 | ソニー株式会社 | Audiovisual data reproduction method and audiovisual data reproduction apparatus |
TWI312467B (en) * | 2006-05-19 | 2009-07-21 | Avermedia Tech Inc | External device and operating method applied thereto |
-
2008
- 2008-02-21 JP JP2008039824A patent/JP2008250992A/en active Pending
- 2008-02-29 US US12/039,884 patent/US8694138B2/en active Active
- 2008-03-04 CN CN200810083202.1A patent/CN101261574A/en active Pending
-
2014
- 2014-04-01 US US14/242,585 patent/US20160055853A9/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
CN101261574A (en) | 2008-09-10 |
JP2008250992A (en) | 2008-10-16 |
US20080216635A1 (en) | 2008-09-11 |
US8694138B2 (en) | 2014-04-08 |
US20140214434A1 (en) | 2014-07-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6851018B2 (en) | Exchanging operation parameters between a data storage device and a controller | |
TWI408597B (en) | Initialization of flash storage via an embedded controller | |
KR101507628B1 (en) | System and method for data read of a synchronous serial interface nand | |
US7363441B2 (en) | Portable storage apparatus and method for freely changing data bus width | |
JP2003085034A (en) | Nonvolatile storage and data storing method | |
JP2010527484A (en) | Automatic detection of memory page size | |
US20140214434A1 (en) | Method for processing sound data and circuit therefor | |
US20070079015A1 (en) | Methods and arrangements to interface a data storage device | |
KR100625811B1 (en) | Method and apparatus for correcting code data error | |
JP2010257367A (en) | Program update system, electronic device with program update function | |
US7369454B2 (en) | Semiconductor integrated circuit device | |
US8595594B2 (en) | Data processing method, memory controller, and memory storage device | |
US20080162814A1 (en) | Devices and Methods of Operating Memory Devices Including Power Down Response Signals | |
US20120066437A1 (en) | Data programming circuit and method for otp memory | |
US20060041709A1 (en) | Memory card and reproducing apparatus | |
US8650441B2 (en) | Data programming circuit and method for OTP memory | |
EP2194458A2 (en) | Request processing device, request processing system, and access testing method | |
KR100743253B1 (en) | Method and apparatus for correcting code data error | |
US20080188968A1 (en) | Sound data processing apparatus | |
KR100743252B1 (en) | Method and apparatus for correcting code data error | |
JP4083474B2 (en) | MEMORY DEVICE CONTROL METHOD, PROGRAM THEREOF, AND RECORDING MEDIUM | |
US20090300223A1 (en) | Method for communication between an electronic device and a target input/output device in a secure digital input/output card through a secure digital interface, and system for implementing the same | |
KR100743258B1 (en) | Method and apparatus for correcting code data error | |
TWI406175B (en) | Memory card and method for memory card | |
JP2008090723A (en) | Portable terminal |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, ARIZONA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:OKUBO, KENICHI;KOJIMA, KENICHI;SIGNING DATES FROM 20140310 TO 20140315;REEL/FRAME:032576/0537 |
|
AS | Assignment |
Owner name: DEUTSCHE BANK AG NEW YORK BRANCH, NEW YORK Free format text: SECURITY INTEREST;ASSIGNOR:SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC;REEL/FRAME:038620/0087 Effective date: 20160415 |
|
AS | Assignment |
Owner name: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AG Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST;ASSIGNOR:SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC;REEL/FRAME:039853/0001 Effective date: 20160415 Owner name: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT, NEW YORK Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST;ASSIGNOR:SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC;REEL/FRAME:039853/0001 Effective date: 20160415 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |
|
AS | Assignment |
Owner name: FAIRCHILD SEMICONDUCTOR CORPORATION, ARIZONA Free format text: RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087;ASSIGNOR:DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT;REEL/FRAME:064070/0001 Effective date: 20230622 Owner name: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, ARIZONA Free format text: RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087;ASSIGNOR:DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT;REEL/FRAME:064070/0001 Effective date: 20230622 |