US20130141167A1 - Power amplifier - Google Patents
Power amplifier Download PDFInfo
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- US20130141167A1 US20130141167A1 US13/705,090 US201213705090A US2013141167A1 US 20130141167 A1 US20130141167 A1 US 20130141167A1 US 201213705090 A US201213705090 A US 201213705090A US 2013141167 A1 US2013141167 A1 US 2013141167A1
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- power amplifier
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/52—Circuit arrangements for protecting such amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/435—A peak detection being used in a signal measuring circuit in a controlling circuit of an amplifier
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/541—Transformer coupled at the output of an amplifier
Definitions
- the present invention relates to a power amplifier and, more particularly, to a circuit for preventing an element from being damaged although output impedance of a final transistor is changed in a power amplifier.
- damage to an output terminal element may be attributed to stability of a circuit, but, in most cases, it is ascribed to an electrical load due to a change in an output terminal end load.
- a power amplifier requires a technique for protecting an output end element, and in a related art, a technique of sensing a current by using a replica circuit and protecting a circuit in the occurrence of an overcurrent in an output end according to the sensing result has been used.
- this technique disadvantageously has a low level of accuracy, a complicated circuit, and degraded efficiency.
- the present invention relates to a circuit for preventing damage to an element although output impedance of a final transistor in a power amplifier is changed, relates more particularly, to a circuit for controlling a bias voltage provided according to signal strength and an operational state by coupling a signal between a final output terminal of a transistor and a transformer, namely, a primary signal of the transformer.
- An object of the present invention is to prevent damage to a transistor although output impedance is changed.
- Another object of the present invention is to automatically perform a control to maintain performance by sensing an operational state in which output impedance is normal.
- a power amplifier including: a power stage amplifying a signal; a transformer connected to an output terminal of the power stage and coupling a signal output from the power stage; and a controller controlling a bias voltage from the power stage according to the coupled signal.
- the transformer may include: an input terminal connected to an output terminal of the power stage; and an output terminal induction-coupled to the input terminal and providing an entire output.
- the power stage may be operated by a bias voltage input from the controller.
- a plurality of power stages may be provided.
- Characteristics of operation of the plurality of power stages may be determined by efficiency of respective power stages.
- the controller may provide a bias voltage to each of the plurality of power stages.
- the power amplifier may further include: an input matching unit matching a signal input to the power amplifier, to the power amplifier; a drive amplifier connected to the input matching unit and operated by a bias voltage input from the controller; and an inter stage matching the power stage and the drive amplifier.
- the input matching unit may be a balanced-to-unbalanced (Balun) transformer.
- the power stage and the drive amplifier may be a complementary metal-oxide semiconductor (CMOS) or a bipolar junction transistor (BJT).
- CMOS complementary metal-oxide semiconductor
- BJT bipolar junction transistor
- the power amplifier may further include: a peak detector receiving a coupled signal from an input terminal of the transformer and detecting strength of the coupled signal; a comparator connected to the peak detector and comparing a normal state signal and an abnormal state signal; and a state machine connected to the comparator and generating state signals in response to signals output from the comparator.
- the peak detector may include a rectifier rectifying the coupled signal from an AC voltage to a DC voltage.
- a power amplifier including: a signal input unit; a power stage amplifying a signal output from the signal input unit; a transformer coupling a signal output from the power stage; a feedback unit feeding back the coupled signal; and a controller controlling a bias voltage of the power stage according to the coupled signal.
- a plurality of power stages may be provided.
- the controller may provide a bias voltage to each of the plurality of power stages.
- the signal input unit may include: an input matching unit matching a signal input to the power amplifier, to the power amplifier; a drive amplifier connected to the input matching unit and operated by a bias voltage input from the controller; and an inter stage matching the power stage and the drive amplifier.
- the feedback unit may include: a peak detector receiving a coupled signal from an input terminal of the transformer and detecting strength of the coupled signal; a comparator connected to the peak detector and comparing a normal state signal and an abnormal state signal; and a state machine connected to the comparator and generating state signals in response to signals output from the comparator.
- FIG. 1 is a block diagram of a power amplifier according to an embodiment of the present invention.
- FIG. 2 is a circuit diagram of a transformer according to an embodiment of the present invention.
- FIG. 3 is a block diagram of a feedback unit according to an embodiment of the present invention.
- FIG. 4 is a block diagram of a controller according to an embodiment of the present invention.
- FIG. 5 is a truth table of bias signals according to an embodiment of the present invention.
- FIG. 1 is a block diagram of a power amplifier according to an embodiment of the present invention
- FIG. 2 is a circuit diagram of a transformer according to an embodiment of the present invention.
- the power amplifier 100 may include a power stage 40 for amplifying a signal, a transformer 50 connected to an output terminal of the power stage 40 and coupling a signal output from the power stage 40 , and a controller 90 controlling a bias voltage of the power stage 40 according to the coupled signal.
- the power amplifier 100 may further include a signal input unit (not shown) for inputting a signal.
- the power stage 40 may amplify a signal output from the signal input unit (not shown), and the transformer 50 may couple a signal output from the power stage 40 .
- the power stage 40 may be operated by a bias voltage input from the controller 90 .
- the power stage 40 may be a complementary metal-oxide semiconductor (CMOS) or a bipolar junction transistor (BJT).
- CMOS complementary metal-oxide semiconductor
- BJT bipolar junction transistor
- the power amplifier 100 may further include a feedback unit (not shown) for feeding back the coupled signal, and the controller 90 may control the bias voltage from the power stage 40 according to the coupled signal.
- the circuit is simple and efficiency and accuracy can be enhanced, in comparison to the related art using a replica circuit.
- the transformer 50 may include an input terminal connected to the output terminal of the power stage 40 and an output terminal induction-coupled to the input terminal to provide an entire output.
- an input terminal signal of the transformer 50 is coupled to be fed back to the feedback unit (not shown).
- the feedback unit (not shown) may copy the input terminal signal of the transformer 50 .
- a plurality of power stages 40 may be provided.
- characteristics of operations of the plurality of power stages may be determined by efficiency of the respective power stages.
- the controller 90 may provide a bias voltage to the plurality of respective power stages.
- a plurality of transformers, a plurality of feedback units, and a plurality of controllers may be provided to be connected to the plurality of respective power stages.
- the plurality of feedback units may couple input side signals of the plurality of transformers, respectively, to thereby provide bias voltages to the plurality of power stages through the plurality of controllers, respectively.
- the power amplifier 100 may further include an input matching unit 10 for matching a signal, which has been input to the power amplifier 100 , to the power amplifier 100 , a drive amplifier 20 connected to the input matching unit 10 and operated by a bias voltage input from the controller 90 , and an inter stage 30 for matching the power stage 40 and the drive amplifier 20 .
- the input matching unit 10 is used to match a balanced circuit and an unbalanced circuit. Namely, the input matching unit 10 may be used to match a signal, which has been input to the power amplifier 100 , to the power amplifier 100 . In this case, the input matching unit 10 may be a balanced-to-unbalanced (Balun) transformer.
- Biun balanced-to-unbalanced
- the drive amplifier 20 may be connected to the input matching unit 10 and operated by a bias voltage input from the controller 90 .
- An output terminal signal of the power stage 40 is required to have a high power level, and in this case, since it is difficult to satisfy both a high power level and a high gain, an extra amplifier having a high gain may be required to be driven.
- the drive amplifier 20 may be positioned in a front stage of the power stage 40 so as to be operated.
- the drive amplifier 20 may be a CMOS or a BJT.
- the inter stage 30 is connected between the drive amplifier 20 and the power stage 40 and is able to make an output signal from the drive amplifier 20 be transferred with a maximum level of power to the power stage 40 .
- the inter stage 30 may be implemented as a circuit by an R-L-C element.
- FIG. 3 is a block diagram of a feedback unit (not shown) according to an embodiment of the present invention
- FIG. 4 is a block diagram of a controller according to an embodiment of the present invention
- FIG. 5 is a truth table of bias signals according to an embodiment of the present invention.
- the feedback unit may include a peak detector 60 receiving a coupled signal from an input terminal of the transformer 50 and detecting strength of the coupled signal, a comparator 70 connected to the peak detector 60 and comparing a normal state signal and an abnormal state signal, and a state machine 80 connected to the comparator 70 and generating state signals in response to signals output from the comparator 70 .
- the peak detector 60 may receive a primary side signal from the coupled transformer 50 and detect strength of the primary side signal. Since the peak detector 60 receives the primary side signal as an input signal by coupling it, the peak detector 60 is able to detect accurate strength of the signal regardless of a change in output impedance. Namely, in comparison to the related art in which there may be a difference between a primary side signal and a secondary side signal of the transformer due to a change in output impedance, in an embodiment of the present invention, the peak detector 60 may detect accurate strength of the signal by reflecting a phase of the primary signal of the transformer 50 .
- the peak detector 60 may include a rectifier 61 for rectifying the coupled signal from an AC voltage to a DC voltage. Also, the peak detector 60 may include an element in which a resistor 62 and a capacitor 63 are connected in parallel.
- the comparator 70 may be connected to the peak detector 60 and receive an output signal from the peak detector 60 .
- the comparator 70 may receive a rectified DC voltage from the rectifier 61 , as an input signal, and compare a normal operational state and an abnormal operational state.
- the abnormal operational state may refer to a case in which an output from the power amplifier is excessive.
- the comparator 70 may include a first comparator 71 and a second comparator 72 .
- the state machine 80 may be connected to the comparator 70 and generate state signals in response to signals output from the comparator 70 .
- the state signals may be four types of signals, i.e., V up , V dn , V pm , and V stop .
- the signal V stop output from the state machine 80 may have a high level.
- the signal V pm output from the state machine 80 may have a high level, and when the magnitude of the signal V p is smaller than that of the signal V dn , the signal V pm output from the state machine 80 may have a low level.
- the bias voltage may be maintained in a current state. Namely, in this case, the bias voltage provided to the power stage 40 and the drive amplifier 20 may be maintained without being changed.
- the bias voltage may be provided in a state being higher than a current state. Namely, in this case, a higher bias voltage than a current state may be provided to the power stage 40 and the drive amplifier 20 .
- the bias voltage may be provided in a state being lower than a current state. Namely, in this case, a lower bias voltage than a current state may be provided to the power stage 40 and the drive amplifier 20 .
- the controller 90 may include a switch controller 91 , a bit controller 92 , and a bias controller 93 .
- the switch controller 91 may be connected to the state machine 80 and receive a signal output from the state machine 80 , as an input signal, and provide an enable signal V VSWR — EN to the bias controller 93 .
- the bit controller 92 may be connected to the state machine 80 and receive a signal output from the state machine 80 , as an input signal, and provide a normal stage signal V normal and an abnormal state signal V VSWR to the bias controller 93 .
- the bias controller 93 may be connected to the switch controller 91 and the bit controller 92 and receive signals from the switch controller 91 and the bit controller 92 , as input signals, and provide a bias voltage to the power stage 40 and the drive amplifier 20 .
- the bias controller 93 may be a multiplexer (MUX).
- the power amplifier can be automatically controlled to maintain performance thereof by sensing an operational state in which output impedance is normal.
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- Power Engineering (AREA)
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Abstract
Description
- This application claims the benefit under 35 U.S.C. Section 119 of Korean Patent Application Serial No. 10-2011-0129134, entitled “Power Amplifier” filed on Dec. 5, 2011, which is hereby incorporated by reference in its entirety into this application.
- 1. Technical Field
- The present invention relates to a power amplifier and, more particularly, to a circuit for preventing an element from being damaged although output impedance of a final transistor is changed in a power amplifier.
- 2. Description of the Related Art
- In a power amplifier, damage to an output terminal element may be attributed to stability of a circuit, but, in most cases, it is ascribed to an electrical load due to a change in an output terminal end load.
- Thus, a power amplifier requires a technique for protecting an output end element, and in a related art, a technique of sensing a current by using a replica circuit and protecting a circuit in the occurrence of an overcurrent in an output end according to the sensing result has been used. However, this technique disadvantageously has a low level of accuracy, a complicated circuit, and degraded efficiency.
- Also, in another related art, in order to protect an output terminal element of the power amplifier, a voltage of an output terminal is sensed and a circuit is protected in the occurrence of an overvoltage in the output terminal according to the sensing result. However, in this technique, a change in impedance in the output terminal may degrade performance in a normal operation.
- The present invention relates to a circuit for preventing damage to an element although output impedance of a final transistor in a power amplifier is changed, relates more particularly, to a circuit for controlling a bias voltage provided according to signal strength and an operational state by coupling a signal between a final output terminal of a transistor and a transformer, namely, a primary signal of the transformer.
- An object of the present invention is to prevent damage to a transistor although output impedance is changed.
- Also, another object of the present invention is to automatically perform a control to maintain performance by sensing an operational state in which output impedance is normal.
- According to an exemplary embodiment of the present invention, there is provided a power amplifier including: a power stage amplifying a signal; a transformer connected to an output terminal of the power stage and coupling a signal output from the power stage; and a controller controlling a bias voltage from the power stage according to the coupled signal.
- The transformer may include: an input terminal connected to an output terminal of the power stage; and an output terminal induction-coupled to the input terminal and providing an entire output.
- The power stage may be operated by a bias voltage input from the controller.
- A plurality of power stages may be provided.
- Characteristics of operation of the plurality of power stages may be determined by efficiency of respective power stages.
- The controller may provide a bias voltage to each of the plurality of power stages.
- The power amplifier may further include: an input matching unit matching a signal input to the power amplifier, to the power amplifier; a drive amplifier connected to the input matching unit and operated by a bias voltage input from the controller; and an inter stage matching the power stage and the drive amplifier.
- The input matching unit may be a balanced-to-unbalanced (Balun) transformer.
- The power stage and the drive amplifier may be a complementary metal-oxide semiconductor (CMOS) or a bipolar junction transistor (BJT).
- The power amplifier may further include: a peak detector receiving a coupled signal from an input terminal of the transformer and detecting strength of the coupled signal; a comparator connected to the peak detector and comparing a normal state signal and an abnormal state signal; and a state machine connected to the comparator and generating state signals in response to signals output from the comparator.
- The peak detector may include a rectifier rectifying the coupled signal from an AC voltage to a DC voltage.
- According to another exemplary embodiment of the present invention, there is provided a power amplifier including: a signal input unit; a power stage amplifying a signal output from the signal input unit; a transformer coupling a signal output from the power stage; a feedback unit feeding back the coupled signal; and a controller controlling a bias voltage of the power stage according to the coupled signal.
- A plurality of power stages may be provided.
- The controller may provide a bias voltage to each of the plurality of power stages.
- The signal input unit may include: an input matching unit matching a signal input to the power amplifier, to the power amplifier; a drive amplifier connected to the input matching unit and operated by a bias voltage input from the controller; and an inter stage matching the power stage and the drive amplifier.
- The feedback unit may include: a peak detector receiving a coupled signal from an input terminal of the transformer and detecting strength of the coupled signal; a comparator connected to the peak detector and comparing a normal state signal and an abnormal state signal; and a state machine connected to the comparator and generating state signals in response to signals output from the comparator.
-
FIG. 1 is a block diagram of a power amplifier according to an embodiment of the present invention. -
FIG. 2 is a circuit diagram of a transformer according to an embodiment of the present invention. -
FIG. 3 is a block diagram of a feedback unit according to an embodiment of the present invention. -
FIG. 4 is a block diagram of a controller according to an embodiment of the present invention. -
FIG. 5 is a truth table of bias signals according to an embodiment of the present invention. - Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings. However, the exemplary embodiments are described by way of examples only and the present invention is not limited thereto.
- In describing the present invention, when a detailed description of well-known technology relating to the present invention may unnecessarily make unclear the spirit of the present invention, a detailed description thereof will be omitted. Further, the following terminologies are defined in consideration of the functions in the present invention and may be construed in different ways by the intention of users and operators. Therefore, the definitions thereof should be construed based on the contents throughout the specification.
- As a result, the spirit of the present invention is determined by the claims and the following exemplary embodiments may be provided to efficiently describe the spirit of the present invention to those skilled in the art.
- Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
-
FIG. 1 is a block diagram of a power amplifier according to an embodiment of the present invention, andFIG. 2 is a circuit diagram of a transformer according to an embodiment of the present invention. - Referring to
FIGS. 1 and 2 , thepower amplifier 100 according to an embodiment of the present invention may include apower stage 40 for amplifying a signal, atransformer 50 connected to an output terminal of thepower stage 40 and coupling a signal output from thepower stage 40, and acontroller 90 controlling a bias voltage of thepower stage 40 according to the coupled signal. - The
power amplifier 100 may further include a signal input unit (not shown) for inputting a signal. In this case, thepower stage 40 may amplify a signal output from the signal input unit (not shown), and thetransformer 50 may couple a signal output from thepower stage 40. - Meanwhile, the
power stage 40 may be operated by a bias voltage input from thecontroller 90. In this case, thepower stage 40 may be a complementary metal-oxide semiconductor (CMOS) or a bipolar junction transistor (BJT). - Also, the
power amplifier 100 may further include a feedback unit (not shown) for feeding back the coupled signal, and thecontroller 90 may control the bias voltage from thepower stage 40 according to the coupled signal. - Thus, in the power amplifier according to an embodiment of the present invention, although output impedance is changed, an excessive output cannot be generated, thus preventing damage to an element. Also, the circuit is simple and efficiency and accuracy can be enhanced, in comparison to the related art using a replica circuit.
- Referring to
FIG. 2 , thetransformer 50 may include an input terminal connected to the output terminal of thepower stage 40 and an output terminal induction-coupled to the input terminal to provide an entire output. In this case, an input terminal signal of thetransformer 50 is coupled to be fed back to the feedback unit (not shown). Namely, the feedback unit (not shown) may copy the input terminal signal of thetransformer 50. - Meanwhile, a plurality of
power stages 40 may be provided. In this case, characteristics of operations of the plurality of power stages may be determined by efficiency of the respective power stages. Also, thecontroller 90 may provide a bias voltage to the plurality of respective power stages. - In this case, a plurality of transformers, a plurality of feedback units, and a plurality of controllers may be provided to be connected to the plurality of respective power stages. Thus, the plurality of feedback units may couple input side signals of the plurality of transformers, respectively, to thereby provide bias voltages to the plurality of power stages through the plurality of controllers, respectively.
- The
power amplifier 100 may further include aninput matching unit 10 for matching a signal, which has been input to thepower amplifier 100, to thepower amplifier 100, adrive amplifier 20 connected to theinput matching unit 10 and operated by a bias voltage input from thecontroller 90, and aninter stage 30 for matching thepower stage 40 and thedrive amplifier 20. - The
input matching unit 10 is used to match a balanced circuit and an unbalanced circuit. Namely, theinput matching unit 10 may be used to match a signal, which has been input to thepower amplifier 100, to thepower amplifier 100. In this case, theinput matching unit 10 may be a balanced-to-unbalanced (Balun) transformer. - The
drive amplifier 20 may be connected to theinput matching unit 10 and operated by a bias voltage input from thecontroller 90. An output terminal signal of thepower stage 40 is required to have a high power level, and in this case, since it is difficult to satisfy both a high power level and a high gain, an extra amplifier having a high gain may be required to be driven. To this end, thedrive amplifier 20 may be positioned in a front stage of thepower stage 40 so as to be operated. In this case, thedrive amplifier 20 may be a CMOS or a BJT. - The
inter stage 30 is connected between thedrive amplifier 20 and thepower stage 40 and is able to make an output signal from thedrive amplifier 20 be transferred with a maximum level of power to thepower stage 40. In this case, theinter stage 30 may be implemented as a circuit by an R-L-C element. -
FIG. 3 is a block diagram of a feedback unit (not shown) according to an embodiment of the present invention,FIG. 4 is a block diagram of a controller according to an embodiment of the present invention, andFIG. 5 is a truth table of bias signals according to an embodiment of the present invention. - Referring to
FIG. 3 , the feedback unit (not shown) may include apeak detector 60 receiving a coupled signal from an input terminal of thetransformer 50 and detecting strength of the coupled signal, acomparator 70 connected to thepeak detector 60 and comparing a normal state signal and an abnormal state signal, and astate machine 80 connected to thecomparator 70 and generating state signals in response to signals output from thecomparator 70. - The
peak detector 60 may receive a primary side signal from the coupledtransformer 50 and detect strength of the primary side signal. Since thepeak detector 60 receives the primary side signal as an input signal by coupling it, thepeak detector 60 is able to detect accurate strength of the signal regardless of a change in output impedance. Namely, in comparison to the related art in which there may be a difference between a primary side signal and a secondary side signal of the transformer due to a change in output impedance, in an embodiment of the present invention, thepeak detector 60 may detect accurate strength of the signal by reflecting a phase of the primary signal of thetransformer 50. - Meanwhile, the
peak detector 60 may include arectifier 61 for rectifying the coupled signal from an AC voltage to a DC voltage. Also, thepeak detector 60 may include an element in which aresistor 62 and a capacitor 63 are connected in parallel. - The
comparator 70 may be connected to thepeak detector 60 and receive an output signal from thepeak detector 60. Thus, thecomparator 70 may receive a rectified DC voltage from therectifier 61, as an input signal, and compare a normal operational state and an abnormal operational state. In this case, the abnormal operational state may refer to a case in which an output from the power amplifier is excessive. Thecomparator 70 may include afirst comparator 71 and asecond comparator 72. - The
state machine 80 may be connected to thecomparator 70 and generate state signals in response to signals output from thecomparator 70. In this case, the state signals may be four types of signals, i.e., Vup, Vdn, Vpm, and Vstop. - When a current state signal is Vp, if the magnitude of the current state signal Vp is between Vup and Vdn, the signal Vstop output from the
state machine 80 may have a high level. When the magnitude of the signal Vp is greater than that of the signal Vup, the signal Vpm output from thestate machine 80 may have a high level, and when the magnitude of the signal Vp is smaller than that of the signal Vdn, the signal Vpm output from thestate machine 80 may have a low level. - Referring to
FIG. 5 , when the signals Vup and Vdn have a low level or a high level, the signal Vpm has a low level while the signal Vstop has a high level, the bias voltage may be maintained in a current state. Namely, in this case, the bias voltage provided to thepower stage 40 and thedrive amplifier 20 may be maintained without being changed. - When the signal Vup has a low level and the signal Vdn has a high level, the signal Vpm has a low level. Thus, the bias voltage may be provided in a state being higher than a current state. Namely, in this case, a higher bias voltage than a current state may be provided to the
power stage 40 and thedrive amplifier 20. - When the signal Vup has a high level and the signal Vdn has a low level, the signal Vpm has a high level. Thus, the bias voltage may be provided in a state being lower than a current state. Namely, in this case, a lower bias voltage than a current state may be provided to the
power stage 40 and thedrive amplifier 20. - Referring to
FIG. 4 , thecontroller 90 may include aswitch controller 91, abit controller 92, and abias controller 93. - The
switch controller 91 may be connected to thestate machine 80 and receive a signal output from thestate machine 80, as an input signal, and provide an enable signal VVSWR— EN to thebias controller 93. - The
bit controller 92 may be connected to thestate machine 80 and receive a signal output from thestate machine 80, as an input signal, and provide a normal stage signal Vnormal and an abnormal state signal VVSWR to thebias controller 93. - The
bias controller 93 may be connected to theswitch controller 91 and thebit controller 92 and receive signals from theswitch controller 91 and thebit controller 92, as input signals, and provide a bias voltage to thepower stage 40 and thedrive amplifier 20. - The
bias controller 93 may be a multiplexer (MUX). - According to the exemplary embodiments of the present invention, although output impedance is changed, damage to the power amplifier can be prevented.
- Also, the power amplifier can be automatically controlled to maintain performance thereof by sensing an operational state in which output impedance is normal.
- Although the preferred embodiments of the present invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims. Accordingly, such modifications, additions, and substitutions should also be understood to fall within the scope of the present invention.
Claims (16)
Applications Claiming Priority (2)
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KR10-2011-0129134 | 2011-12-05 | ||
KR1020110129134A KR101287657B1 (en) | 2011-12-05 | 2011-12-05 | Power amplifier |
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US20130141167A1 true US20130141167A1 (en) | 2013-06-06 |
US8952755B2 US8952755B2 (en) | 2015-02-10 |
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US9660600B2 (en) | 2013-12-23 | 2017-05-23 | Skyworks Solutions, Inc. | Dynamic error vector magnitude compensation |
US9667203B2 (en) | 2011-05-13 | 2017-05-30 | Skyworks Solutions, Inc. | Apparatus and methods power amplifier biasing |
US10666200B2 (en) | 2017-04-04 | 2020-05-26 | Skyworks Solutions, Inc. | Apparatus and methods for bias switching of power amplifiers |
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US11211968B2 (en) | 2019-10-02 | 2021-12-28 | Samsung Electronics Co., Ltd. | Electronic device and method to control communication circuit in electronic device |
WO2023078396A1 (en) * | 2021-11-05 | 2023-05-11 | 广州慧智微电子股份有限公司 | Power amplifier protection circuit and method |
Families Citing this family (2)
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US10263568B2 (en) * | 2017-02-23 | 2019-04-16 | Avaga Technologies International Sales PTE. Limited | Radio frequency feedback power amplifiers |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3078420A (en) * | 1958-09-05 | 1963-02-19 | Avco Mfg Corp | Automatic ferrite loop antenna loading |
US3523260A (en) * | 1969-08-18 | 1970-08-04 | Bendix Corp | Microstrip balun |
US4360787A (en) * | 1979-09-14 | 1982-11-23 | Plessey Overseas Limited | Digitally controlled wide ranch automatic gain control |
US7358807B2 (en) * | 2005-02-25 | 2008-04-15 | Stmicroelectronics S.R.L. | Protection of output stage transistor of an RF power amplifier |
US7486137B2 (en) * | 2006-09-08 | 2009-02-03 | Axiom Microdevices, Inc. | System and method for power amplifier output power control |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4859967A (en) * | 1988-11-09 | 1989-08-22 | Harris Corporation | RF power amplifier protection |
US20060057980A1 (en) | 2004-08-04 | 2006-03-16 | Interdigital Technology Corporation | Transmitter circuit with modulated power amplifier bias control based on RF carrier envelope tracking |
-
2011
- 2011-12-05 KR KR1020110129134A patent/KR101287657B1/en active IP Right Grant
-
2012
- 2012-12-04 US US13/705,090 patent/US8952755B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3078420A (en) * | 1958-09-05 | 1963-02-19 | Avco Mfg Corp | Automatic ferrite loop antenna loading |
US3523260A (en) * | 1969-08-18 | 1970-08-04 | Bendix Corp | Microstrip balun |
US4360787A (en) * | 1979-09-14 | 1982-11-23 | Plessey Overseas Limited | Digitally controlled wide ranch automatic gain control |
US7358807B2 (en) * | 2005-02-25 | 2008-04-15 | Stmicroelectronics S.R.L. | Protection of output stage transistor of an RF power amplifier |
US7486137B2 (en) * | 2006-09-08 | 2009-02-03 | Axiom Microdevices, Inc. | System and method for power amplifier output power control |
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US10805130B2 (en) | 2017-09-12 | 2020-10-13 | Intel IP Corporation | Signal cancellation system and method |
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Also Published As
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KR20130062716A (en) | 2013-06-13 |
US8952755B2 (en) | 2015-02-10 |
KR101287657B1 (en) | 2013-07-24 |
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