US20120152752A1 - Seed layer deposition in microscale features - Google Patents
Seed layer deposition in microscale features Download PDFInfo
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- US20120152752A1 US20120152752A1 US12/971,744 US97174410A US2012152752A1 US 20120152752 A1 US20120152752 A1 US 20120152752A1 US 97174410 A US97174410 A US 97174410A US 2012152752 A1 US2012152752 A1 US 2012152752A1
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- Prior art keywords
- tin
- layer
- workpiece
- substantially pure
- silver
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- 230000008021 deposition Effects 0.000 title claims abstract description 25
- 229910052718 tin Inorganic materials 0.000 claims abstract description 83
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 81
- 238000000034 method Methods 0.000 claims abstract description 68
- QCEUXSAXTBNJGO-UHFFFAOYSA-N [Ag].[Sn] Chemical compound [Ag].[Sn] QCEUXSAXTBNJGO-UHFFFAOYSA-N 0.000 claims abstract description 50
- 229910000679 solder Inorganic materials 0.000 claims abstract description 49
- 229910052751 metal Inorganic materials 0.000 claims abstract description 39
- 239000002184 metal Substances 0.000 claims abstract description 39
- 229910001316 Ag alloy Inorganic materials 0.000 claims abstract description 36
- 238000000151 deposition Methods 0.000 claims abstract description 34
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 44
- 238000007747 plating Methods 0.000 claims description 42
- 238000004070 electrodeposition Methods 0.000 claims description 41
- 229910052709 silver Inorganic materials 0.000 claims description 34
- 239000010949 copper Substances 0.000 claims description 31
- 230000008569 process Effects 0.000 claims description 26
- 239000004332 silver Substances 0.000 claims description 24
- 229910052802 copper Inorganic materials 0.000 claims description 23
- 229910021645 metal ion Inorganic materials 0.000 claims description 23
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 21
- 229910052759 nickel Inorganic materials 0.000 claims description 21
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 20
- 238000007669 thermal treatment Methods 0.000 claims description 17
- 239000000203 mixture Substances 0.000 claims description 16
- 238000004140 cleaning Methods 0.000 claims description 8
- 229920002120 photoresistant polymer Polymers 0.000 claims description 7
- 238000000059 patterning Methods 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 80
- 229910007637 SnAg Inorganic materials 0.000 description 33
- 229910045601 alloy Inorganic materials 0.000 description 16
- 239000000956 alloy Substances 0.000 description 16
- 239000000758 substrate Substances 0.000 description 11
- 238000009713 electroplating Methods 0.000 description 10
- -1 Ag+ ions Chemical class 0.000 description 8
- 239000000463 material Substances 0.000 description 8
- 238000007654 immersion Methods 0.000 description 6
- 239000012530 fluid Substances 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- UUWCBFKLGFQDME-UHFFFAOYSA-N platinum titanium Chemical compound [Ti].[Pt] UUWCBFKLGFQDME-UHFFFAOYSA-N 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 229910000765 intermetallic Inorganic materials 0.000 description 4
- 229910000510 noble metal Inorganic materials 0.000 description 4
- 229910020658 PbSn Inorganic materials 0.000 description 3
- 101150071746 Pbsn gene Proteins 0.000 description 3
- 238000000429 assembly Methods 0.000 description 3
- 230000000712 assembly Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 229910017692 Ag3Sn Inorganic materials 0.000 description 2
- 238000013019 agitation Methods 0.000 description 2
- 229910000905 alloy phase Inorganic materials 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 2
- 238000004100 electronic packaging Methods 0.000 description 2
- 230000005496 eutectics Effects 0.000 description 2
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910001432 tin ion Inorganic materials 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910018082 Cu3Sn Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910001128 Sn alloy Inorganic materials 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000011247 coating layer Substances 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000004320 controlled atmosphere Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000008367 deionised water Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003792 electrolyte Substances 0.000 description 1
- 239000000383 hazardous chemical Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 238000010943 off-gassing Methods 0.000 description 1
- 238000000879 optical micrograph Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000005382 thermal cycling Methods 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- IUTCEZPPWBHGIX-UHFFFAOYSA-N tin(2+) Chemical compound [Sn+2] IUTCEZPPWBHGIX-UHFFFAOYSA-N 0.000 description 1
- QHGNHLZPVBIIPX-UHFFFAOYSA-N tin(ii) oxide Chemical class [Sn]=O QHGNHLZPVBIIPX-UHFFFAOYSA-N 0.000 description 1
- 230000001131 transforming effect Effects 0.000 description 1
- 230000008016 vaporization Effects 0.000 description 1
- 238000009834 vaporization Methods 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Images
Classifications
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/10—Electroplating with more than one layer of the same or of different metals
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/48—After-treatment of electroplated surfaces
- C25D5/50—After-treatment of electroplated surfaces by heat-treatment
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/60—Electroplating characterised by the structure or texture of the layers
- C25D5/615—Microstructure of the layers, e.g. mixed structure
- C25D5/617—Crystalline layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/228—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a liquid phase, e.g. alloy diffusion processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/1146—Plating
- H01L2224/11462—Electroplating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/115—Manufacturing methods by chemical or physical modification of a pre-existing or pre-deposited material
- H01L2224/11502—Pre-existing or pre-deposited material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/118—Post-treatment of the bump connector
- H01L2224/11848—Thermal treatments, e.g. annealing, controlled cooling
- H01L2224/11849—Reflowing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/119—Methods of manufacturing bump connectors involving a specific sequence of method steps
- H01L2224/11901—Methods of manufacturing bump connectors involving a specific sequence of method steps with repetition of the same manufacturing step
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Definitions
- the disclosed embodiments relate generally to a method and apparatus for applying metal structures to a workpiece, and more particularly to a method and apparatus for depositing a lead-free solder into micro-scale patterns in the surface of a workpiece coated with a photo-resist patterning film, and more particularly to a method and apparatus for electroplating tin-silver alloy solder bumps.
- Electrodepositon of lead-free solder such as using through mask patterned deposition, is a technology capable of providing tight pitch bumping (connection pitch less than approximately 300 microns) or microbumping for advanced electronic packaging.
- An alloy of tin (Sn) and silver (Ag) is the leading candidate metal for these applications.
- Substantially pure tin has many desirable properties of a solder metal, for example fatigue, resistance, thermal cycling and ductile mechanical properties, however the industry has found that tin whisker growth in substantially pure tin solder makes it an unreliable joining solder for advanced packaging applications. It has been found that a small addition of silver, between approximately 1% and 4% Ag by weight, may significantly reduce the likelihood of Sn whisker formation in the solder joint. Tin-silver alloy (SnAg) solder plating in a conventional manner is more difficult than substantially pure tin electroplating or lead-tin (PbSn) electroplating because of the large difference in electrochemical reduction potential between tin ( ⁇ 0.13 volts SHE) and silver (+0.799 volts SHE).
- SnAg Tin-silver alloy solder plating in a conventional manner is more difficult than substantially pure tin electroplating or lead-tin (PbSn) electroplating because of the large difference in electrochemical reduction potential between tin ( ⁇
- This reduction potential difference causes Ag + ions in the solution to spontaneously react with metallic Sn and or the stannous ion (Sn +2 ) oxidizing the Sn or Sn +2 to Sn +2 or Sn +4 and thereby immersion depositing metallic Ag on the Sn surface.
- the Ag + ion in the plating solution can immersion deposit on other metals such as nickel or copper.
- Chemical suppliers have developed organic molecules that are to complex the Ag + ion to bring its reduction potential close to that of Sn +2 and thereby stabilize the Ag + ion in the plating solution.
- the organic Ag + ion complex in the plating solution does not eliminate the likelihood of unwanted Ag immersion deposition on the Under Bump Metal (UBM), which is typically Nickel or Copper, when electroplating SnAg lead free solder on such UBM structures.
- UBM Under Bump Metal
- This unwanted immersion deposition may cause void defects at the UBM/SnAg interface, said voids are observable after reflowing the solder, and such voids can cause mechanical and electrical failures of the chip to package joint.
- UBM Under Bump Metal
- FIG. 1 shows a cross sectional view of prior art after the deposition step
- FIG. 2 shows a cross sectional view of prior art after the deposition step
- FIG. 3 shows a cross sectional view of solder bump after thermal treatment
- FIG. 4 shows a top-down section of prior art showing the presence of voids at the UBM to SnAg interface
- FIG. 5 shows a top-down section of the present disclosed embodiments showing absence of voids at the UBM to SnAg interface
- FIG. 6 shows a cross sectional view of the present disclosed embodiments after the second deposition step
- FIG. 7 shows a commercial wafer electro-deposition machine suitable for a manufacturing process using the present disclosed embodiments
- FIG. 8 shows a electro-deposition module
- FIG. 9 shows a process flow diagram.
- FIG. 1 there is shown a cross section of a single bump at the workpiece surface where the workpiece has been prepared for electrodeposition.
- An electrical contact element 101 is substantially surrounded by an insulating film 100 , these type of features are disposed in a semi-periodic array over the integrated circuit workpiece, for example a 300 millimeter silicon wafer may have 1,000 to 100,000 of such electrical contact elements distributed across the surface.
- any suitable workpiece or substrate may be provided, for example, gallium arsenide or otherwise.
- the workpiece is coated with a seed layer 102 and then coated with photoresist 104 which is photo patterned to provide openings into which an under bump metal 106 , such as nickel (Ni) or copper (Cu) or a series of Ni and Cu layers, is electrodeposited.
- Solder metal 120 is electrodeposited onto the under bump metal 106 using the same resist pattern mask layer 104 .
- U.S. Pat. No. 7,012,333 which is hereby incorporated by reference herein in its entirety teaches deposition of a SnAg solder alloy with the alloy being deposited at lower than the SnAg eutectic point which is about 3.5% by weight.
- FIG. 2 there is shown another prior art method of providing lead-free bump, for example a SnAg or SnAgCu alloy where more noble substantially pure metal layer(s) 131 are deposited on the under bump metal prior to the deposition of a substantially pure tin layer 130 .
- U.S. Pat. No. 6,596,621 which is hereby incorporated by reference in its entirety, teaches forming a lead-free SnAgCu bump by using a under bump metal layer 106 comprised of about 2 micron thick Ni and then coating layer 106 with Ag/Cu 131 in proportions to the substantially pure Sn 130 necessary to form a SnAgCu alloy bump with proportions of about 3.5% Ag and about 0.6% Cu and with the balance Sn.
- FIG. 3 shows a cross section of the solder bump after the thermal reflow process.
- a thermal reflow process is advantageous to stabilize the solder bump structure prior to subsequent processing.
- the photoresist 104 (not shown) is removed and the seed layer 102 is etched away everywhere except where it is protected by the under bump metal 106 .
- the wafer is thermally treated in a so-called reflow process step.
- reflow involves heating the workpiece in a controlled atmosphere so that the tin-oxides are substantially removed before the solder melts, which may occur between about 221° C. and about 232° C.
- IMCs intermetallic compounds
- intermetallic structure between the underbump metal (UBM) and the solder, along with a well controlled grain structure within the solder, may influence both the mechanical and electromigration reliability of the solder bump.
- IMC intermetallic structure
- the nucleation and growth of the solder grain structure is strongly influenced by the IMCs that were formed. Prohibiting the presence of Ag away at the underbump metal interface during the initial phase of reflow is advantageous as is demonstrated by comparing FIGS.
- Workpiece 250 is prepared with a structure 252 having electrical contact element 101 that is substantially surrounded by an insulating film 100 , where these type of features are disposed in a semi-periodic array where the workpiece is coated with a seed layer 102 and then coated with photoresist 104 which is photopatterned to provide openings into which an underbump metal 106 , such as nickel (Ni) or copper (Cu) or a series of Ni and Cu layers, is electrodeposited. It is noted that any suitable underbump metal may be provided.
- a substantially pure tin layer 121 is electrodeposited using an electroplating bath with a metal ion content containing no other metal ion besides tin.
- the workpiece 250 may be rinsed to remove the electroplating bath.
- a tin-silver layer 122 is then electrodeposited using the same resist pattern mask layer 104 in another plating bath having a metal ion content including tin and silver ions.
- the thicknesses of the substantially pure Sn layer, T Sn , and of the SnAg layer, T SnAg , and the % Ag in the SnAg layer, C SnAg are adjusted to provide a final composition % Ag according to the following equation:
- % Ag CSnAg ⁇ TSnAg/(TSnAg+TSn).
- the presence of Ag between the Sn and the UBM causes the formation of voids in the intermetallic layer, and these voids reduce the reliability of the solder joint.
- the present disclosed embodiments provide some of the economic benefit of the substantially pure Ag and substantially pure Sn method, for example reducing the solder deposition cost by approximately 50% or more, without the associated disadvantage of worsening the solder joint reliability.
- FIG. 7 there is shown a commercial wafer electro-deposition machine suitable for a manufacturing process using the present disclosed embodiments.
- the disclosed embodiments may be implemented in a commercially available electrodeposition machine such as the Stratus from NEXX Systems in Billerica MA.
- System 200 may incorporate features as disclosed in the International Application WO 2005/042804 A2 published under the Patent Cooperation Treaty and having publication date May 12, 2005 which is hereby incorporated by reference herein in its entirety.
- System 200 is shown in block diagram form as an exemplary system. It is noted that more or less modules may be provided having different configurations and locations.
- the industrial electrodeposition machine 200 may contain load ports 206 by which substrates previously patterned with photoresist as described above are inserted and withdrawn from the system.
- Loading station 204 may have a robotic arm which transfers substrates 278 into substrate-holders 270 , 272 , 274 which are then transferred by transport 280 to modules 210 , 212 , 214 , 216 , 260 , 262 , 264 , 266 and processed in succession,
- the succession may include a copper (Cu) electrodeposition module 216 , a nickel (Ni) electrodeposition module 214 , a tin (Sn) electrodeposition module 212 , a tin-silver (SnAg) electrodeposition module 210 .
- the substrates may then be returned to the loading station 204 which unloads the substrates and passes them through a substrate cleaning module 202 from which they are returned to the load ports 206 .
- Cleaning steps using de-ionized water for example, may be disposed before and after the electrodeposition steps, for example, cleaning modules 260 , 262 , 264 , 266 may be provided. Alternately, modules 260 , 262 , 264 and 266 may be rinse or thermal treatment modules as well as clean modules.
- Controller(s) 220 may be provided within each station or module to sequence the process and/or transport within the station or module.
- a system controller(s) 222 may be provided within the system 200 to sequence substrates between the stations or process modules and to coordinate system actions, such as, host communication, lot loading and unloading or otherwise those actions that are required to control the system 200 .
- Controller 222 may be programmable to plate the workpiece with substantially pure tin in process module 212 disposed to support a plating bath having a suitable metal ion content (e.g. such as that described above). It is noted that the process module 212 may include either a pure tin anode or an insoluble platinum-titanium (Pt—Ti) anode. Controller 222 may be further programmable to rinse the workpiece in a rinse tank disposed to support rinsing substantially all of the substantially pure tin plating chemistry from the workpiece. Controller 222 may further be programmable to plate the workpiece with tin and silver in process module 210 disposed to support a plating bath with a suitable metal ion content (e.g.
- the process module may include, for example, an insoluble Pt—Ti anode or any other suitable anode.
- Controller 222 or any other suitable controller may further be programmable to thermally treat the workpiece in a thermal treatment module disposed to thermally treat the workpiece to cause the tin and tin-silver layers to intermix and form a substantially uniform tin-silver alloy feature.
- Controller 222 may be further programmable to deposit copper on the workpiece with copper electrodeposition module 216 .
- Controller 222 may further be programmable to deposit nickel on the workpiece with nickel electrodeposition module 214 .
- Controller 222 may further be programmable to clean the workpiece with clean module 260 .
- Electrodeposition modules 210 , 212 , 214 , 216 and four cleaning modules 260 , 262 , 264 , 266 are shown. It is noted, however, that more or less modules may be provided. By way of example, only tin (Sn) electrodeposition module(s) and tin-silver (SnAg) electrodeposition module(s) may be provided. As a further example, separate tools having tin (Sn) electrodeposition module(s) and tin-silver (SnAg) electrodeposition module(s) may be provided. As a further example, multiple duplicate electrodeposition modules may be provided to allow multiple workpieces to be processed in parallel to increase the throughput of the system. As such, all such variations, alternatives and modifications of system configurations are embraced.
- Electrodeposition module 210 may incorporate features as do modules found in Stratus tools from NEXX Systems in Billerica MA and may incorporate features as disclosed in the International Application WO 2005/042804 A2 published under the Patent Cooperation Treaty and having publication date May 12, 2005 which is hereby incorporated by reference herein in its entirety.
- Exemplary electrodeposition module has housing 300 which contains fluid 302 where fluid 302 may flow through housing 300 and where fluid 302 may be a circulated electrolyte.
- Workpiece holder 272 may be removable from housing 300 by handler 280 and may hold substrates 278 . Although two substrates are shown, holder may hold more or less substrate(s).
- Anodes 310 , 312 are provided with shield plates 314 , 316 and paddle or fluid agitation assemblies 318 and 320 . It is noted that more or less assemblies may be provided. For example, a single anode may be provided. By way of further example, the anode may be part of housing 300 or shield plates 314 , 316 and paddle or fluid agitation assemblies 318 and 320 may not be provided.
- controller(s) 220 may be suitably programmed to effect the process at least in part in an automatic manner.
- FIG. 9 there is shown an exemplary process flow diagram 400 showing a method for forming a lead free solder bump on a workpiece.
- a workpiece with an electrically conducting seed layer covered by a patterned resist mask layer having a plurality of openings may be provided, block 402 , for instance in the apparatus.
- the workpiece may be immersed, block 404 , in a tin plating bath containing, for example, a substantially pure tin anode or an insoluble platinum-titanium anode.
- electrical contact to the seed layer may be formed and electrical potential applied between the workpiece and the anode to cause substantially pure tin to be deposited, for example, between about 2 and about 150 microns of tin to deposit in the resist pattern features.
- the workpiece may be moved to a rinse tank.
- substantially all of the substantially pure tin plating chemistry from the workpiece may be rinsed.
- the workpiece may be removed from the rinse tank, block 412 , and immersed in a plating bath containing tin and silver ions and an anode (e.g. such as, for example, an insoluble platinum-titanium anode), block 414 .
- an anode e.g. such as, for example, an insoluble platinum-titanium anode
- Electrical contact to the seed layer may be formed as per block 416 , and electrical potential applied between the workpiece and the anode to cause tin-silver alloy to deposit. For example, between about 2 and about 150 microns of a tin-silver alloy may be deposited in the resist pattern features.
- the photoresist patterning layer may be removed, and substantially all of the seed layer not covered by the plated tin and tin-silver alloy may be removed, per block 420 .
- Thermally treating the workpiece such as in block 422 , for example, at between about 210° C. to about 230° C.
- the tin and tin-silver layers may have any suitable thickness or composition, for example, the tin layer may be about 30 microns and the tin-silver alloy layer is about 30 microns and the tin-silver alloy composition may be between about 1% and about 7% silver by weight before thermal treatment and about 0.5% to about 3.5% silver by weight after thermal treatment.
- the tin layer may be about 10 microns and the tin-silver alloy layer may be about 10 microns and the tin-silver alloy composition may be between about 1% and about 7% silver by weight before thermal treatment and about 0.5% to about 3.5% silver by weight after thermal treatment.
- the tin layer may be about one-fourth the thickness of the tin-silver layer.
- process 400 may provide more or less steps or one or more steps may be combined in one or more step or process.
- the tin layer may be about 1 micron or 10 microns and the tin-silver layer may be between about 20 microns to about 120 microns.
- a method of forming a metal feature on a workpiece with deposition is provided.
- the workpiece is provided with an under bump metal layer for solder of an electronic device.
- a substantially pure tin layer is deposited directly to the under bump metal layer.
- a tin silver alloy layer is deposited onto the substantially pure tin layer.
- substantially all of the substantially pure tin plating chemistry from the workpiece may be rinsed.
- the deposition is accomplished by electrodeposition.
- the under bump metal comprises either copper or nickel.
- an apparatus for forming a lead free solder bump on a workpiece having an electrically conducting seed layer, the electrically conducting seed layer covered by a patterned resist mask layer having a plurality of feature openings has a first plating bath with a metal ion content adapted to deposit a substantially pure tin layer in the resist pattern features.
- a rinse tank may be provided and adapted to rinse substantially all of the substantially pure tin plating chemistry from the workpiece.
- a second plating bath is provided with a metal ion content adapted to deposit a tin-silver alloy layer in the resist pattern features.
- a copper electrodeposition module is provided.
- a copper electrodeposition module and a nickel electrodeposition module are provided.
- a cleaning module is provided.
- an electronic device having a lead free solder feature is prepared by a process having a step of depositing a substantially pure tin layer directly to a layer of under bump metal for solder of the electronic device.
- a step of depositing a tin silver alloy layer onto the substantially pure tin layer is provided.
- a step of rinsing substantially all of the substantially pure tin plating chemistry from the electronic device may be provided.
- the deposition is accomplished by electrodeposition.
- the under bump metal comprises either copper or nickel.
- a method for forming a lead free solder bump on a workpiece comprising providing a step of providing the workpiece with an electrically conducting seed layer, the electrically conducting seed layer covered by a patterned resist mask layer having a plurality of feature openings.
- the workpiece is immersed in a first plating bath with a metal ion content.
- the method comprises providing electrical contact to the seed layer and providing an electrical potential through the metal ion content of the first plating bath to cause between about 2 and about 150 microns of substantially pure tin to deposit in the resist pattern features.
- the workpiece is immersed in a second plating bath with a metal ion content. Electrical contact to the seed layer is formed and an electrical potential between through the metal ion content in the second plating bath is provided to cause between about 2 and about 150 microns of a tin-silver alloy to deposit in the resist pattern features is provided.
- the method may include moving the workpiece to a rinse tank, rinsing substantially all of the substantially pure tin plating chemistry from the workpiece is provided, and removing the workpiece from the rinse tank is provided.
- removal of the photoresist patterning layer is provided.
- substantially all of the seed layer not covered by the plated tin and tin-silver alloy is removed.
- thermally treating the workpiece at between about 210 to about 230 degrees centigrade to cause the tin and tin-silver layers to intermix and form a substantially uniform tin-silver alloy feature is provided.
- the tin layer is about 30 microns and the tin-silver alloy layer is about 30 microns, and wherein the tin-silver alloy composition is between about 1% and about 7% silver by weight before thermal treatment and about 0.5% to about 3.5% silver by weight after thermal treatment.
- the tin layer is about 1 micron or about 10 microns and the tin-silver alloy layer is between about 20 microns to about 120 microns.
- the tin layer is 10 microns and the tin-silver alloy layer is about 10 microns, and wherein the tin-silver alloy composition is between about 1% and about 7% silver by weight before thermal treatment and about 0.5% to about 3.5% silver by weight after thermal treatment.
- the tin layer is about one-fourth the thickness of the tin-silver layer.
- an apparatus for forming a lead free solder bump on a workpiece having an electrically conducting seed layer, the electrically conducting seed layer covered by a patterned resist mask layer having a plurality of feature openings has a controller programmable to plate the workpiece with substantially pure tin in a first process module disposed to support a first plating bath having a metal ion content adapted to deposit a substantially pure tin layer on the workpiece.
- the controller is further programmable to plate the workpiece with tin and silver in a second process module disposed to support a second plating bath with a metal ion content adapted to deposit a tin and silver layer on the workpiece.
- the controller is further programmable to rinse the workpiece in a rinse tank disposed to support rinsing substantially all of the substantially pure tin plating chemistry from the workpiece.
- the controller is further programmable to deposit copper on the workpiece with a copper electrodeposition module.
- the controller is further programmable to deposit nickel on the workpiece with a nickel electrodeposition module.
- the controller is further programmable to clean the workpiece with a clean module.
- a method for processing one or more workpieces to electrochemically form a pattern of lead-free bumps on a workpiece is provided.
- the lead-free bump is formed by a substantially two step deposition process, the first step being through mask deposition of substantially pure tin from an electroplating solution containing tin-ions (e.g. a metal ion content), and a second step being through mask deposition of tin-silver alloy from an electroplating solution containing a controlled mixture of tin-ions and silver ions (e.g.
- the two steps being controlled to provide target layer 1 and layer 2 thicknesses, T1 and T2, along with the second step being controlled to provide X% alloy composition, such that after a subsequent thermal treatment the two layers intermix and form a substantially uniform alloy of tin-silver (SnAg), said alloy having a concentration intermediate between the deposited X% Ag in the alloy deposition step and the 0% Ag in the substantially pure tin deposition step.
- the disclosed embodiments prevent the immersion deposition of noble metal ion, such as Ag, and organic complexor on the Under Bump Material (UBM) surface to eliminate the potential forming of voids between the UBM and solder interface.
- noble metal ion such as Ag
- UBM Under Bump Material
- a less noble metal layer such as substantially pure Tin, is electrodeposited on the UBM before the lead-free solder alloy of Sn and more noble metal such as Ag and/or Cu is co-deposited with Sn as a SnAg or SnAgCu alloy to form a bump for electronic packaging.
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Abstract
Description
- 1. Field
- The disclosed embodiments relate generally to a method and apparatus for applying metal structures to a workpiece, and more particularly to a method and apparatus for depositing a lead-free solder into micro-scale patterns in the surface of a workpiece coated with a photo-resist patterning film, and more particularly to a method and apparatus for electroplating tin-silver alloy solder bumps.
- 2. Brief Description of Related Developments
- The semiconductor industry has been working towards eliminating lead in electronics, as required under the European Union's Restriction of Hazardous Substances (RoHS) Directive. The industry is moving faster than the regulation to offer “green” consumer's electronics with lead-free packaging. Electrodepositon of lead-free solder such as using through mask patterned deposition, is a technology capable of providing tight pitch bumping (connection pitch less than approximately 300 microns) or microbumping for advanced electronic packaging. An alloy of tin (Sn) and silver (Ag) is the leading candidate metal for these applications. Substantially pure tin has many desirable properties of a solder metal, for example fatigue, resistance, thermal cycling and ductile mechanical properties, however the industry has found that tin whisker growth in substantially pure tin solder makes it an unreliable joining solder for advanced packaging applications. It has been found that a small addition of silver, between approximately 1% and 4% Ag by weight, may significantly reduce the likelihood of Sn whisker formation in the solder joint. Tin-silver alloy (SnAg) solder plating in a conventional manner is more difficult than substantially pure tin electroplating or lead-tin (PbSn) electroplating because of the large difference in electrochemical reduction potential between tin (−0.13 volts SHE) and silver (+0.799 volts SHE). This reduction potential difference causes Ag+ ions in the solution to spontaneously react with metallic Sn and or the stannous ion (Sn+2) oxidizing the Sn or Sn+2 to Sn+2 or Sn+4 and thereby immersion depositing metallic Ag on the Sn surface. Similarly the Ag+ ion in the plating solution can immersion deposit on other metals such as nickel or copper. Chemical suppliers have developed organic molecules that are to complex the Ag+ ion to bring its reduction potential close to that of Sn+2 and thereby stabilize the Ag+ ion in the plating solution. The organic Ag+ ion complex in the plating solution does not eliminate the likelihood of unwanted Ag immersion deposition on the Under Bump Metal (UBM), which is typically Nickel or Copper, when electroplating SnAg lead free solder on such UBM structures. This unwanted immersion deposition may cause void defects at the UBM/SnAg interface, said voids are observable after reflowing the solder, and such voids can cause mechanical and electrical failures of the chip to package joint. There is therefore a need for an alternate method of electroplating SnAg solder to form reliable lead-free bump attachment to the underlying metal to solve the problem facing the electronics industry as it moves toward eliminating all lead from integrated circuit products. Further, the industry also needs to develop economical methods of replacing the lead-tin (PbSn) plated bump structures with a lead-free (SnAg) plated bump structures. Due to the high cost of the Ag-complexor and other components in commercial SnAg plating chemistries, the typical cost of SnAg plated bumps is several multiples of the PbSn bumps. Existing methods of electrodepositing SnAg bumps involve expensive control systems in the manufacturing equipment, for example as described in U.S. patent application Ser. No. 11/840,748, which is hereby incorporated by reference in its entirety discloses a commercial plating equipment with a control system to ensure that a constant alloy composition is provided in the solder metal throughout the deposition. There is therefore a need for a method of SnAg electroplating that minimizes the use of expensive chemistry while providing a reliable interface between the SnAg and the underlying metal.
- The foregoing aspects and other features of the embodiments are explained in the following description, taken in connection with the accompanying drawings. The technology described above may be better understood by referring to the following description taken in conjunction with the accompanying drawings. In the drawings, like reference characters generally refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the technology.
-
FIG. 1 shows a cross sectional view of prior art after the deposition step; -
FIG. 2 shows a cross sectional view of prior art after the deposition step; -
FIG. 3 shows a cross sectional view of solder bump after thermal treatment; -
FIG. 4 shows a top-down section of prior art showing the presence of voids at the UBM to SnAg interface; -
FIG. 5 shows a top-down section of the present disclosed embodiments showing absence of voids at the UBM to SnAg interface; -
FIG. 6 shows a cross sectional view of the present disclosed embodiments after the second deposition step; -
FIG. 7 shows a commercial wafer electro-deposition machine suitable for a manufacturing process using the present disclosed embodiments; -
FIG. 8 shows a electro-deposition module; and -
FIG. 9 shows a process flow diagram. - Although the present embodiments will be described with reference to the embodiments shown in the drawings, it should be understood that the embodiments can be embodied in many alternate forms of embodiments. In addition, any suitable size, shape or type of elements or materials could be used. The present disclosed embodiments provide a method of providing a reliable interface between an electrodeposited lead-free solder bump and an underlying bump metal (UBM).
- Referring now to
FIG. 1 , there is shown a cross section of a single bump at the workpiece surface where the workpiece has been prepared for electrodeposition. Anelectrical contact element 101 is substantially surrounded by aninsulating film 100, these type of features are disposed in a semi-periodic array over the integrated circuit workpiece, for example a 300 millimeter silicon wafer may have 1,000 to 100,000 of such electrical contact elements distributed across the surface. It is noted that any suitable workpiece or substrate may be provided, for example, gallium arsenide or otherwise. The workpiece is coated with aseed layer 102 and then coated withphotoresist 104 which is photo patterned to provide openings into which an underbump metal 106, such as nickel (Ni) or copper (Cu) or a series of Ni and Cu layers, is electrodeposited.Solder metal 120 is electrodeposited onto the underbump metal 106 using the same resistpattern mask layer 104. For example, U.S. Pat. No. 7,012,333 which is hereby incorporated by reference herein in its entirety teaches deposition of a SnAg solder alloy with the alloy being deposited at lower than the SnAg eutectic point which is about 3.5% by weight. - Referring now to
FIG. 2 , there is shown another prior art method of providing lead-free bump, for example a SnAg or SnAgCu alloy where more noble substantially pure metal layer(s) 131 are deposited on the under bump metal prior to the deposition of a substantiallypure tin layer 130. U.S. Pat. No. 6,596,621, which is hereby incorporated by reference in its entirety, teaches forming a lead-free SnAgCu bump by using a underbump metal layer 106 comprised of about 2 micron thick Ni and thencoating layer 106 with Ag/Cu 131 in proportions to the substantiallypure Sn 130 necessary to form a SnAgCu alloy bump with proportions of about 3.5% Ag and about 0.6% Cu and with the balance Sn. - Referring now to
FIG. 3 , the potential drawbacks of these prior art approaches will be discussed whereFIG. 3 shows a cross section of the solder bump after the thermal reflow process. A thermal reflow process is advantageous to stabilize the solder bump structure prior to subsequent processing. After the electrodeposition step, the photoresist 104 (not shown) is removed and theseed layer 102 is etched away everywhere except where it is protected by the underbump metal 106. Subsequently the wafer is thermally treated in a so-called reflow process step. Briefly described, reflow involves heating the workpiece in a controlled atmosphere so that the tin-oxides are substantially removed before the solder melts, which may occur between about 221° C. and about 232° C. for SnAg alloy; about 221° C. being the SnAg eutectic at composition of about 3.5% Ag and about 232° C. being the substantially pure Sn melting point, when the solder changes phase from solid to liquid the surface tension causes the metal volume to change shape, transforming into a substantiallyspherical shape 126 as the liquid surface tension minimizes the surface area. Also occurring at the elevated temperature is the formation of a layer of intermetallic compounds (IMCs) 128 which are a mixture of several alloy phases, for example at a Cu/Sn interface the IMCs will be a combination of Cu5Sn6 and Cu3Sn alloy phases. Also occurring at the elevated temperature is the vaporization and outgassing of various organic molecules that may be incorporated into the solder during the deposition process. These elevated temperature processes are halted by cooling down the wafer or substrate, causing the solder to solidify, wherein the solid solder is composed of many sub-micron sized grains which can have different sizes and compositions. For example, U.S. Pat. No. 6,805,974, which is hereby incorporated by reference herein in its entirety, teaches the importance of controlling the alloy composition and the cool-down rate to avoid the unwanted formation of large Ag3Sn plate shaped grains and instead form a fine grained dispersion of Sn grains and Ag3Sn small grains. - The importance of providing a repeatable and well controlled intermetallic structure (IMC) between the underbump metal (UBM) and the solder, along with a well controlled grain structure within the solder, may influence both the mechanical and electromigration reliability of the solder bump. In addition, during cooldown the nucleation and growth of the solder grain structure is strongly influenced by the IMCs that were formed. Prohibiting the presence of Ag away at the underbump metal interface during the initial phase of reflow is advantageous as is demonstrated by comparing
FIGS. 4 and 5 which showoptical microscope images interface region FIG. 4 for example, frequent occurrence ofinterface voids FIG. 5 , no such occurrence of interface voids occur. The substantially pure Sn layer/bath may be referred to as, for example, a commercially available substantially pure Sn material or bath such as available from Dow Chemical. - Referring now to
FIG. 6 , there is shown a single bump structure in cross section.Workpiece 250 is prepared with astructure 252 havingelectrical contact element 101 that is substantially surrounded by an insulatingfilm 100, where these type of features are disposed in a semi-periodic array where the workpiece is coated with aseed layer 102 and then coated withphotoresist 104 which is photopatterned to provide openings into which anunderbump metal 106, such as nickel (Ni) or copper (Cu) or a series of Ni and Cu layers, is electrodeposited. It is noted that any suitable underbump metal may be provided. A substantiallypure tin layer 121 is electrodeposited using an electroplating bath with a metal ion content containing no other metal ion besides tin. It is noted that theworkpiece 250 may be rinsed to remove the electroplating bath. A tin-silver layer 122 is then electrodeposited using the same resistpattern mask layer 104 in another plating bath having a metal ion content including tin and silver ions. The thicknesses of the substantially pure Sn layer, TSn, and of the SnAg layer, TSnAg, and the % Ag in the SnAg layer, CSnAg, are adjusted to provide a final composition % Ag according to the following equation: -
% Ag=CSnAg×TSnAg/(TSnAg+TSn). - For example, to achieve a final composition % Ag equal to 1.5% Ag the TSn=TSnAg and CSnAg=3.0% .
- It has been considered to apply substantially pure silver (Ag) and substantially pure tin (Sn) to facilitate fabrication of the SnAg alloy, or even to apply Ag, then Cu, then Sn which would then be reflowed to form a SnAgCu alloy, this method could have particular cost advantages since substantially pure Ag and substantially pure Sn plating materials are less expensive then SnAg alloy plating. When using a combination of substantially pure metal layers it is necessary to apply the more noble metals prior to applying the substantially pure tin for two reasons: (1) electrodeposition of Ag onto a Sn surface is difficult to control because of the problem of uncontrolled Ag immersion deposition on Sn, thereby producing an unstable Sn/Ag interface which will cause production control problems between the deposition step and the thermal treatment reflow step; (2) during the thermal reflow process the substantially pure Ag doesn't melt, instead it dissolves into the Sn, and therefore a Ag metal layer would be unstable on the melted tin solder ball, drifting around during the period between Sn melting and Ag fully dissolving into the Sn. However, to apply the Ag directly on top of the UBM material during the reflow process where the intermetallic layer is formed, the presence of Ag between the Sn and the UBM causes the formation of voids in the intermetallic layer, and these voids reduce the reliability of the solder joint. Because the SnAg materials are several times more expensive than Sn materials the present disclosed embodiments provide some of the economic benefit of the substantially pure Ag and substantially pure Sn method, for example reducing the solder deposition cost by approximately 50% or more, without the associated disadvantage of worsening the solder joint reliability.
- Referring now to
FIG. 7 , there is shown a commercial wafer electro-deposition machine suitable for a manufacturing process using the present disclosed embodiments. The disclosed embodiments may be implemented in a commercially available electrodeposition machine such as the Stratus from NEXX Systems in Billerica MA.System 200 may incorporate features as disclosed in the International Application WO 2005/042804 A2 published under the Patent Cooperation Treaty and having publication date May 12, 2005 which is hereby incorporated by reference herein in its entirety.System 200 is shown in block diagram form as an exemplary system. It is noted that more or less modules may be provided having different configurations and locations. Theindustrial electrodeposition machine 200 may containload ports 206 by which substrates previously patterned with photoresist as described above are inserted and withdrawn from the system.Loading station 204 may have a robotic arm which transferssubstrates 278 into substrate-holders transport 280 tomodules electrodeposition module 216, a nickel (Ni)electrodeposition module 214, a tin (Sn)electrodeposition module 212, a tin-silver (SnAg)electrodeposition module 210. The substrates may then be returned to theloading station 204 which unloads the substrates and passes them through asubstrate cleaning module 202 from which they are returned to theload ports 206. Cleaning steps, using de-ionized water for example, may be disposed before and after the electrodeposition steps, for example, cleaningmodules modules system 200 to sequence substrates between the stations or process modules and to coordinate system actions, such as, host communication, lot loading and unloading or otherwise those actions that are required to control thesystem 200.Controller 222 may be programmable to plate the workpiece with substantially pure tin inprocess module 212 disposed to support a plating bath having a suitable metal ion content (e.g. such as that described above). It is noted that theprocess module 212 may include either a pure tin anode or an insoluble platinum-titanium (Pt—Ti) anode.Controller 222 may be further programmable to rinse the workpiece in a rinse tank disposed to support rinsing substantially all of the substantially pure tin plating chemistry from the workpiece.Controller 222 may further be programmable to plate the workpiece with tin and silver inprocess module 210 disposed to support a plating bath with a suitable metal ion content (e.g. such as that described above). It is noted that the process module may include, for example, an insoluble Pt—Ti anode or any other suitable anode.Controller 222 or any other suitable controller may further be programmable to thermally treat the workpiece in a thermal treatment module disposed to thermally treat the workpiece to cause the tin and tin-silver layers to intermix and form a substantially uniform tin-silver alloy feature.Controller 222 may be further programmable to deposit copper on the workpiece withcopper electrodeposition module 216.Controller 222 may further be programmable to deposit nickel on the workpiece withnickel electrodeposition module 214.Controller 222 may further be programmable to clean the workpiece withclean module 260. In the embodiment shown, fourelectrodeposition modules cleaning modules - Referring now to
FIG. 8 , there is shown a block diagram of an exemplaryelectrodeposition process module 210.Electrodeposition module 210 may incorporate features as do modules found in Stratus tools from NEXX Systems in Billerica MA and may incorporate features as disclosed in the International Application WO 2005/042804 A2 published under the Patent Cooperation Treaty and having publication date May 12, 2005 which is hereby incorporated by reference herein in its entirety. Exemplary electrodeposition module hashousing 300 which containsfluid 302 where fluid 302 may flow throughhousing 300 and where fluid 302 may be a circulated electrolyte.Workpiece holder 272 may be removable fromhousing 300 byhandler 280 and may holdsubstrates 278. Although two substrates are shown, holder may hold more or less substrate(s).Anodes shield plates fluid agitation assemblies housing 300 orshield plates fluid agitation assemblies - The illustrated process may be performed, such as will be described further below with
apparatus 200 for example. As may be realized, controller(s) 220 may be suitably programmed to effect the process at least in part in an automatic manner. - Referring now to
FIG. 9 , there is shown an exemplary process flow diagram 400 showing a method for forming a lead free solder bump on a workpiece. In accordance with the exemplary embodiment, for example, a workpiece with an electrically conducting seed layer covered by a patterned resist mask layer having a plurality of openings may be provided, block 402, for instance in the apparatus. The workpiece may be immersed, block 404, in a tin plating bath containing, for example, a substantially pure tin anode or an insoluble platinum-titanium anode. Inblock 404, electrical contact to the seed layer may be formed and electrical potential applied between the workpiece and the anode to cause substantially pure tin to be deposited, for example, between about 2 and about 150 microns of tin to deposit in the resist pattern features. Inblock 408, the workpiece may be moved to a rinse tank. Inblock 410, substantially all of the substantially pure tin plating chemistry from the workpiece may be rinsed. The workpiece may be removed from the rinse tank, block 412, and immersed in a plating bath containing tin and silver ions and an anode (e.g. such as, for example, an insoluble platinum-titanium anode), block 414. Electrical contact to the seed layer may be formed as perblock 416, and electrical potential applied between the workpiece and the anode to cause tin-silver alloy to deposit. For example, between about 2 and about 150 microns of a tin-silver alloy may be deposited in the resist pattern features. Inblock 418, the photoresist patterning layer may be removed, and substantially all of the seed layer not covered by the plated tin and tin-silver alloy may be removed, perblock 420. Thermally treating the workpiece such as inblock 422, for example, at between about 210° C. to about 230° C. (degrees centigrade) may cause the tin and tin-silver layers to intermix and form a substantially uniform tin-silver alloy feature as desired. In theexemplary process 400, the tin and tin-silver layers may have any suitable thickness or composition, for example, the tin layer may be about 30 microns and the tin-silver alloy layer is about 30 microns and the tin-silver alloy composition may be between about 1% and about 7% silver by weight before thermal treatment and about 0.5% to about 3.5% silver by weight after thermal treatment. By way of further example, the tin layer may be about 10 microns and the tin-silver alloy layer may be about 10 microns and the tin-silver alloy composition may be between about 1% and about 7% silver by weight before thermal treatment and about 0.5% to about 3.5% silver by weight after thermal treatment. By way of further example, the tin layer may be about one-fourth the thickness of the tin-silver layer. Further, in the embodiments,process 400 may provide more or less steps or one or more steps may be combined in one or more step or process. By way of further example, the tin layer may be about 1 micron or 10 microns and the tin-silver layer may be between about 20 microns to about 120 microns. - In accordance with an embodiment, a method of forming a metal feature on a workpiece with deposition is provided. The workpiece is provided with an under bump metal layer for solder of an electronic device. A substantially pure tin layer is deposited directly to the under bump metal layer. A tin silver alloy layer is deposited onto the substantially pure tin layer.
- In the embodiment, substantially all of the substantially pure tin plating chemistry from the workpiece may be rinsed.
- In the embodiment, the deposition is accomplished by electrodeposition.
- In the embodiment, the under bump metal comprises either copper or nickel.
- In the embodiment, an apparatus for forming a lead free solder bump on a workpiece having an electrically conducting seed layer, the electrically conducting seed layer covered by a patterned resist mask layer having a plurality of feature openings is provided. The apparatus has a first plating bath with a metal ion content adapted to deposit a substantially pure tin layer in the resist pattern features. A rinse tank may be provided and adapted to rinse substantially all of the substantially pure tin plating chemistry from the workpiece. A second plating bath is provided with a metal ion content adapted to deposit a tin-silver alloy layer in the resist pattern features.
- In the embodiment, a copper electrodeposition module is provided.
- In the embodiment, a copper electrodeposition module and a nickel electrodeposition module are provided.
- In the embodiment, a cleaning module is provided.
- In the embodiment, an electronic device having a lead free solder feature is prepared by a process having a step of depositing a substantially pure tin layer directly to a layer of under bump metal for solder of the electronic device. A step of depositing a tin silver alloy layer onto the substantially pure tin layer is provided.
- In the embodiment, a step of rinsing substantially all of the substantially pure tin plating chemistry from the electronic device may be provided.
- In the embodiment, the deposition is accomplished by electrodeposition.
- In the embodiment, the under bump metal comprises either copper or nickel.
- In the embodiment, a method for forming a lead free solder bump on a workpiece is provided, the method comprising providing a step of providing the workpiece with an electrically conducting seed layer, the electrically conducting seed layer covered by a patterned resist mask layer having a plurality of feature openings. The workpiece is immersed in a first plating bath with a metal ion content. The method comprises providing electrical contact to the seed layer and providing an electrical potential through the metal ion content of the first plating bath to cause between about 2 and about 150 microns of substantially pure tin to deposit in the resist pattern features. The workpiece is immersed in a second plating bath with a metal ion content. Electrical contact to the seed layer is formed and an electrical potential between through the metal ion content in the second plating bath is provided to cause between about 2 and about 150 microns of a tin-silver alloy to deposit in the resist pattern features is provided.
- In the embodiment, the method may include moving the workpiece to a rinse tank, rinsing substantially all of the substantially pure tin plating chemistry from the workpiece is provided, and removing the workpiece from the rinse tank is provided.
- In the embodiment, removal of the photoresist patterning layer is provided.
- In the embodiment, substantially all of the seed layer not covered by the plated tin and tin-silver alloy is removed.
- In the embodiment, thermally treating the workpiece at between about 210 to about 230 degrees centigrade to cause the tin and tin-silver layers to intermix and form a substantially uniform tin-silver alloy feature is provided.
- In the embodiment, the tin layer is about 30 microns and the tin-silver alloy layer is about 30 microns, and wherein the tin-silver alloy composition is between about 1% and about 7% silver by weight before thermal treatment and about 0.5% to about 3.5% silver by weight after thermal treatment.
- In the embodiment, the tin layer is about 1 micron or about 10 microns and the tin-silver alloy layer is between about 20 microns to about 120 microns.
- In the embodiment, the tin layer is 10 microns and the tin-silver alloy layer is about 10 microns, and wherein the tin-silver alloy composition is between about 1% and about 7% silver by weight before thermal treatment and about 0.5% to about 3.5% silver by weight after thermal treatment.
- In the embodiment, the tin layer is about one-fourth the thickness of the tin-silver layer.
- In the embodiment, an apparatus for forming a lead free solder bump on a workpiece having an electrically conducting seed layer, the electrically conducting seed layer covered by a patterned resist mask layer having a plurality of feature openings is provided. The apparatus has a controller programmable to plate the workpiece with substantially pure tin in a first process module disposed to support a first plating bath having a metal ion content adapted to deposit a substantially pure tin layer on the workpiece. The controller is further programmable to plate the workpiece with tin and silver in a second process module disposed to support a second plating bath with a metal ion content adapted to deposit a tin and silver layer on the workpiece.
- In the embodiment, the controller is further programmable to rinse the workpiece in a rinse tank disposed to support rinsing substantially all of the substantially pure tin plating chemistry from the workpiece.
- In the embodiment, the controller is further programmable to deposit copper on the workpiece with a copper electrodeposition module.
- In the embodiment, the controller is further programmable to deposit nickel on the workpiece with a nickel electrodeposition module.
- In the embodiment, the controller is further programmable to clean the workpiece with a clean module.
- In the exemplary embodiment, a method for processing one or more workpieces to electrochemically form a pattern of lead-free bumps on a workpiece is provided. In one embodiment the lead-free bump is formed by a substantially two step deposition process, the first step being through mask deposition of substantially pure tin from an electroplating solution containing tin-ions (e.g. a metal ion content), and a second step being through mask deposition of tin-silver alloy from an electroplating solution containing a controlled mixture of tin-ions and silver ions (e.g. a metal ion content), the two steps being controlled to provide
target layer 1 and layer 2 thicknesses, T1 and T2, along with the second step being controlled to provide X% alloy composition, such that after a subsequent thermal treatment the two layers intermix and form a substantially uniform alloy of tin-silver (SnAg), said alloy having a concentration intermediate between the deposited X% Ag in the alloy deposition step and the 0% Ag in the substantially pure tin deposition step. The disclosed embodiments prevent the immersion deposition of noble metal ion, such as Ag, and organic complexor on the Under Bump Material (UBM) surface to eliminate the potential forming of voids between the UBM and solder interface. A less noble metal layer, such as substantially pure Tin, is electrodeposited on the UBM before the lead-free solder alloy of Sn and more noble metal such as Ag and/or Cu is co-deposited with Sn as a SnAg or SnAgCu alloy to form a bump for electronic packaging. - It should be understood that the foregoing description is only illustrative of the invention. Various alternatives and modifications can be devised by those skilled in the art without departing from the invention. Accordingly, the present invention is intended to embrace all such alternatives, modifications and variances which fall within the scope of the appended claims.
Claims (28)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/971,744 US20120325671A2 (en) | 2010-12-17 | 2010-12-17 | Electroplated lead-free bump deposition |
CN2011800599578A CN103430287A (en) | 2010-12-17 | 2011-12-16 | Electroplated lead-free bump deposition |
JP2013544802A JP2013546205A (en) | 2010-12-17 | 2011-12-16 | Lead-free bump deposition by electroplating |
PCT/US2011/065324 WO2012083100A2 (en) | 2010-12-17 | 2011-12-16 | Electroplated lead-free bump deposition |
KR1020137016821A KR20130130000A (en) | 2010-12-17 | 2011-12-16 | Electroplated lead-free bump deposition |
TW100147137A TW201241242A (en) | 2010-12-17 | 2011-12-19 | Electroplated lead-free bump deposition |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/971,744 US20120325671A2 (en) | 2010-12-17 | 2010-12-17 | Electroplated lead-free bump deposition |
Publications (2)
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US20120152752A1 true US20120152752A1 (en) | 2012-06-21 |
US20120325671A2 US20120325671A2 (en) | 2012-12-27 |
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US12/971,744 Abandoned US20120325671A2 (en) | 2010-12-17 | 2010-12-17 | Electroplated lead-free bump deposition |
Country Status (6)
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US (1) | US20120325671A2 (en) |
JP (1) | JP2013546205A (en) |
KR (1) | KR20130130000A (en) |
CN (1) | CN103430287A (en) |
TW (1) | TW201241242A (en) |
WO (1) | WO2012083100A2 (en) |
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2010
- 2010-12-17 US US12/971,744 patent/US20120325671A2/en not_active Abandoned
-
2011
- 2011-12-16 JP JP2013544802A patent/JP2013546205A/en not_active Withdrawn
- 2011-12-16 KR KR1020137016821A patent/KR20130130000A/en not_active Application Discontinuation
- 2011-12-16 CN CN2011800599578A patent/CN103430287A/en active Pending
- 2011-12-16 WO PCT/US2011/065324 patent/WO2012083100A2/en active Application Filing
- 2011-12-19 TW TW100147137A patent/TW201241242A/en unknown
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Also Published As
Publication number | Publication date |
---|---|
TW201241242A (en) | 2012-10-16 |
WO2012083100A8 (en) | 2013-06-20 |
WO2012083100A2 (en) | 2012-06-21 |
KR20130130000A (en) | 2013-11-29 |
US20120325671A2 (en) | 2012-12-27 |
CN103430287A (en) | 2013-12-04 |
JP2013546205A (en) | 2013-12-26 |
WO2012083100A3 (en) | 2013-04-25 |
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