US20080075189A1 - Equalizer coefficient determination in the frequency domain for MIMO/MISO radio - Google Patents
Equalizer coefficient determination in the frequency domain for MIMO/MISO radio Download PDFInfo
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- US20080075189A1 US20080075189A1 US11/593,911 US59391106A US2008075189A1 US 20080075189 A1 US20080075189 A1 US 20080075189A1 US 59391106 A US59391106 A US 59391106A US 2008075189 A1 US2008075189 A1 US 2008075189A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/005—Control of transmission; Equalising
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L2025/0335—Arrangements for removing intersymbol interference characterised by the type of transmission
- H04L2025/03426—Arrangements for removing intersymbol interference characterised by the type of transmission transmission using multiple-input and multiple-output channels
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L2025/03592—Adaptation methods
- H04L2025/03598—Algorithms
- H04L2025/03605—Block algorithms
Definitions
- FIG. 6 is a block diagram illustrating equalization components of a baseband processing module according to a first embodiment of the present invention
- the radio 204 receives outbound data 250 from the host processing components via the host interface 220 .
- the host interface 220 routes the outbound data 250 to the baseband processing module 222 , which processes the outbound data 250 in accordance with a particular wireless communication standard (e.g., UMTS/WCDMA, GSM, GPRS, EDGE, et cetera) to produce digital transmission formatted data 252 .
- the digital transmission formatted data 252 is a digital base-band signal or a digital low IF signal, where the low IF will be in the frequency range of zero to a few kilohertz/megahertz.
- the operations of FIG. 13 may be performed on received MIMO signals.
- the following equations (viewed in conjunction with the operations of FIG. 13 , the baseband processing module 222 of FIG. 12 , and the channel model of FIG. 10B ) may be employed by embodiments of the present invention upon received MIMO signals.
- the MIMO signal model may be characterized as:
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Abstract
Description
- The present application is a continuation-in-part of:
- Utility application Ser. No. 11/524,584 filed on Sep. 21, 2006, and entitled “FREQUENCY DOMAIN EQUALIZER FOR DUAL ANTENNA RADIO,” (BP5477), and
- Utility application Ser. No. 11/524,580 filed on Sep. 21, 2006, and entitled “FREQUENCY DOMAIN EQUALIZER WITH ONE DOMINATE INTERFERENCE CANCELLATION FOR DUAL ANTENNA RADIO,” (BP5595), both of which are incorporated herein in their entirety by reference for all purposes.
- 1. Technical Field
- The present invention relates generally to wireless communication systems; and more particularly to the equalization of data communications by a wireless radio in a wireless communication system.
- 2. Related Art
- Cellular wireless communication systems support wireless communication services in many populated areas of the world. Cellular wireless communication systems include a “network infrastructure” that wirelessly communicates with wireless terminals within a respective service coverage area. The network infrastructure typically includes a plurality of base stations dispersed throughout the service coverage area, each of which supports wireless communications within a respective cell (or set of sectors). The base stations couple to base station controllers (BSCs), with each BSC serving a plurality of base stations. Each BSC couples to a mobile switching center (MSC). Each BSC also typically directly or indirectly couples to the Internet.
- In operation, each base station communicates with a plurality of wireless terminals operating in its serviced cell/sectors. A BSC coupled to the base station routes voice communications between the MSC and the serving base station. The MSC routes the voice communication to another MSC or to the PSTN. BSCs route data communications between a servicing base station and a packet data network that may include or couple to the Internet. Transmissions from base stations to wireless terminals are referred to as “forward link” transmissions while transmissions from wireless terminals to base stations are referred to as “reverse link” transmissions. The volume of data transmitted on the forward link typically exceeds the volume of data transmitted on the reverse link. Such is the case because data users typically issue commands to request data from data sources, e.g., web servers, and the web servers provide the data to the wireless terminals.
- Wireless links between base stations and their serviced wireless terminals typically operate according to one (or more) of a plurality of operating standards. These operating standards define the manner in which the wireless link may be allocated, setup, serviced, and torn down. Popular currently employed cellular standards include the Global System for Mobile telecommunications (GSM) standards, the North American Code Division Multiple Access (CDMA) standards, and the North American Time Division Multiple Access (TDMA) standards, among others. These operating standards support both voice communications and data communications. More recently introduced operating standards include the Universal Mobile Telecommunications Services (UMTS)/Wideband CDMA (WCDMA) standards. The UMTS/WCDMA standards employ CDMA principles and support high throughput, both voice and data.
- The wireless link between a base station and a serviced wireless terminal is referred to as a “channel.” The channel distorts and adds noise to wireless transmissions serviced by the channel. “Channel equalization” is a process employed by a wireless receiver, e.g., wireless terminal, in an attempt to obviate the effects of the channel. While channel equalization is certainly helpful in obviating the effects of the channel, the characteristics of the channel are constantly changing. Thus, coefficients of a channel equalizer must be continually updated. However, generating coefficients of the channel equalizer is a difficult and time consuming process. Thus, a need exists for an improved methodology for determining equalizer coefficients.
- The present invention is directed to apparatus and methods of operation that are further described in the following Brief Description of the Drawings, the Detailed Description of the Invention, and the claims. Other features and advantages of the present invention will become apparent from the following detailed description of the invention made with reference to the accompanying drawings.
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FIG. 1 is a system diagram illustrating a portion of a cellular wireless communication system that supports wireless terminals operating according to the present invention; -
FIG. 2 is a block diagram functionally illustrating a wireless terminal constructed according to the present invention; -
FIG. 3 is a block diagram illustrating a multiple Radio Frequency (RF) front end (receiver/transmitter) radio constructed according to an embodiment of the present invention; -
FIG. 4 is a block diagram illustrating components of a baseband processing module according to embodiments of the present invention; -
FIG. 5 is a block diagram illustrating equalization components of a baseband processing module according to a first embodiment of the present invention; -
FIG. 6 is a block diagram illustrating equalization components of a baseband processing module according to a first embodiment of the present invention; -
FIG. 7 is a flow chart illustrating equalization operations according to an embodiment of the present invention; -
FIG. 8 is a flow chart illustrating equalization operations according to an embodiment of the present invention; -
FIG. 9A is a block diagram illustrating a Multiple-Input-Single-Output (MISO) transmission system supported by equalization operation embodiments of the present invention operate; -
FIG. 9B is a block diagram illustrating a Multiple-Input-Multiple-Output (MIMO) transmission system supported by equalization operation embodiments of the present invention operate; -
FIG. 10 is a block diagram illustrating equalization components of a baseband processing module according to a third embodiment of the present invention; -
FIG. 11 is a flow chart illustrating equalization operations according to the third embodiment of the present invention; -
FIG. 12 is a block diagram illustrating equalization components of a baseband processing module according to a fourth embodiment of the present invention; and -
FIG. 13 is a flow chart illustrating equalization operations according to the fourth embodiment of the present invention. -
FIG. 1 is a system diagram illustrating a portion of a cellularwireless communication system 100 that supports wireless terminals operating according to the present invention. The cellularwireless communication system 100 includes a Public Switched Telephone Network (PSTN)Interface 101, e.g., Mobile Switching Center, a wireless networkpacket data network 102 that includes GPRS Support Nodes, EDGE Support Nodes, WCDMA Support Nodes, and other components, Radio Network Controllers/Base Station Controllers (RNC/BSCs) 152 and 154, and base stations/node Bs packet data network 102 couples to additional private and publicpacket data networks 114. e.g., the Internet, WANs, LANs, etc. Aconventional voice terminal 121 couples to the PSTN 110. A Voice over Internet Protocol (VoIP)terminal 123 and apersonal computer 125 couple to the Internet/WAN 114. ThePSTN Interface 101 couples to thePSTN 110. Of course, this particular structure may vary from system to system. - Each of the base stations/node Bs 103-106 services a cell/set of sectors within which it supports wireless communications. Wireless links that include both forward link components and reverse link components support wireless communications between the base stations and their serviced wireless terminals. These wireless links support digital data communications, VoIP communications, and digital multimedia communications. The cellular
wireless communication system 100 may also be backward compatible in supporting analog operations as well. The cellularwireless communication system 100 supports one or more of the UMTS/WCDMA standards, the Global System for Mobile telecommunications (GSM) standards, the GSM General Packet Radio Service (GPRS) extension to GSM, the Enhanced Data rates for GSM (or Global) Evolution (EDGE) standards, one or more Wideband Code Division Multiple Access (WCDMA) standards, and/or various other CDMA standards, TDMA standards and/or FDMA standards, etc. -
Wireless terminals wireless communication system 100 via wireless links with the base stations/node Bs 103-106. As illustrated, wireless terminals may includecellular telephones laptop computers desktop computers data terminals wireless communication system 100 supports communications with other types of wireless terminals as well. As is generally known, devices such aslaptop computers desktop computers data terminals cellular telephones -
FIG. 2 is a block diagram functionally illustrating a wireless terminal constructed according to the present invention. The wireless terminal includeshost processing components 202 and an associatedradio 204. For cellular telephones, the host processing components and theradio 204 are contained within a single housing. In some cellular telephones, thehost processing components 202 and some or all of the components of theradio 204 are formed on a single Integrated Circuit (IC). For personal digital assistants hosts, laptop hosts, and/or personal computer hosts, theradio 204 may reside within an expansion card or upon a mother board and, therefore, be housed separately from thehost processing components 202. Thehost processing components 202 include at least aprocessing module 206,memory 208,radio interface 210, aninput interface 212, and anoutput interface 214. Theprocessing module 206 andmemory 208 execute instructions to support host terminal functions. For example, for a cellular telephone host device, theprocessing module 206 performs user interface operations and executes host software programs among other operations. - The
radio interface 210 allows data to be received from and sent to theradio 204. For data received from the radio 204 (e.g., inbound data), theradio interface 210 provides the data to theprocessing module 206 for further processing and/or routing to theoutput interface 214. Theoutput interface 214 provides connectivity to an output display device such as a display, monitor, speakers, et cetera such that the received data may be displayed. Theradio interface 210 also provides data from theprocessing module 206 to theradio 204. Theprocessing module 206 may receive the outbound data from an input device such as a keyboard, keypad, microphone, et cetera via theinput interface 212 or generate the data itself. For data received via theinput interface 212, theprocessing module 206 may perform a corresponding host function on the data and/or route it to theradio 204 via theradio interface 210. -
Radio 204 includes ahost interface 220, baseband processing module 222 (baseband processor) 222, analog-to-digital converter 224, filtering/gain module 226, downconversion module 228,low noise amplifier 230,local oscillation module 232,memory 234, digital-to-analog converter 236, filtering/gain module 238, up-conversion module 240,power amplifier 242,RX filter module 264,TX filter module 258, TX/RX switch module 260, andantenna 248.Antenna 248 may be a single antenna that is shared by transmit and receive paths (half-duplex) or may include separate antennas for the transmit path and receive path (full-duplex). The antenna implementation will depend on the particular standard to which the wireless communication device is compliant. - The
baseband processing module 222 in combination with operational instructions stored inmemory 234, execute digital receiver functions and digital transmitter functions. The digital receiver functions include, but are not limited to, digital intermediate frequency to baseband conversion, demodulation, constellation demapping, descrambling, and/or decoding. The digital transmitter functions include, but are not limited to, encoding, scrambling, constellation mapping, modulation, and/or digital baseband to IF conversion. The transmit and receive functions provided by thebaseband processing module 222 may be implemented using shared processing devices and/or individual processing devices. Processing devices may include microprocessors, micro-controllers, digital signal processors, microcomputers, central processing units, field programmable gate arrays, programmable logic devices, state machines, logic circuitry, analog circuitry, digital circuitry, and/or any device that manipulates signals (analog and/or digital) based on operational instructions. Thememory 234 may be a single memory device or a plurality of memory devices. Such a memory device may be a read-only memory, random access memory, volatile memory, non-volatile memory, static memory, dynamic memory, flash memory, and/or any device that stores digital information. Note that when thebaseband processing module 222 implements one or more of its functions via a state machine, analog circuitry, digital circuitry, and/or logic circuitry, the memory storing the corresponding operational instructions is embedded with the circuitry comprising the state machine, analog circuitry, digital circuitry, and/or logic circuitry. - In operation, the
radio 204 receivesoutbound data 250 from the host processing components via thehost interface 220. Thehost interface 220 routes theoutbound data 250 to thebaseband processing module 222, which processes theoutbound data 250 in accordance with a particular wireless communication standard (e.g., UMTS/WCDMA, GSM, GPRS, EDGE, et cetera) to produce digital transmission formatteddata 252. The digital transmission formatteddata 252 is a digital base-band signal or a digital low IF signal, where the low IF will be in the frequency range of zero to a few kilohertz/megahertz. - The digital-to-
analog converter 236 converts the digital transmission formatteddata 252 from the digital domain to the analog domain. The filtering/gain module 238 filters and/or adjusts the gain of the analog signal prior to providing it to the up-conversion module 240. The up-conversion module 240 directly converts the analog baseband or low IF signal into an RF signal based on a transmitterlocal oscillation 254 provided bylocal oscillation module 232. Thepower amplifier 242 amplifies the RF signal to produce outbound RF signal 256, which is filtered by theTX filter module 258. The TX/RX switch module 260 receives the amplified and filtered RF signal from theTX filter module 258 and provides the output RF signal 256 signal to theantenna 248, which transmits the outbound RF signal 256 to a targeted device such as a base station 103-106. - The
radio 204 also receives aninbound RF signal 262, which was transmitted by a base station via theantenna 248, the TX/RX switch module 260, and theRX filter module 264. Thelow noise amplifier 230 receivesinbound RF signal 262 and amplifies the inbound RF signal 262 to produce an amplified inbound RF signal. Thelow noise amplifier 230 provides the amplified inbound RF signal to thedown conversion module 228, which converts the amplified inbound RF signal into an inbound low IF signal or baseband signal based on a receiverlocal oscillation 266 provided bylocal oscillation module 232. The downconversion module 228 provides the inbound low IF signal (or baseband signal) to the filtering/gain module 226, which filters and/or adjusts the gain of the signal before providing it to the analog todigital converter 224. The analog-to-digital converter 224 converts the filtered inbound low IF signal (or baseband signal) from the analog domain to the digital domain to produce digital reception formatteddata 268. Thebaseband processing module 222 demodulates, demaps, descrambles, and/or decodes the digital reception formatteddata 268 to recaptureinbound data 270 in accordance with the particular wireless communication standard being implemented byradio 204. Thehost interface 220 provides the recapturedinbound data 270 to thehost processing components 202 via theradio interface 210. - As the reader will appreciate, all components of the
radio 204, including thebaseband processing module 222 and the RF front end components may be formed on a single integrated circuit. In another construct, thebaseband processing module 222 and the RF front end components of theradio 204 may be formed on separate integrated circuits. Theradio 204 may be formed on a single integrated circuit along with thehost processing components 202. In still other embodiments, thebaseband processing module 222 and thehost processing components 202 may be formed on separate integrated circuits. Thus, all components ofFIG. 2 excluding the antenna, display, speakers, et cetera and keyboard, keypad, microphone, et cetera may be formed on a single integrated circuit. Many differing constructs integrated circuit constructs are possible without departing from the teachings of the present invention. According to the present invention, thebaseband processing module 222 equalizes the digital transmission formatted data (baseband TX signal) 252 in a novel manner. Various techniques for performing these equalization operations will be described further herein with reference toFIGS. 3-13 . -
FIG. 3 is a block diagram illustrating a multiple Radio Frequency (RF) front end (receiver/transmitter)radio 300 constructed according to an embodiment of the present invention. Theradio 300 includes abaseband processing module 222 and a plurality of RF front ends, including RFfront end 1 302, RFfront end 2 304, RFfront end 3 306, and RFfront end N 308. These RF front ends 302, 304, 306, and 308 are serviced byantennas radio 300 may service a plurality of diversity paths of a single transmitted signal. Thus, in one simple embodiment of a diversity path implementation, theradio 300 includes a first RFfront end 302, a second RFfront end 304, and thebaseband processing module 222. This embodiment will be described further with reference toFIG. 5 . Alternately, the plurality of RF front ends 302-308 may service Multiple Input Multiple Output (MIMO) communications, each RF front end 302-308 assigned a respective MIMO data path. MIMO communications are currently implemented in WLAN implementations such as IEEE 802.11n. In either case, the principles of the present invention may be applied to aradio 300 having two or more RF front ends. -
FIG. 4 is a block diagram illustrating components of abaseband processing module 222 according to an embodiment of the present invention. The baseband processing module (baseband processor) 222 includes aprocessor 402, amemory interface 404,onboard memory 406, a downlink/uplink interface 408,TX processing components 410, and aTX interface 412. Thebaseband processing module 222 further includes anRX interface 414, acell searcher module 416, amulti-path scanner module 418, arake receiver combiner 420, and aturbo decoding module 422. Thebaseband processing module 222 couples in some embodiments toexternal memory 234. However, in other embodiments,memory 406 fulfills the memory requirements of thebaseband processing module 402. - As was previously described with reference to
FIG. 2 , the baseband processing module receivesoutbound data 250 from coupledhost processing components 202 and providesinbound data 270 to the coupledhost processing components 202. Further, thebaseband processing module 222 provides digital formatted transmission data (baseband TX signal) 252 to a coupled RF front end. Thebaseband processing module 222 receives digital reception formatted data (baseband RX signal) 268 from the coupled RF front end. As was previously described with reference toFIG. 2 , anADC 222 produces the digital reception formatted data (baseband RX data) 268 while theDAC 236 of the RF front end receives the digital transmission formatted data (baseband TX signal) 252 from thebaseband processing module 222. - According to the particular embodiment of the present invention illustrated in
FIG. 4 , the downlink/uplink interface 408 is operable to receive theoutbound data 250 from coupled host processing components, e.g., thehost processing component 202 viahost interface 220. Further, the downlink/uplink interface 408 is operable to provideinbound data 270 to the coupledhost processing components 202 via thehost interface 220.TX processing component 410 andTX interface 412 communicatively couple to the RF front end as illustrated inFIG. 2 and to the downlink/uplink interface 408. TheTX processing components 410 andTX interface 412 are operable to receive the outbound data from the downlink/uplink interface 404, to process the outbound data to produce the baseband TX signal 252 and to output the baseband TX signal 252 to the RF front end as was described with reference toFIG. 2 . RX processing components including theRX interface 414, rakereceiver combiner 420 and in some cases theprocessor 402 are operable to receive the RX baseband signal 268 from the RF front end. - Equalization processing operations implemented in an RF receiver according to the present invention may be implemented by one or more of the components of the
baseband processing module 222. In a first construct, the equalization operations are implemented asequalization operations 415 a byprocessor 402. Theequalization operations 415 a may be implemented in software, hardware, or a combination of software and hardware. When theequalization operations 415 a are implemented by software instructions, theprocessor 402 retrieves instructions viamemory interface 404 and executes such software instructions to implement theequalization operations 415 a. - In another construct, a
dedicated equalization block 415 b resides between theRX interface 414 andmodules equalization operations 415 b may be implemented via hardware, software, or a combination of hardware and software. In another construct of the equalization operations according to the present invention, theequalization operations 415 c are performed within rakereceiver combiner module 420 byequalization operations 415 c. Theequalization operations 415 c may be implemented via hardware, software, or a combination of these to execute the equalization operations of the present invention. - As is further shown in
FIG. 4 , the digital reception formatteddata 268 may include a plurality of signal paths. Each one of these signal paths may be received from a respective RF front end such as was illustrated inFIG. 3 and described there with. Thus, each of the digital reception formatteddata versions 268 may be a different multi-path version of a single received signal or different RF signal such as in a MIMO system. -
FIG. 5 is a block diagram illustrating equalization components of a baseband processing module according to a first embodiment of the present invention. These components of thebaseband processing module 222 perform equalization operations according to the present invention. Of course, abaseband processing module 222 would include additional components in addition to as those illustrated inFIG. 5 . The functional blocks ofFIG. 5 may be implemented in dedicated hardware, general purpose hardware, software, or a combination of dedicated hardware, general purpose hardware, and software. - The components of the
baseband processing module 222 ofFIG. 5 include first diversity path components, second diversity path components, and shared components. As was described with reference toFIG. 3 , an RF transceiver (transmitter/receiver), may include a plurality of receive signal paths. The plurality of receive signal paths may include components that operate upon different multi-path versions of a single transmitted signal or upon signals that include different data. According to the embodiment ofFIG. 5 , the functional components operate upon different multi-path versions of a single RF transmitted time domain signal. - The first diversity path component includes a cluster path processor/
channel estimation block 504, a Fast Fourier Transform (FFT) block 506,multiplier 512, Inverse Fast Fourier Transform (IFFT) block 514,tap ordering block 516, and time domain equalizer 518. The second diversity path components include cluster path processing/channel estimation block 524,FFT block 526,multiplier 530, IFFT block 532,tap ordering block 534, andtime domain equalizer 536. The shared processing blocks of the RF receiver ofFIG. 5 include a Minimum Mean Square Error (MMSE)weight calculation block 510, a noisevariance estimation block 502, and acombiner 538. - In its operations, the first diversity path operates upon a first
time domain signal 502. The firsttime domain signal 502 includes first time domain training symbols and first time domain data symbols. As is generally known, frames of transmitted symbols in an RF system typically include a preamble that has training symbols and a payload portion that carries data symbols. The training symbols are used by channel estimation operations to produce equalizer coefficients that are then used for equalization of the data symbols. The CPP/channel estimation block 504 is operable to process the first time domain training symbols of the firsttime domain signal 502 to produce a first timedomain channel estimate 508. TheFFT block 506 is operable to invert the first time domain channel estimate to the frequency domain to produce a first frequencydomain channel estimate 508. - Likewise, the second diversity path is operable to receive a second time domain signal 522 that includes second time domain training symbols and second time domain data symbols. The CPP/
channel estimation block 524 is operable to process the second time domain training symbols to produce a second time domain channel estimate. TheFFT block 526 is operable to convert the second time domain channel estimate to the frequency domain to produce a second frequency domain channel estimate 528. - The MMSE/
weight calculation block 510 is operable to receive noise variance estimation parameters from noisevariance estimation block 502 and to produce first frequency domain equalizer coefficients 511 and second frequencydomain equalizer coefficients 513 based upon the first frequencydomain channel estimate 508 and the second frequency domain channel estimate 528. - Referring again to the first diversity path, the
multiplier 512 is operable to multiply an output of FFT block 506 with the first frequency domain equalizer coefficients 511. However, in another embodiment, the multiplier 518 simply passes through the first frequency domain equalizer coefficients 511. Then, the IFFT block 514 is operable to convert the first frequency domain equalizer coefficients 511, as operated upon bymultiplier 512, to the time domain to produce first time domain equalizer coefficients. Next, thetap ordering block 516 is operable to order the first time domain equalizer coefficients to produce tap ordered time domain equalizer coefficients to the time domain equalizer 518. Time domain equalizer 518 is operable to equalize the first time domain data symbols using the first time domain equalizer coefficients received fromtap ordering block 516. - Referring again to the second diversity path, the
multiplier 530 is operable to multiply the second frequencydomain equalizer coefficients 513 with an output received fromFFT block 526. In another embodiment, themultiplier block 530 is operable to simply pass through the second frequency domain equalizer coefficients 513. TheIFFT block 532 is operable to convert its input from the frequency domain to the time domain to produce second time domain equalizer coefficients. Thetap ordering block 534 is operable to tap order the second time domain equalizer coefficients to produce an output of time domain equalizer. Thetime domain equalizer 536 is operable to equalize the second time data symbols using the second time domain equalizer coefficients. Finally,combiner 538 is operable to combine the equalized first time domain data symbols received from the first time domain equalizer 518 and the second equalized time domain data symbols received fromtime domain equalizer 536 to produce a composite timedomain data symbols 540. - According to another aspect of the
baseband processing module 222 ofFIG. 5 , the CPP/channel estimation block 504 is operable to cluster path process the first time domain training signals of the firsttime domain signal 502. Cluster path processing (CPP) is an operation that processes multi-path signal components that are relatively close to one another in time. A complete description of how cluster path processing is performed is described in co-pending patent application Ser. No. 11/173,854 filed Jun. 30, 2005 and entitled METHOD AND SYSTEM FOR MANAGING, CONTROLLING, AND COMBINING SIGNALS IN A FREQUENCY SELECTIVE MULTIPATH FADING CHANNEL, which is incorporated herein by reference in its entirety. With the cluster path processing operations completed, the CPP/channel estimation block 504 is operable to produce the first time domain channel estimate based upon cluster path processed first time domain training symbols. Further, with the second diversity path, the CPP/channel estimation block 522 may be operable to cluster path process the second time domain training symbols of the second time domain signal 522. Then, the CPP/channel estimation block 524 is operable to produce the second time domain channel estimate based upon the cluster path process second time domain training symbols. - In its operations, the MMSE
weight calculation block 510 is operable to perform a MMSE algorithm on the first frequencydomain equalizer coefficients 508 and the second frequency domain equalizer coefficients 528 to produce the first frequency domain equalizer coefficients 511 and the second frequency domain equalizer coefficients 513. One implementation of these operations is described below. Other operations may be used to generate equalizer coefficients according to the present invention that differ from those described below. - With the particular implementation described herein, in the time domain, a matrix signal model at each antenna servicing the dual diversity path structure of
FIG. 5 may be characterized as: -
- The channel matrix Hi can be modeled as a circulant matrix which satisfies
-
H 1 =F −1 Λ 1 F;H 2 =F −1 Λ 2 F (Eq. 2) - where F is the orthogonal discrete Fourier transform matrix.
- By multiplying by matrix F at both sides of the Eq. (1), a frequency domain channel model is represented as:
-
Y i =Fy i=Λi X+N i (Eq. 3) - where X=Fx;Ni=Fnii=1,2
- The channel model may be considered at the k-th subcarrier in the frequency domain as:
-
- are 2×1 vectors.
- The MMSE optimum weight at the k-th subcarrier is therefore represented by:
-
C[k]=E(Y[k]*Y[k] T)−1 E(Y[k]*X)=(Λk*Λk T +C nn)−1Λk (Eq. 6) - Thus, the estimated transmitted signal is given as
-
- After simplifying Eq (7), the MMSE-FDE weight(s) for dual diversity path configuration of
FIG. 5 is given as: -
- The time domain signal after Equalization is given by:
-
-
FIG. 6 is a block diagram illustrating equalization components of a baseband processing module according to a first embodiment of the present invention. The components of thebaseband processing module 222 are operable to receive atime domain signal 602 from an RF front end such as was illustrated inFIG. 2 . Thetime domain signal 602 includes time domain training symbols and time domain data symbols. The components ofFIG. 6 includechannel estimation block 604, anFFT block 606, aweight calculator block 610, anIFFT block 614, atap ordering block 616, and atime domain equalizer 618. Thechannel estimation block 604 is operable to process the time domain training symbols of thetime domain signal 602 to produce a time domain channel estimate 603. TheFFT block 606 is operable to convert the time domain channel estimate 603 to the frequency domain to produce a frequencydomain channel estimate 608. Theweight calculation block 610 is operable to produce frequency domain equalizer coefficients based upon the frequencydomain channel estimate 608 and noise variation estimation received from noisevariation estimation block 602.Multiplier 612 receives the frequencydomain equalizer coefficient 611 and the receiving input from theFFT block 606. Themultiplier 612 produces an output to IFFT block 614 that converts the frequencydomain equalizer coefficient 611, as may have been modified bymultiplier 612, to produce time domain equalizer coefficients.Tap ordering block 616 tap orders the time domain equalizer coefficients and produces the tap ordered time domain equalizer coefficients totime domain equalizer 616. Thetime domain equalizer 616 is operable to equalize the time domain data symbols of thetime domain signal 602 using the time domain equalizer coefficients to produce equalizedtime domain symbols 640. - The
channel estimation block 604 may also perform cluster path processing operations as were previously described with reference toFIG. 5 . When performing cluster path processing operations to produce the time domain training symbols, the CPP/channel estimation block 604 may produce the time domain channel estimate based upon the cluster path processed time domain training symbols. The MMSEweight calculation block 610 may perform MMSE algorithm on the frequency domain equalizer coefficients to produce the frequency domain equalizer coefficients. -
FIG. 7 is a flow chart illustrating equalization operations according to an embodiment of the present invention. Theoperation 700 commences with operations for each of at least two diversity paths (Step 702). As was previously described with reference toFIG. 3 , a radio may include a plurality of RF front ends 302-308, each servicing a respective diversity path. Thus, referring again toFIG. 7 , operations 704-708 are performed for each diversity path. In particular, for each diversity path, the baseband processing module receives a corresponding time domain signal that includes corresponding time domain training symbols and corresponding time domain data symbols. - With reference to a first diversity path, operation includes receiving a first time domain signal that includes first time domain training symbols and first time domain data symbols. Operation then includes processing the first time domain training symbols to produce a first time domain channel estimate (Step 706). Further, operation includes converting the time domain channel estimate to the frequency domain to produce a first frequency domain channel estimate (Step 708).
- With respect to a second diversity path, operation includes receiving a second time domain signal that includes second time domain training symbols and second time domain data symbols (Step 704). Operation for the second diversity path further includes processing the second time domain training symbols to produce a second time domain channel estimate (Step 706). Further, operation includes converting the second time domain channel estimate to the frequency domain to produce a second frequency domain channel estimate (Step 708).
- When the operations of Steps 702-708 have been completed for each diversity path, operation proceeds to Step 710 where frequency domain equalizer coefficients are produced for each of a plurality of diversity paths. For the particular example of the structure of
FIG. 5 that includes two diversity paths, the operation atStep 710 includes producing first frequency domain equalizer coefficients and second frequency domain equalizer coefficients based upon the first frequency domain channel estimate and the second frequency domain channel estimate. Operation then includes converting the frequency domain equalizer coefficients to time domain equalizer coefficients (Step 712). For the particular case of a first and a second diversity path, the operation atStep 712 would include converting the first frequency domain equalizer coefficients to the time domain to produce first time domain equalizer coefficients and converting the second frequency domain equalizer coefficients to the time domain to produce second time domain equalizer coefficients. - Operation then includes, for each diversity path, time domain equalizing respective time domain data symbols (Step 714). For the particular case of a first and a second diversity path, the operations of
Step 714 include equalizing the first time domain data symbols using the first time domain equalizer coefficients and equalizing the second time domain data symbols using the second time domain equalizer coefficients. Finally, operation includes combining the equalized time domain data symbols from a plurality of diversity paths (Step 716). For the particular case of the first and second diversity paths, the operation ofStep 716 includes combining the equalized first time domain data symbols and the second equalized time domain data symbols to produce composite time domain data symbols. - The operations 702-716 are repeated each time new equalizer coefficients are produced based upon received physical layer frames that include training symbols. In many RF receivers, the
operations 700 ofFIG. 7 are repeated for each received physical layer frame. However, in other embodiments, channel estimation is performed periodically based upon detected changes of channel conditions or when a time constraint is met. - The operations at
Step 706 may include cluster path processing as has been previously described. When cluster processing is performed, the time domain channel estimate include cluster path processed time domain training symbols. Fast Fourier transformations are employed in converting from the time domain to the frequency domain while Inverse Fast Fourier transformations are to employed to convert from the frequency domain to the time domain. The operations atStep 710 may include using an MMSE algorithm to produce the frequency domain equalizer coefficients based upon the channel estimates received. The operations ofFIG. 7 may support various types of systems including cellular wireless communication systems, wireless metropolitan area communication systems (such as the WiMAX) standards, WLAN communication operations, and WPAN communication operations. -
FIG. 8 is a flow chart illustrating equalization operations according to an embodiment of the present invention.Operation 800 includes first receiving a time domain signal that includes time domain training symbols and time domain data symbols (Step 802). Operation continues with processing the time domain training symbols to produce a time domain channel estimate (Step 804). Operation continues with converting the time domain channel estimate to the frequency domain to produce a frequency domain channel estimate (Step 806). - Operation further includes producing frequency domain equalizer coefficients based upon the frequency domain channel estimate produced at Step 806 (Step 808). Then, operation includes converting the frequency domain equalizer coefficients to the time domain to produce time domain equalizer coefficients (Step 810). Operation concludes with equalizing the time domain data symbols using the time domain equalizer coefficients produced at Step 810 (Step 812). From
Step 812 operation ends. Of course, theoperations 800 ofFIG. 8 may be repeated for each received physical layer frame that includes training symbols and data symbols. The various specific implementations that were previously described withFIGS. 1-7 may be employed with theoperations 800 ofFIG. 8 as well and will not be described herein further with respect toFIG. 8 . -
FIG. 9A is a block diagram illustrating a Multiple-Input-Single-Output (MISO) transmission system supported by equalization operation embodiments of the present invention operate. Atransmitter 902 of the system includesmultiple antennas antennas channel 908 and received together as a merged information signal viaantenna 912 byRF receiver 910. TheRF receiver 910 operates upon this merged information signal, as will be described further with reference toFIGS. 10 and 11 . -
FIG. 9B is a block diagram illustrating a Multiple-Input-Multiple-Output (MIMO) transmission system supported by equalization operation embodiments of the present invention operate. Atransmitter 952 of the system includesmultiple antennas antennas channel 958 and received together as merged information signals byantennas RF receiver 960. Because of the operations of thechannel 958, each of the antennas receives a respective merged information signal that is a combination of the transmitted signals S1 and S2. TheRF receiver 960 operates upon these merged information signals S1 and S2, as will be described further with reference toFIGS. 12 and 13 . -
FIG. 10 is a block diagram illustrating equalization components of a baseband processing module according to a third embodiment of the present invention. The components of thebaseband processing module 222 are operable to receive amerged information 1002 from an RF front end such as was illustrated inFIG. 2 . Themerged information signal 1002 includes a first information signal and a second information signal, each of the first and second information signals having time domain training symbols and data symbols and is, of course, in the time domain upon receipt. The baseband processing module include at least onechannel estimator baseband processing module 222 further includes at least oneFast Fourier Transformer baseband processing module 222 further includes aweight calculator 1012 operable to produce first frequency domain equalizer coefficients and second frequency domain equalizer coefficients based upon the first information signal frequency domain channel estimate and the second information signal frequency domain channel estimate. Thebaseband processing module 222 also includes at least one InverseFast Fourier Transformer equalizer - In particular,
channel estimation block 1004 is operable to process the first information signal time domain training symbols of themerged information 1002 to produce a first information signal time domain channel estimate. The second informationsignal estimation block 1008 is operable to process the second information signal time domain training symbols of the mergedinformation signal 1002 to produce a second information signal domain channel estimate.FFT block 1006 is operable to convert the first information signal time domain channel estimate to the frequency domain to produce a first information signal frequency domain channel estimate.FFT block 1010 is operable to convert the second information signal time domain channel estimate to the frequency domain to produce a second information signal frequency domain channel estimate. Theweight calculation block 1012 is operable to produce first and second frequency domain equalizer coefficients based upon the first information signal frequency domain channel estimate, the second information signal frequency domain channel estimate, and noise variation estimation received from noisevariation estimation block 1014. -
IFFT block 1016 converts the first frequency domain equalizer coefficients to the time domain to produce first time domain equalizer coefficients.Tap ordering block 1018 tap orders the first time domain equalizer coefficients and produce tap ordered first time domain equalizer coefficients totime domain equalizer 1020 Thetime domain equalizer 1020 is operable to equalize themerged information signal 1002 using the time domain equalizer coefficients to produce equalized first information signal data symbols. -
IFFT block 1022 converts the second frequency domain equalizer coefficients to the time domain to produce second time domain equalizer coefficients.Tap ordering block 1024 tap orders the second time domain equalizer coefficients and produce tap ordered second time domain equalizer coefficients totime domain equalizer 1026 Thetime domain equalizer 1026 is operable to equalize themerged information signal 1002 using the time domain equalizer coefficients to produce equalized second information signal data symbols. -
Despreader 1030 is operable to despread the equalized first information signal data symbols.Despreader 1028 is operable to despread the equalized second information signal data symbols.STTD decoder 1032 is operable to STTD decode the despread equalized first information signal data symbols and the despread equalized second information signal data symbols. - The
channel estimation blocks 1004 and/or 1008 may also perform cluster path processing operations as were previously described with reference toFIG. 5 . When performing cluster path processing operations to produce the time domain training symbols, the CPP/channel estimation blocks weight calculation block 1012 may perform MMSE algorithm on the frequency domain equalizer coefficients to produce the frequency domain equalizer coefficients. -
FIG. 11 is a flow chart illustrating equalization operations according to the fourth embodiment of the present invention.Operation 1100 includes first receiving a merged information signal that includes a first information signal and a second information signal, each of the first and second information signals having time domain training symbols and data symbols (Step 1102). Operation continues with estimating energies of the information signals and optionally, the energy of at least one interfering signal present in the merged information signal (Step 1104). Operation next includes processing the first information signal time domain training symbols and the second information signal time domain training symbols to produce a first information signal time domain channel estimate and a second information signal time domain channel estimate (Step 1106). Operation continues with converting the first information signal time domain channel estimate and the second information signal time domain channel estimate to the frequency domain to produce a first information signal frequency domain channel estimate and a second information signal frequency domain channel estimate, respectively (Step 1108). Operation next includes producing first frequency domain equalizer coefficients and second frequency domain equalizer coefficients based upon the first information signal frequency domain channel estimate and the second information signal frequency domain channel estimate (Step 1110). Operation continues with converting the first frequency domain equalizer coefficients and the second frequency domain equalizer coefficients to the time domain to produce first time domain equalizer coefficients and second time domain equalizer coefficients, respectively (Step 1112). - Then, operation includes equalizing the merged information signal time using the first time domain equalizer coefficients to produce equalized first information signal data symbols and equalizing the merged information signal time using the first time domain equalizer coefficients to produce equalized second information signal data symbols (Step 1114). Operation continues with despreading and combining the equalized data symbols (Step 1116). From
Step 1116 operation ends. Of course, theoperations 1100 ofFIG. 111 may be repeated for each received physical layer frame that includes training symbols and data symbols. - The operations of
Step 1112 may be performed on an STTD signal. In such case, the first information signal data symbols and the second information signal data symbols carry common data. In this case, themethod 1100 includes STTD decoding the equalized first information signal data symbols and the equalized second information signal data symbols. The operations ofStep 1116 may include despreading the equalized first information signal data symbols and despreading the equalized second information signal data symbols prior to STTD decoding the despread equalized first information signal data symbols and the despread equalized second information signal data symbols as was illustrated inFIG. 10 . - Referring now to all of
FIGS. 9A , 10, and 11, abaseband processing module 222 and operations of the present invention may implement the following MISO equations and techniques. In particular,MISO operations 1100 ofFIG. 11 and implemented by the baseband processing module 222 (in particular the MMSEweight calculation block 1012 ofFIG. 10 ) may operate consistent with the following signal model(s). A signal model at the kth-subcarrier in the frequency domain may be modeled as: -
Y[k]=H 1 [k]S 1 +H 2 [k]S 2 +N (Eq. 11) - By treating the second information signal S2 as interference to the first information signal S1, the FDE-IS for the first information signal S1 with MMSE optimum weight at each sub-carrier is given as
-
- Similarly, by treating the first information signal S1 as interference to the second information signal S2, the FDE-IS for the second information signal S2 with MMSE optimum weight at each sub-carrier is given as:
-
- Then, using IFFT operations, the coefficient of the time domain equalizers (at Step 1112) is achieved.
-
FIG. 12 is a block diagram illustrating equalization components of a baseband processing module according to a fourth embodiment of the present invention. These components of thebaseband processing module 222 perform equalization operations according to one or more embodiments the present invention. Of course, abaseband processing module 222 would include additional components in addition to as those illustrated inFIG. 12 . The functional blocks ofFIG. 12 may be implemented in dedicated hardware, general purpose hardware, software, or a combination of dedicated hardware, general purpose hardware, and software. - The components of the
baseband processing module 222 ofFIG. 12 include first diversity path components, second diversity path components, and shared components. As was described with reference toFIGS. 3 and 9B , an RF transceiver (transmitter/receiver), may include a plurality of receive signal paths. The plurality of receive signal paths operate upon a MIMO transmitted signal. According to the embodiment ofFIG. 12 , the functional components operate upon different versions of the MIMO transmitted signal as was previously described with reference toFIG. 9B . - The first diversity path component includes a first information signal cluster path processor/
channel estimation block 1204, a second desired signal cluster path processor/channel estimation block 1208, a Fast Fourier Transform (FFT)block 1206, a Fast Fourier Transform (FFT)block 1212, Inverse Fast Fourier Transform (IFFT)block 1216,tap ordering block 1218, time domain equalizer 1220, Inverse Fast Fourier Transform (IFFT)block 1222,tap ordering block 1224, andtime domain equalizer 1226. The second diversity path components include first information signal cluster path processor/channel estimation block 1234, a second desired signal cluster path processor/channel estimation block 1238, a Fast Fourier Transform (FFT)block 1236, a Fast Fourier Transform (FFT)block 1240, Inverse Fast Fourier Transform (IFFT)block 1248,tap ordering block 1250,time domain equalizer 1252, Inverse Fast Fourier Transform (IFFT)block 1242,tap ordering block 1244, andtime domain equalizer 1246. - The shared processing blocks of the RF receiver of
FIG. 12 include a joint Delay Locked Loop (DLL) 1230, a Minimum Mean Square Error (MMSE)weight calculation block 1212, a noisevariance estimation block 1214,combiners STTD decoder 1262. Generally, thejoint DLL 1230 is controlled by CPP operations that set the sampling positions of the CPP/channel estimation blocks 1204, 1208, 1234, and 1238. - In its operations, the first diversity path operates upon a first time domain signal (first merged information signal) 1202. The first
time domain signal 1202 includes first information signal time domain training symbols and data symbols and second information signal time domain training symbols and data symbols. As is generally known, frames of transmitted symbols in an RF system typically include a preamble that has training symbols and a payload portion that carries data symbols. The training symbols are used by channel estimation operations to produce equalizer coefficients that are then used for equalization of the data symbols. The first information signal CPP/channel estimation block 1204 is operable to process first information signal time domain training symbols of the firsttime domain signal 1202 to produce a first information signal time domain channel estimate. The second information signal CPP/channel estimation block 1208 is operable to process second information signal time domain training symbols of the firsttime domain signal 1202 to produce a second information signal time domain channel estimate. In producing the their respective channel estimates, the CPP/channel estimation blocks channel estimation blocks 1204 and/or 1208 is/are operable to perform cluster path processing. TheFFT block 1206 is operable to convert the first information signal time domain channel estimate to the frequency domain to produce a first information signal frequency domain channel estimate. TheFFT block 1212 is operable to convert the second information signal time domain channel estimate to the frequency domain to produce a second information signal frequency domain channel estimate. - Likewise, the second diversity path operates upon a second time domain signal (second merged information signal) 1232. The second
time domain signal 1232 includes first information signal time domain training symbols and data symbols and second information signal time domain training symbols and data symbols. The first information signal CPP/channel estimation block 1234 is operable to process the first information signal time domain training symbols of the secondtime domain signal 1232 to produce a second information signal time domain channel estimate. The second information signal CPP/channel estimation block 1238 is operable to process second information signal time domain training symbols of the secondtime domain signal 1232 to produce a second information signal time domain channel estimate. In producing their respective channel estimates, the CPP/channel estimation blocks channel estimation blocks 1234 and/or 1238 is/are operable to perform cluster path processing. TheFFT block 1236 is operable to convert the second information signal time domain channel estimate to the frequency domain to produce a second information signal frequency domain channel estimate. TheFFT block 1240 is operable to convert the second information signal time domain channel estimate to the frequency domain to produce a second information signal frequency domain channel estimate. - The MMSE/
weight calculation block 1212 is operable to produce first frequency domain equalizer coefficients, second frequency domain equalizer coefficients, third frequency domain equalizer coefficients (first frequency domain equalizer coefficients for the second diversity path), and fourth frequency domain equalizer coefficients (second frequency domain equalizer coefficients for the second diversity path) based upon the first information signal frequency domain channel estimate and the first second information signal frequency domain channel estimate received from the first diversity path and the first information signal frequency domain channel estimate, the second information signal frequency domain channel estimate received from the second diversity path, and noise variance estimation parameters received from noisevariance estimation block 1214 and. - Referring again to the first diversity path, the
IFFT block 1216 is operable to convert the first frequency domain equalizer coefficients to the time domain to produce first time domain equalizer coefficients. Next, thetap ordering block 1218 is operable to order the first time domain equalizer coefficients to produce tap ordered first time domain equalizer coefficients to the time domain equalizer 1220. Time domain equalizer 1220 is operable to equalize the first merged information signal (time domain signal 1202) using the tap ordered first time domain equalizer coefficients received fromtap ordering block 1216. TheIFFT block 1222 is operable to convert the second frequency domain equalizer coefficients to the time domain to produce second time domain equalizer coefficients. Next, thetap ordering block 1224 is operable to order the second time domain equalizer coefficients to produce tap ordered second time domain equalizer coefficients to thetime domain equalizer 1226.Time domain equalizer 1226 is operable to equalize the first merged information signal (time domain signal 1202) using the tap ordered second time domain equalizer coefficients received fromtap ordering block 1224. - Referring again to the second diversity path, the
IFFT block 1242 is operable to convert the third frequency domain equalizer coefficients (first frequency domain equalizer coefficients for the second diversity path) to the time domain to produce third time domain equalizer coefficients (first time domain equalizer coefficients for the second diversity path). Next, thetap ordering block 1244 is operable to order the third time domain equalizer coefficients to produce tap ordered third time domain equalizer coefficients to thetime domain equalizer 1246.Time domain equalizer 1246 is operable to equalize the second merged information signal (time domain signal 1232) using the tap ordered third time domain equalizer coefficients received fromtap ordering block 1244. TheIFFT block 1248 is operable to convert the fourth frequency domain equalizer coefficients (second frequency domain equalizer coefficients for the second diversity path) to the time domain to produce fourth time domain equalizer coefficients (second time domain equalizer coefficients for the second diversity path). Next, thetap ordering block 1250 is operable to order the fourth time domain equalizer coefficients to produce tap ordered fourth time domain equalizer coefficients to thetime domain equalizer 1252.Time domain equalizer 1252 is operable to equalize the second merged information signal (time domain signal 1232) using the tap ordered fourth time domain equalizer coefficients received fromtap ordering block 1250. -
Combiner 1254 is operable to combine the outputs oftime domain equalizers combiner 1256 is operable to combine the outputs oftime domain equalizers 1220 and 1246.Despreader 1258 is operable to despread the output ofcombiner 1254 whiledespreader 1260 is operable to despread the output ofcombiner 1256. Further, in some embodiments, when STTD is employed, STTD decoder is operable to STTD decode the outputs ofdespreaders -
FIG. 13 is a flow chart illustrating equalization operations according to the third embodiment of the present invention. Theoperation 1300 commences with operations for each of at least two diversity paths (Step 1302). As was previously described with reference toFIGS. 3 , 5, and 12, a radio may include a plurality of RF front ends 302-308, each servicing a respective diversity path. Thus, referring again toFIG. 13 , operations 1304-1314 are performed for each diversity path. In particular, for each diversity path, the baseband processing module receives a merged information signal that includes a first information signal and a second information signal, each of the first and second information signals having time domain training symbols and data symbols. - With reference to a first diversity path, operation includes receiving a first time domain information signal (first merged information signal). The first diversity path then estimates energies of first and second information signals and, in some cases, one or more interfering signals present in the time domain merged information signal (Step 1306). Operation then includes processing the first information signal (dominant interferer) time domain training symbols to produce a first information signal time domain channel estimate (Step 1308). Further, operation includes converting the first information signal time domain channel estimate to the frequency domain to produce a first information signal frequency domain channel estimate (Step 1310). Operation then includes processing the second information signal time domain training symbols to produce a second information signal time domain channel estimate (Step 1312). Further, operation includes converting the second information signal time domain channel estimate to the frequency domain to produce a second information signal frequency domain channel estimate (Step 1314).
- With reference to a second diversity path, operation includes receiving a second time domain signal (second merged information signal). The second diversity path then estimates energies of first and second information signals and, in some cases, one or more interfering signals present in the time domain merged information signal (Step 1306). Operation then includes processing the first information signal time domain training symbols to produce a first information signal time domain channel estimate (Step 1308). Further, operation includes converting the first information signal time domain channel estimate to the frequency domain to produce a first information signal frequency domain channel estimate (Step 1310). Operation then includes processing the second information signal time domain training symbols to produce a second information signal time domain channel estimate (Step 1312). Further, operation includes converting the second information signal time domain channel estimate to the frequency domain to produce a second information signal frequency domain channel estimate (Step 1314).
-
Steps 1304 through 1314 may be performed for more than two diversity paths. When the operations of Steps 1304-1314 have been completed for each diversity path, operation proceeds to Step 1316 where one or more sets of frequency domain equalizer coefficients are produced for each of the plurality of diversity paths. For the particular example of the structure ofFIG. 12 that includes two diversity paths, the operation atStep 1316 includes producing first and second frequency domain equalizer coefficients for each diversity path based upon the frequency domain channel estimates. Operation then includes converting the frequency domain equalizer coefficients to time domain equalizer coefficients (Step 1318). Operation then includes, for each diversity path, time domain equalizing respective time domain data symbols (Step 1320). Finally, operation includes combining at least some of the equalized time domain data symbols from the plurality of diversity paths (Step 1322). These operations may include STTD combining operations. - The operations 1302-1322 are repeated each time new equalizer coefficients are produced based upon received physical layer frames that include training symbols. In many RF receivers, the
operations 1300 ofFIG. 13 are repeated for each received physical layer frame. However, in other embodiments, channel estimation is performed periodically based upon detected changes of channel conditions or when a time constraint is met. - The operations at
Steps Step 1316 may include using an MMSE algorithm to produce the frequency domain equalizer coefficients based upon the channel estimates received. The operations ofFIG. 13 may support various types of systems including cellular wireless communication systems, wireless metropolitan area communication systems (such as the WiMAX) standards, WLAN communication operations, and WPAN communication operations. - The operations of
FIG. 13 may be performed on received MIMO signals. The following equations (viewed in conjunction with the operations ofFIG. 13 , thebaseband processing module 222 ofFIG. 12 , and the channel model ofFIG. 10B ) may be employed by embodiments of the present invention upon received MIMO signals. The MIMO signal model may be characterized as: -
Y[k]=H 1 [k]S 1 +H 2 [k]S 2 +N (Eq. 14) - By treating the second information signal S2 signal as interference to the first information signal S1, the frequency domain equalizer coefficients for the first information signal S1 signal with MMSE optimum weight at each sub-carrier is given as:
-
- Similarly, by treating the first information signal S1 signal as interference to the second information signal S2, the frequency domain equalizer coefficients for the second information signal S2 with MMSE optimum weight at each sub-carrier is given as:
-
- Then, using IFFT operations, the coefficient of the time domain equalizer are achieved. In more detail, we have
-
- By ignoring the subscript k, we have
-
- After weight simplification processing, we have:
-
- After weight simplification processing, we have:
-
- As one of ordinary skill in the art will appreciate, the terms “operably coupled” and “communicatively coupled,” as may be used herein, include direct coupling and indirect coupling via another component, element, circuit, or module where, for indirect coupling, the intervening component, element, circuit, or module does not modify the information of a signal but may adjust its current level, voltage level, and/or power level. As one of ordinary skill in the art will also appreciate, inferred coupling (i.e., where one element is coupled to another element by inference) includes direct and indirect coupling between two elements in the same manner as “operably coupled” and “communicatively coupled.”
- The present invention has also been described above with the aid of method steps illustrating the performance of specified functions and relationships thereof. The boundaries and sequence of these functional building blocks and method steps have been arbitrarily defined herein for convenience of description. Alternate boundaries and sequences can be defined so long as the specified functions and relationships are appropriately performed. Any such alternate boundaries or sequences are thus within the scope and spirit of the claimed invention.
- The present invention has been described above with the aid of functional building blocks illustrating the performance of certain significant functions. The boundaries of these functional building blocks have been arbitrarily defined for convenience of description. Alternate boundaries could be defined as long as the certain significant functions are appropriately performed. Similarly, flow diagram blocks may also have been arbitrarily defined herein to illustrate certain significant functionality. To the extent used, the flow diagram block boundaries and sequence could have been defined otherwise and still perform the certain significant functionality. Such alternate definitions of both functional building blocks and flow diagram blocks and sequences are thus within the scope and spirit of the claimed invention.
- One of average skill in the art will also recognize that the functional building blocks, and other illustrative blocks, modules and components herein, can be implemented as illustrated or by discrete components, application specific integrated circuits, processors executing appropriate software and the like or any combination thereof.
- Moreover, although described in detail for purposes of clarity and understanding by way of the aforementioned embodiments, the present invention is not limited to such embodiments. It will be obvious to one of average skill in the art that various changes and modifications may be practiced within the spirit and scope of the invention, as limited only by the scope of the appended claims.
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Also Published As
Publication number | Publication date |
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US7623572B2 (en) | 2009-11-24 |
TW200845664A (en) | 2008-11-16 |
EP1903732A2 (en) | 2008-03-26 |
KR20080027148A (en) | 2008-03-26 |
KR100931903B1 (en) | 2009-12-15 |
US20080075158A1 (en) | 2008-03-27 |
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