US20050050971A1 - Methods and structure for improving wafer bow control - Google Patents
Methods and structure for improving wafer bow control Download PDFInfo
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- US20050050971A1 US20050050971A1 US10/894,212 US89421204A US2005050971A1 US 20050050971 A1 US20050050971 A1 US 20050050971A1 US 89421204 A US89421204 A US 89421204A US 2005050971 A1 US2005050971 A1 US 2005050971A1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00642—Manufacture or treatment of devices or systems in or on a substrate for improving the physical properties of a device
- B81C1/0065—Mechanical properties
- B81C1/00666—Treatments for controlling internal stress or strain in MEMS structures
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2201/00—Manufacture or treatment of microstructural devices or systems
- B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
- B81C2201/0161—Controlling physical properties of the material
- B81C2201/0163—Controlling internal stress of deposited layers
- B81C2201/0167—Controlling internal stress of deposited layers by adding further layers of materials having complementary strains, i.e. compressive or tensile strain
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T74/00—Machine element or mechanism
- Y10T74/12—Gyroscopes
Abstract
A method for controlling bow in wafers which utilize doped layers is described. The method includes depositing a silicon-germanium layer onto a substrate, depositing an undoped buffer layer onto the silicon-germanium layer, and depositing a silicon-boron layer onto the undoped layer.
Description
- The United States Government has acquired certain rights in this invention pursuant to Contract No. F33615-01-02-5705 issued by the Department of the Air Force.
- This invention relates generally to manufacturing of Micro Electromechanical System (MEMS) devices, and more specifically to, manufacturing of a substrate layer for MEMS devices utilizing heavily doped silicon as an etch stop.
- One method for making MEMS devices involves depositing a very heavily boron-doped silicon layer on a lightly doped silicon substrate wafer. After various patterning steps, part of the substrate is etched away in alkaline etchants such as potassium hydroxide or Ethylene-Diamine-Pyrocatechol (EDP), and water, plus a trace amount of Pyrazine. The heavily doped silicon layer is not affected by these etchants, creating a natural etch stop. In another method, the silicon wafer is bonded to a glass wafer. Prior to bonding, the silicon wafer can be patterned. Additional patterns can be made on the glass wafer. The entire lightly doped substrate is then etched away, leaving only the patterned, heavily doped layer attached to the glass. The boron dopant concentration in the doped layer is >1×1020 cm−3. At this concentration the boron atoms, which are smaller than silicon atoms, cause a shrinkage of the silicon lattice. Thus the doped layer has a high tensile strain compared to the substrate, causing the wafer to bow. The bow is severe enough that many pieces of fabrication equipment cannot handle the wafers. Therefore, additional layers or processes are required to control the wafer bow and create a relatively flat wafer. Two methods, boron-germanium co-doping and a backside tensile layer, have been widely used for controlling wafer bow. Germanium co-doping and backside tensile layering are described below in detail with respect to
FIGS. 2 and 3 respectively. - There are two negative consequences of boron-germanium co-doping that make this approach unusable for some devices. One negative consequence is that the high germanium concentration (>1×1021 cm−3) degrades the mechanical properties of the silicon. An example of this is a high level of internal damping in a MEMS resonator. Another negative consequence is that the differing diffusion coefficients of boron and germanium in silicon result in some segregation at the interface between the substrate and the doped layer. This segregation creates undesirable stress gradients at the edge of the doped layer.
- With regard to the backside tensile stress layer, when a heavily boron doped layer is deposited on a lightly doped substrate, the resultant wafer is heavily bowed as described above. A backside tensile stress layer balances the stress on the front side of the wafer, yielding a flat wafer. However, such a process requires more expensive, double-side polished substrates, more expensive, double-side deposition, more careful handling, and wafer preparation that must be done after epitaxial growth but before device fabrication can begin.
- In one aspect, a method for controlling bow in wafers which utilize doped layers is provided. The method comprises depositing a silicon-germanium layer onto a substrate, depositing an undoped buffer layer onto the silicon-germanium layer, and depositing a boron doped layer onto the undoped layer.
- In another aspect, a wafer is provided which comprises a substrate layer, a silicon-germanium layer deposited onto the substrate layer, an undoped buffer layer deposited onto the silicon-germanium layer, and a boron doped silicon layer deposited onto the undoped layer.
- In still another aspect, a micro-electromechanical system is provided which comprises a housing and a micro-machine coupled to the housing. At least a portion of the micro-machine comprises boron-doped silicon that has been etched from a wafer which comprises a substrate layer, a silicon-germanium layer deposited onto the substrate layer, an undoped buffer layer deposited onto the silicon-germanium layer, and a silicon-boron layer deposited onto the undoped buffer layer.
- In yet another aspect, a gyroscope is provided which comprises at least one proof mass, at least one motor drive comb, and at least one motor pick-off comb. The proof masses, motor drive combs, and motor pick-off combs comprise boron-doped silicon that has been etched from a wafer which comprises a substrate layer, a silicon-germanium layer deposited onto the substrate layer, an undoped buffer layer deposited onto the silicon-germanium layer, and a silicon-boron layer deposited onto the undoped buffer layer.
- In another aspect, a method for reducing and controlling bow in wafers which are formed from stacked and doped silicon layers is provided. The method comprises creating stress-relieving dislocations within the stacked silicon layers.
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FIG. 1 illustrates the problem of bowing when a boron doped layer is deposited on a substrate for construction of a wafer. -
FIG. 2 illustrates one solution for the bowing problem ofFIG. 1 . -
FIG. 3 illustrates another solution for the bowing problem ofFIG. 1 . -
FIG. 4 illustrates construction of a wafer which controls an amount of bowing. -
FIG. 5 is a flowchart illustrating a method for producing the wafer illustrated inFIG. 4 . -
FIG. 6 is a side view of an example MEMS device utilizing the wafer described inFIG. 4 . -
FIG. 7 is a schematic view of a MEMS gyroscope which can be produced utilizing the wafer described inFIG. 4 . -
FIG. 1 illustrates the problem of bowing in construction of awafer 10 when a heavily boron dopedsilicon layer 12 is deposited on asilicon substrate 14. In the embodiment shown, a heavily boron dopedlayer 12 is deposited onsilicon substrate 14. In one known scenario, boron dopant concentration in dopedlayer 12 is >1×1020 cm−3. At such a concentration, boron atoms, which are smaller than silicon atoms, cause a shrinkage of the silicon lattice within boron dopedsilicon layer 12. Thus dopedlayer 12 has a high tensile strain compared tosubstrate 14, causingwafer 10 to bow. The bow is severe enough that many pieces of fabrication equipment cannot handlewafers 10 for further fabrication processes, for example, fabrication of a MEMS gyroscope. -
FIG. 2 illustrates a boron-germanium co-doping solution for the bowing problem ofFIG. 1 . Boron-germanium co-doping is one of the known methods for controlling wafer bow. Referring to the Figure, a boron-germanium co-doped layer 20 is deposited onsubstrate 14, resulting in a relativelyflat wafer 22. Germanium is an atom that is larger than silicon, but is in the same column of the periodic table as silicon. Therefore, if the silicon is doped with germanium and boron at the same time, the larger germanium atoms compensate for the smaller boron atoms, but do not create any electronic changes. As stated above, negative consequences for reducing wafer bow through boron-germanium co-doping include degradation of the mechanical properties of silicon and segregation at aninterface 24 betweensubstrate 14 and co-dopedlayer 20. This segregation creates undesirable stress gradients inco-doped layer 20. -
FIG. 3 illustrates another known solution for the bowing wafer problem described with respect toFIG. 1 . Referring toFIG. 3 , heavily boron dopedsilicon layer 12 is deposited on afirst side 30 ofsilicon substrate 14. A backsidetensile stress layer 32, which applies a stress similar to that of dopedlayer 12, is deposited on asecond side 34 ofsilicon substrate 14 to control bowing ofwafer 36. Applyinglayer 32 tosecond side 34 ofsubstrate 14, with a stress similar to that onfirst side 34 ofsubstrate 14, will causewafer 36 to flatten, providing a higher quality doped material for use in manufacturing operation, for example, the MEMS gyroscopes mentioned above.Backside layer 32, in one embodiment, is heavily boron doped silicon, likelayer 12. In alternative embodiments,backside layer 32 is a different material. While utilization of backsidetensile stress layer 32 is a workable solution for the problem of wafer bowing, control over the process is not as good as control over the germanium co-doping process. Further, deposition ofbackside layer 32 involves significantly more processing and/or deposition steps than with germanium co-doping. Also, double-side polished substrates, which are more expensive than ordinary single-side polished substrates, are required for deposition ofbackside layer 32. -
FIG. 4 illustrates an improvement in construction of awafer 50 which also controls an amount of bowing. In construction ofwafer 50, a germanium-silicon layer is used to compensate for stress created by a heavily boron-doped layer, but the germanium doping and the boron doping are done in spatially separated layers. Referring specifically toFIG. 4 , a silicon-germanium (Si—Ge)epitaxial layer 52 is deposited onsilicon substrate 14. Deposition of Si—Ge layer 52 ontosilicon substrate 14 causes the resulting wafer to bow in a direction concave to aback surface 54 of silicon substrate 14 (opposite to the bowing illustrated inFIG. 1 ). However, the bowing is limited. As stress betweensilicon substrate 14 and Si—Ge layer 52 builds, it causes dislocations to form in Si—Ge layer 52. The dislocations result in relaxation of the stress. The relaxation results in reduced bowing. A thin,undoped buffer layer 56 of silicon is deposited on top of Si—Ge layer 52 to prevent mixing of Si—Ge layer 52 and a silicon-boron (Si—B)layer 58 which is deposited onbuffer layer 56. In one embodiment,layer 58 is a very heavily doped silicon-boron etch stop layer. In a specific embodiment, concentration of boron in Si—B layer 58 is between about 0.1 percent and about 1.0 percent. Silicon-boron layer 58 is grown at temperatures between about 1000° C. and about 1200° C., with boron concentration between about 5×1019 and about 5×1020 cm−3, and a thickness between 5 and 50 μm. - When Si—
B layer 58 is deposited abovebuffer layer 56 and Si—Ge layer 52, a stress buildup is created in an opposite direction from the stress created by deposition of Si—Ge layer 52. The stress attempts to makewafer 50 bow concave toward afront surface 60. Again, dislocations are generated inSiGe layer 52 that relax the built up stress and reduces bowing ofwafer 50. To restate, bow is reduced by relaxing the stresses instead of by balancing the stress, as is done in known methods. - Generation of dislocations can lead to surface roughness of
wafer 50. An appropriate range of deposition parameters, for example, temperature, germanium concentration, and thickness for Si—Ge layer 52 and Si—B layer 58, have been determined that simultaneously yield low bowing andsmooth surfaces wafer 50. Silicon-germanium layer 52 is grown at temperatures between about 600° C. and about 1000° C. with germanium concentration between about 2 and about 20 atomic percent. Silicon-germanium layer 52 is grown with a thickness between about 0.1 and about 5.0 μm. - Germanium-doped
layer 52 is utilized to compensate the stress created by boron-dopedlayer 58, but the germanium doping and the boron doping are done in spatially separated layers. The thickness and concentration of silicon-germanium layer 52 can be adjusted to achieve compensation for boron-dopedlayer 58. Because silicon-germanium layer 52 is now essentially part of the substrate that will eventually be etched, germanium concentration must be low enough that it does not interfere with the etching. - The layer in which the device (e.g. a MEMS gyroscope) is formed, is now only doped with boron, eliminating the material degradation problems inherent in the above described boron-germanium co-doping.
Non-doped buffer layer 56 separates the germanium from the boron, so none of the effects of segregation are present. Further, all of the deposition is done on a front side of the silicon substrate, eliminating the need to turn the wafer over for backside processing. Such wafer construction also avoids potential front side damage from the backside processing steps, and allows the use of lower-cost, single-side polished substrates. -
FIG. 5 is aflowchart 70 illustrating a method for producing wafers similar to wafer 50 (shown inFIG. 4 ). A silicon-germanium epitaxial layer 52 is deposited 72 onto asilicon substrate wafer 14. An undopedsilicon buffer layer 56 is deposited 74 onto silicon-germanium epitaxial layer 52. A very heavily boron-dopedsilicon layer 58 is deposited 76 onto undoped silicon buffer layer. As stresses build in boron-dopedsilicon layer 58, dislocations are generated in silicon-germanium layer 52, causing it to relax with respect tosilicon substrate 14 or boron-dopedlayer 58. The relaxation reduces the wafer bow to low levels. The method illustrated byflowchart 70 contrasts earlier methods of bow control, for example, a backside tensile stress layer (shown inFIG. 3 ), where additional layers balance the stress on the two sides of the wafer. Whereas, in the wafer and method illustrated inFIGS. 4 and 5 respectively, stresses are relaxed (i.e., reduced) on one side of the wafer, and therefore, a balancing layer (backside layer 32) on the other side of the substrate is not needed. -
FIG. 6 is a diagram of one embodiment of a Micro-Electromechanical System (MEMS) 100 constructed utilizing wafer 50 (shown inFIG. 4 ). WhileFIG. 6 illustrates a MEMS gyroscope (as described further with respect toFIG. 7 ), other sensors may also be constructed utilizingwafer 50 as well. For example, an accelerometer, a resonator, a pressure sensor, a temperature sensor, an air flow sensor, and any other device using a heavily boron doped layer which is not necessarily bonded to glass are examples of devices which can be constructed utilizingwafer 50. Therefore, it should be understood thatMEMS 100 illustrated inFIG. 6 and described herein are set forth for purposes of example only, and other arrangements and elements can be used instead and some elements may be omitted altogether, depending on manufacturing and/or consumer preferences. -
MEMS 100 includes ahousing 102 to which a cover (not shown) is eventually attached in order to form a sealed cavity. Electrical leads 106 provide electrical connections to a micro-machine 108 chip which is coupled tohousing 102.Micro-machine chip 108 includes amicro-machine 110. At least a portion ofmicro-machine 110 includes boron-dopedsilicon 112 that has been etched from boron doped layer 58 (shown inFIG. 4 ). For example, in the case of a MEMS tuning fork gyroscope,silicon 112 includes,proof masses 114, motor drive combs 116, and motor pick-off combs 118.Micro-machine 110 further includessense plates 120 which form parallel plate capacitors withproof masses 114. In one embodiment,sense plates 120 are metal films that have been deposited and patterned. Amachine cover 122 is coupled tomicro-machine chip 108 using multiple bonds, for example, bonds to motor drive combs 116 and motor pick-off combs 118. Such a bonding configuration formachine cover 122, coupled with cavities machined intomachine cover 122 provide anopen space 124 betweenmachine cover 122 andmicro-machine chip 108.Open space 124 allows components of micro-machine 110 an ability to move freely. For example,proof masses 114 may be movably coupled tomicro-machine chip 108 and therefore may oscillate withinopen space 124. -
MEMS 100 may comprise more or fewer components than described. For instance, while twoelectrical contacts 106 are illustrated, those skilled in the art will recognize that a MEMS may comprise more than two contacts and/or extruding pins as well. Additionally, more or fewer members may be present inMEMS 100 other than those components above described. Further, components ofMEMS 100 may comprise multiple functions.Machine cover 122 ofMEMS 100 may be comprised of a material such as silicon, glass or a ceramic material.Micro-machine 110 may be any such electromechanical machine used in accordance with MEMS and MEMS based devices. In addition, alternate packages may be used as well to provide a housing forMEMS 100. -
FIG. 7 is a schematic illustration of aMEMS gyroscope 140 which illustrates components of such a gyroscope in accordance with the components described inFIG. 6 .Gyroscope 140 may utilize a wafer, for example, wafer 50 (shown inFIG. 4 ) in construction of certain components, as described above. Referring specifically to the Figure,MEMS gyroscope 140 may include ahousing 142 that includes therein a tuning fork gyroscope (TFG) 144.Housing 142 may be a plastic package, a small outline integrated circuit (SOIC) package, a plastic leaded chip carrier (PLCC) package, a quad flat package (QFP), or other housings as known in the art.Housing 142 may provide a structure to co-locate elements ofTFG 144 and/or locate other elements within a close proximity of one another within thehousing 142.TFG 144, in one embodiment, is located within a substantially sealedcavity 105 which is formed by bonding cover 104 (shown inFIG. 6 ) to housing 102 (shown inFIG. 6 ). - In one embodiment,
TFG 144 may includeproof masses 114, motor drive combs 116, motor pick-offcombs 118, andsense plates 120 constructed from a wafer, for example, wafer 50 (shown inFIG. 4 ). Apre-amplifier 146 may be included withinhousing 142 and may be electrically connected or coupled to eachproof mass 114 andsense plate 120 combination. Pre-amplifier 146 andTFG 144 may both be formed on a common substrate and, in one embodiment, may be electrically connected. In other embodiments,pre-amplifier 146 may be electrically connected toproof masses 114. An output ofpre-amplifier 146 may be sent to senseelectronics 148, or alternatively,pre-amplifier 146 may be incorporated withinsense electronics 148. - In addition, an
output 150 of motor pick-offcombs 118 is transferred to feedback monitors 152. Feedback monitors 152 provideoutput signals 154 to driveelectronics 156, which power motor drive combs 116. Alternatively, feedback monitors 152 may be incorporated withindrive electronics 156.MEMS gyroscope 140 may also include a system power source and other operational electronics, which are not shown inFIG. 7 for ease of illustration. - Motor drive combs 116 excite the
proof masses 114 using electrostatic forces by applying a voltage to electrodes ofproof masses 114. Motor pick-offcombs 118 monitor the excitation or oscillation ofproof masses 114 by monitoring voltage signals on electrodes onproof masses 114. Motor pick-offcombs 118 output a feedback signal to feedback monitors 152.Feedback monitor 152 provides anoutput 154 which is input to driveelectronics 156. Ifproof masses 114 begin to oscillate too fast or too slow, driveelectronics 156 may adjust an oscillation frequency such thatproof masses 114 vibrate at a resonant frequency. Excitation at such a frequency may enable a higher amplitude output signal to be generated. - While operation of
gyroscope 140 is described in entirety, such operation is not likely if boron-doped wafers, for example,wafer 10 as shown inFIG. 1 , bow during a fabrication stage. As described, such bowing may be severe enough to require extra machining steps, which increase production time and add costs. Utilization of a wafer fabrication technique such as embodied in wafer 50 (shown inFIG. 4 ) provides sensors, that have little or no bowing, and therefore allows fabrication ofgyroscope 140. Such wafers are further usable in other sensor based-devices which are mentioned above. - As stated above with respect to
FIG. 2 , negative consequences of using a germanium-boron co-doped layer to reduce bow include degradation of the mechanical properties of silicon and segregation at the interface between the substrate and the co-doped layer. Therefore, current bow reduction approaches utilize epitaxial deposition on both sides of a silicon substrate, as described above with respect toFIG. 3 . The method for wafer bow reduction described with respect toFIGS. 4 and 5 require deposition of layers on only one side of a silicon substrate, which reduces costs associated with of deposition by approximately half over the costs of a backside tensile layer. The illustrated method therefore allows utilization of less expensive, silicon substrates, as only a single side of the substrate has to be polished. - In addition, in the backside tensile layer approach, since epitaxial layers are grown (deposited) on both sides of the silicon substrate, a protective layer has to be deposited over the silicon-boron layer. This protective layer must be stripped off the silicon-boron layer prior to product fabrication (i.e. MEMS gyroscopes), costing more time and money in wafer preparation. Finally, thickness of the epitaxial layers are more easily controlled utilizing the wafer and methods illustrated in
FIGS. 4 and 5 respectively, as there is less total time spent at high temperature, thus sharpening the interface between the epitaxial layer and the undoped buffer layer by reducing diffusion. Therefore the advantages described herein include, lower wafer cost due to single sided epitaxial layer deposition, elimination of post-growth wafer preparation, and an improved ability to measure and control thickness. It is contemplated that the wafer construction method and resultant wafers described herein will find utilization in a variety of MEMS products, including, but not limited to, MEMS inertial guidance products, gyroscopes, and accelerometers. - While the invention has been described in terms of various specific embodiments, those skilled in the art will recognize that the invention can be practiced with modification within the spirit and scope of the claims.
Claims (14)
1.-7. (canceled)
8. A wafer comprising:
a substrate layer;
a silicon-germanium layer deposited onto said substrate layer;
an undoped buffer layer deposited onto said silicon-germanium layer; and
a boron doped silicon layer deposited onto said undoped buffer layer.
9. (canceled)
10. A wafer according to claim 8 wherein said undoped buffer layer has a thickness between about 0.1 and about 5.0 micrometers.
11. A wafer according to claim 8 wherein said silicon-boron layer has a thickness between about 5.0 and about 50.0 micrometers.
12. (canceled)
13. A wafer according to claim 8 wherein a concentration of boron in said silicon-boron layer is between about 5×1019 and about 5×1020 cm−3.
14. A micro-electromechanical system (MEMS) comprising:
a housing;
a micro-machine coupled to said housing, at least a portion of said micro-machine comprising boron-doped silicon that has been etched from a wafer which comprises a substrate layer, a silicon-germanium layer deposited onto said substrate layer, an undoped buffer layer deposited onto said silicon-germanium layer, and a silicon-boron layer deposited onto said undoped buffer layer.
15. A MEMS according to claim 14 wherein boron-doped silicon comprises proof masses, motor drive combs, and motor pick-off combs for a tuning fork gyroscope.
16. A MEMS according to claim 14 wherein a concentration of boron in said silicon-boron layer is between about 0.1 percent and about 1.0 percent.
17. A MEMS according to claim 14 wherein said silicon-boron layer has a thickness between about 5.0 and about 50.0 micrometers.
18. A MEMS according to claim 14 wherein said micro-machine comprises one or more of an accelerometer, a resonator, a pressure sensor, a temperature sensor and an air flow sensor.
19. A gyroscope comprising:
at least one proof mass;
at least one motor drive comb; and
at least one motor pick-off comb, said proof masses, said motor drive combs, and said motor pick-off combs comprising boron-doped silicon that has been etched from a wafer which comprises a substrate layer, a silicon-germanium layer deposited onto said substrate layer, an undoped buffer layer deposited onto said silicon-germanium layer, and a silicon-boron layer deposited onto said undoped buffer layer.
20.-22. (canceled)
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US20080282833A1 (en) * | 2005-12-13 | 2008-11-20 | Thales | Vibratory Gyroscope Balanced by an Electrostatic Device |
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Citations (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5279687A (en) * | 1989-03-10 | 1994-01-18 | British Telecommunications Plc | Preparing substrates by annealing epitaxial layers in the form of nesas and substrates so prepared |
US5338416A (en) * | 1993-02-05 | 1994-08-16 | Massachusetts Institute Of Technology | Electrochemical etching process |
US5437739A (en) * | 1994-04-19 | 1995-08-01 | Rockwell International Corporation | Etch control seal for dissolved wafer micromachining process |
US5492596A (en) * | 1994-02-04 | 1996-02-20 | The Charles Stark Draper Laboratory, Inc. | Method of making a micromechanical silicon-on-glass tuning fork gyroscope |
US5496436A (en) * | 1992-04-07 | 1996-03-05 | The Charles Stark Draper Laboratory, Inc. | Comb drive micromechanical tuning fork gyro fabrication method |
US5511428A (en) * | 1994-06-10 | 1996-04-30 | Massachusetts Institute Of Technology | Backside contact of sensor microstructures |
US5637189A (en) * | 1996-06-25 | 1997-06-10 | Xerox Corporation | Dry etch process control using electrically biased stop junctions |
US5837562A (en) * | 1995-07-07 | 1998-11-17 | The Charles Stark Draper Laboratory, Inc. | Process for bonding a shell to a substrate for packaging a semiconductor |
US5843832A (en) * | 1995-03-01 | 1998-12-01 | Virginia Semiconductor, Inc. | Method of formation of thin bonded ultra-thin wafers |
US5854122A (en) * | 1997-03-13 | 1998-12-29 | The Boeing Company | Epitaxial layer for dissolved wafer micromachining process |
US5866469A (en) * | 1996-06-13 | 1999-02-02 | Boeing North American, Inc. | Method of anodic wafer bonding |
US6128961A (en) * | 1995-12-24 | 2000-10-10 | Haronian; Dan | Micro-electro-mechanics systems (MEMS) |
US6143583A (en) * | 1998-06-08 | 2000-11-07 | Honeywell, Inc. | Dissolved wafer fabrication process and associated microelectromechanical device having a support substrate with spacing mesas |
US6210988B1 (en) * | 1999-01-15 | 2001-04-03 | The Regents Of The University Of California | Polycrystalline silicon germanium films for forming micro-electromechanical systems |
US6245161B1 (en) * | 1997-05-12 | 2001-06-12 | Silicon Genesis Corporation | Economical silicon-on-silicon hybrid wafer assembly |
US6271101B1 (en) * | 1998-07-29 | 2001-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Process for production of SOI substrate and process for production of semiconductor device |
US6277666B1 (en) * | 1999-06-24 | 2001-08-21 | Honeywell Inc. | Precisely defined microelectromechanical structures and associated fabrication methods |
US6287941B1 (en) * | 1999-04-21 | 2001-09-11 | Silicon Genesis Corporation | Surface finishing of SOI substrates using an EPI process |
US6313487B1 (en) * | 2000-06-15 | 2001-11-06 | Board Of Regents, The University Of Texas System | Vertical channel floating gate transistor having silicon germanium channel layer |
US6337027B1 (en) * | 1999-09-30 | 2002-01-08 | Rockwell Science Center, Llc | Microelectromechanical device manufacturing process |
US6350993B1 (en) * | 1999-03-12 | 2002-02-26 | International Business Machines Corporation | High speed composite p-channel Si/SiGe heterostructure for field effect devices |
US6403975B1 (en) * | 1996-04-09 | 2002-06-11 | Max-Planck Gesellschaft Zur Forderung Der Wissenschafteneev | Semiconductor components, in particular photodetectors, light emitting diodes, optical modulators and waveguides with multilayer structures grown on silicon substrates |
US6428713B1 (en) * | 1999-10-01 | 2002-08-06 | Delphi Technologies, Inc. | MEMS sensor structure and microfabrication process therefor |
US6433401B1 (en) * | 1999-04-06 | 2002-08-13 | Analog Devices Imi, Inc. | Microfabricated structures with trench-isolation using bonded-substrates and cavities |
US6440766B1 (en) * | 2000-02-16 | 2002-08-27 | Analog Devices Imi, Inc. | Microfabrication using germanium-based release masks |
US6444138B1 (en) * | 1999-06-16 | 2002-09-03 | James E. Moon | Method of fabricating microelectromechanical and microfluidic devices |
US6452238B1 (en) * | 1999-10-04 | 2002-09-17 | Texas Instruments Incorporated | MEMS wafer level package |
US6756604B2 (en) * | 2000-01-27 | 2004-06-29 | Sige Semiconductor Inc. | Si-Ge base heterojunction bipolar device |
US6815707B2 (en) * | 2001-10-02 | 2004-11-09 | Renesas Technology Corp. | Field-effect type semiconductor device for power amplifier |
US20040232525A1 (en) * | 2000-02-10 | 2004-11-25 | Motorola, Inc. | Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same |
US6927454B2 (en) * | 2003-10-07 | 2005-08-09 | International Business Machines Corporation | Split poly-SiGe/poly-Si alloy gate stack |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2661040A1 (en) * | 1990-04-13 | 1991-10-18 | Thomson Csf | PROCESS FOR ADAPTING TWO CRYSTALLIZED SEMICONDUCTOR MATERIALS AND SEMICONDUCTOR DEVICE |
US5461243A (en) * | 1993-10-29 | 1995-10-24 | International Business Machines Corporation | Substrate for tensilely strained semiconductor |
US5534713A (en) * | 1994-05-20 | 1996-07-09 | International Business Machines Corporation | Complementary metal-oxide semiconductor transistor logic using strained SI/SIGE heterostructure layers |
US5725729A (en) * | 1994-09-26 | 1998-03-10 | The Charles Stark Draper Laboratory, Inc. | Process for micromechanical fabrication |
US6286166B1 (en) | 1998-06-19 | 2001-09-11 | Hill-Rom Services, Inc. | Modular foam mattress |
DE19848298B4 (en) * | 1998-10-12 | 2008-08-07 | IHP GmbH - Innovations for High Performance Microelectronics/Institut für innovative Mikroelektronik | High temperature stable large diameter semiconductor substrate wafer and method of making same |
TW517260B (en) * | 1999-05-15 | 2003-01-11 | Semiconductor Energy Lab | Semiconductor device and method for its fabrication |
US6544655B1 (en) * | 2000-08-08 | 2003-04-08 | Honeywell International Inc. | Methods for reducing the curvature in boron-doped silicon micromachined structures |
-
2003
- 2003-01-06 US US10/337,011 patent/US6770504B2/en not_active Expired - Lifetime
-
2004
- 2004-01-05 CA CA002512699A patent/CA2512699A1/en not_active Abandoned
- 2004-01-05 AU AU2004204858A patent/AU2004204858A1/en not_active Abandoned
- 2004-01-05 WO PCT/US2004/000021 patent/WO2004064090A2/en active Application Filing
- 2004-01-05 EP EP04700193A patent/EP1592642A2/en not_active Withdrawn
- 2004-01-05 JP JP2006500770A patent/JP2006516359A/en active Pending
- 2004-07-19 US US10/894,212 patent/US20050050971A1/en not_active Abandoned
Patent Citations (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5279687A (en) * | 1989-03-10 | 1994-01-18 | British Telecommunications Plc | Preparing substrates by annealing epitaxial layers in the form of nesas and substrates so prepared |
US5496436A (en) * | 1992-04-07 | 1996-03-05 | The Charles Stark Draper Laboratory, Inc. | Comb drive micromechanical tuning fork gyro fabrication method |
US5338416A (en) * | 1993-02-05 | 1994-08-16 | Massachusetts Institute Of Technology | Electrochemical etching process |
US5492596A (en) * | 1994-02-04 | 1996-02-20 | The Charles Stark Draper Laboratory, Inc. | Method of making a micromechanical silicon-on-glass tuning fork gyroscope |
US5437739A (en) * | 1994-04-19 | 1995-08-01 | Rockwell International Corporation | Etch control seal for dissolved wafer micromachining process |
US5509974A (en) * | 1994-04-19 | 1996-04-23 | Rockwell International Corporation | Etch control seal for dissolved wafer process |
US5511428A (en) * | 1994-06-10 | 1996-04-30 | Massachusetts Institute Of Technology | Backside contact of sensor microstructures |
US5843832A (en) * | 1995-03-01 | 1998-12-01 | Virginia Semiconductor, Inc. | Method of formation of thin bonded ultra-thin wafers |
US5837562A (en) * | 1995-07-07 | 1998-11-17 | The Charles Stark Draper Laboratory, Inc. | Process for bonding a shell to a substrate for packaging a semiconductor |
US6128961A (en) * | 1995-12-24 | 2000-10-10 | Haronian; Dan | Micro-electro-mechanics systems (MEMS) |
US6403975B1 (en) * | 1996-04-09 | 2002-06-11 | Max-Planck Gesellschaft Zur Forderung Der Wissenschafteneev | Semiconductor components, in particular photodetectors, light emitting diodes, optical modulators and waveguides with multilayer structures grown on silicon substrates |
US5866469A (en) * | 1996-06-13 | 1999-02-02 | Boeing North American, Inc. | Method of anodic wafer bonding |
US5637189A (en) * | 1996-06-25 | 1997-06-10 | Xerox Corporation | Dry etch process control using electrically biased stop junctions |
US5854122A (en) * | 1997-03-13 | 1998-12-29 | The Boeing Company | Epitaxial layer for dissolved wafer micromachining process |
US6245161B1 (en) * | 1997-05-12 | 2001-06-12 | Silicon Genesis Corporation | Economical silicon-on-silicon hybrid wafer assembly |
US6143583A (en) * | 1998-06-08 | 2000-11-07 | Honeywell, Inc. | Dissolved wafer fabrication process and associated microelectromechanical device having a support substrate with spacing mesas |
US6271101B1 (en) * | 1998-07-29 | 2001-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Process for production of SOI substrate and process for production of semiconductor device |
US6448622B1 (en) * | 1999-01-15 | 2002-09-10 | The Regents Of The University Of California | Polycrystalline silicon-germanium films for micro-electromechanical systems application |
US6210988B1 (en) * | 1999-01-15 | 2001-04-03 | The Regents Of The University Of California | Polycrystalline silicon germanium films for forming micro-electromechanical systems |
US6350993B1 (en) * | 1999-03-12 | 2002-02-26 | International Business Machines Corporation | High speed composite p-channel Si/SiGe heterostructure for field effect devices |
US6433401B1 (en) * | 1999-04-06 | 2002-08-13 | Analog Devices Imi, Inc. | Microfabricated structures with trench-isolation using bonded-substrates and cavities |
US6287941B1 (en) * | 1999-04-21 | 2001-09-11 | Silicon Genesis Corporation | Surface finishing of SOI substrates using an EPI process |
US6444138B1 (en) * | 1999-06-16 | 2002-09-03 | James E. Moon | Method of fabricating microelectromechanical and microfluidic devices |
US6277666B1 (en) * | 1999-06-24 | 2001-08-21 | Honeywell Inc. | Precisely defined microelectromechanical structures and associated fabrication methods |
US6337027B1 (en) * | 1999-09-30 | 2002-01-08 | Rockwell Science Center, Llc | Microelectromechanical device manufacturing process |
US6428713B1 (en) * | 1999-10-01 | 2002-08-06 | Delphi Technologies, Inc. | MEMS sensor structure and microfabrication process therefor |
US6452238B1 (en) * | 1999-10-04 | 2002-09-17 | Texas Instruments Incorporated | MEMS wafer level package |
US6756604B2 (en) * | 2000-01-27 | 2004-06-29 | Sige Semiconductor Inc. | Si-Ge base heterojunction bipolar device |
US20040232525A1 (en) * | 2000-02-10 | 2004-11-25 | Motorola, Inc. | Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same |
US6440766B1 (en) * | 2000-02-16 | 2002-08-27 | Analog Devices Imi, Inc. | Microfabrication using germanium-based release masks |
US6313487B1 (en) * | 2000-06-15 | 2001-11-06 | Board Of Regents, The University Of Texas System | Vertical channel floating gate transistor having silicon germanium channel layer |
US6815707B2 (en) * | 2001-10-02 | 2004-11-09 | Renesas Technology Corp. | Field-effect type semiconductor device for power amplifier |
US6927454B2 (en) * | 2003-10-07 | 2005-08-09 | International Business Machines Corporation | Split poly-SiGe/poly-Si alloy gate stack |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060228897A1 (en) * | 2005-04-08 | 2006-10-12 | Timans Paul J | Rapid thermal processing using energy transfer layers |
US7642205B2 (en) * | 2005-04-08 | 2010-01-05 | Mattson Technology, Inc. | Rapid thermal processing using energy transfer layers |
US20100099268A1 (en) * | 2005-04-08 | 2010-04-22 | Timans Paul J | Rapid Thermal Processing using Energy Transfer Layers |
US8138105B2 (en) | 2005-04-08 | 2012-03-20 | Mattson Technology, Inc. | Rapid thermal processing using energy transfer layers |
US8557721B2 (en) | 2005-04-08 | 2013-10-15 | Mattson Technology, Inc. | Rapid thermal processing using energy transfer layers |
US20070075319A1 (en) * | 2005-09-30 | 2007-04-05 | Hitachi Cable, Ltd. | Semiconductor light-emitting device with transparent conductive film |
US7608859B2 (en) * | 2005-09-30 | 2009-10-27 | Hitachi Cable, Ltd. | Semiconductor light-emitting device with transparent conductive film |
US20080282833A1 (en) * | 2005-12-13 | 2008-11-20 | Thales | Vibratory Gyroscope Balanced by an Electrostatic Device |
US8104364B2 (en) * | 2005-12-13 | 2012-01-31 | Thales | Vibratory gyroscope balanced by an electrostatic device |
US10068775B2 (en) | 2015-09-09 | 2018-09-04 | Toshiba Memory Corporation | Method of bonding supporting substrate with device substrate for fabricating semiconductor device |
Also Published As
Publication number | Publication date |
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JP2006516359A (en) | 2006-06-29 |
EP1592642A2 (en) | 2005-11-09 |
CA2512699A1 (en) | 2004-07-29 |
US20040132227A1 (en) | 2004-07-08 |
US6770504B2 (en) | 2004-08-03 |
WO2004064090A2 (en) | 2004-07-29 |
WO2004064090A3 (en) | 2004-09-10 |
AU2004204858A1 (en) | 2004-07-29 |
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