US20050049818A1 - Dynamic clock pulse adjusting device - Google Patents
Dynamic clock pulse adjusting device Download PDFInfo
- Publication number
- US20050049818A1 US20050049818A1 US10/653,166 US65316603A US2005049818A1 US 20050049818 A1 US20050049818 A1 US 20050049818A1 US 65316603 A US65316603 A US 65316603A US 2005049818 A1 US2005049818 A1 US 2005049818A1
- Authority
- US
- United States
- Prior art keywords
- clock pulse
- cpu
- frequency
- logic circuit
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/20—Cooling means
- G06F1/206—Cooling means comprising thermal management
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Definitions
- the invention pertains to a dynamic clock pulse adjusting device and, in particular, to a device that detects the real-time work conditions of a CPU and thereby adjusts its work frequency.
- the core element of information processing systems is the central processing unit (CPU). It is an integrated circuit of many electronic elements. The circuit processes, controls and stores data used during operations. All operations, inputs/outputs (I/O), and connections to storage devices are monitored and controlled by the CPU.
- CPU central processing unit
- the invention provides a dynamic clock pulse adjusting device.
- One of its objectives is to provide a mechanism to monitor the work conditions of the CPU and to automatically adjust the output clock pulse frequency accordingly. It can achieve the goals of increasing the work efficiency of the CPU and protecting the CPU at the same time.
- the disclosed dynamic clock pulse adjusting device uses a detection mechanism to monitor the CPU work temperature. The result is sent to a logic circuit to determine whether the work temperature exceeds a predetermined threshold. If the work temperature exceeds the predetermined threshold, the device outputs a frequency-lowering signal; if it is lower than the predetermined threshold, a frequency-raising signal is output. After a clock pulse generator receives the frequency-lowering or frequency-raising signal, it decreases or increases the output clock pulse frequency accordingly.
- the detection mechanism can be used to monitor the CPU workload.
- the logic circuit uses the monitoring result to determine whether the CPU workload exceeds a predetermined threshold. If the workload is over the predetermined threshold, a frequency-raising signal is output to the clock pulse generator to increase the work frequency, and thus the CPU work efficiency. If the CPU workload is below the predetermined threshold, a frequency-lowering signal is output to the clock pulse generator to lower the frequency, avoiding unnecessary power consumption.
- FIG. 1 is a schematic block diagram of the disclosed dynamic clock pulse adjusting device.
- the disclosed dynamic clock pulse adjusting device contains a detection mechanism 11 , a logic circuit 12 , and a clock pulse generator 13 .
- the detection mechanism 11 monitors the work conditions of the CPU (not shown) in order to output a signal to the logic circuit 12 .
- the logic circuit 12 then controls the output clock pulses 14 of the clock pulse generator 13 according to the CPU work conditions.
- the detection mechanism 11 connects to a CPU (not shown) and detects the work temperature of the CPU via thermal sensing. The detected temperature signal is then converted into a digital signal for output.
- the logic circuit 12 connects to the detection mechanism 11 . After receiving the digital signal output from the detection mechanism 11 , it determines whether the CPU work temperature exceeds a predetermined threshold according to a default temperature range. If the CPU work temperature is not over the threshold, a frequency-raising signal is output to the clock pulse generator 13 . If the CPU work temperature is over the threshold, a frequency-lowering signal is output to the clock pulse generator 13 .
- the clock pulse generator 13 connects to the logic circuit for receiving the signals output from the logic circuit 12 and adjusts the frequency of its output clock pulse 14 accordingly. If the logic circuit 12 outputs a frequency-raising signal, the clock pulse generator 13 increases the frequency of its output clock pulses 14 to increase the CPU work efficiency. If the logic circuit 12 outputs a frequency-lowering signal, the clock pulse generator 13 lowers the frequency of its output clock pulses 14 to reduce the CPU work frequency.
- the logic circuit determines that the detected CPU work temperature goes over the default temperature range, it outputs a frequency-lowering signal to the clock pulse generator 13 , which then lowers the frequency of its output clock pulses 14 .
- the work frequency and thus the work temperature of the CPU reduce to a normal range, protecting the CPU from overheating.
- a frequency-raising signal is output to the clock pulse generator 13 , which then increases the frequency of the output clock pulses 14 .
- the work frequency of the CPU thereby increases for a better work efficiency.
- the above-mentioned logic circuit 12 can be simplified to a resistor or a capacitor, which controls the electrical current to the clock pulse generator 13 .
- the clock pulse generator 13 can adjust the frequency of its output clock pulses 14 according to the magnitude of the electrical current, increasing the CPU work efficiency or protecting the CPU from a high-temperature work environment.
- the disclosed detection mechanism 11 can be designed to monitor the CPU workload and outputs a corresponding signal to the logic circuit 12 .
- the logic circuit 12 uses the signal output from the detection mechanism 11 to determine whether the CPU workload exceeds a predetermined threshold. If the CPU workload is over the threshold, a frequency-raising signal is output to the clock pulse generator 13 , which increases the frequency of its output clock pulses 14 accordingly.
- the CPU work frequency therefore increases for a better work efficiency. This can avoid the drawback that the CPU has slow reactions when its load is too high.
- a frequency-lowering signal is output to the clock pulse generator 13 , which then lowers the frequency of its output clock pulses 14 .
- the work frequency of the CPU thus reduces to avoid unnecessary power consumption as a result of a work frequency higher than that needed by its current workload.
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
- Manipulation Of Pulses (AREA)
Abstract
A dynamic clock pulse adjusting device is disclosed. It is comprised of a detection mechanism, a logic circuit, and a clock pulse generator. The detection mechanism performs real-time detection of the work temperature or load of the CPU. The logic circuit determines whether the work temperature or load exceeds a predetermined threshold. The clock pulse generator then adjusts the frequency of the output clock pulses, so as to increase or reduce the CPU work frequency.
Description
- 1. Field of Invention
- The invention pertains to a dynamic clock pulse adjusting device and, in particular, to a device that detects the real-time work conditions of a CPU and thereby adjusts its work frequency.
- 2. Related Art
- The development of information technologies facilitates people's uses of information processing devices for daily tasks. The applications range from national governments, business systems, to families and individuals. To increase the work efficiency and to make the computer uses more convenient, the work frequency of the information processing systems is continuously rising.
- The core element of information processing systems is the central processing unit (CPU). It is an integrated circuit of many electronic elements. The circuit processes, controls and stores data used during operations. All operations, inputs/outputs (I/O), and connections to storage devices are monitored and controlled by the CPU.
- Since the CPU has to perform all sorts of operations and tasks, its work frequency is extremely high. In a high-frequency work environment, one often has to worry about the problem of rising temperature. Moreover, high-frequency jobs consume a huge amount of power. It does not shorten the lifetime, lower the efficiency of the CPU, the large power consumption is another drawback.
- In view of the foregoing, the invention provides a dynamic clock pulse adjusting device. One of its objectives is to provide a mechanism to monitor the work conditions of the CPU and to automatically adjust the output clock pulse frequency accordingly. It can achieve the goals of increasing the work efficiency of the CPU and protecting the CPU at the same time.
- To achieve the above objective, the disclosed dynamic clock pulse adjusting device uses a detection mechanism to monitor the CPU work temperature. The result is sent to a logic circuit to determine whether the work temperature exceeds a predetermined threshold. If the work temperature exceeds the predetermined threshold, the device outputs a frequency-lowering signal; if it is lower than the predetermined threshold, a frequency-raising signal is output. After a clock pulse generator receives the frequency-lowering or frequency-raising signal, it decreases or increases the output clock pulse frequency accordingly.
- In addition, the detection mechanism can be used to monitor the CPU workload. The logic circuit uses the monitoring result to determine whether the CPU workload exceeds a predetermined threshold. If the workload is over the predetermined threshold, a frequency-raising signal is output to the clock pulse generator to increase the work frequency, and thus the CPU work efficiency. If the CPU workload is below the predetermined threshold, a frequency-lowering signal is output to the clock pulse generator to lower the frequency, avoiding unnecessary power consumption.
- The invention will become more fully understood from the detailed description given hereinbelow illustration only, and thus are not limitative of the present invention, and wherein:
-
FIG. 1 is a schematic block diagram of the disclosed dynamic clock pulse adjusting device. - The disclosed dynamic clock pulse adjusting device, as schematically shown in
FIG. 1 , contains adetection mechanism 11, alogic circuit 12, and aclock pulse generator 13. Thedetection mechanism 11 monitors the work conditions of the CPU (not shown) in order to output a signal to thelogic circuit 12. Thelogic circuit 12 then controls theoutput clock pulses 14 of theclock pulse generator 13 according to the CPU work conditions. - The
detection mechanism 11 connects to a CPU (not shown) and detects the work temperature of the CPU via thermal sensing. The detected temperature signal is then converted into a digital signal for output. - The
logic circuit 12 connects to thedetection mechanism 11. After receiving the digital signal output from thedetection mechanism 11, it determines whether the CPU work temperature exceeds a predetermined threshold according to a default temperature range. If the CPU work temperature is not over the threshold, a frequency-raising signal is output to theclock pulse generator 13. If the CPU work temperature is over the threshold, a frequency-lowering signal is output to theclock pulse generator 13. - The
clock pulse generator 13 connects to the logic circuit for receiving the signals output from thelogic circuit 12 and adjusts the frequency of itsoutput clock pulse 14 accordingly. If thelogic circuit 12 outputs a frequency-raising signal, theclock pulse generator 13 increases the frequency of itsoutput clock pulses 14 to increase the CPU work efficiency. If thelogic circuit 12 outputs a frequency-lowering signal, theclock pulse generator 13 lowers the frequency of itsoutput clock pulses 14 to reduce the CPU work frequency. - Therefore, when the logic circuit determines that the detected CPU work temperature goes over the default temperature range, it outputs a frequency-lowering signal to the
clock pulse generator 13, which then lowers the frequency of itsoutput clock pulses 14. The work frequency and thus the work temperature of the CPU reduce to a normal range, protecting the CPU from overheating. - On the other hand, if the
logic circuit 12 determines that the detected CPU work temperature is below the default temperature range, a frequency-raising signal is output to theclock pulse generator 13, which then increases the frequency of theoutput clock pulses 14. The work frequency of the CPU thereby increases for a better work efficiency. - On the other hand, the above-mentioned
logic circuit 12 can be simplified to a resistor or a capacitor, which controls the electrical current to theclock pulse generator 13. Theclock pulse generator 13 can adjust the frequency of itsoutput clock pulses 14 according to the magnitude of the electrical current, increasing the CPU work efficiency or protecting the CPU from a high-temperature work environment. - Moreover, the disclosed
detection mechanism 11 can be designed to monitor the CPU workload and outputs a corresponding signal to thelogic circuit 12. - The
logic circuit 12 uses the signal output from thedetection mechanism 11 to determine whether the CPU workload exceeds a predetermined threshold. If the CPU workload is over the threshold, a frequency-raising signal is output to theclock pulse generator 13, which increases the frequency of its output clock pulses 14 accordingly. The CPU work frequency therefore increases for a better work efficiency. This can avoid the drawback that the CPU has slow reactions when its load is too high. - If the
logic circuit 12 determines that the CPU workload is below the threshold, a frequency-lowering signal is output to theclock pulse generator 13, which then lowers the frequency of itsoutput clock pulses 14. The work frequency of the CPU thus reduces to avoid unnecessary power consumption as a result of a work frequency higher than that needed by its current workload. - Certain variations would be apparent to those skilled in the art, which variations are considered within the spirit and scope of the claimed invention.
Claims (10)
1. A dynamic clock pulse adjusting device for detecting and controlling the work conditions of a central processing unit (CPU), the dynamic clock pulse adjusting device comprising:
a detection mechanism, which connects to the CPU to detect a work temperature of the CPU via thermal sensing and converts a detected temperature signal into a digital signal for output;
a logic circuit, which connects to the detection mechanism for determining from the output signal of the detection mechanism whether the work temperature of the CPU exceeds a predetermined threshold and outputs a corresponding signal; and
a clock pulse generator, which connects to the logic circuit for adjusting the frequency of its output clock pulses according to the output signal from the logic circuit.
2. The dynamic clock pulse adjusting device of claim 1 , wherein if the logic circuit determines the CPU work temperature exceeds a predetermined threshold a frequency-lowering signal is output to the clock pulse generator, which then lowers the frequency of its output clock pulses so that the work frequency and temperature of the CPU decrease.
3. The dynamic clock pulse adjusting device of claim 1 , wherein if the logic circuit determines the CPU work temperature is below a predetermined threshold a frequency-raising signal is output to the clock pulse generator, which then raises the frequency of its output clock pulses so that the work efficiency of the CPU increases.
4. The dynamic clock pulse adjusting device of claim 1 , wherein the logic circuit is a resistor.
5. The dynamic clock pulse adjusting device of claim 1 , wherein the logic circuit is a capacitor.
6. A dynamic clock pulse adjusting device for detecting and controlling the work conditions of a central processing unit (CPU), the dynamic clock pulse adjusting device comprising:
a detection mechanism, which connects to the CPU to detect the CPU workload and outputs a signal;
a logic circuit, which connects to the detection mechanism for determining from the output signal of the detection mechanism whether the workload of the CPU exceeds a predetermined threshold and outputs a corresponding signal; and
a clock pulse generator, which connects to the logic circuit for adjusting the frequency of its output clock pulses according to the output signal from the logic circuit.
7. The dynamic clock pulse adjusting device of claim 6 , wherein if the logic circuit determines the CPU workload exceeds a predetermined threshold a frequency-raising signal is output to the clock pulse generator, which then raises the frequency of its output clock pulses so that the work efficiency of the CPU increases.
8. The dynamic clock pulse adjusting device of claim 6 , wherein if the logic circuit determines the CPU workload is below a predetermined threshold a frequency-lowering signal is output to the clock pulse generator, which then lowers the frequency of its output clock pulses so that the work efficiency of the CPU decreases.
9. The dynamic clock pulse adjusting device of claim 6 , wherein the logic circuit is a resistor.
10. The dynamic clock pulse adjusting device of claim 6 , wherein the logic circuit is a capacitor.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10340393A DE10340393A1 (en) | 2003-09-02 | 2003-09-02 | Dynamic clock pulse adjusting device for detecting real time work conditions of CPU, has clock pulse generator to adjust its output clock pulse in accordance with signal received from logic circuit |
US10/653,166 US20050049818A1 (en) | 2003-09-02 | 2003-09-03 | Dynamic clock pulse adjusting device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10340393A DE10340393A1 (en) | 2003-09-02 | 2003-09-02 | Dynamic clock pulse adjusting device for detecting real time work conditions of CPU, has clock pulse generator to adjust its output clock pulse in accordance with signal received from logic circuit |
US10/653,166 US20050049818A1 (en) | 2003-09-02 | 2003-09-03 | Dynamic clock pulse adjusting device |
Publications (1)
Publication Number | Publication Date |
---|---|
US20050049818A1 true US20050049818A1 (en) | 2005-03-03 |
Family
ID=34593344
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/653,166 Abandoned US20050049818A1 (en) | 2003-09-02 | 2003-09-03 | Dynamic clock pulse adjusting device |
Country Status (2)
Country | Link |
---|---|
US (1) | US20050049818A1 (en) |
DE (1) | DE10340393A1 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080086654A1 (en) * | 2006-10-10 | 2008-04-10 | Tomoko Sogabe | Device and method for supplying master clock to stream processing apparatus for processing stream data frame by frame in synchronization with master clock |
US7464277B2 (en) * | 2005-01-28 | 2008-12-09 | Dell Products, L.P. | Microprocessor performance mode control utilizing sensed temperature as an indication of microprocessor utilization |
US20140222242A1 (en) * | 2011-12-29 | 2014-08-07 | Rajesh Poornachandran | Adaptive thermal throttling with user configuration capability |
CN108139960A (en) * | 2016-04-18 | 2018-06-08 | 华为技术有限公司 | Frequency modulation method, frequency modulation device and the processing equipment of central processor CPU |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006035037B4 (en) * | 2006-07-28 | 2008-08-21 | Wincor Nixdorf International Gmbh | Method and arrangement for protecting at least one component of a computer system against overheating |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4670837A (en) * | 1984-06-25 | 1987-06-02 | American Telephone And Telegraph Company | Electrical system having variable-frequency clock |
US5940785A (en) * | 1996-04-29 | 1999-08-17 | International Business Machines Corporation | Performance-temperature optimization by cooperatively varying the voltage and frequency of a circuit |
US6711447B1 (en) * | 2003-01-22 | 2004-03-23 | Intel Corporation | Modulating CPU frequency and voltage in a multi-core CPU architecture |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5490059A (en) * | 1994-09-02 | 1996-02-06 | Advanced Micro Devices, Inc. | Heuristic clock speed optimizing mechanism and computer system employing the same |
US6311287B1 (en) * | 1994-10-11 | 2001-10-30 | Compaq Computer Corporation | Variable frequency clock control for microprocessor-based computer systems |
US6298448B1 (en) * | 1998-12-21 | 2001-10-02 | Siemens Information And Communication Networks, Inc. | Apparatus and method for automatic CPU speed control based on application-specific criteria |
-
2003
- 2003-09-02 DE DE10340393A patent/DE10340393A1/en not_active Ceased
- 2003-09-03 US US10/653,166 patent/US20050049818A1/en not_active Abandoned
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4670837A (en) * | 1984-06-25 | 1987-06-02 | American Telephone And Telegraph Company | Electrical system having variable-frequency clock |
US5940785A (en) * | 1996-04-29 | 1999-08-17 | International Business Machines Corporation | Performance-temperature optimization by cooperatively varying the voltage and frequency of a circuit |
US6711447B1 (en) * | 2003-01-22 | 2004-03-23 | Intel Corporation | Modulating CPU frequency and voltage in a multi-core CPU architecture |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7464277B2 (en) * | 2005-01-28 | 2008-12-09 | Dell Products, L.P. | Microprocessor performance mode control utilizing sensed temperature as an indication of microprocessor utilization |
US20080086654A1 (en) * | 2006-10-10 | 2008-04-10 | Tomoko Sogabe | Device and method for supplying master clock to stream processing apparatus for processing stream data frame by frame in synchronization with master clock |
US20140222242A1 (en) * | 2011-12-29 | 2014-08-07 | Rajesh Poornachandran | Adaptive thermal throttling with user configuration capability |
US9798335B2 (en) * | 2011-12-29 | 2017-10-24 | Intel Corporation | Adaptive thermal throttling with user configuration capability |
CN108139960A (en) * | 2016-04-18 | 2018-06-08 | 华为技术有限公司 | Frequency modulation method, frequency modulation device and the processing equipment of central processor CPU |
Also Published As
Publication number | Publication date |
---|---|
DE10340393A1 (en) | 2005-04-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100488088B1 (en) | The power management method of portable computer | |
US6311287B1 (en) | Variable frequency clock control for microprocessor-based computer systems | |
US5745375A (en) | Apparatus and method for controlling power usage | |
US6192479B1 (en) | Data processing with progressive, adaptive, CPU-driven power management | |
US6029119A (en) | Thermal management of computers | |
US7178043B2 (en) | Power consumption control method and information processing device | |
US8442697B2 (en) | Method and apparatus for on-demand power management | |
US7689847B2 (en) | Method for increasing the data processing capability of a computer system | |
US10114390B2 (en) | Fan control system, computer system, and fan controlling method thereof | |
US20100191988A1 (en) | Method for reducing power consumption of a computer system in the working state | |
US20040236969A1 (en) | Method and system for dynamically adjusting power consumption of an information handling system | |
US20040070371A1 (en) | Power management of a battery operated computer system based on battery status | |
US9678554B2 (en) | Low power mode operation when charging a device | |
US7516347B2 (en) | Electronic device having power-down mode and method of reducing power consumption | |
US7017058B2 (en) | System and method for throttling a clock speed by comparing a power value with a predetermined power value wherein the predetermined power value is based on an increasing rate of a parameter | |
US7330984B2 (en) | Power monitoring circuit having automatic feedback and overload protection | |
EP2947536B1 (en) | Voltage regulator and voltage regulating method and chip using the same | |
JP2004178588A (en) | Method for regulating voltage to be supplied to processor according to clock frequency | |
US6286109B1 (en) | Method and apparatus for reducing heat generation in a portable computer | |
WO2014105612A1 (en) | Method and apparatus for power resource protection | |
US6965175B2 (en) | Dynamic temperature control method for a computer system | |
US20020015316A1 (en) | Power control method and circuit, and power supply unit | |
US20050049818A1 (en) | Dynamic clock pulse adjusting device | |
US6702457B1 (en) | Method and apparatus for a thermal wake-up circuit | |
JP2003195988A (en) | Electric power consumption control device and its method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: MICRO-STAR INT'L CO., LTD., TAIWAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LIANG, HSING-WANG;TSAI, TSUNG-HUNG;REEL/FRAME:014459/0100 Effective date: 20030801 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |