US11847476B2 - Spoofing CPUID for backwards compatibility - Google Patents
Spoofing CPUID for backwards compatibility Download PDFInfo
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- US11847476B2 US11847476B2 US17/379,550 US202117379550A US11847476B2 US 11847476 B2 US11847476 B2 US 11847476B2 US 202117379550 A US202117379550 A US 202117379550A US 11847476 B2 US11847476 B2 US 11847476B2
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- 239000000872 buffer Substances 0.000 claims abstract description 6
- 238000013519 translation Methods 0.000 claims abstract description 6
- 238000000034 method Methods 0.000 claims description 17
- 238000010586 diagram Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000003278 mimic effect Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 230000006399 behavior Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogram communication
- G06F9/541—Interprogram communication via adapters, e.g. between incompatible applications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
- G06F9/45508—Runtime interpretation or emulation, e g. emulator loops, bytecode interpretation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/445—Program loading or initiating
- G06F9/44536—Selecting among different versions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
- G06F9/5055—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering software capabilities, i.e. software resources associated or available to the machine
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- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Stored Programmes (AREA)
- Executing Machine-Instructions (AREA)
- Storage Device Security (AREA)
- Microcomputers (AREA)
Abstract
Description
Claims (36)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US17/379,550 US11847476B2 (en) | 2016-01-22 | 2021-07-19 | Spoofing CPUID for backwards compatibility |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201662286280P | 2016-01-22 | 2016-01-22 | |
US15/411,310 US11068291B2 (en) | 2016-01-22 | 2017-01-20 | Spoofing CPUID for backwards compatibility |
US17/379,550 US11847476B2 (en) | 2016-01-22 | 2021-07-19 | Spoofing CPUID for backwards compatibility |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US15/411,310 Continuation US11068291B2 (en) | 2016-01-22 | 2017-01-20 | Spoofing CPUID for backwards compatibility |
Publications (2)
Publication Number | Publication Date |
---|---|
US20210365282A1 US20210365282A1 (en) | 2021-11-25 |
US11847476B2 true US11847476B2 (en) | 2023-12-19 |
Family
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Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
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US15/411,310 Active 2039-04-24 US11068291B2 (en) | 2016-01-22 | 2017-01-20 | Spoofing CPUID for backwards compatibility |
US17/379,550 Active 2037-03-20 US11847476B2 (en) | 2016-01-22 | 2021-07-19 | Spoofing CPUID for backwards compatibility |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US15/411,310 Active 2039-04-24 US11068291B2 (en) | 2016-01-22 | 2017-01-20 | Spoofing CPUID for backwards compatibility |
Country Status (6)
Country | Link |
---|---|
US (2) | US11068291B2 (en) |
EP (1) | EP3405864A4 (en) |
JP (2) | JP6788017B2 (en) |
KR (2) | KR102455675B1 (en) |
CN (2) | CN108885552B (en) |
WO (1) | WO2017127631A1 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108885552B (en) | 2016-01-22 | 2023-03-14 | 索尼互动娱乐股份有限公司 | Spoofing CPUID for backward compatibility |
US11222082B2 (en) | 2018-03-30 | 2022-01-11 | Intel Corporation | Identification of a computer processing unit |
US10877751B2 (en) | 2018-09-29 | 2020-12-29 | Intel Corporation | Spoofing a processor identification instruction |
US11055094B2 (en) * | 2019-06-26 | 2021-07-06 | Intel Corporation | Heterogeneous CPUID spoofing for remote processors |
Citations (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5388215A (en) | 1989-05-17 | 1995-02-07 | Ibm Corporation | Uncoupling a central processing unit from its associated hardware for interaction with data handling apparatus alien to the operating system controlling said unit and hardware |
US5671435A (en) * | 1992-08-31 | 1997-09-23 | Intel Corporation | Technique for software to identify features implemented in a processor |
US20010007574A1 (en) | 1997-06-30 | 2001-07-12 | Liu Young Way | Forward compatible and expandable high speed communications system & method of operation |
US20020055828A1 (en) | 2000-03-02 | 2002-05-09 | Texas Instruments Incorporated | Exporting on-chip data processor trace information with variable proportions of control and data |
US20020112145A1 (en) | 2001-02-14 | 2002-08-15 | Bigbee Bryant E. | Method and apparatus for providing software compatibility in a processor architecture |
US20020147962A1 (en) | 2001-02-12 | 2002-10-10 | International Business Machines Corporation | Method and system for incorporating legacy applications into a distributed data processing environment |
US20030112238A1 (en) | 2001-10-10 | 2003-06-19 | Cerny Mark Evan | System and method for environment mapping |
US20030112240A1 (en) | 2001-10-10 | 2003-06-19 | Cerny Mark Evan | System and method for point pushing to render polygons in environments with changing levels of detail |
US6691235B1 (en) | 2000-07-27 | 2004-02-10 | International Business Machines Corporation | Automatic voltage regulation for processors having different voltage requirements and unified or split voltage planes |
US6879266B1 (en) | 1997-08-08 | 2005-04-12 | Quickshift, Inc. | Memory module including scalable embedded parallel data compression and decompression engines |
US20070192611A1 (en) * | 2006-02-15 | 2007-08-16 | Datta Shamanna M | Technique for providing secure firmware |
US20080071502A1 (en) * | 2006-09-15 | 2008-03-20 | International Business Machines Corporation | Method and system of recording time of day clock |
US20080092145A1 (en) | 2006-03-16 | 2008-04-17 | Jun Sun | Secure operating system switching |
US20080168258A1 (en) | 2007-01-09 | 2008-07-10 | Armstrong William J | Method and Apparatus For Selecting the Architecture Level to Which a Processor Appears to Conform |
US7458078B2 (en) | 2003-11-06 | 2008-11-25 | International Business Machines Corporation | Apparatus and method for autonomic hardware assisted thread stack tracking |
US20090002380A1 (en) | 2006-11-10 | 2009-01-01 | Sony Computer Entertainment Inc. | Graphics Processing Apparatus, Graphics Library Module And Graphics Processing Method |
US20090070760A1 (en) | 2007-09-06 | 2009-03-12 | Mukund Khatri | Virtual Machine (VM) Migration Between Processor Architectures |
US20090240980A1 (en) | 2006-10-13 | 2009-09-24 | Hiroaki Inoue | Information processing device and failure concealing method therefor |
US20110107149A1 (en) * | 2004-04-29 | 2011-05-05 | International Business Machines Corporation | Method and apparatus for identifying access states for variables |
US20110161701A1 (en) | 2008-07-03 | 2011-06-30 | Imsys Ab | Regular or design application |
US20110231839A1 (en) | 2010-03-18 | 2011-09-22 | Microsoft Corporation | Virtual machine homogenization to enable migration across heterogeneous computers |
US8549266B2 (en) * | 2003-07-16 | 2013-10-01 | John P. Banning | System and method of instruction modification |
US20140362100A1 (en) | 2013-06-10 | 2014-12-11 | Sony Computer Entertainment Inc. | Scheme for compressing vertex shader output parameters |
US20140362081A1 (en) | 2013-06-10 | 2014-12-11 | Sony Computer Entertainment Inc. | Using compute shaders as front end for vertex shaders |
US20140362102A1 (en) | 2013-06-10 | 2014-12-11 | Sony Computer Entertainment Inc. | Graphics processing hardware for using compute shaders as front end for vertex shaders |
US20140362101A1 (en) | 2013-06-10 | 2014-12-11 | Sony Computer Entertainment Inc. | Fragment shaders perform vertex shader computations |
US8949713B1 (en) | 2008-06-30 | 2015-02-03 | Amazon Technologies, Inc. | Version-specific request processing |
US20150287158A1 (en) | 2014-04-05 | 2015-10-08 | Sony Computer Entertainment America Llc | Method for efficient re-rendering objects to vary viewports and under varying rendering and rasterization parameters |
US20150287166A1 (en) | 2014-04-05 | 2015-10-08 | Sony Computer Entertainment America Llc | Varying effective resolution by screen location by altering rasterization parameters |
US20150287230A1 (en) | 2014-04-05 | 2015-10-08 | Sony Computer Entertainment America Llc | Gradient adjustment for texture mapping for multiple render targets with resolution that varies by screen location |
US20150287232A1 (en) | 2014-04-05 | 2015-10-08 | Sony Computer Entertainment America Llc | Gradient adjustment for texture mapping to non-orthonormal grid |
US20150287167A1 (en) | 2014-04-05 | 2015-10-08 | Sony Computer Entertainment America Llc | Varying effective resolution by screen location in graphics processing by approximating projection of vertices onto curved viewport |
US20160246323A1 (en) | 2015-02-20 | 2016-08-25 | Sony Computer Entertainment America Llc | Backward compatibility through use of spoof clock and fine grain frequency control |
US20170031732A1 (en) | 2015-07-27 | 2017-02-02 | Sony Computer Entertainment America Llc | Backward compatibility by algorithm matching, disabling features, or throttling performance |
US20170031834A1 (en) | 2015-07-27 | 2017-02-02 | Sony Interactive Entertainment America Llc | Backward compatibility by restriction of hardware resources |
US9582381B2 (en) * | 2014-06-12 | 2017-02-28 | Unisys Corporation | Multi-threaded server control automation for disaster recovery |
US20170185412A1 (en) | 2015-12-23 | 2017-06-29 | Intel Corporation | Processing devices to perform a key value lookup instruction |
US20170212774A1 (en) | 2016-01-22 | 2017-07-27 | Sony Interactive Entertainment Inc. | Spoofing cpuid for backwards compatibility |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8015567B2 (en) * | 2002-10-08 | 2011-09-06 | Netlogic Microsystems, Inc. | Advanced processor with mechanism for packet distribution at high line rate |
US7360027B2 (en) * | 2004-10-15 | 2008-04-15 | Intel Corporation | Method and apparatus for initiating CPU data prefetches by an external agent |
US20080028033A1 (en) * | 2006-07-28 | 2008-01-31 | Kestrelink Corporation | Network directory file stream cache and id lookup |
US8627284B2 (en) * | 2009-06-19 | 2014-01-07 | Microsoft Corporation | Managed system extensibility |
US8566480B2 (en) * | 2010-06-23 | 2013-10-22 | International Business Machines Corporation | Load instruction for communicating with adapters |
US8782645B2 (en) * | 2011-05-11 | 2014-07-15 | Advanced Micro Devices, Inc. | Automatic load balancing for heterogeneous cores |
US9665368B2 (en) * | 2012-09-28 | 2017-05-30 | Intel Corporation | Systems, apparatuses, and methods for performing conflict detection and broadcasting contents of a register to data element positions of another register |
-
2017
- 2017-01-20 CN CN201780007665.7A patent/CN108885552B/en active Active
- 2017-01-20 JP JP2018538543A patent/JP6788017B2/en active Active
- 2017-01-20 CN CN202310197565.2A patent/CN116340022A/en active Pending
- 2017-01-20 KR KR1020207032430A patent/KR102455675B1/en active IP Right Grant
- 2017-01-20 US US15/411,310 patent/US11068291B2/en active Active
- 2017-01-20 EP EP17741982.7A patent/EP3405864A4/en active Pending
- 2017-01-20 KR KR1020187024047A patent/KR102179237B1/en active IP Right Grant
- 2017-01-20 WO PCT/US2017/014262 patent/WO2017127631A1/en active Application Filing
-
2020
- 2020-10-29 JP JP2020181308A patent/JP6960511B2/en active Active
-
2021
- 2021-07-19 US US17/379,550 patent/US11847476B2/en active Active
Patent Citations (56)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5388215A (en) | 1989-05-17 | 1995-02-07 | Ibm Corporation | Uncoupling a central processing unit from its associated hardware for interaction with data handling apparatus alien to the operating system controlling said unit and hardware |
US5671435A (en) * | 1992-08-31 | 1997-09-23 | Intel Corporation | Technique for software to identify features implemented in a processor |
US5790834A (en) * | 1992-08-31 | 1998-08-04 | Intel Corporation | Apparatus and method using an ID instruction to identify a computer microprocessor |
US5794066A (en) * | 1992-08-31 | 1998-08-11 | Intel Corporation | Apparatus and method for identifying the features and the origin of a computer microprocessor |
US5958037A (en) | 1992-08-31 | 1999-09-28 | Intel Corporation | Apparatus and method for identifying the features and the origin of a computer microprocessor |
US20010007574A1 (en) | 1997-06-30 | 2001-07-12 | Liu Young Way | Forward compatible and expandable high speed communications system & method of operation |
US6879266B1 (en) | 1997-08-08 | 2005-04-12 | Quickshift, Inc. | Memory module including scalable embedded parallel data compression and decompression engines |
US20020055828A1 (en) | 2000-03-02 | 2002-05-09 | Texas Instruments Incorporated | Exporting on-chip data processor trace information with variable proportions of control and data |
US6691235B1 (en) | 2000-07-27 | 2004-02-10 | International Business Machines Corporation | Automatic voltage regulation for processors having different voltage requirements and unified or split voltage planes |
US20020147962A1 (en) | 2001-02-12 | 2002-10-10 | International Business Machines Corporation | Method and system for incorporating legacy applications into a distributed data processing environment |
KR100538371B1 (en) | 2001-02-12 | 2005-12-21 | 인터내셔널 비지네스 머신즈 코포레이션 | Method and System for Incorporating legacy applications into a distributed data processing environment |
US20020112145A1 (en) | 2001-02-14 | 2002-08-15 | Bigbee Bryant E. | Method and apparatus for providing software compatibility in a processor architecture |
US20100283783A1 (en) | 2001-10-10 | 2010-11-11 | Mark Evan Cerny | Environment Mapping |
US20030112240A1 (en) | 2001-10-10 | 2003-06-19 | Cerny Mark Evan | System and method for point pushing to render polygons in environments with changing levels of detail |
US20060001674A1 (en) | 2001-10-10 | 2006-01-05 | Sony Computer Entertainment America Inc. | Environment mapping |
US7046245B2 (en) | 2001-10-10 | 2006-05-16 | Sony Computer Entertainment America Inc. | System and method for environment mapping |
US7081893B2 (en) | 2001-10-10 | 2006-07-25 | Sony Computer Entertainment America Inc. | System and method for point pushing to render polygons in environments with changing levels of detail |
US20070002049A1 (en) | 2001-10-10 | 2007-01-04 | Cerny Mark E | System and method for generating additional polygons within the contours of a rendered object to control levels of detail |
US8174527B2 (en) | 2001-10-10 | 2012-05-08 | Sony Computer Entertainment America Llc | Environment mapping |
US8031192B2 (en) | 2001-10-10 | 2011-10-04 | Sony Computer Entertainment America Llc | System and method for generating additional polygons within the contours of a rendered object to control levels of detail |
US20030112238A1 (en) | 2001-10-10 | 2003-06-19 | Cerny Mark Evan | System and method for environment mapping |
US7786993B2 (en) | 2001-10-10 | 2010-08-31 | Sony Computer Entertainment America Llc | Environment mapping |
US8549266B2 (en) * | 2003-07-16 | 2013-10-01 | John P. Banning | System and method of instruction modification |
US7458078B2 (en) | 2003-11-06 | 2008-11-25 | International Business Machines Corporation | Apparatus and method for autonomic hardware assisted thread stack tracking |
US20110107149A1 (en) * | 2004-04-29 | 2011-05-05 | International Business Machines Corporation | Method and apparatus for identifying access states for variables |
US20070192611A1 (en) * | 2006-02-15 | 2007-08-16 | Datta Shamanna M | Technique for providing secure firmware |
US20080092145A1 (en) | 2006-03-16 | 2008-04-17 | Jun Sun | Secure operating system switching |
US20080071502A1 (en) * | 2006-09-15 | 2008-03-20 | International Business Machines Corporation | Method and system of recording time of day clock |
US20090240980A1 (en) | 2006-10-13 | 2009-09-24 | Hiroaki Inoue | Information processing device and failure concealing method therefor |
US20090002380A1 (en) | 2006-11-10 | 2009-01-01 | Sony Computer Entertainment Inc. | Graphics Processing Apparatus, Graphics Library Module And Graphics Processing Method |
US8149242B2 (en) | 2006-11-10 | 2012-04-03 | Sony Computer Entertainment Inc. | Graphics processing apparatus, graphics library module and graphics processing method |
JP2008171428A (en) | 2007-01-09 | 2008-07-24 | Internatl Business Mach Corp <Ibm> | Method and apparatus for selecting architecture level to which processor appears to conform in specification |
US7802252B2 (en) | 2007-01-09 | 2010-09-21 | International Business Machines Corporation | Method and apparatus for selecting the architecture level to which a processor appears to conform |
US20080168258A1 (en) | 2007-01-09 | 2008-07-10 | Armstrong William J | Method and Apparatus For Selecting the Architecture Level to Which a Processor Appears to Conform |
US20090070760A1 (en) | 2007-09-06 | 2009-03-12 | Mukund Khatri | Virtual Machine (VM) Migration Between Processor Architectures |
US8949713B1 (en) | 2008-06-30 | 2015-02-03 | Amazon Technologies, Inc. | Version-specific request processing |
US20110161701A1 (en) | 2008-07-03 | 2011-06-30 | Imsys Ab | Regular or design application |
US8402302B2 (en) * | 2008-07-03 | 2013-03-19 | Imsys Ab | Timer system for maintaining the accuracy of a real time clock when synchronization source is not available |
US20110231839A1 (en) | 2010-03-18 | 2011-09-22 | Microsoft Corporation | Virtual machine homogenization to enable migration across heterogeneous computers |
US20140362102A1 (en) | 2013-06-10 | 2014-12-11 | Sony Computer Entertainment Inc. | Graphics processing hardware for using compute shaders as front end for vertex shaders |
US20140362081A1 (en) | 2013-06-10 | 2014-12-11 | Sony Computer Entertainment Inc. | Using compute shaders as front end for vertex shaders |
US20140362101A1 (en) | 2013-06-10 | 2014-12-11 | Sony Computer Entertainment Inc. | Fragment shaders perform vertex shader computations |
US20140362100A1 (en) | 2013-06-10 | 2014-12-11 | Sony Computer Entertainment Inc. | Scheme for compressing vertex shader output parameters |
US20150287158A1 (en) | 2014-04-05 | 2015-10-08 | Sony Computer Entertainment America Llc | Method for efficient re-rendering objects to vary viewports and under varying rendering and rasterization parameters |
US20150287166A1 (en) | 2014-04-05 | 2015-10-08 | Sony Computer Entertainment America Llc | Varying effective resolution by screen location by altering rasterization parameters |
US20150287230A1 (en) | 2014-04-05 | 2015-10-08 | Sony Computer Entertainment America Llc | Gradient adjustment for texture mapping for multiple render targets with resolution that varies by screen location |
US20150287232A1 (en) | 2014-04-05 | 2015-10-08 | Sony Computer Entertainment America Llc | Gradient adjustment for texture mapping to non-orthonormal grid |
US20150287167A1 (en) | 2014-04-05 | 2015-10-08 | Sony Computer Entertainment America Llc | Varying effective resolution by screen location in graphics processing by approximating projection of vertices onto curved viewport |
US20170061671A1 (en) | 2014-04-05 | 2017-03-02 | Sony Interactive Entertainment America Llc | Gradient adjustment for texture mapping to non-orthonormal grid |
US9495790B2 (en) | 2014-04-05 | 2016-11-15 | Sony Interactive Entertainment America Llc | Gradient adjustment for texture mapping to non-orthonormal grid |
US9582381B2 (en) * | 2014-06-12 | 2017-02-28 | Unisys Corporation | Multi-threaded server control automation for disaster recovery |
US20160246323A1 (en) | 2015-02-20 | 2016-08-25 | Sony Computer Entertainment America Llc | Backward compatibility through use of spoof clock and fine grain frequency control |
US20170031834A1 (en) | 2015-07-27 | 2017-02-02 | Sony Interactive Entertainment America Llc | Backward compatibility by restriction of hardware resources |
US20170031732A1 (en) | 2015-07-27 | 2017-02-02 | Sony Computer Entertainment America Llc | Backward compatibility by algorithm matching, disabling features, or throttling performance |
US20170185412A1 (en) | 2015-12-23 | 2017-06-29 | Intel Corporation | Processing devices to perform a key value lookup instruction |
US20170212774A1 (en) | 2016-01-22 | 2017-07-27 | Sony Interactive Entertainment Inc. | Spoofing cpuid for backwards compatibility |
Non-Patent Citations (18)
Title |
---|
"Intel 64 and IA-32 Architectures Software Developer's Manual—vol. 2A—Instruction Set Reference, A-M", Dec. 2009, Order No. 253666-033US, 832. |
Ben Serebrin, "Cross-vendor migration: What do you mean ISA isn't compatible?", Feb. 2009, CPU Vritualization Architect, AMD, Xen Summit, 4 pages. |
Co-Pending U.S. Appl. No. 62/286,280, to Mark Evan Cerny, filed Jan. 22, 2016. |
Dong et al., Extending Xen with Intel Virtualization Technology, Aug. 2005, Intel Technology Journal, vol. 10 Issue 3, p. 193-203. |
EPC Rule 94(3) Communication dated Apr. 15, 2021 for European Patent Application No. 17741982.7. |
EPC Rule 94(3) Communication dated Mar. 10, 2020 for European Patent Application No. 17741982.7. |
Extended European Search report dated Jul. 23, 2019 for European Patent Application No. 17741982.7. |
Final Office Action for U.S. Appl. No. 15/411,310, dated Feb. 19, 2020. |
Final Office Action for U.S. Appl. No. 15/411,310, dated May 22, 2020. |
Fischer et al., Pentium III Processor Serial No. Feature and Applications, 1999, Intel Technology Journal Q2, pp. 1-6. |
International Search Report and Written Opinion dated Apr. 14, 2017 for International Patent Application PCT/US2017/014262. |
Lucille McMinn and Jonathan Butts "A Firmware Verification Tool for Programmable Logic Controllers", 2012, International Conferences on Critical Infrastructure Protection, Springer, Berlin, Heidelberg, pp. 59-69. |
Non-Final Office Action for U.S. Appl. No. 15/411,310, dated Nov. 5, 2019. |
Non-Final Office Action for U.S. Appl. No. 15/411,310, dated Sep. 22, 2020. |
Notice of Allowance for U.S. Appl. No. 15/411,310, dated Mar. 12, 2021. |
Office Action dated Aug. 14, 2019 for Korean Patent Application No. 2018-7024047. |
Office Action dated Oct. 1, 2019 for Japanese Patent Application No. 2018-538543. |
Uwe Dannowski and Andre Przywara, "Cross-Vendor migration: What do you mean my ISA isn't compatible compatible?", 2010 13 pages. |
Also Published As
Publication number | Publication date |
---|---|
WO2017127631A1 (en) | 2017-07-27 |
KR20180101574A (en) | 2018-09-12 |
KR20200129196A (en) | 2020-11-17 |
KR102179237B1 (en) | 2020-11-16 |
US20170212774A1 (en) | 2017-07-27 |
JP6788017B2 (en) | 2020-11-18 |
EP3405864A1 (en) | 2018-11-28 |
CN108885552A (en) | 2018-11-23 |
US11068291B2 (en) | 2021-07-20 |
JP6960511B2 (en) | 2021-11-05 |
CN116340022A (en) | 2023-06-27 |
KR102455675B1 (en) | 2022-10-17 |
JP2019503013A (en) | 2019-01-31 |
US20210365282A1 (en) | 2021-11-25 |
CN108885552B (en) | 2023-03-14 |
EP3405864A4 (en) | 2019-08-21 |
JP2021022399A (en) | 2021-02-18 |
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