US10742400B2 - Datastream block encryption - Google Patents
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- US10742400B2 US10742400B2 US15/505,671 US201515505671A US10742400B2 US 10742400 B2 US10742400 B2 US 10742400B2 US 201515505671 A US201515505671 A US 201515505671A US 10742400 B2 US10742400 B2 US 10742400B2
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- 238000000034 method Methods 0.000 claims description 66
- 239000013598 vector Substances 0.000 claims description 14
- 230000008569 process Effects 0.000 description 33
- 238000012545 processing Methods 0.000 description 8
- 238000004891 communication Methods 0.000 description 6
- 238000012986 modification Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 230000006870 function Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000011218 segmentation Effects 0.000 description 3
- 230000009471 action Effects 0.000 description 2
- 241001441724 Tetraodontidae Species 0.000 description 1
- 238000013478 data encryption standard Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000012552 review Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/065—Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/04—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks
- H04L63/0428—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks wherein the data content is protected, e.g. by encrypting or encapsulating the payload
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
- H04L9/0637—Modes of operation, e.g. cipher block chaining [CBC], electronic codebook [ECB] or Galois/counter mode [GCM]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/14—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using a plurality of keys or algorithms
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/24—Key scheduling, i.e. generating round keys or sub-keys for block encryption
Definitions
- Cryptographic encryption can refer generally to techniques to encode plaintext messages or information into ciphertext such that the content of the plaintext is unreadable or otherwise incoherent to unauthorized entities. Such encryption can, for example, be performed using a public or secret encryption algorithm as well as a secret encryption key to encode and decode the ciphertext. In addition, in some encryption schemes, a random or pseudorandom nonce initialization vector can also be used in order to produce different ciphertexts for identical plaintexts.
- FIG. 1 is a diagram of a system, according to an example.
- FIG. 2 is a diagram of a machine-readable storage medium, according to an example.
- FIG. 3 is a flowchart for a method, according to an example.
- FIG. 5 illustrates a step of a method, according to another example.
- FIG. 6 illustrates another step of a method, according to the example of FIG. 5 .
- FIG. 7 illustrates another step of a method, according to the example of FIG. 5 .
- FIG. 8 illustrates another step of a method, according to the example of FIG. 5 .
- FIG. 9 illustrates another step of a method, according to the example of FIG. 5 .
- FIG. 10 illustrates another step of a method, according to the example of FIG. 5 .
- the use of such vectors can compromise the security of an encryption scheme if the vectors are not sufficiently unique, random, or kept secret.
- This disclosure describes implementations of improved systems, methods, and mediums for encrypting information that seek to address the above issues.
- certain implementations of the present disclosure can provide for a deterministic block cipher chaining scheme that avoids disclosing common parts of distinct plaintexts and does not make use of an initial value.
- One implementation of the present disclosure is directed to an encryption technique that includes separately encrypting equal length blocks of a datastream using an encryption key and without an initialization vector, swapping a subset of data of a first equal length block with a subset of data of a second equal length block such that both swapped blocks have equal lengths, and then separately encrypting both of the swapped blocks using the encryption key.
- Such a technique can exhibit advantages compared to existing systems, method, and mediums for encrypting information.
- information can be encrypted without relying on an initial value while still providing acceptable security and without leaking equality of common parts of distinct plaintexts.
- FIG. 1 illustrates a diagram of a system 100 that can be used to encrypt information.
- system 100 includes a processor 102 and a memory 104 that stores machine-readable instructions that when executed by processor 102 are to segment a datastream into a plurality of blocks (instructions 106 ), separately encrypt these blocks using an encryption key (instructions 108 ), swap a subset of data of a first block with a subset of data of a second block (instructions 110 ), separately encrypt the blocks using the encryption key (instructions 112 ), and concatenate the encrypted blocks into a single ciphertext (instructions 114 ).
- the various aspects of system 100 including processor 102 , memory 104 , and instructions 106 , 108 , 110 , 112 , and 114 will be described in further detail below.
- Instructions 106 stored on memory 104 are to cause processor 102 to segment a datastream into a plurality of blocks.
- datastream can, for example, refer to a plaintext message or information that is readable and meaningful to humans or to a computer.
- a datastream can be in the form of a textual message, computer code (e.g., to run a program, produce an image, etc.), or any other suitable information to be communicated between entities.
- plaintext as used herein can generally refer to a representation of data before any action has been taken to conceal, compress, or “digest” it.
- multiple layers of encryption can be used such that the output of one encryption algorithm becomes a datastream input for the next.
- the datastream inputted into the encryption algorithm can, for example, be ciphertext from a previous encryption process.
- instructions 106 when executed by processor 102 , segment the datastream into a plurality of blocks. Such instructions can allow the datastream to be encrypted using a block cipher mode of operation that repeatedly applies a block cipher's single-block operation to securely transform a datastream larger than a single block.
- block as used herein can, for example, refer to a fixed-length groups of bits for use in a block cipher, such as the Advanced Encryption Standard (AES) block cipher, which has a block size of 128 bits.
- AES Advanced Encryption Standard
- AES is merely provided as an example of one of many encryption algorithms suitable for use with the present disclosure and that other algorithms may be used, such as the Triple Data Encryption Standard (TDES) cipher, the International Data Encryption Algorithm (IDEA) cipher, the Blowfish cipher, etc.
- TDES Triple Data Encryption Standard
- IDEA International Data Encryption Algorithm
- Blowfish cipher etc.
- instructions 106 when executed by processor 102 , are to segment the datastream into a plurality of equal length blocks each of which has a fixed length and a remainder block that has a length greater than zero and smaller than the fixed length.
- a segmentation step can be used for a block cipher mode of operation that employs ciphertext stealing to process messages that are not evenly divisible into blocks.
- Instructions 108 stored on memory 104 when executed by processor 102 , are to cause processor 102 to separately encrypt every block of the datastream using an encryption key.
- the encryption process performed by instructions 108 can, for example, implement a publicly available encryption algorithm, such as AES, or another suitable encryption algorithm.
- the term “encryption key” as used herein can refer to a piece of information that determines a functional output of a cryptographic algorithm.
- such an encryption key can be used to control the operation of a cryptographic algorithm so that only the correct key can convert encrypted text to plaintext and vice versa.
- the encryption key can have a key size suitable for use with the cryptographic algorithm used for encryption.
- a suitable key size can be 128, 192 or 256 bits, or another suitable key size.
- instructions 108 are to cause processor 102 to separately encrypt the blocks of the datastream without using an initialization vector.
- instructions 108 are to cause processor 102 to separately encrypt the blocks of the datastream using an initialization vector.
- Instructions 110 stored on memory 104 when executed by processor 102 , are to cause processor 102 to swap a subset of data of a first block with a subset of data of a second block.
- the subset of data of the first block and the subset of data of the second block can be the same size, such that after the swapping step, both blocks remain the same size. It is appreciated that any suitable subset of data from each block can be used.
- the subset of data of the first block can be a first half of bits of the first block (e.g., the left-most 64 bits of a 128-bit first block) and the subset of data of the second block can be a second half of bits of the second block (e.g., the right-most 64 bits of a 128-bit second block).
- a 64-bit subset of data from a 128-bit block can be formed by a combination of the left-most 32 bits of the block and the right-most 32 bits of the block.
- instructions 110 when executed by processor 102 , are to cause processor 102 to separately swap subsets of data for each equal length block. For example, a first subset of data of a first block can be swapped with a first subset of data of a second block. Following this step, a second subset of data of the second block can be swapped with a first subset of data of a third block. Following this step, a second subset of data of the third block can be swapped with a first subset of a fourth block, and so on.
- swapping operations between different pairs (or other combinations of blocks) can be performed concurrently or at any suitable time for example based on processing capabilities of system 100 . It is appreciated that modifications can be made to the above implementation. For example, in some implementations, a subset of data can be swapped with a subset of data of a third block and following this step, a subset of data of a second block can be swapped with a subset of data of a fourth block.
- the same bits of data for a given block can be “swapped” multiple times via instructions 110 (or a separate set of instructions) to provide additional or alternative security.
- a subset of data (“subset X”) of a first block can be swapped with a subset of data (“subset Y”) of a second block.
- the data of subset X (or a portion thereof) can be swapped with a subset of data from another block.
- the swapping process performed by instructions 110 can be iterated in order to achieve a desired level of cryptographic security.
- FIGS One example of such an implementation is provided below with respect to FIGS.
- a swapping process e.g., a swapping process performed by instructions 110
- the data within the blocks of the segmented datastream can be reordered based on the entire datastream rather than based on a pair of blocks.
- Instructions 112 when executed by processor 102 , are to separately encrypt every block of the datastream using an encryption key.
- each block can be separately encrypted by a separate encryption key or a common key can be used to separately encrypt each block.
- the encryption performed by instructions 108 can incorporate aspects of the encryption performed by instructions 108 and described above.
- instructions 112 are the same set of instructions as instructions 108 and are called multiple times for each iteration of encryption used by system 100 . Similar to certain implementations of instructions 108 , in some implementations, instructions 112 can rely on the AES block cipher algorithm to separately encrypt every block of the datastream.
- the encryption key used by instructions 112 is the same encryption key used by the first encryption process of instructions 108 . In some implementations, the encryption key used by instructions 112 is a different encryption key from that used by the first encryption process of instructions 108 . In some implementations, the encryption key used by instructions 112 and the encryption key used by instructions 108 are independently and randomly (or pseudorandomly) generated. It is appreciated that in some implementations, different encryption keys can be derived from one another or have some other predictive relationship.
- Instructions 114 when executed by processor 102 , are to concatenate the encrypted blocks resulting from instructions 112 into a single ciphertext.
- the ciphertext will have a size that is equal to the original datastream, whereas in other implementations the ciphertext will have a bigger size than the original datastream.
- instructions 114 may “pad” a ciphertext created by concatenating encrypted blocks so as to achieve a desired ciphertext length.
- the size or number of encrypted blocks can be changed during the encryption or swapping processes.
- a 128-bit block size can be “expanded” into a 192-bit block size during an encryption step by including meaningful or nonmeaningful data in each block.
- Such an expansion can, for example, allow blocks not compatible with a given encryption algorithm to be encrypted using the algorithm.
- a ciphertext that results from concatenating encrypted blocks can be larger than its original datastream.
- Processor 102 of system 100 can, for example, be in the form of a central processing unit (CPU), a semiconductor-based microprocessor, a digital signal processor (DSP) such as a digital image processing unit, other hardware devices or processing elements suitable to retrieve and execute instructions stored in memory 104 , or suitable combinations thereof.
- Processor 102 can, for example, include single or multiple cores on a chip, multiple cores across multiple chips, multiple cores across multiple devices, or suitable combinations thereof.
- Processor 102 can be functional to fetch, decode, and execute instructions as described herein.
- processor 102 can, for example, include at least one integrated circuit (IC), other control logic, other electronic circuits, or suitable combination thereof that include a number of electronic components for performing the functionality of instructions stored on memory 104 .
- IC integrated circuit
- Processor 102 can, for example, be implemented across multiple processing units and instructions may be implemented by different processing units in different areas of system 100 .
- Memory 104 of system 100 can, for example, be in the form of a non-transitory machine-readable storage medium, such as a suitable electronic, magnetic, optical, or other physical storage apparatus to contain or store information such as machine-readable instructions 106 , 108 , 110 , 112 , and 114 . Such instructions can be operative to perform one or more functions described herein, such as those described herein with respect to the method of FIGS. 5-10 or other methods described herein.
- Memory 104 can, for example, be housed within the same housing as processor 102 for system 100 , such as within a computing tower case for system 100 . In some implementations, memory 104 and processor 102 are housed in different housings.
- machine-readable storage medium can, for example, include Random Access Memory (RAM), flash memory, a storage drive (e.g., a hard disk), any type of storage disc (e.g., a Compact Disc Read Only Memory (CD-ROM), any other type of compact disc, a DVD, etc.), and the like, or a combination thereof.
- memory 104 can correspond to a memory including a main memory, such as a Random Access Memory (RAM), where software may reside during runtime, and a secondary memory.
- the secondary memory can, for example, include a nonvolatile memory where a copy of machine-readable instructions are stored. It is appreciated that both machine-readable instructions as well as related data can be stored on memory mediums and that multiple mediums can be treated as a single medium for purposes of description.
- Memory 104 can be in communication with processor 102 via a communication link 116 .
- Communication link 116 can be local or remote to a machine (e.g., a computing device) associated with processor 102 .
- Examples of a local communication link 116 can include an electronic bus internal to a machine (e.g., a computing device) where memory 104 is one of volatile, non-volatile, fixed, and/or removable storage medium in communication with processor 102 via the electronic bus.
- one or more aspects of system 100 can be in the form of functional modules that can, for example, be operative to execute one or more processes of instructions 106 , 108 , 110 , 112 , or 114 or other functions described herein relating to other implementations of the disclosure.
- module refers to a combination of hardware (e.g., a processor such as an integrated circuit or other circuitry) and software (e.g., machine- or processor-executable instructions, commands, or code such as firmware, programming, or object code).
- a combination of hardware and software can include hardware only (i.e., a hardware element with no software elements), software hosted at hardware (e.g., software that is stored at a memory and executed or interpreted at a processor), or hardware and software hosted at hardware.
- module is additionally intended to refer to one or more modules or a combination of modules.
- Each module of a system 100 can, for example, include one or more machine-readable storage mediums and one or more computer processors.
- instructions 106 can correspond to a “segmentation module” to segment a datastream into a plurality of blocks
- instructions 108 can correspond to an “encryption module” to separately encrypt every block of the datastream using an encryption key
- instructions 110 can correspond to a “swapping module” to swap a subset of data of a first block with a subset of data of a second block
- instructions 112 can be performed by the above encryption module or by a second encryption module
- instructions 114 can correspond to a “concatenation module” to concatenate encrypted blocks into a single ciphertext.
- a given module can be used for multiple related functions.
- a single module can be used to both segment the datastream into a plurality of blocks (e.g., corresponding to the process of instructions 106 ) as well as to concatenate encrypted blocks into a single ciphertext (corresponding to the process of instructions 114 ).
- FIG. 2 illustrates a machine-readable storage medium 118 including various instructions that can be executed by a processor to encrypt a datastream.
- machine-readable storage medium 118 includes various instructions that can be executed by a processor to encrypt a datastream.
- system 100 e.g., processor 102
- FIG. 2 illustrates a machine-readable storage medium 118 including various instructions that can be executed by a processor to encrypt a datastream.
- the description of machine-readable storage medium 118 provided herein makes reference to various aspects of system 100 (e.g., processor 102 ) and other implementations of the disclosure.
- system 100 e.g., processor 102
- one or more aspects of system 100 (as well as its corresponding instructions 106 , 108 , 110 , 112 , and 114 ) can be applied or otherwise incorporated with medium 118 , it is appreciated that in some implementations, medium 118 may be stored or housed separately from such a system.
- medium 118 can be in the form of Random Access Memory (RAM), flash memory, a storage drive (e.g., a hard disk), any type of storage disc (e.g., a Compact Disc Read Only Memory (CD-ROM), any other type of compact disc, a DVD, etc.), and the like, or a combination thereof.
- RAM Random Access Memory
- flash memory e.g., a hard disk
- storage drive e.g., a hard disk
- any type of storage disc e.g., a Compact Disc Read Only Memory (CD-ROM), any other type of compact disc, a DVD, etc.
- CD-ROM Compact Disc Read Only Memory
- Medium 118 includes machine-readable instructions 120 stored thereon to cause processor 102 to segment a datastream into a plurality of equal length blocks each of which has a fixed length.
- Instructions 120 of medium 118 can incorporate one or more aspects of instructions 106 described above with respect to system 100 and vice versa. As but one example, in some implementations, instructions 120 are to segment the datastream into a plurality of equal length blocks each of which has a fixed length and a remainder block that has a length greater than zero and smaller than the fixed length.
- Medium 118 includes machine-readable instructions 122 stored thereon to cause processor 102 to separately encrypt each equal length block using an encryption key.
- Instructions 122 of medium 118 can incorporate one or more aspects of instructions 108 and 112 described above with respect to system 100 and vice versa.
- instructions 122 can implement a known encryption algorithm such as AES or another suitable encryption algorithm to separately encrypt each equal length block.
- Medium 118 includes machine-readable instructions 124 stored thereon to cause processor 102 to swap a subset of bits of a first encrypted equal length block with a subset of bits of a second encrypted equal length block such that both of the blocks each have a length equal to the fixed length.
- Instructions 124 of medium 118 can incorporate one or more aspects of instructions 110 described above with respect to system 100 and vice versa. For example, any suitable subset of bits from each block can be used.
- the subset of bits of the first block can be a first half of bits of the first block (e.g., the left-most 64 bits of a 128-bit first block) and the subset of bits of the second block can be a second half of bits of the second block (e.g., the right-most 64 bits of a 128-bit second block).
- Medium 118 includes machine-readable instructions 126 stored thereon to cause processor 102 to separately encrypt each block using an encryption key.
- Instructions 126 of medium 118 can incorporate one or more aspects of instructions 108 and 112 described above with respect to system 100 and/or instructions 122 of medium 118 , and vice versa.
- the encryption key used by instructions 126 can be the same encryption key previously used by medium 118 (e.g., the encryption key used in instructions 122 ).
- FIG. 3 is a flowchart for a method 128 to encrypt a datastream.
- execution of method 128 and other methods described herein make reference to system 100 , medium 118 , and other aspects of the disclosure described above, other suitable devices for execution of these methods will be apparent to those of skill in the art.
- Method 128 illustrated in the flowchart of FIG. 3 as well as the methods described in the other figures can, for example, be implemented in the form of executable instructions stored on memory 104 of system 100 , executable instructions stored on medium 118 , in the form of electronic circuitry, or another suitable form.
- Method 128 includes a step 132 of swapping a subset of data of a first equal length block with a subset of data of a second equal length block such that both swapped blocks have equal lengths.
- Step 132 can incorporate one or more aspects of instructions 110 or another suitable aspect of system 100 and/or instructions 124 or another suitable aspect of medium 118 described above (and vice versa). For example, any suitable subset of bits from each block can be used during the swapping process.
- the subset of bits of the first block can be a first half of bits of the first block (e.g., the left-most 64 bits of a 128-bit first block) and the subset of bits of the second block can be a second half of bits of the second block (e.g., the right-most 64 bits of a 128-bit second block).
- FIG. 4 illustrates another example of method 128 in accordance with the present disclosure.
- Method 128 includes an additional step 136 of concatenating the encrypted blocks following the encryption of step 134 into a single ciphertext.
- Step 136 can incorporate one or more aspects of instructions 114 or another suitable aspect of system 100 (and vice versa).
- the concatenated ciphertext can have a size that is equal to the original datastream, whereas in other implementations the ciphertext will have a bigger size than the original datastream.
- FIGS. 5-10 illustrate various steps of an example encryption process in accordance with the present disclosure.
- the encryption process of FIGS. 5-10 can, for example, be implemented in the form of executable instructions stored on memory 104 of system 100 , executable instructions stored on medium 118 , in the form of electronic circuitry, or another suitable form.
- the encryption process of FIGS. 5-10 begins with a datastream A already segmented into blocks of 50 characters (e.g., A 1 , A 2 , A 3 , A 4 , and A 5 ) with a block at the end of the datastream (A 6 ) for the remainder of the datastream and includes only 20 characters. It is appreciated that such segmentation can, for example, be performed as described above with respect to instructions 106 and/or instructions 120 .
- the term “characters” used with respect to the description of this example is provided for illustration only. Indeed, it is appreciated that implementations of the present disclosure may operate at the bit-level or another suitable level for processing the datastream.
- FIG. 5 illustrates a step 138 of the example encryption process that can, for example, correspond to one or more aspects of the encryption instructions 108 for system 100 , instructions 122 of medium 118 , and/or step 130 of method 128 .
- each block of datastream A can be encrypted using an encryption algorithm E and respective encryption key K to achieve a respective encrypted ciphertext C formed by respective encrypted blocks C 1 , C 2 , C 3 , C 4 , and C 5 .
- each datastream block is encrypted using the same encryption algorithm E and the same encryption key K.
- different encryption algorithms and/or encryption keys may be used for different blocks.
- FIG. 7 illustrates a step 142 in the example encryption process that can, for example, correspond to one or more aspects of instructions 110 system 100 , instructions 124 of medium 118 , and/or step 132 of method 128 .
- a first block C 2 of ciphertext C resulting from step 140 (which may or may not be the first sequential block of ciphertext C) is split into a first portion of data V (25 characters) and a second portion of data W (25 characters).
- a second block C 3 of ciphertext C resulting from step 140 (which may or may not be the next sequential block following block C 2 ) is split into a first portion of data X (25 characters) and a second portion of data Y (25 characters).
- the same reference letters for portions of data are used for convenience in the description of various steps of the example encryption process of FIGS. 5-10 .
- the reference letters are not necessarily intended to refer to the same data between different steps of the example encryption process. That is, data W referred to in step 142 is not necessarily the same data W referred to in step 140 .
- data V is combined with data Y to form data J, which is encrypted using encryption algorithm E and encryption key K to form modified ciphertext block C 2 ′.
- FIG. 7 illustrates only a single data swapping operation between ciphertext blocks C 2 and C 3 to form modified ciphertext blocks C 2 ′ and C 3 ′
- the example encryption process is used in this step to form modified ciphertext blocks C 1 ′, C 4 ′, and C 5 ′ using similar operations.
- data from ciphertext block C 6 (which was created in step 140 described above) is not swapped with data from another block.
- suitable modifications may be made to step 142 to provide a swapping operation for block C 6 .
- FIG. 9 illustrates a step 146 in the example encryption process that can, for example, correspond to a second iteration of step 144 to further encrypt ciphertext C. That is, an encrypted block C 5 of ciphertext C resulting from step 144 is split into a first portion of data V that is equal in size (20 characters) to the data X in the remainder block C 6 of ciphertext C and a second portion of data W (30 characters) for the remainder of data from block C 5 .
- Data X is combined with data W to form data J, which is encrypted using encryption algorithm E and encryption key K to form modified ciphertext block C 5 ′.
- Data V is stored in modified ciphertext block C 6 ′.
- steps 146 As described above with respect to step 144 , it is appreciated that modifications can be made to exact description of step 146 to achieve similar functionality.
- FIG. 10 illustrates a step 148 in the example encryption process that can, for example, correspond to a second iteration of step 142 to further encrypt ciphertext C. That is, a first block C 2 of ciphertext C resulting from step 146 (which may or may not be the first sequential block of ciphertext C) is split into a first portion of data V (25 characters) and a second portion of data W (25 characters). Likewise, a second block C 3 of ciphertext C resulting from step 146 (which may or may not be the next sequential block following block C 2 ) is split into a first portion of data X (25 characters) and a second portion of data Y (25 characters). As illustrated in FIG.
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Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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PCT/US2015/021632 WO2016153457A1 (en) | 2015-03-20 | 2015-03-20 | Datastream block encryption |
Publications (2)
Publication Number | Publication Date |
---|---|
US20170279603A1 US20170279603A1 (en) | 2017-09-28 |
US10742400B2 true US10742400B2 (en) | 2020-08-11 |
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ID=56978360
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US15/505,671 Active 2035-06-11 US10742400B2 (en) | 2015-03-20 | 2015-03-20 | Datastream block encryption |
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Country | Link |
---|---|
US (1) | US10742400B2 (en) |
EP (1) | EP3272060B1 (en) |
CN (1) | CN107534549B (en) |
TW (1) | TW201637395A (en) |
WO (1) | WO2016153457A1 (en) |
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Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
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US10187200B1 (en) * | 2017-12-18 | 2019-01-22 | Secure Channels Inc. | System and method for generating a multi-stage key for use in cryptographic operations |
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EP3272060B1 (en) | 2019-05-01 |
CN107534549A (en) | 2018-01-02 |
WO2016153457A1 (en) | 2016-09-29 |
EP3272060A4 (en) | 2018-03-14 |
US20170279603A1 (en) | 2017-09-28 |
TW201637395A (en) | 2016-10-16 |
EP3272060A1 (en) | 2018-01-24 |
CN107534549B (en) | 2020-06-30 |
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