TWM480722U - High-accuracy in-cell flat display touch structure of narrow border - Google Patents

High-accuracy in-cell flat display touch structure of narrow border Download PDF

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Publication number
TWM480722U
TWM480722U TW103200192U TW103200192U TWM480722U TW M480722 U TWM480722 U TW M480722U TW 103200192 U TW103200192 U TW 103200192U TW 103200192 U TW103200192 U TW 103200192U TW M480722 U TWM480722 U TW M480722U
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Taiwan
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layer
conductor block
conductor
lines
length
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TW103200192U
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Chinese (zh)
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xiang-yu Li
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Superc Touch Corp
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高準確度之窄邊框內嵌式平面顯示觸控結構High-accuracy narrow bezel embedded flat display touch structure

本創作係關於一種具有觸控板的結構,尤指一種高準確度之窄邊框內嵌式平面顯示觸控結構。The present invention relates to a structure having a touch panel, and more particularly to a high-accuracy narrow bezel embedded flat display touch structure.

現代消費性電子裝置多配備觸控板做為其輸入裝置之一。觸控板根據感測原理的不同可分為電阻式、電容式、音波式、及光學式等多種。Modern consumer electronic devices are often equipped with a touchpad as one of their input devices. The touchpad can be divided into resistive, capacitive, sonic, and optical types according to different sensing principles.

觸控面板的技術原理是當手指或其他介質接觸到螢幕時,依據不同感應方式,偵測電壓、電流、聲波或紅外線等,以此測出觸壓點的座標位置。例如電阻式即為利用上、下電極間的電位差,計算施壓點位置檢測出觸控點所在。電容式觸控面板是利用排列之透明電極與人體之間的靜電結合所產生之電容變化,從所產生之電流或電壓來檢測其座標。The technical principle of the touch panel is to detect the voltage, current, sound wave or infrared light according to different sensing methods when the finger or other medium touches the screen, thereby measuring the coordinate position of the touch pressure point. For example, the resistance type is to use the potential difference between the upper and lower electrodes to calculate the position of the pressure point to detect the touch point. A capacitive touch panel detects a change in capacitance from a generated current or voltage by utilizing a change in capacitance generated by electrostatic coupling between a transparent electrode arranged and a human body.

隨著智慧型手機的普及,多點觸控的技術需求與日俱增。目前,多點觸控主要是透過投射電容式(Projected Capacitive)觸控技術來實現。With the popularity of smart phones, the demand for multi-touch technology is increasing. At present, multi-touch is mainly realized by Projected Capacitive touch technology.

投射電容式技術主要是透過雙層氧化銦錫材 質(Indium Tin Oxide,ITO)形成行列交錯感測單元矩陣,以偵測得到精確的觸控位置。投射電容式觸控技術的基本原理是以電容感應為主,利用設計多個蝕刻後的氧化銦錫材質電極,增加數組存在不同平面、同時又相互垂直的透明導線,形成類似X、Y軸驅動線。這些導線皆由控制器所控制,其係依序掃瞄偵測電容值變化饋至控制器。Projected capacitive technology is mainly through double-layer indium tin oxide Indium Tin Oxide (ITO) forms a matrix of interlaced sensing units to detect accurate touch positions. The basic principle of the projected capacitive touch technology is based on capacitive sensing. By designing a plurality of etched indium tin oxide electrodes, the array has different planes and transparent lines perpendicular to each other to form an X- and Y-axis drive. line. These wires are controlled by the controller, which sequentially feeds the detected capacitance value changes to the controller.

圖1係習知互感應電容(Mutual capacitance)感測之示意圖。習知互感應電容(Cm)感測之觸控面板結構100上的感應導體線110,120係依沿著第一方向(X)及第二方向(Y)排列。第一方向(X)排列的感應導體線110與第二方向(Y)排列的感應導體線120之間有一互感應電容(Cm)160,互感應電容(Cm)160並非實體電容,其係沿著第一方向(X)排列的感應導體線110與第二方向(Y)排列的感應導體線120之間的互感應電容(Cm)。FIG. 1 is a schematic diagram of a conventional mutual capacitance sensing. The sensing conductor lines 110, 120 on the touch panel structure 100 sensed by the conventional mutual induction capacitance (Cm) are arranged along the first direction (X) and the second direction (Y). There is a mutual induction capacitance (Cm) 160 between the sensing conductor line 110 arranged in the first direction (X) and the sensing conductor line 120 arranged in the second direction (Y), and the mutual induction capacitance (Cm) 160 is not a physical capacitance, and the edge thereof is The mutual induction capacitance (Cm) between the sensing conductor line 110 arranged in the first direction (X) and the sensing conductor line 120 arranged in the second direction (Y).

當要執行觸控感應時,一軟性電路板130上的控制電路131的內部驅動器(圖未示)於第一時間週期T1,對第一方向(X)排列的感應導體線110驅動,其使用電壓Vy_1對互感應電容(Cm)160充電,於第一時間週期T1,控制電路131的內部所有感測器(圖未示)感測所有第二方向(Y)排列的感應導體線120上的電壓(Vo_1,Vo_2,…,Vo_n),用以獲得n個資料,亦即經過m個驅動週期後,即可獲得m×n個資料。When the touch sensing is to be performed, an internal driver (not shown) of the control circuit 131 on the flexible circuit board 130 drives the sensing conductor line 110 arranged in the first direction (X) for the first time period T1, and uses the same. The voltage Vy_1 charges the mutual induction capacitor (Cm) 160. During the first time period T1, all the sensors (not shown) inside the control circuit 131 sense all the second direction (Y) arranged on the sensing conductor line 120. The voltage (Vo_1, Vo_2, ..., Vo_n) is used to obtain n data, that is, after m driving cycles, m×n data can be obtained.

此種互感應電容(Cm)的感測主要是利用在顯示面板上形成以雙層氧化銦錫材質(Indium Tin Oxide,ITO)的行列交錯感測單元矩陣,以偵測得到精確的觸控位置。因此 會增加製造程序及成本。同時,感應導體線120執行觸控感應時要將感測到的訊號傳輸至一軟性電路板130上的控制電路131時,需經由面板140的側邊150走線方能連接至該軟性電路板130。此種設計將增加觸控面板邊框的寬度,並不適合窄邊框設計的趨勢。The mutual sensing capacitor (Cm) is mainly used to form a matrix of interlaced sensing units with double-layer Indium Tin Oxide (ITO) on the display panel to detect an accurate touch position. . therefore Will increase manufacturing procedures and costs. At the same time, when the sensing conductor 120 transmits the sensed signal to the control circuit 131 on the flexible circuit board 130 when performing the touch sensing, the side line 150 of the panel 140 needs to be routed to connect to the flexible circuit board. 130. This design will increase the width of the touch panel border and is not suitable for the narrow bezel design trend.

針對上述問題,In-Cell Touch技術則是將觸控元件整合於顯示面板之內,使得顯示面板本身就具備觸控功能,因此不需要另外進行與觸控面板貼合或是組裝的製程。In-Cell Touch技術係在顯示面板的上玻璃基板或下玻璃基板設置ITO透明感應電極層或光學感應元件。然而,如此不僅增加成本,亦增加製程程序,容易導致製程良率降低及製程成本飆昇,以及開口率下降而須要更強的背光,也會增加耗電。因此,習知平面顯示觸控結構仍有改善的空間。In view of the above problems, the In-Cell Touch technology integrates the touch components into the display panel, so that the display panel itself has a touch function, so that no additional process of assembling or assembling with the touch panel is required. The In-Cell Touch technology is provided with an ITO transparent sensing electrode layer or an optical sensing element on the upper glass substrate or the lower glass substrate of the display panel. However, this not only increases the cost, but also increases the process procedure, which leads to a decrease in process yield and a rise in process cost, and a need for a stronger backlight with a lower aperture ratio, which also increases power consumption. Therefore, there is still room for improvement in the conventional flat display touch structure.

本創作之主要目的係在提供一種高準確度之窄邊框內嵌式平面顯示觸控結構,僅需於單邊設置連接線路,可增加導體區塊之間的感應電容變化量,俾使用較小的電壓即能驅動導體區塊線,同時可提昇接觸點偵測的準確度。The main purpose of this creation is to provide a high-accuracy narrow-frame in-line flat-panel display touch structure, which only needs to be connected on one side, which can increase the amount of capacitance change between conductor blocks, and use less The voltage can drive the conductor block line and improve the accuracy of contact point detection.

依據本創作之一特色,本創作提供一種高準確度之窄邊框內嵌式平面顯示觸控結構,包括一第一基板、一第二基板、一遮光層、一感應電極及走線層、一感應電極層。該第一基板及該第二基板以平行成對之配置將一顯 示層夾置於二基板之間。該遮光層位於該第一基板之面向該顯示層之一側的表面,該遮光層係由複數條遮光線條所構成,該複數條遮光線條設置於一第一方向及一第二方向,以形成複數個遮光柵格與透光區組成之遮光區塊。該感應電極及走線層位於該遮光層之面向該顯示層之一側,並具有沿著一第一方向排列的M條第一導體區塊線及N條連接線,其依據一觸控驅動訊號而感應是否有一外部物件接近,其中,M、N為正整數,該M條第一導體區塊線的每一條第一導體區塊線係由複數個第一導體區塊所組成。該感應電極層位於該感應電極及走線層之面向該顯示層之一側的表面上,並具有沿著一第二方向排列的N條第二導體區塊線,其執行觸控感應時,接受該觸控驅動訊號,每一第二導體區塊線以一對應之第i條連接線延伸至該高準確度之窄邊框內嵌式平面顯示觸控結構之一側邊,i為正整數且1≦i≦N,該N條第二導體區塊線的每一條第二導體區塊線係由複數個第二導體區塊所組成;其中,該複數個第一導體區塊、該N條連接線、及該複數個第二導體區塊的位置係依據與該遮光層之複數個遮光區塊之遮光柵格的位置相對應而設置。According to one of the features of the present invention, the present invention provides a high-accuracy narrow-frame in-cell planar display touch structure, including a first substrate, a second substrate, a light shielding layer, a sensing electrode and a wiring layer, and a Sensing electrode layer. The first substrate and the second substrate are arranged in parallel pairs The layer is sandwiched between the two substrates. The light shielding layer is disposed on a surface of the first substrate facing the display layer, the light shielding layer is formed by a plurality of light shielding lines, and the plurality of light shielding lines are disposed in a first direction and a second direction to form A plurality of light-shielding blocks composed of a light-shielding grid and a light-transmitting area. The sensing electrode and the wiring layer are located on one side of the light shielding layer facing the display layer, and have M first conductor block lines and N connection lines arranged along a first direction, according to a touch driving The signal senses whether there is an external object close to, wherein M and N are positive integers, and each of the first conductor block lines of the M first conductor block lines is composed of a plurality of first conductor blocks. The sensing electrode layer is located on a surface of the sensing electrode and the wiring layer facing one side of the display layer, and has N second conductor block lines arranged along a second direction, when performing touch sensing, Receiving the touch driving signal, each second conductor block line extends to a side of one of the high-accuracy narrow-frame embedded in-plane display touch structures with a corresponding ith connection line, i is a positive integer And each second conductor block line of the N second conductor block lines is composed of a plurality of second conductor blocks; wherein the plurality of first conductor blocks, the N The strip connection line and the position of the plurality of second conductor blocks are disposed according to positions of the shading grids of the plurality of shading blocks of the shading layer.

依據本創作之另一特色,本創作提供一種高準確度之窄邊框內嵌式平面顯示觸控結構,包括一第一基板、一第二基板、一遮光層、一感應電極層、一感應電極及走線層。該第一基板及該第二基板以平行成對之配置將一顯示層夾置於二基板之間。該遮光層位於該第一基板之 面向該顯示層之一側的表面,該遮光層係由複數條遮光線條所構成,該複數條遮光線條設置於一第一方向及一第二方向,以形成複數個包含遮光柵格與透光區之遮光區塊。該感應電極層位於該遮光層之面向該顯示層之一側的表面上,並具有沿著一第二方向排列的N條第二導體區塊線,其執行觸控感應時,接受該觸控驅動訊號。該感應電極及走線層位於該感應電極層之面向該顯示層之一側,並具有沿著一第一方向排列的M條第一導體區塊線及N條連接線,其依據一觸控驅動訊號而感應是否有一外部物件接近,其中,M、N為正整數,該M條第一導體區塊線的每一條第一導體區塊線係由複數個第一導體區塊所組成;其中,每一第二導體區塊線以一對應之第i條連接線延伸至該高準確度之窄邊框內嵌式平面顯示觸控結構之一側邊,i為正整數且1≦i≦N,該N條第二導體區塊線的每一條第二導體區塊線係由複數個第二導體區塊所組成,該複數個第一導體區塊、該N條連接線、及該複數個第二導體區塊的位置係依據與該遮光層之複數條遮光線條的位置相對應而設置,且該第一導體區塊與該第二導體區塊疊置時,係以差排方式疊置。According to another feature of the present invention, the present invention provides a high-accuracy narrow-frame in-cell planar display touch structure, including a first substrate, a second substrate, a light shielding layer, a sensing electrode layer, and a sensing electrode. And the layer of the line. The first substrate and the second substrate are arranged in a parallel pair to sandwich a display layer between the two substrates. The light shielding layer is located on the first substrate a surface facing one side of the display layer, the light shielding layer is composed of a plurality of light shielding lines, and the plurality of light shielding lines are disposed in a first direction and a second direction to form a plurality of light shielding grids and transparent The shading block of the district. The sensing electrode layer is located on a surface of the light shielding layer facing one side of the display layer, and has N second conductor block lines arranged along a second direction. When the touch sensing is performed, the touch is accepted. Drive signal. The sensing electrode and the wiring layer are located on one side of the sensing electrode layer facing the display layer, and have M first conductor block lines and N connecting lines arranged along a first direction, according to a touch Driving the signal to sense whether there is an external object approaching, wherein M and N are positive integers, and each of the first conductor block lines of the M first conductor block lines is composed of a plurality of first conductor blocks; Each second conductor block line extends to a side of one of the high-accuracy narrow-frame in-cell planar display touch structures with a corresponding ith connection line, i being a positive integer and 1≦i≦N Each second conductor block line of the N second conductor block lines is composed of a plurality of second conductor blocks, the plurality of first conductor blocks, the N connecting lines, and the plurality of The position of the second conductor block is set according to the position of the plurality of light shielding lines of the light shielding layer, and when the first conductor block and the second conductor block are stacked, they are stacked in a differential manner .

100‧‧‧互感應電容感測之觸控面板結構100‧‧‧Touch panel structure for mutual induction capacitance sensing

110,120‧‧‧感應導體線110,120‧‧‧Inductive conductor lines

160‧‧‧互感應電容160‧‧‧ mutual induction capacitor

130‧‧‧軟性電路板130‧‧‧Soft circuit board

131‧‧‧控制電路131‧‧‧Control circuit

140‧‧‧面板140‧‧‧ panel

150‧‧‧側邊150‧‧‧ side

200‧‧‧高準確度之窄邊框內嵌式平面顯示觸控結構200‧‧‧High-accuracy narrow bezel in-line flat display touch structure

210‧‧‧第一基板210‧‧‧First substrate

220‧‧‧第二基板220‧‧‧second substrate

230‧‧‧顯示層230‧‧‧Display layer

240‧‧‧遮光層240‧‧‧Lighting layer

250‧‧‧感應電極及走線層250‧‧‧Induction electrode and trace layer

260‧‧‧感應電極層260‧‧‧Induction electrode layer

270‧‧‧彩色濾光層270‧‧‧Color filter layer

280‧‧‧共通電極層280‧‧‧Common electrode layer

290‧‧‧薄膜電晶體層290‧‧‧Thin film transistor layer

300‧‧‧第一偏光層300‧‧‧First polarizing layer

310‧‧‧第二偏光層310‧‧‧Second polarizing layer

320‧‧‧第一絕緣層320‧‧‧First insulation

330‧‧‧第二絕緣層330‧‧‧Second insulation

291‧‧‧薄膜電晶體291‧‧‧Thin film transistor

293‧‧‧透明電極293‧‧‧Transparent electrode

241‧‧‧遮光線條241‧‧‧ shading lines

243‧‧‧遮光區塊243‧‧‧ shading block

40-1,40-2,...,40-M‧‧‧第一導體區塊線40-1, 40-2,...,40-M‧‧‧first conductor block line

41-1,41-2,...,41-N‧‧‧連接線41-1, 41-2,...,41-N‧‧‧Connected cable

400‧‧‧第一導體區塊400‧‧‧First conductor block

50-1,50-2,...,50-N‧‧‧第二導體區塊線50-1, 50-2,...,50-N‧‧‧Second conductor block line

201‧‧‧側邊201‧‧‧ side

500‧‧‧第二導體區塊500‧‧‧Second conductor block

600‧‧‧軟性電路板600‧‧‧Soft circuit board

610‧‧‧控制電路610‧‧‧Control circuit

243-1,243-2,243-3,243-4,243-5‧‧‧遮光區塊243-1, 243-2, 243-3, 243-4, 243-5‧‧‧ shading blocks

Q‧‧‧頂點Vertex of Q‧‧‧

P‧‧‧頂點P‧‧‧ vertex

O1,O2,O3,O4,O5‧‧‧頂點O1, O2, O3, O4, O5‧‧‧ Vertices

X1,X2‧‧‧中心X1, X2‧‧ Center

V1~V5‧‧‧橢圓V1~V5‧‧‧ ellipse

H1~H6‧‧‧橢圓H1~H6‧‧‧ ellipse

S1,S2‧‧‧點S1, S2‧‧ points

52‧‧‧貫孔52‧‧‧through holes

L1‧‧‧線段L1‧‧‧ line segment

L2‧‧‧線段L2‧‧‧ line segment

1010‧‧‧陰極層1010‧‧‧ cathode layer

1020‧‧‧顯示層1020‧‧‧Display layer

1030‧‧‧陽極層1030‧‧‧anode layer

1031‧‧‧陽極畫素電極1031‧‧‧Anode element electrode

1021‧‧‧電洞傳輸子層1021‧‧‧ hole transmission sublayer

1023‧‧‧發光層1023‧‧‧Lighting layer

1025‧‧‧電子傳輸子層1025‧‧‧Electronic transmission sublayer

291‧‧‧畫素驅動電路291‧‧‧ pixel driving circuit

260‧‧‧感應電極層260‧‧‧Induction electrode layer

250‧‧‧感應電極及走線層250‧‧‧Induction electrode and trace layer

圖1係習知互感應電容感測之示意圖。FIG. 1 is a schematic diagram of a conventional mutual induction capacitance sensing.

圖2係本創作之一種高準確度之窄邊框內嵌式平面顯示觸控 結構的疊層示意圖。Figure 2 is a high-accuracy narrow-frame in-line flat display touch Schematic diagram of the structure.

圖3係一般習知遮光層的示意圖。Figure 3 is a schematic illustration of a conventional conventional light shielding layer.

圖4係本創作感應電極及走線層與感應電極層之示意圖。FIG. 4 is a schematic diagram of the sensing electrode and the wiring layer and the sensing electrode layer.

圖5係本創作第一導體區塊線及第二導體區塊線之示意圖。FIG. 5 is a schematic diagram of the first conductor block line and the second conductor block line of the present invention.

圖6係本創作第一導體區塊線及第二導體區塊線之另一示意圖。FIG. 6 is another schematic diagram of the first conductor block line and the second conductor block line of the present invention.

圖7A及圖7B係本創作第一導體區塊及第二導體區塊之互感應電容的一示意圖7A and FIG. 7B are schematic diagrams showing the mutual induction capacitance of the first conductor block and the second conductor block of the present invention.

圖8係本創作圖4中A-A’處的剖面圖。Figure 8 is a cross-sectional view taken along line A-A' of Figure 4 of the present invention.

圖9係本創作第一導體區塊線及第二導體區塊線之又一示意圖。FIG. 9 is still another schematic diagram of the first conductor block line and the second conductor block line of the present invention.

圖10係本創作之一種高準確度之窄邊框內嵌式平面顯示觸控結構的另一示意圖。FIG. 10 is another schematic diagram of a high-accuracy narrow bezel embedded flat display touch structure of the present invention.

圖11係本創作第一導體區塊線的示意圖。Figure 11 is a schematic illustration of the first conductor block line of the present invention.

圖12係本創作之一種高準確度之窄邊框內嵌式平面顯示觸控結構的另一疊層示意圖。FIG. 12 is another stacked diagram of a high-accuracy narrow-frame in-cell planar display touch structure of the present invention.

圖13係本創作之一種高準確度之窄邊框內嵌式平面顯示觸控結構的又一疊層示意圖。FIG. 13 is another stacked schematic diagram of a high-accuracy narrow-frame in-cell planar display touch structure of the present invention.

本創作是關於一種高準確度之窄邊框內嵌式平面顯示觸控結構。圖2係本創作之一種高準確度之窄邊框內嵌式平面顯示觸控結構200的疊層示意圖,如圖2所示,該高準確度之窄邊框內嵌式平面顯示觸控結構200包括有第一 基板210、一第二基板220、一顯示層230、一遮光層(black matrix)240、一感應電極及走線層250、一感應電極層260、一彩色濾光層(color filter)270、一共通電極層(Vcom)280、一薄膜電晶體層290、一第一偏光層(upper polarizer)300、一第二偏光層(lower polarizer)310、一第一絕緣層320、及一第二絕緣層330。該顯示層230於本實施例中較佳為一液晶層。This creation is about a high-accuracy narrow bezel embedded flat display touch structure. FIG. 2 is a schematic diagram of a high-accuracy narrow-frame in-cell planar display touch structure 200. As shown in FIG. 2, the high-accuracy narrow bezel in-line display touch structure 200 includes Have first a substrate 210, a second substrate 220, a display layer 230, a black matrix 240, a sensing electrode and wiring layer 250, a sensing electrode layer 260, a color filter 270, and a color filter 270. a common electrode layer (Vcom) 280, a thin film transistor layer 290, a first polarizer layer (upper polarizer) 300, a second polarizer layer (lower polarizer) 310, a first insulating layer 320, and a second insulating layer 330. The display layer 230 is preferably a liquid crystal layer in this embodiment.

該第一基板210及該第二基板220較佳為玻璃基板,該第一基板210及該第二基板220以平行成對之配置將該顯示層230夾置於二基板210,220之間。該第二基板220一般稱為薄膜電晶體基板(thin film transistor substrate,TFT substrate),當作開關用的薄膜電晶體一般設置於薄膜電晶體基板(TFT substrate)上。The first substrate 210 and the second substrate 220 are preferably glass substrates. The first substrate 210 and the second substrate 220 are disposed in parallel with each other to sandwich the display layer 230 between the two substrates 210 and 220. The second substrate 220 is generally referred to as a thin film transistor substrate (TFT substrate), and the thin film transistor used as a switch is generally disposed on a thin film transistor substrate (TFT substrate).

該遮光層(black matrix)240係位於該第一基板210之面向顯示層230一側的表面,該遮光層240係由複數條遮光線條所構成,該複數條遮光線條241設置於一第一方向(Y)及一第二方向(X),以形成複數個包含遮光柵格與透光區之遮光區塊243。The black matrix 240 is located on a surface of the first substrate 210 facing the display layer 230. The light shielding layer 240 is formed by a plurality of light shielding lines, and the plurality of light shielding lines 241 are disposed in a first direction. (Y) and a second direction (X) to form a plurality of light shielding blocks 243 including a light shielding grid and a light transmitting region.

圖3係一般習知遮光層240的示意圖。如圖3所示,習知遮光層240係由不透光的黑色絕緣材質之線條構成複數條遮光線條241,該等黑色絕緣材質之複數條遮光線條241係互相垂直分佈於該習知遮光層240,故該習知遮光層240又稱為黑矩陣(black matrix)。而本創作亦具有如此之遮光層240,且感應電極及走線層250及彩色濾光層(color filter)270則分佈在該等黑色絕緣材質之線條之間的遮光區塊 243。FIG. 3 is a schematic illustration of a conventional conventional light shielding layer 240. As shown in FIG. 3, the conventional light-shielding layer 240 is formed by a line of opaque black insulating material, and a plurality of light-shielding lines 241 are disposed. The plurality of light-shielding lines 241 of the black insulating material are vertically distributed to the conventional light-shielding layer. 240, the conventional light shielding layer 240 is also referred to as a black matrix. The present invention also has such a light-shielding layer 240, and the sensing electrode and the wiring layer 250 and the color filter 270 are distributed in the light-shielding block between the lines of the black insulating materials. 243.

本創作係在習知的遮光層240之面向該顯示層230一側設置感應電極及走線層250及感應電極層260,並在其上佈植感應觸控圖型結構。In the present invention, the sensing electrode and the wiring layer 250 and the sensing electrode layer 260 are disposed on the side of the conventional light shielding layer 240 facing the display layer 230, and the inductive touch pattern structure is implanted thereon.

圖4係本創作感應電極及走線層與感應電極層之示意圖。該感應電極及走線層250位於該遮光層240之面向該顯示層230之一側,並具有沿著一第一方向(X)排列的M條第一導體區塊線40-1,40-2,...,40-M及N條連接線41-1,41-2,...,41-N,其依據一觸控驅動訊號而感應是否有一外部物件接近,其中,M、N為正整數。該M條第一導體區塊線40-1,40-2,...,40-M的每一條第一導體區塊線係由複數個第一導體區塊400所組成。其中,該M條第一導體區塊線40-1,40-2,...,40-M及該N條連接線41-1,41-2,...,41-N係由金屬導電材料所製成,於本實施例,該N條連接線41-1,41-2,...,41-N的長度相同。FIG. 4 is a schematic diagram of the sensing electrode and the wiring layer and the sensing electrode layer. The sensing electrode and the wiring layer 250 are located on one side of the light shielding layer 240 facing the display layer 230, and have M first conductor block lines 40-1, 40- arranged along a first direction (X). 2, ..., 40-M and N connecting lines 41-1, 41-2, ..., 41-N, which sense whether there is an external object approaching according to a touch driving signal, wherein M, N Is a positive integer. Each of the first conductor block lines 40-1, 40-2, ..., 40-M of the M first conductor block lines is composed of a plurality of first conductor blocks 400. Wherein, the M first conductor block lines 40-1, 40-2, ..., 40-M and the N connection lines 41-1, 41-2, ..., 41-N are made of metal Made of a conductive material, in the present embodiment, the lengths of the N connecting wires 41-1, 41-2, ..., 41-N are the same.

該感應電極層260位於該感應電極及走線層250之面向該顯示層230一側的表面上,並具有沿著一第二方向(Y)排列的N條第二導體區塊線50-1,50-2,...,50-N,其執行觸控感應時,接受該觸控驅動訊號,每一第二導體區塊線50-1,50-2,...,50-N以一對應之第i條連接線41-1,41-2,...,41-N延伸至該高準確度之窄邊框內嵌式平面顯示觸控結構之一側邊201,i為正整數且1≦i≦N。該N條第二導體區塊線50-1,50-2,...,50-N的每一條第二導體區塊線係由複數個第二導體區塊500所組成。其中,該第一方向係垂直第二方向。該複 數個第一導體區塊400、該N條連接線41-1,41-2,...,41-N、及該複數個第二導體區塊500的位置係依據與該遮光層240之複數條遮光線條241的位置相對應而設置。The sensing electrode layer 260 is located on a surface of the sensing electrode and the wiring layer 250 facing the display layer 230, and has N second conductor block lines 50-1 arranged along a second direction (Y). , 50-2, ..., 50-N, when the touch sensing is performed, the touch driving signal is received, and each of the second conductor block lines 50-1, 50-2, ..., 50-N A corresponding one of the i-th connecting wires 41-1, 41-2, ..., 41-N extends to the side edge 201 of the high-accuracy narrow-frame embedded in-plane display touch structure, i is positive Integer and 1≦i≦N. Each of the N second conductor block lines 50-1, 50-2, ..., 50-N is composed of a plurality of second conductor blocks 500. Wherein the first direction is perpendicular to the second direction. The complex The positions of the plurality of first conductor blocks 400, the N connecting lines 41-1, 41-2, ..., 41-N, and the plurality of second conductor blocks 500 are based on the light shielding layer 240 The positions of the plurality of shading lines 241 are correspondingly set.

如圖4所示,該M條第一導體區塊線40-1,40-2,...,40-M及該N條第二導體區塊線50-1,50-2,...,50-N的每一導體區塊線係分別由該複數個第一導體區塊400及該複數個第二導體區塊500所構成。As shown in FIG. 4, the M first conductor block lines 40-1, 40-2, ..., 40-M and the N second conductor block lines 50-1, 50-2, .. Each of the conductor block lines of 50-N is composed of the plurality of first conductor blocks 400 and the plurality of second conductor blocks 500, respectively.

該M條第一導體區塊線40-1,40-2,...,40-M的每一條第一導體區塊線之複數個第一導體區塊400係形成一個四邊型區域,且電氣連接在一起,該M條第一導體區塊線40-1,40-2,...,40-M的每一條第一導體區塊線之間並未電氣連接。該N條第二導體區塊線50-1,50-2,...,50-N的每一條第二導體區塊線之複數個第二導體區塊500係形成一個四邊型區域,且電氣連接在一起,該N條第二導體區塊線50-1,50-2,...,50-N的每一條第二導體區塊線之間並未連接。其中,該N條連接線的每一條連接線係排列於兩條第一導體區塊線40-1,40-2,...,40-M之間。a plurality of first conductor blocks 400 of each of the first conductor block lines 40-1, 40-2, ..., 40-M of the M first conductor block lines form a quadrilateral region, and Electrically connected together, there is no electrical connection between each of the first conductor block lines of the M first conductor block lines 40-1, 40-2, ..., 40-M. a plurality of second conductor blocks 500 of each of the N second conductor block lines 50-1, 50-2, ..., 50-N forming a quadrilateral region, and Electrically connected together, each of the N second conductor block lines 50-1, 50-2, ..., 50-N is not connected between each of the second conductor block lines. Wherein, each of the N connecting lines is arranged between the two first conductor block lines 40-1, 40-2, ..., 40-M.

該M條第一導體區塊線40-1,40-2,...,40-M及該N條第二導體區塊線50-1,50-2,...,50-N並未電氣連接。其可在該感應電極及走線層250及該感應電極層260之間設置一第一絕緣層320。亦可僅在該M條第一導體區塊線40-1,40-2,...,40-M及該N條第二導體區塊線50-1,50-2,...,50-N交叉處設置絕緣區塊。The M first conductor block lines 40-1, 40-2, ..., 40-M and the N second conductor block lines 50-1, 50-2, ..., 50-N and Not electrically connected. A first insulating layer 320 is disposed between the sensing electrode and the wiring layer 250 and the sensing electrode layer 260. Alternatively, only the M first conductor block lines 40-1, 40-2, ..., 40-M and the N second conductor block lines 50-1, 50-2, ..., An insulating block is provided at the 50-N intersection.

該複數個第一導體區塊400及該複數個第二導 體區塊500係形成一個四邊型區域且由金屬導電材料所製成,其中,該四邊型區域係為下列形狀其中之一:長方形、正方形。該金屬導電材料係為下列其中之一:鉬、鋇、鋁、銀、銅、鈦、鎳、鉭、鈷、鎢、鎂(Mg)、鈣(Ca)、鉀(K)、鋰(Li)、銦(In)、合金、氟化鋰(LiF)、氟化鎂(MgF2)、氧化鋰(LiO)。The plurality of first conductor blocks 400 and the plurality of second guides The body block 500 is formed into a quadrangular region and is made of a metal conductive material, wherein the quadrilateral region is one of the following shapes: a rectangle, a square. The metal conductive material is one of the following: molybdenum, niobium, aluminum, silver, copper, titanium, nickel, lanthanum, cobalt, tungsten, magnesium (Mg), calcium (Ca), potassium (K), lithium (Li) Indium (In), alloy, lithium fluoride (LiF), magnesium fluoride (MgF2), lithium oxide (LiO).

該N條連接線41-1,41-2,...,41-N的每一條連接線係設置於兩條第一導體區塊線40-1,40-2,...,40-M之間。Each of the N connecting wires 41-1, 41-2, ..., 41-N is disposed on the two first conductor block lines 40-1, 40-2, ..., 40- Between M.

圖5係本創作第一導體區塊線及第二導體區塊線之示意圖。如圖5所示,該第一導體區塊線與該第二導體區塊線疊置時,係以差排方式(dislocation)疊置。該第一導體區塊400的中心位置與與該第二導體區塊500的中心位置在該第二方向(Y)上相差一第一長度d1之一第一倍數h,在該第一方向(X)上相差一第二長度d2之一第二倍數w,其中,h、w為正整數。該複數個遮光區塊243的每一遮光區塊的長度與寬度分別為該第一長度d1及該第二長度d2。該複數個第一導體區塊的每一第一導體區塊400的長度與寬度分別為一第三長度及一第四長度,該複數個第二導體區塊的每一第二導體區塊500的長度與寬度分別為該第五長度及該第六長度,當中,該第三長度為第一長度d1的第三倍數h1的兩倍(=2h1×d1),該第四長度為第二長度d2的第四倍數w1的兩倍(2w1×d2),該第五長度為第一長度d1的一第五倍數h2的兩倍(=2h2×d1),該第六長度為第二長度d2的一第六倍數w2的兩倍(2w2×d2),其中,h1、w1、h2、w2為正整數。FIG. 5 is a schematic diagram of the first conductor block line and the second conductor block line of the present invention. As shown in FIG. 5, when the first conductor block line and the second conductor block line are stacked, they are stacked in a dislocation manner. The center position of the first conductor block 400 and the center position of the second conductor block 500 are different in the second direction (Y) by a first multiple h of the first length d1, in the first direction ( X) is a difference between a second length d2 and a second multiple, wherein h and w are positive integers. The length and width of each of the plurality of shading blocks 243 are the first length d1 and the second length d2, respectively. Each of the first conductor blocks 400 of the plurality of first conductor blocks has a length and a width of a third length and a fourth length, respectively, and each second conductor block 500 of the plurality of second conductor blocks The length and the width are respectively the fifth length and the sixth length, wherein the third length is twice the third multiple h1 of the first length d1 (=2h1×d1), and the fourth length is the second length Twice the fourth multiple w1 of d2 (2w1×d2), the fifth length being twice the fifth multiple of the first length d1 (=2h2×d1), the sixth length being the second length d2 A sixth multiple of the sixth multiple w2 (2w2 × d2), wherein h1, w1, h2, and w2 are positive integers.

如圖5所示,該複數個遮光區塊的每一遮光區 塊243的長度與寬度分別為該第一長度d1及該第二長度d2、且第三倍數h1為1、第四倍數w1為1、第五倍數h2為1、第六倍數w2為1時,該複數個第一導體區塊400的每一第一導體區塊的長度與寬度分別為一第三長度及一第四長度,該複數個第二導體區塊500的每一第二導體區塊的長度與寬度分別為該第五長度及該第六長度,當中,該第三長度為第一長度d1的第三倍數h1的兩倍(=2h1×d1),該第四長度為第二長度d2的第四倍數w1的兩倍(2w1×d2),亦即,因為第三倍數h1為1及第四倍數w1為1,故該第三長度為第一長度d1的兩倍(=2h1×d1=2×d1),該第四長度為第二長度d2的兩倍(2w1×d2=2×d2),第五倍數h2為1及第六倍數w2為1,故該第五長度為第一長度d1的兩倍(=2h2×d1=2×d1),該第六長度為第二長度d2的兩倍(2w2×d2=2×d2)。也就是說,每一第一導體區塊400及每一第二導體區塊500的大小係為4個遮光區塊243的大小。As shown in FIG. 5, each of the plurality of shading blocks The length and the width of the block 243 are the first length d1 and the second length d2, respectively, and the third multiple h1 is 1, the fourth multiple w1 is 1, the fifth multiple h2 is 1, and the sixth multiple w2 is 1. The length and width of each of the first conductor blocks of the plurality of first conductor blocks 400 are respectively a third length and a fourth length, and each second conductor block of the plurality of second conductor blocks 500 The length and the width are respectively the fifth length and the sixth length, wherein the third length is twice the third multiple h1 of the first length d1 (=2h1×d1), and the fourth length is the second length The fourth multiple of w2 is twice (2w1 × d2), that is, since the third multiple h1 is 1 and the fourth multiple w1 is 1, the third length is twice the first length d1 (= 2h1 × D1=2×d1), the fourth length is twice the second length d2 (2w1×d2=2×d2), the fifth multiple h2 is 1 and the sixth multiple w2 is 1, so the fifth length is Two times the length d1 (= 2h2 × d1 = 2 × d1), the sixth length is twice the second length d2 (2w2 × d2 = 2 × d2). That is, the size of each of the first conductor block 400 and each of the second conductor blocks 500 is the size of the four light shielding blocks 243.

該第一導體區塊400與該第二導體區塊500以差排方式(dislocation)疊置時,該第一導體區塊400的中心位置X1與該第二導體區塊500的中心位置X2在該第二方向(Y)上相差一h倍第一長度d1(=h×d1=d1),在該第一方向(X)上相差一w倍第二長度d2(=w×d2=d2)。亦即,當該第一導體區塊400的頂點P與遮光區塊243-1的頂點O1對齊時,該第二導體區塊500的頂點Q與該第一導體區塊400的頂點P在該第二方向(Y)上相差一個第一長度d1,在該第一方向(X)上相差一個第二長度d2。當該第一導體區塊400的頂點P與遮光區塊243-1 的頂點O1對齊時,該第二導體區塊500的頂點Q與遮光區塊243-2的頂點O2對齊。或是說,該第一導體區塊400的中心點X1與遮光區塊243-2的頂點O2對齊,該第二導體區塊500的中心點X2與遮光區塊243-3的頂點O3對齊。When the first conductor block 400 and the second conductor block 500 are dislocated, the center position X1 of the first conductor block 400 and the center position X2 of the second conductor block 500 are The second direction (Y) is different by one time by a multiple of the first length d1 (=h×d1=d1), and is different by one w times in the first direction (X) by the second length d2 (=w×d2=d2) . That is, when the vertex P of the first conductor block 400 is aligned with the vertex O1 of the light shielding block 243-1, the vertex Q of the second conductor block 500 and the vertex P of the first conductor block 400 are The second direction (Y) differs by a first length d1, which differs by a second length d2 in the first direction (X). When the apex P of the first conductor block 400 and the shading block 243-1 When the apex O1 is aligned, the vertex Q of the second conductor block 500 is aligned with the apex O2 of the shading block 243-2. In other words, the center point X1 of the first conductor block 400 is aligned with the apex O2 of the light shielding block 243-2, and the center point X2 of the second conductor block 500 is aligned with the apex O3 of the light shielding block 243-3.

該第一導體區塊400與該第二導體區塊500的線寬與遮光線條241的線寬相同,因此當由該第一基板210往該第二基板220方向看過去時,只會看到遮光線條241,而該第一導體區塊400與該第二導體區塊500均會被遮光線條241擋住,因此並不影響透光率。The line width of the first conductor block 400 and the second conductor block 500 is the same as the line width of the light-shielding line 241, so that when viewed from the first substrate 210 toward the second substrate 220, only the line is seen. The light shielding lines 241, and the first conductor block 400 and the second conductor block 500 are blocked by the light shielding lines 241, and thus do not affect the light transmittance.

圖6係本創作第一導體區塊線及第二導體區塊線之另一示意圖。該第一導體區塊400的中心位置與與該第二導體區塊500的中心位置在該第二方向(Y)上相差一第一長度d1之一第一倍數h,在該第一方向(X)上相差一第二長度d2之一第二倍數w,其中,h、w為正整數。該複數個遮光區塊243的每一遮光區塊的長度與寬度分別為該第一長度d1及該第二長度d2。該複數個第一導體區塊的每一第一導體區塊400的長度與寬度分別為一第三長度及一第四長度,該複數個第二導體區塊的每一第二導體區塊500的長度與寬度分別為該第五長度及該第六長度,當中,該第三長度為第一長度d1的第三倍數h1的兩倍(=2h1×d1),該第四長度為第二長度d2的第四倍數w1的兩倍(2w1×d2),該第五長度為該第一長度的第五倍數h2的兩倍(=2h2×d1),該第六長度為該第二長度的第六倍數w2的兩倍(2w2×d2)。FIG. 6 is another schematic diagram of the first conductor block line and the second conductor block line of the present invention. The center position of the first conductor block 400 and the center position of the second conductor block 500 are different in the second direction (Y) by a first multiple h of the first length d1, in the first direction ( X) is a difference between a second length d2 and a second multiple, wherein h and w are positive integers. The length and width of each of the plurality of shading blocks 243 are the first length d1 and the second length d2, respectively. Each of the first conductor blocks 400 of the plurality of first conductor blocks has a length and a width of a third length and a fourth length, respectively, and each second conductor block 500 of the plurality of second conductor blocks The length and the width are respectively the fifth length and the sixth length, wherein the third length is twice the third multiple h1 of the first length d1 (=2h1×d1), and the fourth length is the second length The fourth multiple of d2 is twice (2w1 × d2), the fifth length is twice the fifth multiple of the first length h2 (= 2h2 × d1), and the sixth length is the second length Double the multiple of six times w2 (2w2 × d2).

如圖6所示,該複數個遮光區塊的每一遮光區 塊243的長度與寬度分別為該第一長度d1及該第二長度d2、且第三倍數h1為2、第四倍數w1為2、第五倍數h2為2、第六倍數w2為2時,該複數個第一導體區塊的每一第一導體區塊的長度與寬度分別為一第三長度及一第四長度,該複數個第二導體區塊的每一第二導體區塊的長度與寬度分別為該第五長度及該第六長度,當中,該第三長度為第一長度d1的第三倍數h1的兩倍(=2h1×d1),該第四長度為第二長度d2的第四倍數w1的兩倍(2w1×d2),亦即,因為第三倍數h1為2及第四倍數w1為2,故該第三長度為第一長度d1的四倍(=2h1×d1=4×d1),該第四長度為第二長度d2的四倍(2w1×d2=4×d2),因為第五倍數h2為2及第六倍數w2為2,故該第五長度為第一長度d1的四倍(=2h2×d1=4×d1),該第六長度為第二長度d2的四倍(2w2×d2=4×d2)。也就是說,每一第一導體區塊400及每一第二導體區塊500的大小係為16個遮光區塊243的大小。As shown in FIG. 6, each of the plurality of shading blocks has a shading area The length and the width of the block 243 are respectively the first length d1 and the second length d2, and the third multiple h1 is 2, the fourth multiple w1 is 2, the fifth multiple h2 is 2, and the sixth multiple w2 is 2. The length and width of each of the first conductor blocks of the plurality of first conductor blocks are respectively a third length and a fourth length, and the length of each second conductor block of the plurality of second conductor blocks And the width is the fifth length and the sixth length, respectively, wherein the third length is twice (=2h1×d1) of the third multiple h1 of the first length d1, and the fourth length is the second length d2 The second multiple w1 is twice (2w1×d2), that is, since the third multiple h1 is 2 and the fourth multiple w1 is 2, the third length is four times the first length d1 (=2h1×d1= 4×d1), the fourth length is four times the second length d2 (2w1×d2=4×d2), and since the fifth multiple h2 is 2 and the sixth multiple w2 is 2, the fifth length is first Four times the length d1 (= 2h2 × d1 = 4 × d1), the sixth length is four times the second length d2 (2w2 × d2 = 4 × d2). That is, the size of each of the first conductor block 400 and each of the second conductor blocks 500 is 16 opaque blocks 243.

該第一導體區塊400與該第二導體區塊500以差排方式(dislocation)疊置時,該第一導體區塊400的中心位置與X1該第二導體區塊500的中心位置X2在該第二方向(Y)上相差一第一倍數h倍第一長度,第一倍數h為2(h×d1=2d1),在該第一方向(X)上相差一第二倍數w倍第二長度,第二倍數h為2(w×d2=2d2)。亦即,當該第一導體區塊400的頂點P與遮光區塊243-1的頂點O1對齊時,該第二導體區塊500的頂點Q與該第一導體區塊400的頂點P在該第二方向(Y)上相差一2倍第一長度(h×d1=2d1),在該第一方向(X)上相差一2倍第 二長度(w×d2=2d2)。當該第一導體區塊400的頂點P與遮光區塊243-1的頂點O1對齊時,該第二導體區塊500的頂點Q與遮光區塊243-3的頂點O3對齊。或是說,該第一導體區塊400的中心點X1與遮光區塊243-3的頂點O3對齊,該第二導體區塊500的中心點X2與遮光區塊243-5的頂點O5對齊。When the first conductor block 400 and the second conductor block 500 are dislocated, the center position of the first conductor block 400 and the center position X2 of the second conductor block 500 are The second direction (Y) is different by a first multiple h times the first length, the first multiple h is 2 (h×d1=2d1), and the first direction (X) is different by a second multiple w times. The second length, the second multiple h is 2 (w × d2 = 2d2). That is, when the vertex P of the first conductor block 400 is aligned with the vertex O1 of the light shielding block 243-1, the vertex Q of the second conductor block 500 and the vertex P of the first conductor block 400 are The second direction (Y) differs by a factor of two from the first length (h × d1 = 2d1), and the difference in the first direction (X) is two times Two lengths (w × d2 = 2d2). When the vertex P of the first conductor block 400 is aligned with the vertex O1 of the shading block 243-1, the vertex Q of the second conductor block 500 is aligned with the vertex O3 of the shading block 243-3. In other words, the center point X1 of the first conductor block 400 is aligned with the apex O3 of the light shielding block 243-3, and the center point X2 of the second conductor block 500 is aligned with the apex O5 of the light shielding block 243-5.

由圖5、圖6及相關描述,當第三倍數h1為2及第四倍數w1為3、第五倍數h2為2、第六倍數w2為3、或是其他數值時,熟於該技術者可依據本創作之說明而得知該第一導體區塊線400與該第二導體區塊線500以差排方式(dislocation)疊置的情形,在此不再贅述。5, FIG. 6 and related description, when the third multiple h1 is 2 and the fourth multiple w1 is 3, the fifth multiple h2 is 2, the sixth multiple is w2, or other values, the skilled person is familiar with The case where the first conductor block line 400 and the second conductor block line 500 are overlapped in a dislocation manner can be known according to the description of the present invention, and details are not described herein again.

圖7A及圖7B係本創作第一導體區塊及第二導體區塊之互感應電容(Mutual capacitance)的一示意圖。如圖7A所示,第一導體區塊線40-1在橢圓V2處與第二導體區塊線50-N在橢圓V1及橢圓V3處互相平行,同理,第二導體區塊線50-N在橢圓V3處與第一導體區塊線40-1在橢圓V2及橢圓V4處互相平行,因此可增加第一導體區塊線40-1與第二導體區塊線50-N之間的感應電容。同樣地,如圖7B所示,第二導體區塊線50-N在橢圓H2處與第一導體區塊線40-1在橢圓H1及橢圓H3處互相平行,因此可增加第一導體區塊線40-1與第二導體區塊線50-N之間的感應電容。同理,第一導體區塊線40-1在橢圓H3處與第二導體區塊線50-N在橢圓H2及橢圓H4處互相平行。本創作藉由將該第一導體區塊線與該第二導體區塊線以差排方式(dislocation)疊置,可增加該第一導體區塊線40-1,40-2,...,40-M與該第二導體區塊線50-1, 50-2,...,50-N之間的感應電容。故控制電路的內部驅動器(圖未示)可以使用較小的電壓,以驅動第一導體區塊線,而獲得與習知技術相同的感應電容變化量,可較習知技術節省電力消耗,因此,本創作尤其適合手持式裝置。同時,由於該第一導體區塊線40-1,40-2,...,40-M與該第二導體區塊線50-1,50-2,...,50-N之間的感應電容變化量變大,控制電路的感測器(圖未示)更能準確地偵測該第二導體區塊線50-1,50-2,...,50-N上的電壓,而可提昇觸碰的準確度。7A and 7B are schematic diagrams showing the mutual capacitance of the first conductor block and the second conductor block of the present invention. As shown in FIG. 7A, the first conductor block line 40-1 is parallel to the second conductor block line 50-N at the ellipse V1 and the ellipse V3 at the ellipse V2, and the second conductor block line 50- N is parallel to the first conductor block line 40-1 at the ellipse V2 and the ellipse V4 at the ellipse V3, thereby increasing the distance between the first conductor block line 40-1 and the second conductor block line 50-N. Induction capacitor. Similarly, as shown in FIG. 7B, the second conductor block line 50-N is parallel to the first conductor block line 40-1 at the ellipse H1 and the ellipse H3 at the ellipse H2, thereby increasing the first conductor block. The induced capacitance between the line 40-1 and the second conductor block line 50-N. Similarly, the first conductor block line 40-1 is parallel to the second conductor block line 50-N at the ellipse H2 and the ellipse H4 at the ellipse H3. The present invention can increase the first conductor block line 40-1, 40-2, by disposing the first conductor block line and the second conductor block line in a dislocation manner. , 40-M and the second conductor block line 50-1, Inductive capacitance between 50-2,..., 50-N. Therefore, the internal driver (not shown) of the control circuit can use a smaller voltage to drive the first conductor block line, and obtain the same amount of induced capacitance change as the prior art, which can save power consumption compared with the prior art. This creation is especially suitable for handheld devices. At the same time, due to the first conductor block line 40-1, 40-2, ..., 40-M and the second conductor block line 50-1, 50-2, ..., 50-N The amount of change in the sense capacitance becomes larger, and the sensor of the control circuit (not shown) can more accurately detect the voltage on the second conductor block lines 50-1, 50-2, ..., 50-N, It can improve the accuracy of the touch.

如圖4所示,該每一第二導體區塊線50-1,50-2,...,50-N在虛線橢圓處與對應之連接線41-1,41-2,...,41-N電氣連接,而該N條連接線41-1,41-2,...,41-N的每一條連接線亦分別以對應之金屬走線延伸至該高準確度之窄邊框內嵌式平面顯示觸控結構200之同一側邊201,以進一步連接至一軟性電路板600。每一第一導體區塊線40-1,40-2,...,40-M係分別以對應之金屬走線延伸至該面板之同一側邊201,以進一步連接至一軟性電路板600。As shown in FIG. 4, each of the second conductor block lines 50-1, 50-2, ..., 50-N is at the dotted ellipse and the corresponding connecting line 41-1, 41-2, ... 41-N is electrically connected, and each of the N connecting wires 41-1, 41-2, ..., 41-N also extends to the high-precision narrow frame with corresponding metal wires respectively The in-line plane displays the same side 201 of the touch structure 200 for further connection to a flexible circuit board 600. Each of the first conductor block lines 40-1, 40-2, ..., 40-M extends to the same side 201 of the panel with corresponding metal traces for further connection to a flexible circuit board 600 .

該高準確度之窄邊框內嵌式平面顯示觸控結構200之表面係用以接收至少一個觸控點。其更包含有一控制電路610,其係經由該軟性電路板600電性連接至該M條第一導體區塊線40-1,40-2,...,40-M及該N條第二導體區塊線50-1,50-2,...,50-N。The surface of the high-accuracy narrow-frame in-line display touch structure 200 is configured to receive at least one touch point. The control circuit 610 further includes a control circuit 610 electrically connected to the M first conductor block lines 40-1, 40-2, ..., 40-M and the N second via the flexible circuit board 600. Conductor block lines 50-1, 50-2, ..., 50-N.

該M條第一導體區塊線40-1,40-2,...,40-M及該N條第二導體區塊線50-1,50-2,...,50-N係根據一手指或一外部物件觸碰該高準確度之窄邊框內嵌式平面顯示觸控結構 200的至少一觸控點之位置而對應地產生一感應訊號。一控制電路610係經由該軟性電路板600電性連接至該M條第一導體區塊線40-1,40-2,...,40-M及該N條第二導體區塊線50-1,50-2,...,50-N,並依據感應訊號計算該至少一觸控點的座標。The M first conductor block lines 40-1, 40-2, ..., 40-M and the N second conductor block lines 50-1, 50-2, ..., 50-N Touching the high-precision narrow frame in-line flat display touch structure according to a finger or an external object A position of at least one touch point of 200 correspondingly generates an inductive signal. A control circuit 610 is electrically connected to the M first conductor block lines 40-1, 40-2, ..., 40-M and the N second conductor block lines 50 via the flexible circuit board 600. -1, 50-2, ..., 50-N, and calculating the coordinates of the at least one touch point according to the sensing signal.

圖8係係本創作圖4中A-A'處的剖面圖。如圖8所示,該第二導體區塊線50-N與該連接線41-1在圖4中的B橢圓處電氣連接。如圖2及圖8所示,在該感應電極及走線層250及該感應電極層260之間設有該絕緣層320,該第二導體區塊線50-N經由貫孔(via)52穿過該絕緣層320而與該連接線41-1電氣連接,亦即,經由該連接線41-1,該第二導體區塊線50-N可將其感測到的訊號傳輸至該控制電路610。Figure 8 is a cross-sectional view taken along line A-A' of Figure 4 of the present creation. As shown in FIG. 8, the second conductor block line 50-N is electrically connected to the connection line 41-1 at the B ellipse in FIG. As shown in FIG. 2 and FIG. 8 , the insulating layer 320 is disposed between the sensing electrode and the wiring layer 250 and the sensing electrode layer 260 . The second conductor block line 50-N is via a via 52. Through the insulating layer 320, the connection line 41-1 is electrically connected, that is, the second conductor block line 50-N can transmit the sensed signal to the control via the connection line 41-1. Circuit 610.

圖9係本創作第一導體區塊線及第二導體區塊線之又一示意圖。於圖5及圖6的實施例中,該第三長度為該第一長度d1的該第三倍數h1的兩倍(=2h1×d1),該第四長度為該第二長度d2的該第四倍數w1的兩倍(2w1×d2),該第五長度為該第一長度d1的該第五倍數h2的兩倍(=2h2×d1),該第六長度為該第二長度d2的該第六倍數w2的兩倍(2w2×d2)。而於其他實施例中,該第三長度只要大於或等於該第一長度d1的兩倍、該第四長度只要大於或等於該第二長度d2的兩倍、該第五長度只要大於或等於該第一長度d1的兩倍、該第六長度只要大於或等於該第二長度d2的兩倍即可。如圖9所示,該第三長度為該第一長度d1的兩倍,該第四長度為該第二長度d2的三倍,該第五長度為該第一長度d1的兩倍,該第六長度為該第二長度d2的三倍。此時,該第一導體區塊 400的中心位置與X1該第二導體區塊500的中心位置X2在該第二方向(Y)上相差一第一長度(d1),在該第一方向(X)上相差一第二長度(d2)。亦即,當該第一導體區塊400的頂點P與遮光區塊243-1的頂點O1對齊時,該第二導體區塊500的頂點Q與該第一導體區塊400的頂點P在該第二方向(Y)上相差一第一長度(d1),在該第一方向(X)上相差一第二長度(d2)。當該第一導體區塊400的頂點P與遮光區塊243-1的頂點O1對齊時,該第二導體區塊500的頂點Q與遮光區塊243-2的頂點O2對齊。或是說,該第一導體區塊400的中心點X1與遮光區塊243-2的一點S1對齊,該第二導體區塊500的中心點X2與遮光區塊243-3的一點S2對齊。FIG. 9 is still another schematic diagram of the first conductor block line and the second conductor block line of the present invention. In the embodiment of FIG. 5 and FIG. 6, the third length is twice (=2h1×d1) of the third multiple h1 of the first length d1, and the fourth length is the second length d2. Two times the quadruple number w1 (2w1×d2), the fifth length is twice (=2h2×d1) of the fifth multiple h2 of the first length d1, and the sixth length is the second length d2 Double the sixth multiple w2 (2w2 × d2). In other embodiments, the third length is greater than or equal to twice the first length d1, and the fourth length is greater than or equal to twice the second length d2, and the fifth length is greater than or equal to the third length. The first length d1 is twice as long as the sixth length is greater than or equal to twice the second length d2. As shown in FIG. 9, the third length is twice the first length d1, the fourth length is three times the second length d2, and the fifth length is twice the first length d1, the first length The length of six is three times the second length d2. At this time, the first conductor block The center position of the second conductor block 400 of X1 is different from the center position X2 of the second conductor block 500 by a first length (d1) in the second direction (Y), and a second length is different in the first direction (X) ( D2). That is, when the vertex P of the first conductor block 400 is aligned with the vertex O1 of the light shielding block 243-1, the vertex Q of the second conductor block 500 and the vertex P of the first conductor block 400 are The second direction (Y) differs by a first length (d1), which differs by a second length (d2) in the first direction (X). When the vertex P of the first conductor block 400 is aligned with the vertex O1 of the shading block 243-1, the vertex Q of the second conductor block 500 is aligned with the vertex O2 of the shading block 243-2. Or, the center point X1 of the first conductor block 400 is aligned with a point S1 of the light shielding block 243-2, and the center point X2 of the second conductor block 500 is aligned with a point S2 of the light shielding block 243-3.

由圖5、圖6及圖9可知,於本創作中,該第一倍數h小於或等於該第三倍數h1或該第五倍數h2中較小者,該第二倍數w小於或等於該第四倍數w1或該第六倍數w2中較小者。其可用數學式表示:h≦min(h1,h2),w≦min(w1,w2),當中,h為該第一倍數,w為該第二倍數,h1為該第三倍數,w1為該第四倍數,h2為該第五倍數,w2為該第六倍數。As can be seen from FIG. 5, FIG. 6 and FIG. 9, in the present creation, the first multiple h is less than or equal to the smaller of the third multiple h1 or the fifth multiple h2, and the second multiple w is less than or equal to the first The smaller of the quadruple number w1 or the sixth multiple w2. It can be expressed by a mathematical formula: h≦min(h1, h2), w≦min(w1, w2), where h is the first multiple, w is the second multiple, h1 is the third multiple, w1 is the The fourth multiple, h2 is the fifth multiple, and w2 is the sixth multiple.

圖10係本創作之一種高準確度之窄邊框內嵌式平面顯示觸控結構200的另一示意圖。其與圖4主要差別在於該N條連接線41-1,41-2,...,41-N的長度並非一致,而是逐漸減小。FIG. 10 is another schematic diagram of a high-accuracy narrow bezel embedded flat display touch structure 200 of the present invention. The main difference from FIG. 4 is that the lengths of the N connecting lines 41-1, 41-2, ..., 41-N are not uniform, but are gradually reduced.

圖11係本創作第一導體區塊線40-1,40-2,...,40-M的示意圖,如圖11所示,該第一導體區塊線40-1,40-2,..., 40-M係由在第二方向上的24列(row)之該第一導體區塊400、及在第一方向上的2行(cloumn)之該第一導體區塊400所構成之長方形。於其他實施例,該第一導體區塊400的數目可依需要而改變。Figure 11 is a schematic view showing the first conductor block lines 40-1, 40-2, ..., 40-M of the present invention, as shown in Figure 11, the first conductor block lines 40-1, 40-2, ..., The 40-M is a rectangle formed by the first conductor block 400 of 24 rows in the second direction and the first conductor block 400 of 2 rows in the first direction. In other embodiments, the number of first conductor blocks 400 can be varied as desired.

線段L1及線段L2的寬度較佳與遮光層240的遮光線條241寬度相同或稍小於遮光線條241寬度。該M條第一導體區塊線40-1,40-2,...,40-M、該N條連接線41-1,41-2,...,41-N、及該N條第二導體區塊線50-1,50-2,...,50-N的位置係依據與該遮光層240之該複數條遮光線條241的位置相對應而設置。亦即,由該第一基板210往該第二基板220方向看過去,該M條第一導體區塊線40-1,40-2,...,40-M、該N條連接線41-1,41-2,...,41-N、及該N條第二導體區塊線50-1,50-2,...,50-N係設置在該複數條遮光線條241的位置的下方,因此會被該複數條遮光線條241遮住,使用者則看不到該M條第一導體區塊線40-1,40-2,...,40-M、該N條連接線41-1,41-2,...,41-N、及該N條第二導體區塊線50-1,50-2,...,50-N,因此並不影響透光率。The width of the line segment L1 and the line segment L2 is preferably the same as or slightly smaller than the width of the light-shielding line 241 of the light shielding layer 240. The M first conductor block lines 40-1, 40-2, ..., 40-M, the N connection lines 41-1, 41-2, ..., 41-N, and the N pieces The positions of the second conductor block lines 50-1, 50-2, ..., 50-N are set in accordance with the positions of the plurality of light shielding lines 241 of the light shielding layer 240. That is, the M first strip conductor lines 40-1, 40-2, ..., 40-M, and the N connecting lines 41 are viewed from the first substrate 210 toward the second substrate 220. -1, 41-2, ..., 41-N, and the N second conductor block lines 50-1, 50-2, ..., 50-N are disposed on the plurality of shading lines 241 The lower part of the position is thus covered by the plurality of light-shielding lines 241, and the user can not see the M first conductor block lines 40-1, 40-2, ..., 40-M, the N pieces Connecting wires 41-1, 41-2, ..., 41-N, and the N second conductor block wires 50-1, 50-2, ..., 50-N, thus not affecting light transmission rate.

薄膜電晶體層(TFT)290位於該第二基板220之面向顯示層230一側的表面。該薄膜電晶體層290具有K條閘極驅動線及L條源極驅動線,依據一顯示像素訊號及一顯示驅動訊號,以驅動對應之畫素電晶體及畫素電容,進而執行顯示操作,其中,K、L為正整數。薄膜電晶體層290更具有薄膜電晶體291及透明電極293。A thin film transistor layer (TFT) 290 is located on a surface of the second substrate 220 facing the side of the display layer 230. The thin film transistor layer 290 has K gate driving lines and L source driving lines, and drives a corresponding pixel transistor and a pixel capacitor according to a display pixel signal and a display driving signal to perform a display operation. Where K and L are positive integers. The thin film transistor layer 290 further has a thin film transistor 291 and a transparent electrode 293.

在感應電極及走線層250及該感應電極層260 之間有一第一絕緣層320。該彩色濾光層270位於該遮光層240之面向該顯示層一側的表面上。該共通電極層280位於該第一基板210與第二基板220之間。在該感應電極層260與該共通電極層280之間有一第二絕緣層330。該第一偏光層330係位於該第一基板210之背向該顯示層230一側的表面。該第二偏光層310係位於該下基220板之背向該顯示層230一側的表面。In the sensing electrode and wiring layer 250 and the sensing electrode layer 260 There is a first insulating layer 320 between them. The color filter layer 270 is located on a surface of the light shielding layer 240 facing the display layer. The common electrode layer 280 is located between the first substrate 210 and the second substrate 220. A second insulating layer 330 is disposed between the sensing electrode layer 260 and the common electrode layer 280. The first polarizing layer 330 is located on a surface of the first substrate 210 facing away from the display layer 230. The second polarizing layer 310 is located on a surface of the lower substrate 220 facing away from the display layer 230.

圖12係本創作之一種高準確度之窄邊框內嵌式平面顯示觸控結構200的另一疊層示意圖,如圖12所示,該高準確度之窄邊框內嵌式平面顯示觸控結構200包括有第一基板210、一第二基板220、一遮光層(black matrix)240、一感應電極及走線層250、一感應電極層260、一彩色濾光層(color filter)270、一薄膜電晶體層290、一第一絕緣層320、一第二絕緣層330、一陰極層1010、一顯示層1020、及一陽極層1030。該顯示層1020於本實施例中較佳為一有機發光二極體層。其與圖2主要差別在於使用有機發光二極體層替代液晶層,因此亦新增該陰極層1010及該陽極層1030。FIG. 12 is another schematic diagram of a high-accuracy narrow-frame in-cell planar display touch structure 200. As shown in FIG. 12, the high-accuracy narrow-frame embedded in-plane display touch structure is shown in FIG. 200 includes a first substrate 210, a second substrate 220, a black matrix 240, a sensing electrode and wiring layer 250, a sensing electrode layer 260, a color filter 270, and a color filter 270. A thin film transistor layer 290, a first insulating layer 320, a second insulating layer 330, a cathode layer 1010, a display layer 1020, and an anode layer 1030. The display layer 1020 is preferably an organic light emitting diode layer in this embodiment. The main difference from FIG. 2 is that an organic light-emitting diode layer is used instead of the liquid crystal layer, and thus the cathode layer 1010 and the anode layer 1030 are also added.

本實施例係本創作係在習知的遮光層240之面向該顯示層一側設置感應電極及走線層250及感應電極層260,並在其上佈植感應觸控圖型結構。在感應電極及走線層250設置的M條第一導體區塊線40-1,40-2,...,40-M及N條連接線41-1,41-2,...,41-N、及在感應電極層260設置的N條第二導體區塊線50-1,50-2,...,50-N的詳細情形如第一實施例、及圖3至圖11所揭露,為熟於該技術者基於本發明第 一實施例所揭露所能完成,故不再贅述。In this embodiment, the sensing layer, the wiring layer 250 and the sensing electrode layer 260 are disposed on the side of the conventional light shielding layer 240 facing the display layer, and the inductive touch pattern structure is implanted thereon. M first conductor block lines 40-1, 40-2, ..., 40-M and N connection lines 41-1, 41-2, ... disposed in the sensing electrode and wiring layer 250, 41-N, and the details of the N second conductor block lines 50-1, 50-2, ..., 50-N disposed in the sensing electrode layer 260 are as in the first embodiment, and in FIGS. 3 to 11. Revealed that the person skilled in the art is based on the present invention The disclosure of an embodiment can be completed, and therefore will not be described again.

該有機發光二極體層1020包含一電洞傳輸子層(hole transporting layer,HTL)1021、一發光層(emitting layer)1023、及一電子傳輸子層(electron transporting layer,HTL)1025。The organic light emitting diode layer 1020 includes a hole transporting layer (HTL) 1021, an emitting layer 1023, and an electron transporting layer (HTL) 1025.

該薄膜電晶體層290位於該第二基板220面對於該有機發光二極體層1020一側的表面,該薄膜電晶體層290具有複數條閘極驅動線(圖未示)、複數條源極驅動線(圖未示)、及複數個畫素驅動電路291,每一個畫素驅動電路291係對應至一畫素,依據一顯示像素訊號及一顯示驅動訊號,用以驅動對應之畫素驅動電路291,進而執行顯示操作。The thin film transistor layer 290 is located on a surface of the second substrate 220 facing the organic light emitting diode layer 1020. The thin film transistor layer 290 has a plurality of gate driving lines (not shown) and a plurality of source drivers. a pixel (not shown) and a plurality of pixel driving circuits 291, each of the pixel driving circuits 291 corresponding to a pixel, according to a display pixel signal and a display driving signal, for driving the corresponding pixel driving circuit 291, and then perform a display operation.

依畫素驅動電路291設計的不同,例如2T1C係由2薄膜電晶體與1儲存電容設計而成畫素驅動電路291,6T2C係由6薄膜電晶體與2儲存電容設計而成畫素驅動電路291。畫素驅動電路中最少有一薄膜電晶體的閘極連接至一條閘極驅動線(圖未示),依驅動電路設計的不同,控制電路中最少有一薄膜電晶體的汲極/源極連接至一條源極驅動線(圖未示),畫素驅動電路291中最少有一薄膜電晶體的汲極/源極連接至該陽極層1030中的一個對應的陽極畫素電極1031。According to the design of the pixel driving circuit 291, for example, the 2T1C is designed by a thin film transistor and a storage capacitor as a pixel driving circuit 291, and the 6T2C is designed by a 6-film transistor and a storage capacitor as a pixel driving circuit 291. . In the pixel driving circuit, at least one of the gates of the thin film transistor is connected to a gate driving line (not shown). According to the design of the driving circuit, at least one of the gates/sources of the thin film transistor is connected to the control circuit. A source driving line (not shown), a drain/source of at least one thin film transistor in the pixel driving circuit 291 is connected to a corresponding anode pixel 1031 of the anode layer 1030.

該陽極層1030位於該薄膜電晶體層290面向該有機發光二極體層1020之一側。該陽極層1030具有複數個陽極畫素電極1031。該複數個陽極畫素電極1031的每一個陽極畫素電極係與該薄膜電晶體層290的該畫素驅動電路 291之一個畫素驅動電晶體對應,亦即該複數個陽極畫素電極的每一個陽極畫素電極係與對應的該畫素驅動電路291之該畫素驅動電晶體之源極/汲極連接,以形成一特定顏色的畫素電極,例如紅色畫素電極、綠色畫素電極、或藍色畫素電極。The anode layer 1030 is located on a side of the thin film transistor layer 290 facing the organic light emitting diode layer 1020. The anode layer 1030 has a plurality of anode pixel electrodes 1031. Each of the anode anode electrodes of the plurality of anode pixel electrodes 1031 and the pixel driving circuit of the thin film transistor layer 290 a pixel driving transistor corresponding to 291, that is, each anode pixel electrode of the plurality of anode pixel electrodes is connected to a source/drain of the pixel driving transistor of the corresponding pixel driving circuit 291 To form a pixel electrode of a specific color, such as a red pixel electrode, a green pixel electrode, or a blue pixel electrode.

該陰極層1010位於該第一基板210面對該有機發光二極體層1020一側的表面。同時,該陰極層1010位於該第一基板210與該有機發光二極體層1020之間。該陰極層1010係由金屬導電材料所形成。較佳地,該陰極層1010係由厚度小於50奈米(nm)的金屬材料所形成,該金屬材料係選自下列群組其中之一:鋁(Al)、銀(Ag)、鎂(Mg)、鈣(Ca)、鉀(K)、鋰(Li)、銦(In),上述材料之合金或使用氟化鋰(LiF)、氟化鎂(MgF2)、氧化鋰(LiO)與Al組合而成。由於該陰極層1010的厚度小於50nm,因此有機發光二極體層1020所產生的光仍可穿透陰極層1010,以於第一基板210上顯示影像。該陰極層1010係整片電氣連接著,因此可作為遮罩(shielding)之用。同時,該陰極層1010亦接收由陽極畫素電極1031來的電流。The cathode layer 1010 is located on a surface of the first substrate 210 facing the side of the organic light emitting diode layer 1020. At the same time, the cathode layer 1010 is located between the first substrate 210 and the organic light emitting diode layer 1020. The cathode layer 1010 is formed of a metal conductive material. Preferably, the cathode layer 1010 is formed of a metal material having a thickness of less than 50 nanometers (nm) selected from one of the group consisting of aluminum (Al), silver (Ag), and magnesium (Mg). ), calcium (Ca), potassium (K), lithium (Li), indium (In), an alloy of the above materials or a combination of lithium fluoride (LiF), magnesium fluoride (MgF2), lithium oxide (LiO) and Al Made. Since the thickness of the cathode layer 1010 is less than 50 nm, the light generated by the organic light emitting diode layer 1020 can still penetrate the cathode layer 1010 to display an image on the first substrate 210. The cathode layer 1010 is electrically connected to the entire sheet and thus can be used as a shield. At the same time, the cathode layer 1010 also receives current from the anode pixel electrode 1031.

圖13係本創作之一種高準確度之窄邊框內嵌式平面顯示觸控結構1100的又一疊層示意圖,如圖13所示,其與圖2主要差別在於該感應電極及走線層250及該感應電極層260的位置互換。亦即,一感應電極層260(圖2之該感應電極層260),位於該遮光層240之面向該顯示層230一側的表面上,並具有沿著一第一方向(X)排列的N條第二導 體區塊線50-1,50-2,...,50-N,其執行觸控感應時,接受該觸控驅動訊號。每一第二導體區塊線50-1,50-2,...,50-N以一對應之第i條連接線41-1,41-2,...,41-N延伸至該高準確度之窄邊框內嵌式平面顯示觸控結構200之一側邊201,i為正整數且1≦i≦N,該N條第二導體區塊線50-1,50-2,...,50-N的每一條第二導體區塊線係由複數個第二導體區塊500所組成。感應電極及走線層250(圖2之該感應電極及走線層250),位於該感應電極層260(圖2之該感應電極層260)之面向該顯示層230一側,並具有沿著一第一方向(Y)排列的M條第一導體區塊線40-1,40-2,...,40-M及N條連接線41-1,41-2,...,41-N,其依據一觸控驅動訊號而感應是否有一外部物件接近,其中,M、N為正整數,該M條第一導體區塊線40-1,40-2,...,40-M的每一條第一導體區塊線係由複數個第一導體區塊400所組成。該複數個第一導體區塊400、該N條連接線41-1,41-2,...,41-N、及該複數個第二導體區塊500的位置係依據與該遮光層240之複數條遮光線條241的位置相對應而設置,且該第一導體區塊400與該第二導體區塊500疊置時,係以差排方式(dislocation)疊置。FIG. 13 is another schematic diagram of a high-accuracy narrow-frame in-cell planar display touch structure 1100. As shown in FIG. 13, the main difference from FIG. 2 is that the sensing electrode and the wiring layer 250 are The positions of the sensing electrode layers 260 are interchanged. That is, a sensing electrode layer 260 (the sensing electrode layer 260 of FIG. 2) is located on a surface of the light shielding layer 240 facing the display layer 230 and has N arranged along a first direction (X). Second guide The body block lines 50-1, 50-2, ..., 50-N receive the touch drive signal when performing touch sensing. Each of the second conductor block lines 50-1, 50-2, ..., 50-N extends to the corresponding ith connection line 41-1, 41-2, ..., 41-N The high-precision narrow frame in-line display shows one side 201 of the touch structure 200, i is a positive integer and 1≦i≦N, and the N second conductor block lines 50-1, 50-2,. The second conductor block line of 50-N is composed of a plurality of second conductor blocks 500. The sensing electrode and the wiring layer 250 (the sensing electrode and the wiring layer 250 of FIG. 2) are located on the side of the sensing electrode layer 260 (the sensing electrode layer 260 of FIG. 2) facing the display layer 230, and have a along M first conductor block lines 40-1, 40-2, ..., 40-M and N connection lines 41-1, 41-2, ..., 41 arranged in a first direction (Y) -N, which senses whether an external object is close according to a touch driving signal, wherein M and N are positive integers, and the M first conductor block lines 40-1, 40-2, ..., 40- Each of the first conductor block lines of M is comprised of a plurality of first conductor blocks 400. The plurality of first conductor blocks 400, the N connecting lines 41-1, 41-2, ..., 41-N, and the positions of the plurality of second conductor blocks 500 are based on the light shielding layer 240 The positions of the plurality of light-shielding lines 241 are correspondingly disposed, and when the first conductor block 400 is overlapped with the second conductor block 500, they are stacked in a dislocation manner.

習知氧化銦錫材質(ITO)所做的電極點其平均透光率僅約為90%,而本創作的該M條第一導體區塊線40-1,40-2,...,40-M、該N條連接線41-1,41-2,...,41-N、及該N條第二導體區塊線50-1,50-2,...,50-N係設置在該複數條遮光線條241的位置的下方,因此並不影響透光率,故本創作的平均透光率遠較習知技術為佳。當本創作的窄邊框之觸控面板結 構與液晶顯示面板結合時,可使液晶顯示面板的亮度較習知技術更亮。或是在相同的亮度下,減低液晶顯示面板的背光能量消耗。It is known that the electrode dots made of indium tin oxide (ITO) have an average light transmittance of only about 90%, and the M first conductor block lines 40-1, 40-2, ... 40-M, the N connecting lines 41-1, 41-2, ..., 41-N, and the N second conductor block lines 50-1, 50-2, ..., 50-N The light transmittance is not affected by the position of the plurality of light-shielding lines 241, so the average light transmittance of the present invention is much better than the conventional technique. When the creation of the narrow border of the touch panel junction When combined with a liquid crystal display panel, the brightness of the liquid crystal display panel can be made brighter than conventional techniques. Or reduce the backlight energy consumption of the liquid crystal display panel under the same brightness.

由前述說明可知,圖1習知技術的設計將增加觸控面板邊框的寬度,並不適合窄邊框設計的趨勢。It can be seen from the foregoing description that the design of the prior art of FIG. 1 will increase the width of the touch panel frame and is not suitable for the trend of narrow frame design.

同時,當採用氧化銦錫材質當作跨橋結構以連接兩個氧化銦錫材質的電極點時,由於氧化銦錫材質不像金屬具有良好的延展性,容易在跨橋處產生斷點或是電氣訊號不良等現象。若使用金屬當作跨橋結構以連接兩個氧化銦錫材質的電極點時,由於金屬與氧化銦錫為異質材質,容易在跨橋處產生電氣訊號不良現象,而影響偵測觸碰點的正確性。At the same time, when using indium tin oxide as a bridge structure to connect two indium tin oxide electrode points, since indium tin oxide material does not have good ductility like metal, it is easy to generate breakpoints at the bridge or Bad electrical signals and other phenomena. If metal is used as a bridge structure to connect two indium tin oxide electrode points, since the metal and indium tin oxide are heterogeneous materials, it is easy to generate electrical signal defects at the bridge, which affects the detection of touch points. Correctness.

而本創作不論是M條第一導體區塊線40-1,40-2,...,40-M及N條第二導體區塊線50-1,50-2,...,50-N或是走線均為金屬材質,可較習知技術有較佳的傳導性,而容易將導體線的感應訊號傳輸至該控制電路,而使該控制電路計算出的座標更準確。較習知技術有較佳的透光率,且可避免使用昂貴的氧化銦錫材質,據此降低成本。且較習知技術更適合設計在窄邊框的觸控面板,同時使用金屬做為觸控感應電極具有高延展性,適用於軟性顯示器。The creation is M, the first conductor block lines 40-1, 40-2, ..., 40-M and the N second conductor block lines 50-1, 50-2, ..., 50 -N or the traces are made of metal, which has better conductivity than the conventional technology, and it is easy to transmit the sensing signal of the conductor line to the control circuit, so that the coordinates calculated by the control circuit are more accurate. Compared with the prior art, the light transmittance is better, and the expensive indium tin oxide material can be avoided, thereby reducing the cost. Compared with the conventional technology, it is more suitable for designing a touch panel with a narrow bezel, and the use of metal as a touch sensing electrode has high ductility, and is suitable for a flexible display.

同時,本創作藉由將該第一導體區塊線40-1,40-2,...,40-M與該第二導體區塊線50-1,50-2,...,50-N以差排方式(dislocation)疊置,可增加該第一導體區塊線40-1,40-2,...,40-M與該第二導體區塊線50-1,50-2,...,50-N之間的感應電容。故控制電路的內部驅動器(圖未示)可以使用較小的電 壓,以驅動第一導體區塊線,而獲得與習知技術相同的感應電容變化量,可較習知技術節省電力消耗。因此,本創作尤其適合手持式裝置。同時,由於該第一導體區塊線40-1,40-2,...,40-M與該第二導體區塊線50-1,50-2,...,50-N之間的感應電容變化量變大,控制電路的感測器(圖未示)更能準確地偵測該第二導體區塊線50-1,50-2,...,50-N上的電壓,相較習知技術更可提昇觸碰的準確度。Meanwhile, the present creation is performed by the first conductor block lines 40-1, 40-2, ..., 40-M and the second conductor block lines 50-1, 50-2, ..., 50 -N is superposed in a dislocation manner to increase the first conductor block lines 40-1, 40-2, ..., 40-M and the second conductor block lines 50-1, 50- 2,..., 50-N between the sensing capacitors. Therefore, the internal driver of the control circuit (not shown) can use less electricity. Pressing to drive the first conductor block line to obtain the same amount of induced capacitance variation as in the prior art can save power consumption compared to conventional techniques. Therefore, this creation is especially suitable for handheld devices. At the same time, due to the first conductor block line 40-1, 40-2, ..., 40-M and the second conductor block line 50-1, 50-2, ..., 50-N The amount of change in the sense capacitance becomes larger, and the sensor of the control circuit (not shown) can more accurately detect the voltage on the second conductor block lines 50-1, 50-2, ..., 50-N, Compared with the prior art, the accuracy of the touch can be improved.

上述實施例僅係為了方便說明而舉例而已,本創作所主張之權利範圍自應以申請專利範圍所述為準,而非僅限於上述實施例。The above-described embodiments are merely examples for convenience of description, and the scope of the claims is intended to be limited to the above embodiments.

200‧‧‧高準確度之窄邊框內嵌式平面顯示觸控結構200‧‧‧High-accuracy narrow bezel in-line flat display touch structure

250‧‧‧感應電極及走線層250‧‧‧Induction electrode and trace layer

260‧‧‧感應電極層260‧‧‧Induction electrode layer

40-1,40-2,...,40-M‧‧‧第一導體區塊線40-1, 40-2,...,40-M‧‧‧first conductor block line

41-1,41-2,...,41-N‧‧‧連接線41-1, 41-2,...,41-N‧‧‧Connected cable

400‧‧‧第一導體區塊400‧‧‧First conductor block

50-1,50-2,...,50-N‧‧‧第二導體區塊線50-1, 50-2,...,50-N‧‧‧Second conductor block line

201‧‧‧側邊201‧‧‧ side

500‧‧‧第二導體區塊500‧‧‧Second conductor block

600‧‧‧軟性電路板600‧‧‧Soft circuit board

610‧‧‧控制電路610‧‧‧Control circuit

Claims (18)

一種高準確度之窄邊框內嵌式平面顯示觸控結構,包括:一第一基板;一第二基板,該第一基板及該第二基板0以平行成對之配置將一顯示層夾置於二基板之間;一遮光層,位於該第一基板之面向該顯示層之一側的表面,該遮光層係由複數條遮光線條所構成,該複數條遮光線條設置於一第一方向及一第二方向,以形成複數個遮光區塊;一感應電極及走線層,位於該遮光層之面向該顯示層之一側,並具有沿著一第一方向排列的M條第一導體區塊線及N條連接線,其依據一觸控驅動訊號而感應是否有一外部物件接近,其中,M、N為正整數,該M條第一導體區塊線的每一條第一導體區塊線係由複數個第一導體區塊所組成;以及一感應電極層,位於該感應電極及走線層之面向該顯示層之一側的表面上,並具有沿著一第二方向排列的N條第二導體區塊線,其執行觸控感應時,接受該觸控驅動訊號,每一第二導體區塊線以一對應之第i條連接線延伸至該高準確度之窄邊框內嵌式平面顯示觸控結構之一側邊,i為正整數且1≦i≦N,該N條第二導體區塊線的每一條第二導體區塊線係由複數個第二導體區塊所組成;其中,該複數個第一導體區塊、該N條連接線、及該複數個第二導體區塊的位置係依據與該遮光層之複數條遮光線條的位置相對應而設置。A high-accuracy narrow-frame in-cell planar display touch structure includes: a first substrate; a second substrate; the first substrate and the second substrate 0 are arranged in a parallel pair to sandwich a display layer Between the two substrates; a light shielding layer on a surface of the first substrate facing the display layer, the light shielding layer is composed of a plurality of light shielding lines, the plurality of light shielding lines are disposed in a first direction and a second direction to form a plurality of light shielding blocks; a sensing electrode and a wiring layer on a side of the light shielding layer facing the display layer and having M first conductor regions arranged along a first direction The block line and the N connecting lines sense whether an external object is close according to a touch driving signal, wherein M and N are positive integers, and each of the first conductor block lines of the M first conductor block lines And consisting of a plurality of first conductor blocks; and a sensing electrode layer on a surface of the sensing electrode and the wiring layer facing one side of the display layer, and having N strips arranged along a second direction Second conductor block line, which performs touch In the sensing, the touch driving signal is received, and each of the second conductor block lines extends to a side of the high-accuracy narrow frame in-cell planar display touch structure by a corresponding ith connection line, i a positive integer and 1≦i≦N, each second conductor block line of the N second conductor block lines is composed of a plurality of second conductor blocks; wherein the plurality of first conductor blocks The positions of the N connecting lines and the plurality of second conductor blocks are set according to positions of the plurality of light shielding lines of the light shielding layer. 如申請專利範圍第1項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,該第一導體區塊與該第二導體區塊疊置時,係以差排方式疊置。The high-accuracy narrow-frame in-cell planar display touch structure as described in claim 1, wherein the first conductor block and the second conductor block are stacked in a differential manner Set. 如申請專利範圍第2項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,該複數個遮光區塊的每一遮光區塊的長度與寬度分別為一第一長度及一第二長度。The high-accuracy narrow-frame in-line planar display touch structure as described in claim 2, wherein the length and width of each of the plurality of light-shielding blocks are a first length and a second length. 如申請專利範圍第3項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,該第一導體區塊與該第二導體區塊以差排方式疊置時,該第一導體區塊的中心位置與與該第二導體區塊的中心位置在該第二方向上相差該第一長度之一第一倍數,在該第一方向上相差該第二長度之一第二倍數,其中,該第一倍數及該第二倍數為正整數。The high-accuracy narrow-frame in-cell planar display touch structure as described in claim 3, wherein the first conductor block and the second conductor block are stacked in a differential manner, the first a central portion of the one conductor block and a first multiple of the first length in a second direction from the central position of the second conductor block, the first length being different from the second length a multiple, wherein the first multiple and the second multiple are positive integers. 如申請專利範圍第4項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,該複數個第一導體區塊的每一第一導體區塊的長度與寬度分別為一第三長度及一第四長度,該複數個第二導體區塊的每一第二導體區塊的長度與寬度分別為一第五長度及一第六長度,當中,該第三長度為該第一長度的一第三倍數的兩倍,該第四長度為該第二長度的一第四倍數的兩倍,該第五長度為該第一長度的一第五倍數的兩倍,該第六長度為該第二長度的一第六倍數的兩倍,其中,該第三倍數、該第四倍數、該第五倍數、及該第六倍數為正整數。The high-accuracy narrow-frame in-cell planar display touch structure as described in claim 4, wherein each of the plurality of first conductor blocks has a length and a width of one The third length and the fourth length, the length and the width of each of the second conductor blocks of the plurality of second conductor blocks are a fifth length and a sixth length, respectively, wherein the third length is the first length a double of a third multiple of a length, the fourth length being twice a fourth multiple of the second length, the fifth length being twice a fifth multiple of the first length, the sixth The length is twice a sixth multiple of the second length, wherein the third multiple, the fourth multiple, the fifth multiple, and the sixth multiple are positive integers. 如申請專利範圍第5項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,該第一倍數小於或等於該第三倍數或該第五倍數中較小者,該第二倍數小於或等於該第四倍數或該第六倍數中較小者,h≦min(h1,h2),w≦min(w1,w2),當中,h為該第一倍數,w為該第二倍數,h1為該第三倍數,w1為該第四倍數,h2為該第五倍數,w2為該第六倍數。The high-accuracy narrow-frame in-cell planar display touch structure as described in claim 5, wherein the first multiple is less than or equal to the third one of the third multiple or the fifth multiple, the first The diploid is less than or equal to the smaller of the fourth multiple or the sixth multiple, h≦min(h1, h2), w≦min(w1, w2), where h is the first multiple and w is the first The multiple, h1 is the third multiple, w1 is the fourth multiple, h2 is the fifth multiple, and w2 is the sixth multiple. 如申請專利範圍第1項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,每一第一導體區塊線係分別以對應之金屬走線延伸至該第一基板之同一側邊,以進一步連接至一軟性電路板。The high-accuracy narrow-frame in-line planar display touch structure as described in claim 1 , wherein each of the first conductor block lines extends to the first substrate by a corresponding metal trace The same side to further connect to a flexible circuit board. 如申請專利範圍第7項所述之窄邊框之內嵌觸控面板結構,其中,該N條連接線、複數個第一導體區塊、及複數個第二導體區塊係由金屬導電材料所製成。The touch panel structure of the narrow frame as described in claim 7 , wherein the N connection lines, the plurality of first conductor blocks, and the plurality of second conductor blocks are made of a metal conductive material production. 如申請專利範圍第8項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,該M條第一導體區塊線的每一條第一導體區塊線之複數個第一導體區塊係形成一個四邊型區域,且電氣連接在一起,該M條第一導體區塊線的每一條第一導體區塊線之間並未連接,該N條第二導體區塊線的每一條第二導體區塊線之複數個第二導體區塊係形成一個四邊型區域,且電氣連接在一起,該N條第二導體區塊線的每一條第二導體區塊線之間並未連接。The high-accuracy narrow-frame in-cell planar display touch structure as described in claim 8 wherein the first plurality of first conductor block lines of the M first conductor block lines are first The conductor block forms a quadrilateral region and is electrically connected together, and each of the first conductor block lines of the M first conductor block lines is not connected, and the N second conductor block lines are a plurality of second conductor blocks of each of the second conductor block lines form a quadrilateral region and are electrically connected together, and each of the N second conductor block lines is between each of the second conductor block lines not connected. 如申請專利範圍第1項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,該第一方向係垂直第二方向。The high-accuracy narrow-frame in-cell planar display touch structure as described in claim 1, wherein the first direction is perpendicular to the second direction. 如申請專利範圍第1項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,該N條連接線的每一條連接線係排列於兩條第一導體區塊線之間。The high-accuracy narrow bezel embedded flat display touch structure as described in claim 1, wherein each of the N connecting lines is arranged between the two first conductor block lines . 如申請專利範圍第9項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,該四邊型區域係為下列形狀其中之一:長方形、正方形。The high-accuracy narrow-frame in-line planar display touch structure as described in claim 9 wherein the quadrilateral region is one of the following shapes: a rectangle and a square. 如申請專利範圍第8項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,該金屬導電材料係為下列其中之一:鉬、鋇、鋁、銀、銅、鈦、鎳、鉭、鈷、鎢、鎂(Mg)、鈣 (Ca)、鉀(K)、鋰(Li)、銦(In)、合金、氟化鋰(LiF)、氟化鎂(MgF2)、氧化鋰(LiO)。The high-accuracy narrow bezel embedded flat display touch structure as described in claim 8 wherein the metal conductive material is one of the following: molybdenum, niobium, aluminum, silver, copper, titanium, Nickel, bismuth, cobalt, tungsten, magnesium (Mg), calcium (Ca), potassium (K), lithium (Li), indium (In), alloy, lithium fluoride (LiF), magnesium fluoride (MgF2), lithium oxide (LiO). 如申請專利範圍第1項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其更包含:一薄膜電晶體層,位於該第二基板之面向該顯示層一側的表面,該薄膜電晶體層具有K條閘極驅動線及L條源極驅動線,依據一顯示像素訊號及一顯示驅動訊號,以驅動對應之畫素電晶體及畫素電容,進而執行顯示操作,其中,K、L為正整數;一彩色濾光層,位於該遮光層之面向該顯示層一側的表面上;一共通電極層,位於該第一基板與第二基板之間;一第一偏光層,係位於該第一基板之背向該顯示層一側的表面;以及一第二偏光層,係位於該第二基板之背向該顯示層一側的表面。The high-accuracy narrow-frame in-cell planar display touch structure as described in claim 1, further comprising: a thin film transistor layer on a surface of the second substrate facing the display layer side, The thin film transistor layer has K gate driving lines and L source driving lines, and drives a corresponding pixel transistor and a pixel capacitor according to a display pixel signal and a display driving signal, thereby performing a display operation, wherein K, L is a positive integer; a color filter layer is located on a surface of the light shielding layer facing the display layer; a common electrode layer is located between the first substrate and the second substrate; a first polarized light a layer on a surface of the first substrate facing away from the side of the display layer; and a second polarizing layer on a surface of the second substrate facing away from the side of the display layer. 如申請專利範圍第1項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,該顯示層為一液晶層。The high-accuracy narrow bezel embedded flat display touch structure as described in claim 1, wherein the display layer is a liquid crystal layer. 如申請專利範圍第1項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,該顯示層為一有機發光二極體層。The high-accuracy narrow bezel embedded flat display touch structure as described in claim 1, wherein the display layer is an organic light emitting diode layer. 一種高準確度之窄邊框內嵌式平面顯示觸控結構,包括:一第一基板;一第二基板,該第一基板及該第二基板以平行成對之配置將一顯示層夾置於二基板之間;一遮光層,位於該第一基板之面對於該顯示層之同一側的表面,該遮光層係由複數條遮光線條所構成,該複數條遮光 線條設置於一第一方向及一第二方向,以形成複數個遮光區塊;一感應電極層,位於該遮光層之面向該顯示層一側的表面上,並具有沿著一第二方向排列的N條第二導體區塊線,其執行觸控感應時,接受該觸控驅動訊號;以及一感應電極及走線層,位於該感應電極層之面向該顯示層一側,並具有沿著一第一方向排列的M條第一導體區塊線及N條連接線,其依據一觸控驅動訊號而感應是否有一外部物件接近,其中,M、N為正整數,該M條第一導體區塊線的每一條第一導體區塊線係由複數個第一導體區塊所組成;其中,每一第二導體區塊線以一對應之第i條連接線延伸至該高準確度之窄邊框內嵌式平面顯示觸控結構之一側邊,i為正整數且1≦i≦N,該N條第二導體區塊線的每一條第二導體區塊線係由複數個第二導體區塊所組成,該複數個第一導體區塊、該N條連接線、及該複數個第二導體區塊的位置係依據與該遮光層之複數條遮光線條的位置相對應而設置,且該第一導體區塊與該第二導體區塊疊置時,係以差排方式疊置。A high-accuracy narrow-frame in-cell planar display touch structure includes: a first substrate; a second substrate, the first substrate and the second substrate are sandwiched by a display layer in a parallel pair configuration Between the two substrates; a light shielding layer on a surface of the first substrate facing the same side of the display layer, the light shielding layer is composed of a plurality of light shielding lines, the plurality of light shielding The lines are disposed in a first direction and a second direction to form a plurality of light shielding blocks; a sensing electrode layer is disposed on a surface of the light shielding layer facing the display layer side and has a second direction The N second conductor block lines receive the touch driving signal when performing touch sensing; and a sensing electrode and a wiring layer are located on a side of the sensing electrode layer facing the display layer and have along M first conductor block lines and N connection lines arranged in a first direction, which sense whether an external object is close according to a touch driving signal, wherein M and N are positive integers, and the M first conductors Each of the first conductor block lines of the block line is composed of a plurality of first conductor blocks; wherein each second conductor block line extends to the high accuracy with a corresponding ith connection line The narrow frame in-line display shows one side of the touch structure, i is a positive integer and 1≦i≦N, and each second conductor block line of the N second conductor block lines is composed of a plurality of second The conductor block is composed of the plurality of first conductor blocks and the N connections The line and the position of the plurality of second conductor blocks are disposed according to positions of the plurality of light shielding lines of the light shielding layer, and the first conductor block and the second conductor block are stacked Stacked in a differential manner. 如申請專利範圍第17項所述之高準確度之窄邊框內嵌式平面顯示觸控結構,其中,該第一方向係垂直第二方向。The high-accuracy narrow bezel embedded flat display touch structure as described in claim 17 wherein the first direction is perpendicular to the second direction.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105528125A (en) * 2014-10-17 2016-04-27 瑞鼎科技股份有限公司 Embedded mutual capacitance touch panel
TWI579754B (en) * 2014-10-17 2017-04-21 瑞鼎科技股份有限公司 In-cell mutual-capacitive touch panel and trace layout thereof
TWI627570B (en) * 2016-09-23 2018-06-21 南韓商Lg顯示器股份有限公司 Organic light-emitting display panel and organic light-emitting display device having built-in touchscreen

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105528125A (en) * 2014-10-17 2016-04-27 瑞鼎科技股份有限公司 Embedded mutual capacitance touch panel
TWI579754B (en) * 2014-10-17 2017-04-21 瑞鼎科技股份有限公司 In-cell mutual-capacitive touch panel and trace layout thereof
CN105528125B (en) * 2014-10-17 2018-02-27 瑞鼎科技股份有限公司 Embedded mutual capacitance contact panel and its layout
TWI627570B (en) * 2016-09-23 2018-06-21 南韓商Lg顯示器股份有限公司 Organic light-emitting display panel and organic light-emitting display device having built-in touchscreen
US10386956B2 (en) 2016-09-23 2019-08-20 Lg Display Co., Ltd. Organic light-emitting display panel and organic light-emitting display device having built-in touchscreen

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