TWI817015B - Gold-coated bonding wire and manufacturing method thereof, semiconductor wire bonding structure and semiconductor device - Google Patents

Abstract

[Problem] The present invention considers the need for thinner wafers and multi-stage lamination of semiconductor devices such as memories, and provides a gold-coated bonding wire that, as an alternative to bonding wires containing gold as the main component, has the same characteristics as gold and does not require It consumes material cost, but can be applied to the method of directly wedge-bonding the electrodes of multi-stage laminated wafers (CWB). [Solution] The gold-coated bonding wire 1 of the present invention has a core material 2 containing silver or copper as a main component and a coating layer 3 provided on the surface of the core material 2 containing gold as a main component. The problem can be achieved by controlling the film thickness of the gold coating layer to 5 nm or more and 200 nm or less, and controlling the compressive stress when the wire diameter is deformed by 60% to 290 MPa or more and 590 MPa or less.

Description

Gold-coated bonding wire and manufacturing method thereof, semiconductor wire bonding structure and semiconductor device

The present invention relates to a gold-coated bonding wire and its manufacturing method, a semiconductor wire bonding structure and a semiconductor device.

Among semiconductor devices, integrated circuits such as ICs and LSIs in which semiconductor components such as capacitors and diodes are integrated and assembled account for the majority of the market in terms of market size. Integrated circuits are assembled with "semiconductor chips" composed of silicon single crystals, etc. Semiconductor chips contain many electronic circuit components that perform complex functions and are precision electronic parts that are extremely fragile to vibration and impact. In addition, there are a plurality of electrodes (called chip electrodes or pads) on the surface of the semiconductor wafer, and the electrode portions of the lead frame or second circuit board that support and fix the semiconductor wafer and connect to external wiring are mainly connected by bonding wires. The electrodes of the wafer electrode are bonded to each other for wiring.

For example, a bonding wire is generally bonded to a wafer electrode (first bonding) by a method called ball bonding, and one end of the bonding wire is bonded to a wafer electrode (first bonding) by a method called wedge bonding (or stitch bonding). The other end of the bonding wire is bonded to an external electrode of a circuit board such as a lead frame (second bonding). In ball bonding, one end of the bonding wire is melted by discharge or the like, and solidified into a spherical shape by surface tension or the like to form a sphere. The solidified sphere is called FAB (Free Air Ball). It is connected to the wafer electrode by ultrasonic and thermocompression bonding. In wedge bonding, ultrasonic waves and a load are applied to the wire using a bonding tool (welded pipe), and the wire is bonded to the electrode.

Bonding wires use metal wires such as gold wires, silver wires, copper wires, etc. with a wire diameter of about 15 to 35 μm, or coated wires coated with other metals. The semiconductor device is configured by resin-sealing a semiconductor chip and a circuit board connected by wire bonding.

In addition, computers, smart phones, digital cameras, mobile music players, etc. have built-in memory devices (memory), and memory is divided into mechanical read-write devices represented by hard disks and semiconductor memories such as flash memory. body. Semiconductor memory system is a type of semiconductor device in which electronic components called cells used to store data are assembled into a semiconductor chip. Semiconductor memory has a high cost per unit capacity. As for external memory, it was rarely used in the past. However, in recent years, due to low cost and the weakness of mechanical hard disks that are damaged by vibration, the demand for semiconductor memory is increasing. Increase.

In addition, due to the strong demand for large-capacity data storage of music and videos and the miniaturization and thinning of mobile devices such as mobile music players, the requirements for large-capacity and miniaturized semiconductor memories are gradually increasing. For example, NAND flash memory has begun to be used to save images from digital cameras, and USB memory (Universal Serial Bus) has begun to be used in smartphones, mobile audio and video players, etc. In 2000 AD, the memory capacity was less than 1Gb. Compared with the demand of more than 100Gb in 2010, there has been a continuous demand for larger capacities in recent years.

On the other hand, due to the miniaturization of mobile devices, the requirements for the miniaturization of semiconductor memories have also increased. Of course, semiconductor memory chips are also required to be thinner. In 2000 AD, wafers with a thickness of about 150 μm were sufficient. However, the thinning of wafers has rapidly developed since then, and in 2010, wafers with a thickness of about 30 μm began to be used. In recent years, we have further begun to develop products with a thickness of only 20μm (0.020mm). wafer. Of course, as the chip becomes thinner, electronic components that are already very precise and can be damaged if not handled carefully will become more susceptible to damage, so they must be handled with more caution. Needless to say, this goes without saying.

In order to respond to the opposing demands of large capacity and miniaturization, semiconductor memory manufacturers are committed to thinning memory chips and multi-stage stacking packaging. The memory capacity of a memory chip also has a limit. Its specifications are about 4 to 8Gb of memory capacity per memory chip. Therefore, for example, for a memory capacity of 128Gb, at least 16 chips are required. When a plurality of semiconductor devices are assembled, the memory product itself becomes larger. Therefore, stacking thin wafers in one semiconductor device becomes a means to meet the needs for both large capacity and miniaturization. The stacking method includes stacking wafers in a stepwise manner in one direction as shown in FIGS. 11 and 12 described later, and stacking wafers in a lateral V-shape as shown in FIG. 13 .

In the field of the above-mentioned semiconductor memory, it is necessary to connect the electrodes on the surface of the wafer, which are deposited with precision and are easily damaged, to the electrodes of the lead frame and the circuit board with bonding wires to perform wiring. The joining methods performed so far are explained here. For example, in the case of a semiconductor device in which the circuit board in FIG. 9 and three wafers on it are laminated in four stages, protruding electrodes called bumps are first formed on the electrodes of each wafer, and then bonded to the electrodes of the circuit board. After the wire is ball-bonded, a looping operation is performed, and the bonding wire is wedge-bonded on the bump surface formed on the wafer electrode. This joining method is called BSOB (BALL STITCH ON BALL) method or reverse joining. For the delicate and easily damaged wafer electrodes, the purpose of this method is to achieve a buffer material-like effect by forming bumps to prevent wafer damage. In order to connect the wafer electrode and the circuit board, this BSOB was performed three times. The usual procedure is not to form bumps on the wafer electrodes, but to perform wedge bonding of the bonding wires on the electrodes of the circuit board after the wafer electrodes are directly ball-bonded and bonded. This joining method is called positive joining method. Generally, the chip electrodes and the circuit board are connected by positive bonding. However, with the thinning of semiconductor packages in recent years, the arc height must be reduced. Therefore, after lamination, The method of bonding on the wafer is reverse bonding. In ball bonding, after the FAB is formed, near the neck between the ball part and the wire part, in terms of wire characteristics, it is difficult to make the wire straight upward and then bend it at an acute angle. Therefore, if the upper wafer electrode is used in the positive bonding method, When ball bonding is performed, space is required up to a higher position, which is very disadvantageous for thinning the semiconductor memory. Therefore, this is one of the important reasons for performing reverse bonding from the electrode of the circuit board located at the lower position toward the electrode of the upper wafer. In addition, conditions for the bonding wire applicable to the reverse bonding method include flexibility that does not damage the precision wafer electrodes and high corrosion resistance and oxidation resistance on the bump surface and wire surface in order to perform wedge bonding on the bumps. sex. Therefore, gold (Au) bonding wires and gold (Au) bumps mainly composed of gold (Au), which is soft and does not oxidize, are used.

However, in the above-mentioned bonding method, the distance between the wafer electrode and the circuit board becomes longer, and the wafer electrode and the circuit board are connected by one line. Therefore, man-hours are required to go back and forth between the wafer electrode and the circuit board, resulting in reduced productivity. In addition, since the arc length of the wire becomes longer, problems such as controlling the linearity of the wire after wiring may occur. Therefore, a method of connecting wafer electrodes with wires as shown in FIG. 10 and then connecting the wafer electrodes to electrodes on a circuit board (cascade bonding method) has been adopted. Explain the cascade connection method. In the case of a semiconductor device in which a circuit board and three wafers are stacked in four stages, connections are made from the upper stage of the wafer (the lowermost circuit board is the first stage, and the uppermost wafer is the fourth stage). First, bumps are formed on the third-stage wafer electrode. After ball bonding and wire bonding are performed on the fourth-stage wafer electrode, the bonding wire is wedge-bonded to the bumps formed on the third-stage wafer electrode. In this way, connect the wafer electrodes of the 3rd and 4th segments. Next, bumps are formed on the second-stage wafer electrode, and ball bonding is performed on the wedge-bonded bumps located on the third-stage wafer electrode. After wire bonding, wedge bonding is performed on the bumps formed on the second stage wafer electrodes. In this way, connect the 2nd, 3rd, and 4th wafer electrodes. Finally, ball bonding is performed on the bump together with the wedge-shaped bonding portion formed on the second stage wafer electrode, After the wire bonding operation, the bonding wire is wedge-bonded on the circuit board of the first stage. As a result, wiring is performed in series from the uppermost wafer electrode to the lowermost circuit board electrode. In the case of this method, the required characteristics of the bonding wire are the same as those of the reverse bonding method, which is flexibility and oxidation resistance. Therefore, gold (Au) bonding wires and gold (Au) bumps are used.

Although these methods meet the requirements for large-capacity and miniaturized semiconductor devices, currently, these methods require a corresponding number of cycles of the following four steps according to the number of wafers: (1) Bump formation, (2) Spherical bonding, (3) Wedge bonding, (4) Wire tearing; therefore, with the further increase in capacity in recent years, for ultra-multi-segment wafers such as 16 segments and 32 segments, In terms of production, it requires 64 steps, 128 steps and man-hours, which is too high, resulting in reduced productivity and high manufacturing costs. Therefore, as an improved joining method, manufacturers of joining devices have proposed a multi-stage continuous joining method called Capillary Wedge Bonding (CWB). CWB is not the conventional ball bonding. It uses the following method: After wedge bonding the uppermost wafer electrode, wire bonding is performed, and wedge bonding is performed on the next wafer electrode. Without tearing, one wire is The same lines are continuously connected to the wafer electrodes of the next section and finally to the electrodes of the circuit substrate. According to this method, the aforementioned bump formation and disconnection after wedge bonding and ball bonding after FAB formation can be omitted, thereby significantly reducing man-hours. Specifically, because it is only one step of wedge bonding for each wafer, the work time is 1/4 of the conventional process. Since bumps and FABs are not formed and continuous bonding is possible, the bonding time can be significantly shortened. . In addition, since bumps and FAB are not formed, the amount of bonding wire used can be significantly reduced. This significantly improves productivity and reduces manufacturing costs (Fig. 6, which will be described later, is an example of conventional ball bonding, and Figs. 11 and 12 are examples of CWB).

As described above, by using the CWB method with a bonding device, the productivity of continuous bonding of multi-stage laminated wafers can be greatly improved. This premise is the improvement of the so-called hardware surface, and the bonding lines of consumables are still Then use gold wire that will not damage the chip electrodes. As mentioned above, although it is optimized without forming bumps and FABs, if it is necessary to form multi-stage laminated wafers, the amount of bonding wires used will also increase significantly. Therefore, although the productivity is improved, the use of expensive gold increases the material cost and occurs. This leads to new issues such as an increase in total costs.

The subject of the inventor of this case is to develop a bonding wire that replaces the bonding wire containing gold as the main component, has the same characteristics as gold, and can be applied to the CWB method without consuming material costs. Let’s once again sort out the wire conditions required for continuous bonding of multi-stage laminated wafer electrodes using the CWB method. They can be listed as follows: (1) good wedge bonding (with continuous bonding and bonding strength), (2) no damage to the wafer electrodes , (3) Thin wires with a wire diameter of less than 35 μm, (4) The material cost is not expensive, (5) Not limited to CWB, but the specific resistance is low and other conditions.

For example, Japanese Patent Application Laid-Open No. 2007-012776 (Patent Document 1) describes a bonding wire that improves the formability and bonding properties of spheres and increases the bonding strength of wedge bonding, and has a copper-based bonding wire. The core material of the composition and the outer layer on the core material. The outer layer contains one or both of the conductive metal and copper that are different from the core material. The thickness of the outer layer is 0.001~0.02μm (1 ~20nm). Furthermore, Japanese Patent Application Laid-Open No. 2007-1297 (Patent Document 2) describes a bonding wire that improves the formability and bonding properties of spheres and can increase the bonding strength of wedge bonding. The bonding wire is made of silver, gold, A core material with one or more main component elements among palladium, platinum, and aluminum as the main component and an outer skin layer with a conductive metal different from the main component element as the main component, and the thickness of the outer skin layer is 0.001~0.09μm (1~ 90nm). These bonding wires only improve the wedge bonding properties by controlling the thickness of the outer layer, the thickness of the concentration gradient area between the core material and the outer layer, and the control of the concentration distribution, etc., and do not focus on having the outer layer. The characteristics of the bonding wire body are also not controlled. In addition, the wedge bonding objects referred to here are the electrodes of the lead frame and the circuit board, or the bumps on the chip electrodes, which is basically different from the direct wedge bonding on thin chip electrodes that are delicate and easily damaged.

Furthermore, International Publication No. 2013/129253 (Patent Document 3) describes a power semiconductor device in which metal wires are connected to both the metal electrode (element electrode) of the power semiconductor element and the metal electrode (connection electrode) of the substrate or the like. Power semiconductor devices connected in a wedge shape, in which the metal wires are Ag or Ag alloy wires with a diameter exceeding 50 μm and less than 2 mm, or Pd, Au, Zn, Pt, Wires coated with one or more types of Ni, Sn, alloys of these, or oxides or nitrides of these metals. In this power semiconductor device, metal wires are wedge-bonded on both sides of the element electrode and the connection electrode. However, the metal wires are thick wires with a diameter of more than 50 μm and less than 2 mm, and thin wires with a wire diameter of about 15 to 35 μm are not considered. metal wire. Furthermore, in this power semiconductor device, wedge bonding properties are improved simply by selecting the constituent metal and thickness of the electrode coating layer that covers the element electrode surface. In addition, the electrodes of power semiconductors that handle large amounts of electricity are fundamentally different from the thin chip electrodes that are delicate and easily damaged in memory devices.

[Prior technical literature]

[Patent Document]

[Patent Document 1] Japanese Patent Application Publication No. 2007-012776

[Patent Document 2] Japanese Patent Application Publication No. 2007-123597

[Patent Document 3] International Publication No. 2013/129253

As mentioned above, the inventors of the present invention considered the need for thinner wafers and multi-stage lamination of semiconductor devices such as memories to develop a bonding wire that has the same properties as gold in place of the bonding wire containing gold as its main component. The characteristics can be applied to the direct wedge bonding method (CWB) between the electrodes of multi-stage laminated wafers without consuming material costs. As a conditional subject necessary for this line, then The following are listed below: (1) wedge-shaped bonding is good (continuous bonding and bonding strength), (2) will not cause damage to the chip electrode, (3) thin wires with a wire diameter of 35 μm or less, (4) material cost is not expensive, (5) Not limited to CWB, but conditions such as lower specific resistance.

In addition, if the wafer is laminated in multiple stages in order to make the semiconductor device thinner, in the lateral V-shaped direction as shown in FIG. 13, a space will be left below the electrode portion of the wafer, resulting in a point where the wafer has no bottom layer (support). It is known that in the absence of a bottom layer, ultrasonic waves cannot be effectively applied to the welded pipe, resulting in a reduction in the bonding energy given to the wafer and a weakening of the bonding strength. Since it is a multi-stage system, it is necessary to set the joint energy suitable for each place individually. The bonding energy is the range of conditions to obtain stable bonding, and the wedge bonding conditions are mainly load, ultrasonic wave application, and heating temperature. Different conditions around the joint require a wide range of joint energy conditions.

The inventor of this case has made repeated attempts and errors with regard to bonding wires that do not contain existing gold as the main component. However, since the range of bonding energy that can be supported by existing bonding wires is narrow, it is known that in continuous wedge bonding, low bonding When the energy, that is, the amount of wire pressing is small and the load is low, the bonding strength is weak. In the subsequent wire bonding process, wire peeling (peeling) will occur at the bonding interface. On the contrary, if the bonding energy (wire pressing) is high, (large quantity, high load), chip damage will occur, and the wire will become extremely thin after deformation. During the subsequent wire bonding process, wire breakage will occur at the thinned joint.

The present invention provides a bonding wire that can perform continuous and good wedge bonding between thin and multi-stage laminated wafer electrodes such as semiconductor memories, without causing damage to the wafer electrodes, has a wide range of bonding energy conditions, has low specific resistance, and No material cost is incurred. Furthermore, a manufacturing method thereof, a semiconductor wire bonding structure and a semiconductor device using the bonding wire are provided, thereby solving the problem.

In order to solve the above-mentioned wedge-shaped bonding problem, the inventor of this case conducted detailed research on the bonding line. After repeated trials and errors, he came to the conclusion that the compressive stress system of the control line was found to be effective. Compressive stress refers to the strength (force) value per unit area when a wire is deformed by force in the compression direction. In the present invention, it was found that the compressive stress when compressed (deformed) by 60% relative to the wire diameter is 290 MPa or more and 590 MPa or less. within the scope, the problem can be solved.

Details of the compressive stress measurement method of the present invention will be described in detail in the following paragraphs [0050] to [0053], and it is calculated by the following formula.

The compressive stress of the wire (MPa) = the force exerted when deforming the wire by 60% relative to the wire diameter (N)/(pi × wire diameter (mm)/2) × indenter diameter (mm))

In addition, the compressive stress can also use the value automatically calculated in the compression testing machine. The diameter of the indenter is the diameter of the indenter installed on the compression testing machine. The pi system uses 3.14.

The basic idea of the present invention is to use Ag wires or Cu wires as base materials and cover the surface of these wires with soft Au from the conditions of controlling the compressive stress within the above-mentioned range, low specific resistance, and low price. Such a line structure.

The gold-coated bonding wire of the present invention has a core material containing silver or copper as a main component and a coating layer provided on the surface of the core material and containing gold as a main component, and is characterized by: the wire relative to the gold-coated bonding wire The compressive stress when deformed by 60% is between 290MPa and 590MPa.

The manufacturing method of a gold-coated bonding wire of the present invention is used to manufacture a gold-coated bonding wire having a core material containing silver or copper as a main component and a coating layer provided on the surface of the core material and containing gold as a main component. It has the characteristics The compressive stress when the gold-coated bonding wire is deformed by 60% relative to the wire diameter is 290 MPa or more and 590 MPa or less.

The semiconductor wire bonding structure of the present invention has a gold-coated bonding wire, an electrode of a semiconductor wafer, and a wedge-shaped bonding portion where the wire and the electrode are bonded; the gold-coated bonding wire has a core material containing silver or copper as a main component and a The coating layer containing gold as a main component is characterized in that the film thickness of the coating layer in the gold-coated bonding wire is from 5 nm to 200 nm, and the compressive stress when the wire diameter is deformed by 60% is from 290 MPa to 590 MPa.

The semiconductor device of the present invention includes: one or a plurality of semiconductor wafers having at least one first electrode; a circuit substrate selected from a lead frame and a circuit substrate having at least a second electrode; and a gold-coated bonding wire selected from " At least one of "between the first electrode of the semiconductor chip and the second electrode of the circuit board" and "between the first electrodes of the plurality of semiconductor chips" is electrically connected, and the first electrode and the second electrode are electrically connected. electrode, or at least one of the plurality of first electrodes for wedge bonding; characterized in that: the gold-coated bonding wire has a core material containing silver or copper as the main component and a core material provided on the surface of the core material and containing gold as the main component. The compressive stress of the gold-coated bonding wire is between 290MPa and 590MPa.

According to the gold-coated bonding wire and its manufacturing method of the present invention, by setting the compressive stress to 290 MPa or more and 590 MPa or less, even in continuous wedge bonding where the bonding energy conditions are different due to the joints of multi-stage laminated chip electrodes, It does not cause damage to semiconductor wafer electrodes, etc., and can obtain stable wedge bonding strength. Furthermore, according to the semiconductor device of the present invention, by using such a gold-coated bonding wire, it is possible to provide a thin semiconductor memory with a large memory capacity at a low price while suppressing the total cost.

In addition to the above-mentioned effects, the present invention is of course effective in bonding stability, bonding reliability, and the like in general ball bonding of semiconductor wafer electrodes and wedge bonding of substrate circuits, lead frames, and the like.

1: Gold coated bonding wire

2: Core material

3:Coating layer

4: Intermediate metal layer

10:Semiconductor device

10X:Semiconductor device

11:Substrate electrode

12:Circuit substrate

13:wafer electrode

14, 14A, 14B, 14C, 14D: semiconductor wafer

15:Joining wire

16: Grain bonding materials

17: Wedge joint

18:Sealing resin layer

19: Sphere joint

D: diameter

FIG. 1 is a longitudinal sectional view showing a gold-coated bonding wire according to the embodiment.

FIG. 2 is a cross-sectional view showing a gold-coated bonding wire according to the embodiment.

FIG. 3 is a longitudinal sectional view showing a modification of the gold-coated bonding wire according to the embodiment.

FIG. 4 is a cross-sectional view showing a modification of the gold-coated bonding wire according to the embodiment.

FIG. 5 is a diagram showing the shape of the indentation in the compressive stress test of the bonding wire according to the embodiment.

FIG. 6 is a cross-sectional view showing a stage before resin sealing of the semiconductor device according to the embodiment.

7 is a cross-sectional view showing the stage after resin sealing of the semiconductor device according to the embodiment.

8 is a cross-sectional view showing a wedge-shaped bonding portion of a gold-coated bonding wire bonded to an electrode of a semiconductor wafer in the semiconductor device according to the embodiment;

FIG. 9 is a diagram showing an example of a conventional wire connection structure of a semiconductor chip laminated in multiple stages.

FIG. 10 is a diagram showing another example of the conventional wire connection structure of semiconductor wafers laminated in multiple stages.

FIG. 11 is a cross-sectional view showing a first modification of the semiconductor device according to the embodiment.

FIG. 12 is a cross-sectional view showing a second modification of the semiconductor device according to the embodiment.

FIG. 13 is a cross-sectional view showing an example of a semiconductor device having a multi-stage stacked structure of a semiconductor wafer.

The gold-coated bonding wire and its manufacturing method, the semiconductor wire bonding structure, and the semiconductor device according to the embodiment of the present invention will be described below with reference to the drawings. In each embodiment, substantially the same components are assigned the same reference numerals, and description thereof may be partially omitted. The drawings are for illustration only, and the relationship between thickness and plane dimensions, the thickness ratio of each part, the ratio of longitudinal dimensions to transverse dimensions, etc. may differ from reality. In addition, the compressive stress (MPa) in this specification uses the value based on the conversion formula of 1kgf/mm ² =9.8MPa.

(Gold coated bonding wire and manufacturing method thereof)

The gold-coated bonding wire 1 of the embodiment, as shown in FIGS. 1 and 2 , has a core material 2 mainly composed of silver (Ag) or copper (Cu) and a surface of the core material 2 containing gold (Au). The coating layer 3 is the main component. The gold-coated bonding wire 1 of the embodiment, as shown in FIGS. 3 and 4 , may further have an intermediate metal layer 4 provided between the core material 2 and the coating layer 3 . The intermediate metal layer 4 is made of a metal selected from palladium (Pd), platinum (Pt) and nickel (Ni) as its main component.

The gold-coated bonding wire 1 of the embodiment has a compressive stress of 290 MPa to 590 MPa when deformed by 60% relative to the wire diameter. The compressive stress of the gold-coated bonding wire 1 affects the bonding properties to the electrodes due to the amount of deformation of the wire when it is wedge-bonded to electrodes of semiconductor wafers, circuit boards, or lead frames. In this regard, by using the gold-coated bonding wire 1 having a compressive stress of 290 MPa or more and 590 MPa or less, it is possible to obtain stable wedge bonding properties and wedge bonding strength without causing damage to the semiconductor wafer or the like during wedge bonding. By this, especially when the electrodes of a semiconductor wafer that has been laminated in multiple stages are continuously connected with one bonding wire at each bonding point using different conditions of connection energy, it is possible to achieve sufficient results without causing damage to the wafer. wedge joint strength.

Explain the critical significance of setting the compressive stress range. If the compressive stress of the gold-coated bonding wire 1 is less than 290 MPa, it will be excessively deformed by the energy during wedge bonding, specifically the applied ultrasonic wave and load, and the wire pressing width of the wire bonding portion facing the electrode will become too large. If a part of the pressed wire extends beyond the outside of the electrode, it will easily come into contact with the adjacent wire bonding portion, causing a short circuit failure. Also, line If the joint portion is pressed excessively, the wire to be joined will become thinner, and when a wire arc is formed with a joining tool (welded pipe), breakage of the wire at the joint portion, etc. may easily occur. Especially when the electrodes of the semiconductor wafer are continuously connected with one bonding wire by CWB, the wire pressing width and wire thickness of the wire bonding portion tend to become unstable. On the contrary, if wedge bonding is performed with low bonding energy in order to avoid such problems, the deformation of the wire in the bonded portion will be insufficient and the wedge bonding strength will be weakened. In the subsequent wire arc formation, wire peeling will easily occur at the bonding interface. In addition, as a means to evaluate the bonding strength, there is a pull test, and wire peeling is called lift, which is an index for evaluating the possibility of peeling at the bonding interface between the wire and the electrode. The compressive stress of the gold-coated bonding wire 1 is preferably 340 MPa or more.

On the other hand, if the compressive stress of the gold-coated bonding wire 1 exceeds 590MPa, even if wedge bonding is performed with high bonding energy, the wire will not be easily deformed, the bonding area of the wire bonding portion will be reduced, and the bonding strength will be weakened. In subsequent wire arcs, During formation, wire peeling easily occurs at the bonding interface. This will also cause peeling during this tensile test. Therefore, the compressive stress of the gold-coated bonding wire 1 is preferably 540 MPa or less, and more preferably 490 MPa or less. That is, by using the gold-coated bonding wire 1 having a compressive stress of 290 MPa or more and 590 MPa or less, stable wedge bonding can be performed under a wide range of wedge bonding conditions.

As for the compressive stress of the gold-coated bonding wire 1, as will be described in detail later, by appropriately controlling the composition of the metal material (silver-based material or copper-based material) constituting the core material 2, the composition and heat treatment of the core material 2, and the coating layer 3 Depending on the thickness of the intermediate metal layer 4, the wire diameter of the bonding wire 1, the heat treatment conditions for the bonding wire 1, etc., a compressive stress of 290 MPa or more and 590 MPa or less can be obtained. However, the compressive stress of the gold-coated bonding wire 1 is not limited to the material, manufacturing process, manufacturing conditions, etc. of the gold-coated bonding wire 1, and its characteristics can be exhibited as long as it is within the above range.

The gold-coated bonding wire 1 preferably has a wire diameter of not less than 13 μm and not more than 35 μm (diameter D shown in FIG. 1 ). If the wire diameter of wire 1 is less than 13 μm, bonding wires are used when manufacturing semiconductor devices. 1. When performing wire bonding, there is a concern that the reliability of the wire bonding may be reduced due to reduced strength and conductivity. If the wire diameter of the wire 1 exceeds 35 μm, there is a concern that the bonding properties of the electrodes, especially the bonding properties of wedge bonding, will be reduced. For example, the opening area of an electrode of a semiconductor device whose pitch has been narrowed becomes smaller. If bonding wires 1 with wire diameters exceeding 35 μm are wedge-bonded within the opening area of such an electrode with a narrowed pitch, the passivation film may be destroyed and a short circuit may occur between adjacent bonding parts. In addition, the passivation film has the function of protecting the inside from external moisture and metal ions coming from the insulating film and sealing resin on the top layer of the chip. Therefore, if the vertical cross-section of the wafer is observed, the passivation film is higher than the joint surface of the wafer. If the diameter of the wire exceeds 35 μm, during bonding, the passivation film will be destroyed due to contact with the side surface of the wire near the joint portion and contact with the wire that is pressed at the joint portion.

The core material 2 is a part that mainly constitutes the bonding wire 1 of the embodiment, and serves as the bonding wire 1 . As the main component of the core material 2, silver or copper is used. Here, "containing silver or copper as a main component" means that the core material 2 contains at least 50% by mass or more of silver or copper. When a material containing silver as the main component is used as the core material 2, the core material 2 may be made of pure silver, but is preferably made of a silver alloy in which additive elements are added to silver. In addition, when a material containing copper as the main component is used as the core material 2, the core material 2 may be made of pure copper, but is preferably made of a copper alloy in which additive elements are added to copper. If it is a pure metal, it has the disadvantage that self-annealing occurs and becomes too soft, making it difficult to handle during the manufacturing process. If alloyed, it becomes harder than pure metal, which has the advantage that the bonding wire becomes easier to handle in the manufacturing step. Moreover, by using the core material 2 composed of a silver alloy or a copper alloy, there is also an advantage that the gold-coated bonding wire 1 having a compressive stress of 290 MPa to 590 MPa can be easily obtained.

In principle, controlling the compressive stress of the entire wire is the most important condition for achieving the project. However, the Vickers hardness (Hv) of the core material 2 containing silver or copper as the main component is preferably 40 or more and 80 or less. The Vickers hardness referred to here is the Vickers hardness of the core material 2 in the cross section of the gold-coated bonding wire 1 . Vickers hardness of core material 2 When it is 40 to 80, it is easy to obtain a gold-coated bonding wire 1 having a compressive stress of 290 to 590 MPa. That is, if the Vickers hardness of the core material 2 is less than 40, the compressive stress of the gold-coated bonding wire 1 becomes too low, making it difficult to obtain a compressive stress of 290 MPa or more. If the Vickers hardness of the core material 2 exceeds 80, the compressive stress of the gold-coated bonding wire 1 becomes too high, making it difficult to obtain a compressive stress of 590 MPa or less. The Vickers hardness of the core material 2 is more preferably 45 or more, and more preferably 70 or less. Of course, not only is it easy to obtain the target compressive stress, but also by setting the Vickers hardness within this range, the wedge jointability is further improved due to the multiplication effect of the compressive stress and hardness. In addition, compressive stress and Vickers hardness are not necessarily simply proportional.

When the core material 2 is made of a silver alloy, the silver content in the silver alloy is preferably 97% by mass or more. The silver alloy constituting the core material 2 preferably contains copper (Cu), calcium (Ca), phosphorus (P), gold (Au), palladium (Pd), platinum (Pt), nickel (Ni), and rhodium. At least one element from the group consisting of (Rh), indium (In), and iron (Fe). The elements added to the silver alloy constituting the core material 2 have the effect of improving the reliability (corrosion resistance) of the gold-coated bonding wire 1 and preventing self-annealing by increasing the Vickers hardness of the core material 2 . If the wire becomes too soft due to self-annealing, the wire becomes difficult to handle during the manufacturing step and is prone to scarring. However, if the content of the added element is too high, the specific resistance of the core material 2 increases, and the conductivity of the core material 2 and even the gold-coated bonding wire 1 decreases. The content of the added element is preferably in the range of 1 mass ppm or more and 3 mass % or less relative to the entire amount of line 1.

If the content of the additive element in the silver alloy constituting the core material 2 is less than 1 ppm by mass relative to the total amount of the wire 1, the reliability of the gold-coated bonding wire 1 cannot be fully obtained and the self-annealing of the core material 2 is suppressed. Wait for doubts. If the content of the added element exceeds 3% by mass relative to the total amount of the wire 1, the specific resistance of the gold-coated bonding wire 1 will increase. The content of the added element is preferably such that the specific resistance of the gold-coated bonding wire 1 becomes 2.3 μΩ. Set in a range below cm.

When the core material 2 is made of a copper alloy, the copper content in the copper alloy is preferably 98% by mass or more. The copper alloy constituting the core material 2 preferably contains phosphorus (P), gold (Au), palladium (Pd), platinum (Pt), nickel (Ni), silver (Ag), rhodium (Rh), indium At least one element from the group consisting of (In), gallium (Ga) and iron (Fe). Similarly, the elements added to the copper alloy constituting the core material 2 can improve the reliability (corrosion resistance) of the gold-coated bonding wire 1 and prevent self-annealing (self annealing) by increasing the Vickers hardness of the core material 2 )Effect. If the wire becomes too soft due to self-annealing, not only will the wire become difficult to handle during the manufacturing step, but it will also easily cause scars due to slight impacts. However, if the content of the added element is too high, the specific resistance of the core material 2 increases, and the function of the core material 2 and even the gold-coated bonding wire 1 decreases. The content of the added element is preferably in the range of 1 mass ppm or more and 2 mass % or less relative to the entire amount of line 1.

If the content of the additive element in the copper alloy constituting the core material 2 is less than 1 ppm by mass relative to the total amount of the wire 1, the reliability of the gold-coated bonding wire 1 will not be sufficiently obtained and self-annealing of the core material 2 will be suppressed. Doubts about the effect. If the content of the added element exceeds 2% by mass relative to the total amount of the wire 1, the specific resistance of the gold-coated bonding wire 1 will increase. The content of the added elements is preferably such that the specific resistance of the gold-coated bonding wire 1 is 2.3 μΩ. Set in a range below cm.

In the gold-coated bonding wire 1 using the core material 2 made of silver or silver alloy, the compressive stress is preferably 290 MPa or more and 440 MPa or less. By using such a gold-coated bonding wire 1, it is possible to satisfy the wire characteristics of the gold-coated bonding wire 1 using the silver-based core material 2 and to improve wedge bonding properties. In addition, in the gold-coated bonding wire 1 using the core material 2 made of the above-mentioned copper or copper alloy, the compressive stress is preferably not less than 440 MPa and not more than 590 MPa. By using such a gold-coated bonding wire 1, it is possible to satisfy the wire characteristics of the gold-coated bonding wire 1 using the copper-based core material 2 and to improve wedge bonding properties.

The gold-coated bonding wire 1 of the embodiment has a coating layer 3 provided on the surface of the above-mentioned core material 2 mainly composed of silver or copper. Covering layer 3 contains gold as a main component. Here, "containing gold as a main component" means that the coating layer 3 contains 50% by mass or more of gold. The coating layer 3 containing gold as a main component improves the corrosion resistance of the wire, and is combined with aluminum (Al) or aluminum alloy (Al alloy) that constitutes the electrode of the semiconductor wafer, and gold (Au) or gold alloy that constitutes the electrode of the circuit board. (Au alloy), silver (Ag) plating or silver alloy (Ag alloy) plating formed on the surface of the lead within the lead frame has good compatibility and is easy to diffuse, so it exhibits good joint strength, especially good Wedge joint strength. Therefore, when the bonding wire 1 having the coating layer 3 containing gold as a main component on its surface is wedge-bonded, especially when continuous bonding is performed by CWB, the bonding wire 1 can be wedge-bonded with good bonding strength and bonding reliability.

The coating layer 3 may be made of pure gold (gold content is 99.9% or more), or may be made of a gold alloy obtained by adding additive elements to gold. The gold alloy constituting the coating layer 3 preferably contains at least one selected from the group consisting of antimony (Sb), palladium (Pd), platinum (Pt), nickel (Ni), cobalt (Co), and bismuth (Bi). an element. The elements added to the gold alloy constituting the coating layer 3 show effects such as improving the reliability of the bonding between the gold coating layer 3 and the aluminum (Al) constituting the semiconductor wafer electrode. In addition, the film thickness of the gold coating layer 3 is preferably not less than 5 nm and not more than 200 nm. By setting the film thickness of the gold coating layer 3 to 5 nm or more, the wedge bonding properties of the gold coating layer 3 to aluminum electrodes, gold electrodes, silver plated electrodes, etc. can be sufficiently improved. If the film thickness of the gold coating layer 3 exceeds 200 nm, the manufacturing cost of the gold coating bonding wire 1 will increase, which is undesirable. As mentioned above, the product of the present invention is sometimes used for ball bonding. Therefore, if the gold coating layer exceeds 200 nm, the ball formability such as FAB eccentricity may be reduced. In addition, the film thickness of the gold coating layer 3 is preferably more than 20 nm, more preferably more than 50 nm, and still more preferably less than 150 nm.

As mentioned above, the gold-coated bonding wire 1 of the embodiment, as shown in FIGS. 3 and 4 , may also have an intermediate metal layer 4 provided between the core material 2 and the coating layer 3 . The intermediate metal layer 4 is selected from palladium (Pd), A metal composed of platinum (Pt) and nickel (Ni) as the main components. By providing such an intermediate metal layer 4 between the core material 2 and the coating layer 3, not only the reliability (corrosion resistance) can be improved, but also the constituent materials of the core material 2 can be prevented from exuding beyond the coating layer 3 at high temperatures. Bonding line 1 surface. For example, if copper is exposed on the outermost surface of the core material 2 , there is a greater risk of oxidation, and if silver is exposed on the outermost surface of the core material 2 , there is a greater risk of sulfurization. These are the main reasons for the reduction in the bonding reliability of the gold-coated bonding wire 1 to the electrode. In this regard, by providing the intermediate metal layer 4 between the core material 2 and the covering layer 3, the bleeding of copper or silver to the wire surface in a high-temperature environment can be suppressed, thereby improving the joint reliability.

The intermediate metal layer 4 may also be composed of pure palladium, pure platinum or pure nickel, or it may also be composed of an alloy containing two or more of these metals. Furthermore, the intermediate metal layer 4 may also be composed of a palladium alloy, a platinum alloy or a nickel alloy in which a metal selected from palladium, platinum and nickel is used as the main component and additive elements are added thereto.

The intermediate metal layer 4 preferably has a thickness of 60 nm or less. If the thickness of the intermediate metal layer 4 exceeds 60 nm, there is a possibility that the original characteristics of the FAB of the gold-coated bonding wire 1 such as sphere formability will be impaired. In addition, the thickness of the intermediate metal layer 4 is preferably 1 nm or more in order to fully obtain the effect of suppressing the exposure of copper and silver on the wire surface. In addition, the gold-coated bonding wire 1 of the embodiment is not limited to the one composed only of the core material 2 and the coating layer 3, or the core material 2, the coating layer 3 and the intermediate metal layer 4. The gold-coated bonding wire 1 of the embodiment can also have structures other than these according to requirements, such as three-layer coating, four-layer coating, and other structures.

The compressive stress of the gold-coated bonding wire 1 can be measured in the following manner. That is, the gold-coated bonding wire 1 is cut into a length of several centimeters without applying tension to prepare a wire sample. While being careful not to stretch or loosen the wire sample, place it laterally on the flat sample table of a compression testing machine (for example, Shimadzu Corporation micro-compression testing machine model MCT-W-500). Next, as To set up the device, select a circular sample shape, indenter size φ200μm, deformation in the cross-sectional direction of the wire to be 60% of the wire diameter, and set the maximum load corresponding to the wire diameter. For example, when setting the maximum load, when the wire diameter is φ20μm, the standard value is 3.5N.

Next, the stage is moved so that the wire moves to the center of the indenter, and the surface of the wire is compressed by the indenter to obtain the compressive stress of the wire. The compressive stress value is calculated automatically by the device, and there is no problem in using this value. As an equation, the force applied when compressing 60% of the wire diameter is divided by the cross-sectional area of the wire after being pressed. Here is a description of how to find the cross-sectional area. In an ideal state, the line shape (section) after pressing is not limited to the case where the line surface is evenly thinned by the indenter, and the thickness is close to 0 without limit. The transverse length of the section is the diameter of the indenter, and the longitudinal length is a value that is half the circumferential length of the unrestricted line. Therefore, the cross-sectional area of the line is calculated as the transverse direction × the longitudinal direction, and becomes the diameter of the indenter × (circumferential ratio × diameter/2).

To illustrate with a specific example, 60% compression of a wire with a diameter of 20 μm is the force (N) applied to press the wire to a height of 8 μm divided by the cross-sectional area (mm ² ) defined above. That is, the value obtained by dividing the force by (indenter size 200 μm = 0.2 mm) × (half the circumference of the wire) = (wire diameter 0.02 mm × 3.14/2) is the compressive stress. Strictly speaking, when the line is deformed by 60%, the line is not completely flattened, so the longitudinal length of the cross-sectional area is not equal to half the length of the circle, but whether it is a measurement calculated based on this cross-sectional area, or rigorous The measured value calculated based on the cross-sectional area when the deformation is 60% has only a slight difference and does not exceed the critical range. Therefore, the method of measuring this value is adopted in the present invention. The compressive stress is expressed by a simple formula below.

The compressive stress of the wire (MPa) = the force exerted when deforming the wire by 60% relative to the wire diameter (N)/((pi × wire diameter (mm)/2) × indenter diameter (mm))

Also, it should be noted that after compressing the wire, take the tested wire and observe the shape of the indentation using a scanning electron microscope. The state of the indentation is as shown in Figure 5 (attached SEM image). The length of the indentation is ±20% of the diameter of the indenter. Taking the long side of the line as the axis, confirm that the pressing width is symmetrical. If these conditions are not met, the measurement value may be incorrect, so re-measurement is required. The measured value is the average of three measurements, and the unit is MPa. In addition, when the output unit of the compression test device is kgf/mm ² , the value converted according to the conversion formula of 1kgf/mm ² =9.8MPa is applied. The reason why the deformation amount of compression is 60% of the wire diameter is because the average wire pressing rate in wedge bonding is about 60%.

The Vickers hardness in the cross section of the core material 2 is measured in the following manner. That is, the gold-coated bonding wire is cut into lengths of several centimeters, and a plurality of wire samples are prepared. On the one hand, be careful not to stretch or relax the wire sample, and on the other hand, attach it to the metal (Ag-plated frame) plate straight and flat. After that, the wire sample is placed into a cylindrical mold (mold) according to the metal plate so that the metal plate becomes the cylindrical bottom surface. Filling resin is poured into the mold, and then a hardener is added to harden the resin. Then, the hardened cylindrical resin in which the wire sample was embedded was roughly ground with a grinder so that the cross section of the wire was exposed. After that, the cross-section is processed by final grinding, and then the residual strain on the polished surface is removed by ion grinding to obtain a smooth surface. In addition, the ion polishing device was fine-tuned so that the cross section of the wire was perpendicular to the longitudinal direction of the wire. The cross section of the wire sample (that is, the ground surface of the sample) is fixed to the sample table of the hardness testing machine (example: HM-220 manufactured by Mitutoyo) so that the cross section is parallel to the sample table, and the test force is 0.001kgf and the load time is 4.0 Seconds, a holding time of 10.0 seconds, an unloading time of 4.0 seconds, and an approach speed of 60.0um/second, the Vickers hardness is measured near the center of the line section. This hardness measurement was performed on 5 pieces, and the average value was calculated.

In the gold-coated bonding wire 1, when the core material 2 is made of a silver alloy or a copper alloy, the content of the added element relative to the entire wire 1, the content of gold constituting the coating layer 3 relative to the entire wire 1, and the coating layer composed of a gold alloy In the case of 3, the content of the added element relative to the entire line 1, the palladium and platinum constituting the intermediate metal layer 4 Or the content of nickel relative to the entire wire 1, and the content of the additive element relative to the entire wire 1 when the intermediate metal layer 4 is made of an alloy, are measured in the following manner. That is, first, in order to calculate the gold content, the bonding wire 1 is put into dilute nitric acid to dissolve the core material 2, and then the solution is collected. Add hydrochloric acid to this solution and use ultrapure water as the constant volume solution. Use this constant volume solution to perform ICP emission spectrometry (ICP-AES, Inductively Coupled Plasma Atomic Emission Spectroscopy) or inductively coupled plasma mass spectrometry (ICP-MS, Inductively Coupled Plasma-Mass Spectrometry) to measure the core material 2 The content of added elements.

The thickness of the coating layer 3 and the intermediate metal layer 4 is measured in the following manner. That is, from the surface of the gold-coated bonding wire 1, elements are analyzed in the depth direction using a scanning Auger Electron Spectroscopy (AES) analysis device (for example, manufactured by JEOL Ltd., trade name: JAMP-9500F). composition. The setting conditions of the AES analysis device are an acceleration voltage of 10 kV for the primary electron beam, a current of 50 nA, a beam diameter of 5 μm, an acceleration voltage of argon ion sputtering of 1 kV, and a sputtering speed of 2.5 nm/minute ( _SiO2 conversion). Analyze from the surface of the gold-coated bonding wire 1 in the depth direction until the detected concentration of the main component of the core material becomes 50 atomic % or more, and determine the average concentration of gold relative to the sum of gold, silver, or copper. When the intermediate metal layer 4 is provided, the average concentration of gold and element M relative to the sum of the main constituent element M of the intermediate metal layer 4 and gold, silver, or copper is determined.

The coating layer 3 is defined as a region from the surface of the wire 1 to a point where the ratio of gold to silver or the sum of copper and gold becomes 50.0 atomic %. The thickness of this region is determined as the thickness of the coating layer 3 . The point where the gold ratio reaches 50.0 atomic % is the boundary between the core material 2 and the coating layer 3 . The intermediate metal layer 4 is defined as the area from where the ratio of the above-mentioned gold to silver or the sum of copper, gold and element M becomes 50.0 atomic % to the area where the ratio of element M becomes 50.0 atomic %. Find the thickness of this area As the thickness of the intermediate metal layer 4.

Next, a method for manufacturing the gold-coated bonding wire 1 according to the embodiment will be described. In addition, the manufacturing method of the gold-coated bonding wire according to the embodiment is not particularly limited to the manufacturing method shown below. The gold-coated bonding wire 1 according to the embodiment is obtained, for example, by forming a layer containing gold as the main component on the surface of the wire containing silver or copper as the core material 2, thereby producing the wire. The raw materials are used, and the wire drawing process is performed to the required wire diameter of the gold-coated bonding wire 1, and then heat treatment is performed according to the needs. In addition, the gold-coated bonding wire 1 having the intermediate metal layer 4 is obtained, for example, by sequentially forming layers as the intermediate metal layer 4 and The layer containing gold as the main component is used to make the raw material of the wire, and the wire drawing process is performed to the required wire diameter of the gold-coated bonding wire 1, and then heat treatment is performed according to the needs.

When silver or copper is used as the core material 2, silver or copper of a predetermined purity is dissolved. When silver alloy or copper alloy is used, silver of a predetermined purity is dissolved together with additive elements, or silver of a predetermined purity is dissolved. The copper is dissolved together with the added elements, whereby a silver core material or a copper core material is obtained. The dissolution system uses heating furnaces such as arc heating furnaces, high-frequency heating furnaces, resistance heating furnaces, and continuous casting furnaces. In order to prevent oxygen and hydrogen from the atmosphere from being mixed in, the silver melt bath or copper melt bath in the heating furnace is preferably maintained in a vacuum or an inactive gas environment such as argon or nitrogen. The dissolved core material is solidified by continuous casting from the heating furnace into a predetermined wire diameter, or the molten core material is cast in a mold to produce an ingot, and then the ingot is cast. Perform roll calendering. Heat treatment is performed according to demand, and the wire is stretched to a predetermined wire diameter to obtain silver wire or copper wire (including silver alloy wire and copper alloy wire).

As a method of forming the gold layer or the intermediate metal layer 4 on the surface of the silver wire or copper wire, for example, a plating method (wet method) or a vapor deposition method (dry method) is used. The plating method may be either an electroplating method or an electroless plating method. Electroplating such as impact plating or flash plating has fast plating speed, and if applied to gold plating, good adhesion of the gold layer to silver or copper wires can be obtained. In the plating method, in order to make the gold layer or as a middle The palladium layer, platinum layer or nickel layer of the intermetal layer 4 contains additive elements. For example, in the above-mentioned electroplating, the plating solution used in the gold plating solution or the constituent elements of the intermetal layer 4 contains plating additives containing the additive elements. plating solution. At this time, by adjusting the type and amount of the plating additive, the amount of added elements in the coating layer 3 and the intermediate metal layer 4 can be adjusted.

As the evaporation method, physical evaporation (PVD) such as sputtering, ion implantation, and vacuum evaporation, or chemical evaporation (CVD) such as thermal CVD, plasma CVD, and metal organic vapor deposition (MOCVD) can be used. ). If this method is used, there is no need to clean the gold coating layer or the intermediate metal layer after formation, and there is no concern about contaminating the surface during cleaning. As a method of adding additive elements to a gold layer or a palladium layer, a platinum layer or a nickel layer as the intermediate metal layer 4 by evaporation, there is a method of using a gold target containing an additive element or a target constituting material of the intermediate metal layer 4. A method of forming a gold layer or an intermediate metal layer by magnetron sputtering, etc. When other methods are used, it is sufficient to use raw materials in which the gold material or the constituent material of the intermediate metal layer 4 contains the desired additive element.

In addition, as another method, there is also a cladding manufacturing method in which a tubular container is formed from a pre-coated material and a core material is inserted into the tubular container.

The processing rate of the wire drawing process is determined according to the final wire diameter and use of the gold-coated bonding wire 1 to be produced. Generally speaking, the processing rate of the wire drawing process is the processing rate of processing the coated silver wire or copper wire to the final wire diameter, and it is preferably 90% or more. This processing rate can be calculated as the reduction rate of the line cross-sectional area. For wire drawing processing, it is best to use multiple diamond dies to reduce the wire diameter in stages. In this case, the reduction rate (processing rate) of each diamond die is preferably 5% or more and 15% or less.

After the silver wire or copper wire covered with the gold layer and the material layer constituting the intermediate metal layer 4 is drawn to the final wire diameter, it is preferable to perform a final heat treatment. The final heat treatment is performed by considering the strain-removing heat treatment to remove the strain of the metal structure remaining inside the wire 1 at the final wire diameter and the necessary wire characteristics. For strain removal heat treatment, it is better to consider the necessary wire characteristics, especially the compressive stress of wire 1, to determine the temperature and time. In addition, heat treatment according to the purpose can also be implemented at any stage of online manufacturing. Examples of such heat treatment include strain-removing heat treatment during wire drawing, diffusion heat treatment to improve adhesion after forming a gold layer or a material layer constituting the intermediate metal layer 4 , and the like. By performing diffusion heat treatment, the adhesion between the core material 2 and the coating layer 3 can be improved. The heat treatment is preferably a traveling heat treatment in which the wire is passed through a heating environment heated to a predetermined temperature to perform heat treatment, because it is easy to adjust the heat treatment conditions. In the case of traveling heat treatment, the heat treatment time is calculated from the passing speed of the wire and the passing distance of the wire in the heating device. As a heating device, an electric furnace or the like is used. To suppress wire surface oxidation, it is also effective to flow inert gases such as N ₂ and Ar and to heat the wire surface. If necessary, use a reducing gas mixture of N ₂ and H ₂ .

In the above-mentioned manufacturing steps of the gold-coated bonding wire 1, the composition of the metal material (silver-based material or copper-based material) constituting the core material 2 is determined by the composition and thickness of the coating layer 3 and the intermediate metal layer 4 formed as required. , the wire diameter of the bonding wire 1, etc., by appropriately controlling the manufacturing conditions such as heat treatment conditions, a compressive stress of 290MPa or more and 590MPa or less can be obtained. For example, the core material 2 is preferably made of a silver alloy or a copper alloy, and the compressive stress tends to become higher as the amount of added elements in the silver alloy or copper alloy increases. In addition, the thicker the thickness of the coating layer 3, the lower the compressive stress tends to be. Furthermore, the core material 2 using a copper alloy tends to have a higher compressive stress than the core material 2 using a silver alloy.

It is preferable to select the heat treatment conditions based on the tendency of compressive stress based on the constituent materials of the gold-coated bonding wire 1 and the like. Heat treatment is preferably carried out in two stages: an intermediate stage and a final stage. Regarding the final heat treatment, the higher the temperature, the lower the compressive stress tends to be. Regarding intermediate heat treatment, the higher the temperature, the lower the compressive stress. From these viewpoints, when using a material that tends to exhibit high compressive stress as a constituent material, it is preferable to set the intermediate heat treatment temperature to 400°C or higher. Below 600°C, the heat treatment time is set to 0.2 seconds to 20 seconds. When using a material that tends to exhibit low compressive stress as a constituent material, it is preferable to set the intermediate heat treatment temperature to 200°C or more and less than 400°C, and to set the heat treatment time to 0.2 seconds or more and 20 seconds or less. Furthermore, when using a material that tends to exhibit high compressive stress as a constituent material, it is preferable to set the final heat treatment temperature to 350°C or more and 650°C or less, and to set the heat treatment time to 0.01 second or more and 5 seconds or less. When using a material that tends to exhibit low compressive stress as a constituent material, it is preferable to set the final heat treatment temperature to 150°C or more and 350°C or less, and to set the heat treatment time to 0.01 second or more and 5 seconds or less.

In addition, even if the heat treatment conditions are the same, the compressive stress may be affected depending on the structure of the heat treatment device and the type and amount of added elements in the core material. In this regard, in the manufacturing step of the gold-coated copper bonding wire of this embodiment, the compressive stress of the wire can be controlled by adjusting the elongation during heat treatment in the final heat treatment. When the wire is made of a core material containing copper as the main component, the elongation is preferably adjusted to 5.0% or more and 20.0% or less, more preferably 8.0% or more and 20.0% or less. When a core material containing silver as a main component is used as a constituting thread, the elongation is preferably adjusted to 1.5% or more and 15.0% or less, more preferably 2.0% or more and 11.0% or less.

The elongation is the value obtained from the tensile test of the bonded wire. Elongation can be measured in accordance with JIS-Z2241 or JIS-Z2201. For example, when a tensile test device (for example, Autocom manufactured by TSE Co., Ltd.) is used to stretch a bonding line with a length of 10 cm at a speed of 20 mm/min and a load cell of 2 N, the ratio of the stretched length to breakage is calculated. . Taking into account the unevenness of the measurement results, it is expected that the average of the five measurements will be calculated as the elongation rate.

Additional explanation for the above. Originally, in order to adjust to the target compressive stress range of the final product, ideally, the final heat treatment conditions are adjusted while measuring the compressive stress. However, from the perspective of achieving simplification of the manufacturing process, the approximate compressive stress is Standard, easy to use and measure The elongation of the line is used as a substitute. Of course, controlling the elongation is not necessarily limited to the range adjusted to the target compressive stress.

(semiconductor device)

Next, a semiconductor device using the gold-coated bonding wire 1 according to the embodiment will be described with reference to FIGS. 6 to 8 , 11 and 12 . In addition, FIG. 6 is a cross-sectional view showing the semiconductor device of the embodiment before resin sealing, FIG. 7 is a cross-sectional view of the semiconductor device of the embodiment after resin sealing, and FIG. 8 is a cross-sectional view of the semiconductor device of the embodiment. Cross-sectional view of the wedge-shaped bonding portion of the gold-coated bonding wire 1 bonded to the electrodes of the semiconductor wafer. 11 and 12 are cross-sectional views showing modifications of the semiconductor device according to the embodiment.

The semiconductor device 10 of the embodiment (semiconductor device 10X before resin sealing), as shown in FIGS. 6 and 7 , includes a circuit board 12 having electrodes (substrate electrodes) 11; and a plurality of semiconductor wafers 14 (14A, 14B, 14C), arranged on the circuit substrate 12, each having at least one electrode (wafer electrode) 13; and a bonding wire 15 (gold-coated bonding wire 1), connecting the electrode 11 of the circuit substrate 12, the electrode 13 of the semiconductor chip 14 and a plurality of The electrodes 13 of the semiconductor wafer 14 are connected to each other. The circuit board 12 is, for example, a printed wiring board or a ceramic circuit board in which a wiring network is provided on the surface and inside an insulating base material such as a resin material or a ceramic material, and electrodes connected to the wiring network are provided on the surface.

In addition, although FIGS. 6 and 7 show the semiconductor device 10 in which a plurality of semiconductor wafers 14 are mounted on the circuit board 12, the structure of the semiconductor device 10 is not limited to this. For example, the semiconductor chip may be mounted on a lead frame. In this case, the electrodes of the semiconductor chip are connected to inner leads through bonding wires 15 , and the inner leads function as internal terminals (electrodes) of the lead frame. The number of semiconductor wafers 14 mounted on the circuit board 12 or the lead frame may be one or a plurality. The bonding wire 15 is used to connect the electrode 11 of the circuit substrate 12 and the electrode 13 of the semiconductor chip 14, and the electrical connection between the lead frame and the semiconductor chip. A wedge bonding is performed in at least one of these connections (two electrodes). As will be described later, when a plurality of semiconductor wafers 14 are stacked in a stepped manner on the circuit board 12 or the lead frame and mounted, it is also possible to mount the semiconductor wafers 14 between the plurality of semiconductor wafers 14 and between the semiconductor wafers 14 and the circuit board 12 . One bonding wire 15 is wedge-bonded by CWB and continuously connected.

Among the plurality of semiconductor wafers 14 of the semiconductor device 10 shown in FIGS. 6 and 7 , the semiconductor wafers 14A and 14C are mounted on the chip mounting area of the circuit substrate 12 through a die bonding material 16 . The semiconductor wafer 14B is mounted on the semiconductor wafer 14A through a die bonding material 16 . One electrode 13 of the semiconductor chip 14A is connected to the electrode 11 of the circuit substrate 12 through the bonding wire 15, the other electrode 13 is connected to the electrode 13 of the semiconductor wafer 14B through the bonding wire 15, and the other electrode 13 is connected to the semiconductor chip 14C through the bonding wire 15. The electrode 13 is connected. The other electrode 13 of the semiconductor wafer 14B is connected to the electrode 11 of the circuit substrate 12 through the bonding wire 15 . The other electrode 13 of the semiconductor wafer 14C is connected to the electrode 11 of the circuit board 12 through the bonding wire 15 .

The semiconductor wafer 14 includes an integrated circuit (IC) made of silicon (Si) semiconductor, compound semiconductor, or the like. The wafer electrode 13 is composed of, for example, an aluminum electrode having an aluminum (Al) layer or an aluminum alloy layer such as AlSiCu or AlCu at least on the outermost surface. The aluminum electrode is formed, for example, by coating the surface of a silicon (Si) substrate with an electrode material such as Al or an Al alloy so as to be electrically connected to internal wiring. The semiconductor chip 14 performs data transmission with an external device through the substrate electrode 11 and the bonding wire 15, and supplies power from the external device.

The electrode 11 of the circuit substrate 12 is electrically connected to the electrode 13 of the semiconductor chip 14 mounted on the circuit substrate 12 through the bonding wire 15 . In the semiconductor device 10 of the embodiment, the bonding wire 15 is composed of the gold-coated bonding wire 1 of the embodiment. One end of a portion of the bonding wire 15 is on the wafer electrode 13 Ball bonding is performed on the upper end (first bonding), and wedge bonding (second bonding) is performed on the substrate electrode 11 on the other end. The ball bonding and the wedge bonding may be reversed, and the ball bonding (first bonding) may be performed on the substrate electrode 11 and the wedge bonding (second bonding) may be performed on the wafer electrode 13 . The same is true for connecting the electrodes 13 of a plurality of semiconductor wafers 14 with the bonding wire 15. One end of the bonding wire 15 is ball-bonded (first bonding) on the wafer electrode 13, and the other end is wedge-bonded (1st bonding) on the other wafer electrode 13. 2nd joint). In addition, the electrodes 13 of the semiconductor chip 14 that are electrically bonded with the bonding wires 15 also include bumps (not shown in the figure) that are bonded to the electrodes of the semiconductor chip 14 in advance.

For wire connection using the bonding wire 15, for example, one end of the bonding wire 15 is melted by discharge or the like, and solidified into a spherical shape by surface tension or the like to form an FAB. This FAB is placed on the electrode 13 of the semiconductor wafer 14. After ball bonding, the bonding tool (welded pipe) is lifted up to form a wire arc structure, and ultrasonic waves and a load are applied while the bonding wire 15 is pressed against the electrode 11 of the circuit board 12 to perform wedge bonding. As shown in FIG. 8 , after the wedge-shaped bonding portion 17 is formed on the substrate electrode 11 , the bonding wire 15 is torn off, thereby completing the connection at one point. The same is true for connecting the electrodes 13 of the semiconductor chip 14 (the electrodes 13 of different built-in chips) with the bonding wires 15 . Thereafter, a sealing resin layer 18 is formed on the circuit substrate 12 by resin-sealing the plurality of semiconductor wafers 14 and the bonding wires 15, thereby manufacturing the semiconductor device 10. Semiconductor devices include, specifically, logic ICs, analog ICs, discrete semiconductors, memories, optical semiconductors, and the like.

In the semiconductor device 10 of the embodiment, if the gold-coated bonding wire 1 used as the bonding wire 15 has a compressive stress of 290 MPa or more and 590 MPa or less, even if the bonding wire 15 is placed on the electrode 11 or the semiconductor that is not suitable for the circuit board 12 The electrodes 13 of the wafer 14, especially the bonding positions of the wafer electrodes 13, can be well wedge-bonded under a wide range of ultrasonic conditions or load conditions under conditions such as unsupported positions, so there is no risk to the semiconductor wafer. 14 Causes damage, resulting in a stable wedge Joint strength. In addition, since the wedge width can be controlled within an appropriate range, short circuits and the like between electrodes whose pitch has been narrowed can be suppressed. This makes it possible to provide a semiconductor device in which the reliability of the connection between the electrodes of the bonding wires 15 and the electrodes is improved.

Next, another semiconductor device 10 will be described with reference to FIGS. 11 and 12 . The semiconductor device 10 shown in FIG. 11 has four semiconductor wafers 14A, 14B, 14C, and 14D stacked on a circuit substrate 12 in multiple stages. These semiconductor wafers 14A, 14B, 14C, and 14D are stacked in a stepped shape such that the respective electrodes 13 are exposed. The electrodes 13 of the semiconductor wafers 14A, 14B, 14C, and 14D and the electrode 11 of the circuit board 12 are continuously connected by a bonding wire 15 . That is, the four electrodes 13 and the substrate electrode 11 are connected by one bonding wire 15 via CWB. In addition, arrows indicate the joining direction.

Specifically, the bonding wire 15 held by the bonding tool (welded pipe) is first wedge bonded on the electrode 13 of the uppermost semiconductor wafer 14D. Next, without tearing the bonding wire 15 , the bonding tool (welded pipe) is lifted up to form a wire arc structure, and the bonding wire 15 is moved to the electrode 13 of the semiconductor wafer 14C to perform wedge bonding. Similarly, without tearing the bonding wire 15 , the bonding wire 15 is wedge-bonded to the electrode 13 of the semiconductor wafer 14B and the electrode 13 of the semiconductor wafer 14A in sequence. After sequentially wedge-bonding the bonding wires 15 on the electrodes 13 of the semiconductor wafers 14D, 14C, 14B, and 14A, the bonding wires 15 are wedge-bonded on the electrodes 11 of the circuit substrate 12 in the same manner, and then the bonding wires 15 are cut off. In this way, the electrodes 13 of the semiconductor wafers 14A, 14B, 14C, and 14D and the electrode 11 of the circuit board 12 are continuously connected by one bonding wire 15 without breaking the bonding wire 15 in the process.

The above-mentioned four wafer electrodes 13 and the substrate electrode 11 are continuously wedge-bonded and electrically connected with one bonding wire 15. This can reduce the number of ball formations and the number of wire breaks, so a high bonding speed can be achieved. ation and improve productivity based on this speedup. When performing continuous wedge bonding, the wedge bondability of the bonding wire 15 becomes important. At this point, because the use of more than 290MPa The gold-coated bonding wire 1 with a compressive stress of 590 MPa or less can be used as the bonding wire 15 to improve the bonding properties to the electrodes 13 and 11 in continuous wedge bonding. Therefore, the wafer electrode 13 can be wedge-bonded favorably under a wide range of bonding conditions without causing damage to the semiconductor wafer 14 . Therefore, the productivity and reliability of the semiconductor device 10 using CWB can be improved.

Wire bonding using CWB is not limited to the structure shown in Figure 11. For example, as shown in FIG. 12 , the bonding wire 15 can also be ball-bonded to the substrate electrode 11 of the lowermost circuit board 12 to form the ball bonding portion 19 without tearing the bonding wire 15 , and sequentially connect the bonding wire 15 to the semiconductor. The electrodes 13 of the wafers 14A, 14B, 14C, and 14D are wedge-bonded, and then the bonding wires 15 are cut. In the semiconductor device 10 applying this CWB, the continuous wedge bonding property can also be improved based on the effect of improving the wedge bonding property of the bonding wire 15, thereby improving the productivity and reliability of the semiconductor device 10 applying the CWB. The arrow indicates the joining direction.

In the semiconductor device 10 of the embodiment, when two electrodes are connected with the bonding wire 15, it is only necessary to perform wedge bonding on at least one electrode, whereby the gold-coated bonding wire 1 of the embodiment can be used to improve wedge bonding. This can improve the joint strength and joint reliability of wedge joints. However, in order to more effectively exert the effect of improving the wedge bonding properties of the gold-coated bonding wire 1 of the embodiment, it is ideal that at least one of the two electrodes connected by the bonding wire 15 is the electrode 13 of the semiconductor wafer 14 , it is ideal for the semiconductor device 10 in which the wafer electrodes 13 are wedge-bonded. In particular, the semiconductor device 10 of the embodiment, as shown in FIGS. 11 and 12 , is suitable for a semiconductor device using CWB for wire bonding. In this case, good wedge bonding properties and the resulting bonding properties can be more effectively exerted. Good joint strength and joint reliability are achieved.

[Example]

Next, embodiments of the present invention will be described. The present invention is not limited to the following examples.

(Manufacturing methods and properties of embodiments)

Prepare the core material shown in Table 1, and process it by continuous wire drawing to an intermediate wire diameter of 0.2~0.5mm. Then, in a gold plating bath, while continuously feeding the core material, immerse it with a current density of 0.15~2.00 A current of A/dm ² forms a gold coating layer.

Regarding Examples 16 to 19, 21, and 31 to 36, before forming the gold coating layer, the intermediate layer shown in Table 1 was formed using the same electroplating method. Examples 1 to 19 performed intermediate wire drawing processing until the intermediate wire diameter was φ 38 μm to 100 μm, and Examples 22 to 36 performed intermediate wire drawing processing to φ 50 μm to 200 μm. The intermediate heat treatment temperatures (electric furnace settings) shown in Table 1 temperature) and wire feeding speed of 0.20~1.00m/second for heat treatment. The heat treatment is about 0.5 to 3 seconds when converted into time. Thereafter, each wire was drawn to the final wire diameter shown in Table 1. The heat treatment temperature and wire feeding speed were adjusted to target the elongation rate shown in Table 1, and final heat treatment was performed. In this way, the gold-coated bonding wires of Examples 1 to 34 were produced.

For these completed gold-coated bonding wires, the compressive stress and Vickers hardness of the core material cross section were measured using the above method. The results are shown in Table 1. The gold-coated bonding wire thus obtained was subjected to characteristic evaluation described below.

(Manufacturing method and properties of comparative example)

Comparative examples will be described. Comparative Examples 1 to 6 and 11 to 18 show bonding wires having compressive stress outside the range of the present invention, and Comparative Examples 10, 19 and 20 show bonding wires having a coating layer other than gold. In addition, Comparative Examples 7 to 9 show bonding lines in which no coating layer is formed. Except for the above changes, the bonding wires of Comparative Examples 1 to 20 were basically produced using the same manufacturing method as the Examples. The same as in the Example, the compressive stress of these bonding wires and the Vickers hardness of the core material cross section were measured using the above method, and the results are shown in Table 1. The bonding wire thus obtained was subjected to characteristic evaluation described below.

(Evaluation of wedge bonding properties of Examples and Comparative Examples)

The evaluation of wedge bonding of the samples prepared above will be described. There are two types of objects for wedge bonding: electrodes on circuit boards and electrodes on wafers. Details will be described later, but the following three types of evaluations are performed as evaluation items: whether defects occur during continuous bonding (continuous bonding properties), whether bonding is reliable (bonding strength), and whether the wafer is damaged. The evaluation results are shown in Table 1 and Table 2. Among them, the wafer damage evaluation is only performed on the precision and easily damaged wafer electrodes.

(Jointing energy for wedge joint evaluation)

As mentioned above, especially when wedge-bonding the electrodes of multi-stage laminated wafers with bonding wires, the bonding must be reliable and the wafer will not break depending on the bonding position or location. Therefore, a wide range of different bonding conditions are required. As an indicator of the adaptability of the measurement line, bonding energy is suitable as an evaluation method. Therefore, it was confirmed whether the above three evaluation items can be passed without any problem even if the conditions of bonding energy are widely changed.

The bonding energy generally depends on the wire pressing rate. For example, in order to greatly press the wire, it is necessary to increase the load pressure, load time, ultrasonic and other conditions for the wire. Here, the bonding energy is divided into three levels based on the pressing ratio ((thickness of the pressed wire/wire diameter before pressing)×100) (%) relative to the wire diameter. That is, a wire pressing rate of 47% to 53% is defined as low bonding energy, a wire pressing rate of 57% to 63% is defined as medium bonding energy, and a wire pressing rate of 67% to 73% is defined as high bonding energy. These bonding energy conditions are adjusted by a bonding device (IConn PLUS manufactured by Kulicke & Soffa).

As mentioned above, there are two types of wedge bonding: circuit substrate electrodes and wafer electrodes. For wedge bonding of circuit substrate electrodes, the lower support is reliable. Compared with wafer electrodes, the bonding environment is not significantly different, so here we only use the Evaluate wedge bonding properties under conditions of high bonding energy. the other party Since the wafer electrodes are likely to be forced into various bonding environments, the wedge bonding properties are evaluated under three levels of bonding energy: low, medium, and high.

Furthermore, in order to more rigorously simulate the severe bonding environment that is close to the installation level of continuous wedge bonding of precision multi-segment layer wafer electrodes, the wafer used in Table 1 adopts a method to reduce the adhesion of the Al electrode compared to ordinary wafers. By. The cross-sectional structure of this wafer has an insulating film (SiO ₂ film) on a Si substrate, and an Al film is formed on the SiO ₂ film. On the other hand, the cross-sectional structure of a general wafer has an insulating film (TEOS: tetraethoxysilane) on a Si substrate, and a TiN layer is provided between the insulating film and the Al electrode, so that the adhesion of the Al electrode is improved. Construct. By using this wafer, there are situations and conditions in which wafer damage or wafer electrode (pad) damage (a phenomenon in which the Al electrode peels off from the wafer during the wiring operation after wedge bonding) is likely to occur. In addition, the thickness of the electrode is 0.8 μm, and the material of the electrode is Al-0.5%Cu or Al-1%Si-0.5%Cu.

(Continuous bonding properties of wedge bonding on substrate electrodes)

The wedge bonding properties on the substrate electrode were evaluated by continuous line bonding between the wafer electrode and the substrate electrode (lead frame). The wedge bonding conditions were based on the above-mentioned high bonding conditions, and 36 cycles × 2 sets of 72 wedge bondings were performed on the Ag-plated lead frame. One cycle here refers to the process from bonding the sphere on the wafer electrode to wedge bonding on the frame and tearing off the wire. This cycle is performed continuously for 36 times and 2 sets are performed. During a total of 72 times of bonding, the device did not stop due to problems such as failure of the wedge bonding portion or disconnection, and the continuous bonding property was marked as "◎". If the device stops less than 2 times due to a defective wedge joint, it can be improved in the mass production step and marked as "○". If the device is stopped twice or more, it is considered defective and marked with "×".

(Tensile test on substrate electrode = joint strength evaluation)

For the specimens wedge-joined by this wire bonding, use a bonding strength testing machine (for example: Bond tester 4000 model manufactured by Dage Corporation), hang a hook near the wedge-joint of the specimen, and select from the specimens that were wedge-jointed under these conditions. Randomly select 20 wires and perform a tensile test to confirm whether there is peeling (one of the breaking modes). The setting conditions of the bonding strength testing machine are Load Cell WP100, measurement range 50%, and test speed 250 μm/min. In the breaking mode of the tensile test, if the wire at the joint portion does not peel off from the substrate, it is considered good and is marked as "◎". If the number of occurrences of peeling is less than 3, it can be improved in the mass production step, and is marked as "○". If the number of peeling occurs is 3 or more, it is considered defective and marked as "×". In addition, if the tensile strength is less than 2gf, only one occurrence is considered defective and marked as "×".

(Wedge-shaped bonding and continuous bonding on wafer electrodes)

This evaluation used a device that mounted this wafer on an Ag-plated lead frame. Using the CWB method, 360 continuous wedge bondings (10 strips/cycle × 36 cycles) were performed on this wafer. In one cycle, the wedge bonding conditions (three levels of low bonding energy, medium bonding energy, and high bonding energy) are set, and each cycle has 3 wedge bonding conditions/wedge bonding conditions × 3 levels of wedge bonding (initially the 1st The joints are performed by spherical joints, so the number of wedge joints in one cycle is 9). Therefore, the number of wires bonded at each level per wafer is 108 (number of wedge bonding 108 bonding = 3 lines × 36 cycles). The shape of the welded pipe used for wedge joining is H diameter: 1.2~1.3 times the wire diameter, CD diameter: 1.5~1.8 times the wire diameter, T: 3.5~3.8 times the wire diameter, FA: 0°, OR diameter: 4~ 12μm, using surface processing Matte specification. The device was not stopped due to defects such as non-adhesion of the wedge-jointed portion, peeling off of the Al film, wire breakage, etc., and the continuous bonding properties of the wedge-shaped bonding were good at each bonding energy, which is marked as "◎". For each bonding energy, if the number of times the device stops due to defects in the wedge-shaped bonding portion is less than 5 times, it can be improved in the mass production step, and is marked as "○". When the number of stops of the device is 5 or more times, the wedge bonding performance in the bonding energy is poor and is marked as "×".

(Tensile test on wafer electrode = joint strength evaluation)

For the sample produced by wedge bonding on this wafer, 20 lines were randomly selected from 108 lines for each bonding energy condition, and were tested using a bonding strength testing machine (one example: Bond tester 4000 model manufactured by Dage Corporation). A tensile test is performed by hanging a hook on the sample and stretching it to confirm the breaking mode. The setting conditions of the bonding strength testing machine are Load Cell WP100, measurement range 50%, and test speed 250 μm/min. In the breaking mode of the tensile test, the wires at the joint portion were not peeled off from the wafer electrode, and the wedge joint strength was good at this joint energy, which is marked as "◎". If the number of occurrences of peeling is less than 3, it can be improved in the mass production step, so it is marked as "○". When the number of peelings occurs is three or more, the wedge bonding strength in the bonding energy is poor, and is marked as "×".

(Wafer damage evaluation)

In this evaluation, a device was used that mounted the wafer on an Ag-plated lead frame. On the wafer, 64 lines (16 lines/cycle × 4 groups) of continuous bonding were performed using the CWB method. In one cycle, the wedge-shaped bonding conditions (three levels of low bonding energy, medium bonding energy, and high bonding energy) are set, and each cycle is divided into 3 bonding energy levels in units of 5 (same as above, initially The first joint is a ball joint, so the total number of wedge joints is 15). For each wafer, there are 20 wires bonded at each level (number of wedge bonding 20 bonding = 5 lines × 4 groups). The welded pipes used for wedge joints shall be the same as those in paragraph [0095].

After bonding, in order to dissolve the wafer electrode and expose the bottom layer of the wafer, the wedge-bonded sample was immersed in a sodium hydroxide aqueous solution for about 30 minutes. After confirming that the line was peeled off from the wafer, it was washed with pure water, washed with alcohol, and dried. After cleaning the sample in the following order, a total of 10 joints at each joint energy level were randomly observed using an optical microscope on the bottom layer (Si or SiO ₂ ) of the exposed wafer. When there are no cracks in the pad (wafer electrode), the wedge bonding properties are good at this bonding energy, and are marked as "◎". If only one gasket crack occurs, the wedge bonding performance in the bonding energy is considered to be poor, and is marked as "×".

Regarding the wedge bonding properties in Tables 1 and 2, if any of the above-mentioned evaluation items of continuous bonding property, bonding strength, and wafer damage has a defective "×", it is estimated that it cannot support continuous wedge bonding in a multi-stage laminated structure. , it is unqualified in the comprehensive evaluation. In addition, those who do not have an "×" evaluation will be deemed to have passed the comprehensive evaluation.

As can be seen from Table 2, the gold-coated bonding wire has a compressive stress of less than 290MPa or more than 590MPa, regardless of whether the silver core material is used (Comparative Examples 1 to 6) or the copper core material is used (Comparative Examples 11 to 11). In 18), the wedge bonding properties are not good either on the substrate electrode or on the wafer electrode. Furthermore, it was found that the wedge bonding performance on the substrate electrode or the wafer electrode was not good in bonding wires without a gold coating layer and in bonding wires covered with a coating layer other than gold. In particular, all the bonding wires of the comparative example had at least one defective "×" in any of the evaluations of continuous bonding, tensile force testing, and chip damage. Therefore, it is considered that these wires cannot overcome the problem of continuous multi-segment wedge-shaped wires. Technical issues regarding the bonding wire in bonded CWB.

On the other hand, as shown in Table 1, it can be seen that the gold-coated bonding wires of Examples 1 to 36 having a compressive stress of 290 MPa to 590 MPa have excellent wedge bonding properties on both the substrate electrode and the wafer electrode. Especially in the wedge bonding evaluation on the wafer electrode, the bonding energy is low even when mixed. middle. Among the three highest levels of wedge bonding conditions, the continuous bonding properties, tensile test, and chip damage evaluations were all good. In conclusion, sufficient results can be obtained to overcome the invisible (bonding line) in CWB. technical issues in.

According to the present invention, in particular, it is possible to provide a bonding wire that responds to the opposing market demands for large-capacity memory and miniaturization represented by semiconductor memories and suppresses material costs and production costs. Therefore, it is considered that it can contribute to the development of the semiconductor industry, electronics industry, etc. has made a huge contribution.

1: Gold coated bonding wire

2: Core material

3:Coating layer

D: diameter

Claims (15)

A gold-coated bonding wire has a core material containing silver or copper as a main component, and a coating layer provided on the surface of the core material and containing gold as a main component, wherein in the gold-coated bonding wire, the film thickness of the coating layer is 5 nm The thickness is 200nm or less and the compressive stress when the wire diameter is deformed by 60% is 290MPa or more and 590MPa or less. The gold-coated bonding wire of claim 1, wherein the Vickers hardness (Hv) in the cross-section of the core material is 40 or more and 80 or less. The gold-coated bonding wire of claim 1, wherein the core material is composed of a silver alloy containing 97% by mass or more of silver, and the amount is 1 mass ppm or more and 3 mass% or less based on the amount of the entire wire. The range includes at least one metal selected from the group consisting of copper, calcium, phosphorus, gold, palladium, platinum, nickel, rhodium, indium and iron. The gold-coated bonding wire of Claim 1, wherein the core material is composed of a copper alloy containing 98 mass % or more of copper, and the content is 1 mass ppm or more and 2 mass % or less relative to the entire amount of the wire. The range includes at least one metal selected from the group consisting of phosphorus, gold, palladium, platinum, nickel, silver, rhodium, indium, gallium and iron. The gold-coated bonding wire according to any one of claims 1 to 4, wherein the wire diameter of the gold-coated bonding wire is 13 μm or more and 35 μm or less. The gold-coated bonding wire of any one of claims 1 to 4, further having an intermediate metal layer disposed between the core material and the coating layer, the intermediate metal layer being selected from the group consisting of palladium, platinum and nickel. One metal in the group serves as the main component. The gold-coated bonding wire of claim 6, wherein the intermediate metal layer has a thickness of less than 60 nm. The gold-coated bonding wire according to any one of claims 1 to 4, which is used for semiconductor memory. A method of manufacturing a gold-coated bonding wire, which has a core material containing silver or copper as a main component, and a coating layer provided on the surface of the core material and containing gold as a main component, wherein the coating of the gold-coated bonding wire is The film thickness of the layer is not less than 5 nm and not more than 200 nm, and the compressive stress is not less than 290 MPa and not more than 590 MPa when the wire diameter is deformed by 60%. A semiconductor wire bonding structure having a gold-coated bonding wire, an electrode of a semiconductor wafer, and a wedge-shaped bonding portion where the wire and the electrode are bonded. The gold-coated bonding wire has a core material containing silver or copper as a main component and gold as the main component. The coating layer as the main component, wherein in the gold-coated bonding wire, the film thickness of the coating layer is 5 nm or more and 200 nm or less, and the compressive stress when deformed by 60% relative to the wire diameter is 290 MPa or more and 590 MPa or less. The semiconductor wire bonding structure of claim 10 has two or more semiconductor wafers and more than two wedge-shaped bonding portions formed by sequentially connecting the electrodes of the two or more semiconductor wafers to the wires. The semiconductor wire bonding structure of claim 10 or 11 is used in a semiconductor memory. A semiconductor device including: one or a plurality of semiconductor wafers having at least one first electrode; a circuit substrate selected from a lead frame and a circuit substrate having at least a second electrode; and a gold-coated bonding wire selected from the semiconductor wafer. At least one of the first electrode and the second electrode of the circuit substrate and the first electrodes of the plurality of semiconductor chips are electrically connected; and a wedge-shaped joint portion is formed between the first electrode or the second electrode and The gold-coated bonding wire is bonded, wherein the gold-coated bonding wire has a core material containing silver or copper as a main component and a coating layer containing gold as a main component provided on the surface of the core material and having a film thickness of 5 nm to 200 nm. , The compressive stress when the gold-coated bonding wire is deformed by 60% relative to the wire diameter is 290 MPa or more and 590 MPa or less. The semiconductor device of claim 13, further comprising a plurality of semiconductor wafers each having at least one first electrode, the plurality of semiconductor wafers being stacked in such a manner that the first electrode is exposed, and the semiconductor device having the metal The two or more wedge-shaped bonding portions formed by the covered bonding wires sequentially connecting the first electrodes of the plurality of semiconductor chips. The semiconductor device of claim 13 or 14 is used in a semiconductor memory.

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