TWI781031B - Calibration method and electronic device thereto - Google Patents

Abstract

A calibration method correcting an output waveform is provided. The output waveform is detected. When the output waveform is changed from a first level to a second level, a timer is enabled. An input waveform is detected. When the input waveform is changed from a third level to a fourth level, the count-value of the timer is read. When the count-value is higher than a typical value, the duration of the output waveform being at the second level is reduced. When the count-value is less than a typical value, the duration of the output waveform being at the second level is increased.

Description

Calibration method and electronic device

The present invention relates to an electronic device, in particular to an electronic device using a digital addressable lighting interface (DALI).

A digital addressable lighting interface (DALI) is generally used in a lighting control system. A host device can turn on or off the remote lighting equipment, or adjust the brightness of the remote lighting equipment through DALI.

One embodiment of the present invention provides a calibration method for calibrating an output waveform. The calibration method includes: detecting the output waveform; when the output waveform changes from a first level to a second level, enabling a timer ;Detect an input waveform; when the input waveform changes from a third level to a fourth level, read the timer to obtain a count value; when the count value is greater than a standard value, reduce the output waveform to maintain at The time of the second level; when the count value is less than the standard value, increase the time for the output waveform to maintain the second level.

Another embodiment of the present invention provides an electronic device that communicates with a terminal device through a digital addressable lighting interface bus. The electronic device of the present invention includes a control circuit, a first input-output circuit, a conversion circuit and a second input-output circuit. The control circuit generates an output waveform. The first input-output circuit is used for outputting output waveforms. The conversion circuit converts the output waveform to generate a differential signal pair to the DILI bus, and converts a reply received by the DILI bus to generate an input waveform. The second input-output circuit receives the input waveform and provides the input waveform to the control circuit. When the output waveform changes from a first level to a second level, the control circuit enables a timer. When the input waveform changes from a third level to a fourth level, the control circuit reads the timer to obtain a count value. When the count value is greater than a standard value, the control circuit reduces the time for the output waveform to maintain the second level. When the count value is less than the standard value, the control circuit increases the time for the output waveform to maintain the second level.

The correction method of the present invention can be implemented through the electronic device of the present invention, which is hardware or firmware capable of executing specific functions, and can also be recorded in a recording medium through program code and combined with specific hardware to implement . When the program code is loaded and executed by the electronic device, processor, computer or machine, the electronic device, processor, computer or machine becomes an electronic device for implementing the present invention.

In order to make the purpose, features and advantages of the present invention more comprehensible, the following specifically cites the embodiments, together with the accompanying drawings, for a detailed description. The description of the present invention provides different examples to illustrate the technical features of different implementations of the present invention. Wherein, the arrangement of each element in the embodiment is for illustration, not for limiting the present invention. In addition, the partial repetition of the symbols in the figures in the embodiments is for the purpose of simplifying the description, and does not imply the relationship between different embodiments.

Fig. 1 is a schematic diagram of the control system of the present invention. As shown in the figure, the control system 100 includes a host device 110 , terminal devices 121 - 123 and a bus 130 . The host device 110 (or electronic device) is coupled to the bus 130 through a digital addressable lighting interface (digital addressable lighting interface; DALI) 141 to send a DALI message to a specific terminal device (such as 121) and receive a message from The reply for that specific end device.

The terminal device 121 has a DALI 142 . The DALI 142 is coupled to the bus 130 for receiving DALI messages from the host device 110 . When the DALI message sent by the host device 110 is directed to the terminal device 121, the terminal device 121 executes the command from the host device 110, such as adjusting light intensity or adjusting internal parameters. In some embodiments, the terminal device 121 sends a reply to the host device 110 through the DALI 142 . The present invention does not limit the type of the terminal device 121 . In a possible embodiment, the terminal device 121 may be a lighting device, a voltage conversion circuit, or a sensor.

The terminal device 122 has a DALI 143 . The DALI 143 is coupled to the bus 130 for receiving DALI messages from the host device 110 . The terminal device 123 has a DALI 144 . The DALI 144 is coupled to the bus 130 for receiving DALI messages from the host device 110 . Since the characteristics of the terminal devices 122 and 123 are the same as those of the terminal device 121 , details are not repeated here.

The present invention does not limit the types of the terminal devices 121 - 123 . In a possible embodiment, the terminal devices 121 - 123 are of the same type. For example, the terminal devices 121 - 123 are lighting equipment, voltage conversion circuits, or sensors. In another possible embodiment, the type of one of the terminal devices 121-123 may be the same as or different from that of the other terminal device 121-123. In this example, the terminal device 121 may be a lighting device, and the terminal device 122 is a sensor. In addition, the present invention does not limit the number of terminal devices. In other embodiments, the control system 100 has other numbers of end devices.

Fig. 2 is a schematic diagram of the host device of the present invention. The host device 200 includes a control circuit 210 , input and output circuits 220 , 230 and a conversion circuit 240 . In some embodiments, the architecture of the host device 200 can also be applied to the terminal devices 121 - 123 in FIG. 1 .

The control circuit 210 generates an output waveform TX. The input-output circuit 220 is used for outputting the output waveform TX. The conversion circuit 240 converts the output waveform TX to generate the differential signals DIF1 and DIF2. The differential signals DIF1 and DIF2 have the same amplitude but opposite phases. Therefore, the differential signals DIF1 and DIF2 constitute a differential signal pair.

In this embodiment, the conversion circuit 240 has a DALI 241 . The DALI 241 is used to output the differential signals DIF1 and DIF2 to the bus bar 130 . In a possible embodiment, the bus bar 130 may be called a DALI bus bar 130 . In other examples, the DALI 241 receives responses from the bus 130 , such as differential signals RES1 and RES2 . The conversion circuit 240 converts the return signals RES11 and RES2 to generate an input waveform RX. In this example, the reply signals RES11 and RES2 have the same amplitude but opposite phases.

The input-output circuit 230 receives the input waveform RX and provides the input waveform RX to the control circuit 210 . In a possible embodiment, the control circuit 210 detects the level changes of the output waveform TX and the input waveform RX to determine the delay time caused by the hardware components from the input-output circuit 220 to the bus 130 and the delay time from the input-output circuit 230 to the bus 130. The delay time caused by the hardware components of the bus 130 . In other embodiments, the control circuit 210, the input and output circuits 220 and 230 constitute a micro-controller unit (MCU).

FIG. 3A is a schematic diagram of the output waveform TX and the input waveform RX. At time point 310, the output waveform TX changes from a first level to a second level. Therefore, the control circuit 210 starts a timer. In this embodiment, the first level is a low level, and the second level is a high level. In other embodiments, the first level is a high level, and the second level is a low level.

In some embodiments, when the output waveform TX enters the conversion circuit 240 , the conversion circuit 240 converts the output waveform TX into differential signals DIF1 and DIF2 . Since the characteristics of the differential signals DIF1 and DIF2 are similar, only the differential signal DIF1 is shown in FIG. 3A . As shown in the figure, at the time point 310, the level of the differential signal DIF1 also changes, such as from a high level to a low level. In this example, before the time point 310, the phase of the differential signal DIF1 is reversed to the phase of the output waveform TX. In other embodiments, at the time point 310, the level of the differential signal DIF1 may change from a low level to A high standard. In this example, before the time point 310 , the phase of the differential signal DIF1 is the same as that of the output waveform TX.

A specific terminal device (such as 121 ) on the bus 130 provides reply signals RES1 and RES2 according to the differential signals DIF1 and DIF2 . The conversion circuit 240 converts the return signals RES1 and RES2 to generate the input waveform RX. The control circuit 210 detects the level change of the input waveform RX.

At time point 320 , the level of the input waveform RX is equal to a critical value, so the control circuit 210 captures the count value A of the timer. The count value A reflects the delay time of the input waveform RX caused by hardware when the differential signal DIF1 changes from a high level to a low level. For example, the count value A is the delay time caused by hardware components between the bus bar 130 and the input-output circuit 230 (or 220 ).

At time point 330, the level of the input waveform RX changes from a third level to a fourth level, so the control circuit 210 captures the count value B (or called the first value) of the timer. The count value B can approximately reflect the phase change time of the differential signal DIF1. In this embodiment, the third level is a high level, and the fourth level is a low level. In other embodiments, the third level is a low level, and the fourth level is a high level. In addition, before the time point 310, the level of the input waveform RX is the same as the level of the output waveform TX, but this is not intended to limit the present invention. In other embodiments, before the time point 310, the level of the input waveform RX may be different from the level of the output waveform TX. For example, before the time point 310, the input waveform RX is at a high level, or the output waveform TX is at a high level.

In this embodiment, the control circuit 210 controls the time during which the output waveform TX is maintained at the second level (such as the high level) according to a set value H_TIME. In this example, when the count value B is greater than a standard value, the control circuit 210 decreases the setting value H_TIME. Therefore, the time during which the output waveform TX is maintained at the second level becomes shorter. When the count value B is less than the standard value, the control circuit 210 increases the set value H_TIME. Therefore, the time for the output waveform TX to be maintained at the second level becomes longer.

In some embodiments, the control circuit 210 subtracts the count value A from the set value H_TIME to obtain a delay value C. The delay value C reflects the time delay of the differential signal DIF1 caused by hardware when the output waveform TX changes from the second level (high level) to the first level (low level). For example, the delay value C is the delay time caused by the hardware components between the bus bar 130 and the input-output circuit 220 (or 230 ). In other embodiments, the control circuit 210 subtracts the set value H_TIME from the count value B to know the differential signal when the output waveform TX changes from the second level (high level) to the first level (low level). DIF1 is the delay time caused by hardware.

FIG. 3B is another schematic diagram of the output waveform TX and the input waveform RX. FIG. 3B is similar to FIG. 3A, except that the output waveform TX of FIG. 3B is inverted from the output waveform TX of FIG. 3A. In this embodiment, before the time point 340 , the phase of the output waveform TX is the same as that of the differential signal DIF1 , and the phase of the input waveform RX is reversed.

At time point 340, the output waveform TX changes from a first level to a second level. Therefore, the control circuit 210 starts a timer. In this embodiment, the first level is a high level, and the second level is a low level. At time point 340, the level of the input waveform RX gradually rises.

At time point 350 , the level of the input waveform RX is equal to a critical value, so the control circuit 210 captures the count value D of the timer. At time point 360 , the level of the input waveform RX changes from a third level to a fourth level, so the control circuit 210 captures the count value E of the timer. Since the characteristics of the count values D and E are the same as those of the count values A and B, they will not be described again. In this embodiment, the third level is a high level, and the fourth level is a low level.

The control circuit 210 adjusts a set value L_TIME according to the count value E. For example, when the count value E is greater than a standard value, the control circuit 210 decreases the set value L_TIME. Therefore, the time for the output waveform TX to be maintained at the second level (such as the low level) becomes shorter. When the count value E is smaller than the standard value, the control circuit 210 increases the set value L_TIME. Therefore, the time for the output waveform TX to be maintained at the second level becomes longer. In some embodiments, the control circuit 210 can obtain a delay value F after subtracting the count value D from the set value L_TIME. Since the characteristics of the delay value F are the same as those of the delay value C, details will not be repeated here. In other embodiments, the control circuit 210 subtracts the set value L_TIME from the count value E, so as to know when the output waveform TX changes from the second level (low level) to the first level (high level). The delay time of signal DIF1 caused by hardware.

FIG. 3C is another schematic diagram of the output waveform TX and the input waveform RX. Figure 3C is similar to Figure 3A, except that the time during which the output waveform TX in Figure 3C is maintained at the second level (such as a high level) is the time during which the output waveform TX in Figure 3A is maintained at the second level twice as much.

At time point 370, the output waveform TX changes from a first level to a second level. Therefore, the control circuit 210 starts a timer. At time point 380 , the level of the input waveform RX is equal to a critical value, so the control circuit 210 captures the count value G of the timer. At time point 390 , the level of the input waveform RX changes from a third level to a fourth level, so the control circuit 210 captures the count value I of the timer. Since the characteristics of the count values G and I are the same as those of the count values A and B, they will not be described again.

In this embodiment, the control circuit 210 sets the output waveform TX to maintain at the second level according to the set value H_TIME. At time point 385 , the control circuit 210 sets the output waveform TX to maintain at the second level according to the same set value H_TIME. In this example, the control circuit 210 adjusts a setting value H_TIME according to the count value I.

For example, when the count value I is greater than a standard value, the control circuit 210 decreases the setting value H_TIME. Therefore, the time during which the output waveform TX is maintained at the second level (such as the high level) becomes shorter. When the count value I is less than the standard value, the control circuit 210 increases and sets HL_TIME. Therefore, the time for the output waveform TX to be maintained at the second level becomes longer. In some embodiments, the control circuit 210 can obtain a delay value K after subtracting the count value G from the set value H_TIME. Since the characteristic of the delay value K is the same as that of the delay value C in FIG. 3A , it will not be repeated here. In other embodiments, the control circuit 210 subtracts twice the set value H_TIME from the count value I to know when the output waveform TX changes from the second level (high level) to the first level (low level). , the delay time of the differential signal DIF1 caused by hardware.

Fig. 4 is a schematic diagram of the DALI message of the present invention. As shown in the figure, in a DALI message (DALI frame), each bit of data is composed of two bits. For example, the bit data BT _i includes a high level HV1 and a low level LV1 for representing a first value, such as 0. The bit data BT _i-1 includes a low level LV2 and a high level HV2 for representing a second value, such as 1. The bit data BT _i-2 includes a high level HV3 and a low level LV3 for representing the first value.

The high voltage levels HV1~HV3 are all the same, about 10~22V. Low level LV1~LV3 are the same, about 0V. In this embodiment, the respective durations of the high level HV1 and the low level LV1 are referred to as half-bit times HTM. The bit time BTM of the bit data BT _i is twice the half bit time HTM. Likewise, the duration of each of the high level HV2 and the low level LV2 is a half-bit time HTM. Therefore, the bit time BTM of the bit data BT _i-1 is twice the half bit time HTM. In other embodiments, the total duration of the low levels LV1 and LV2 is called double half time. In addition, the total duration of the high levels HV2 and HV3 is also referred to as a double nibble time.

In this embodiment, each nibble time HTM is the sum of the set value H_TIME and the value C. The control circuit 210 corrects the set value H_TIME so that the half-bit time HTM is within a target range, such as 366.7us˜466.7us. In this example, the double nibble time can fall between 733.3us~933.3us.

The control circuit 210 obtains the delay time caused by the hardware components (such as the conversion circuit 240 ) according to the level change of the output waveform TX and the input waveform RX. Therefore, the control circuit 210 corrects the setting value H_TIME according to the delay time of the device, so that the half-bit time HTM is within a target range.

In other embodiments, since the HTM may be affected by temperature, the host device 200 in FIG. 2 further includes a temperature sensor (not shown) for detecting an ambient temperature. In this example, when the ambient temperature deviates from a preset temperature range, the control circuit 210 enters into a calibration mode. In the calibration mode, the control circuit 210 detects the output waveform TX and the input waveform RX to know the time point when the output waveform TX changes from the first level to the second level (such as 310) and the input waveform RX changes from the third level to the second level. The time point when the level changes to the fourth level (eg 330). The control circuit 210 corrects the setting value H_TIME according to the time interval between the time points 310 and 330 .

In some embodiments, the control circuit 210 corrects the setting value H_TIME according to the sensing result of an external temperature sensor (not shown). In this example, the external temperature sensor may be disposed in a terminal device (such as the terminal device 121 in FIG. 1 ). The control circuit 210 may send a DALI message to request the terminal device 121 to inform the ambient temperature. In this example, the host device 200 does not need an additional temperature sensor.

In another embodiment, the host device 200 further includes a voltage sensing circuit (not shown) for detecting the voltage of the bus bar 130 . When the voltage of the bus bar 130 deviates from a preset voltage range (eg, 0~10V), the control circuit 210 enters into the calibration mode. In the calibration mode, the control circuit 210 calibrates the setting value H_TIME according to the level change between the output waveform TX and the input waveform RX. In other embodiments, the voltage sensing circuit may be disposed in a terminal device (such as the terminal device 121 in FIG. 1 ). In this example, the control circuit 210 may send a DALI message, requesting the terminal device 121 to inform the voltage of the bus bar 130 . Therefore, the host device 200 does not need an additional voltage sensing circuit.

In some embodiments, the control circuit 210 has a collision detection function. Before the control circuit 210 outputs the output waveform TX, the control circuit 210 first detects the output waveform TX and the input waveform RX to determine whether there are other signals on the bus bar 130 . In this example, the control circuit 210 determines whether the level of the output waveform TX is the same as that of the input waveform RX. When the level of the output waveform TX is different from that of the input waveform RX, the control circuit 210 determines whether the count value A falls within a valid range. When the count value A falls within a valid range, it means that no collision occurs. Therefore, the control circuit 210 operates according to the input waveform RX. However, when the count value A does not fall within the valid range, the control circuit 210 controls the level of the output waveform TX according to a conflicting setting value to destroy the signal on the bus 130 . In a possible embodiment, the control circuit 210 determines whether the level on the bus bar 130 is stable. When the voltage on bus 130 is stable, the conflict is resolved. Therefore, the control circuit 210 detects the levels of the output waveform TX and the input waveform RX to determine whether to enter the calibration mode.

In other embodiments, each of the terminal devices 121 - 123 in FIG. 1 has a collision detection function. Taking the terminal device 121 as an example, before the terminal device 121 outputs a reply to the bus bar 130 , the terminal device 121 first determines whether there are other signals on the bus bar 130 . If the bus 130 has other signals, the terminal device 121 may output a preset waveform to the bus 130 . After the bus 130 has no signal, the terminal device 121 provides a reply to the bus 130 again.

Fig. 5 is a schematic flow chart of the calibration method of the present invention. The calibration method 500 of the present invention is used to correct an output waveform, such as TX in FIG. 3A . The output waveform is provided to a conversion circuit, such as the conversion circuit 240 in FIG. 2 . The conversion circuit converts the output waveform into a differential signal pair, and outputs the differential signal pair to a bus, such as the bus 130 in FIG. 2 , through a communication interface, such as the DALI 241 in FIG. 2 . The communication interface is a digital addressable lighting interface.

First, the output waveform is detected (step S511). Taking FIG. 2 as an example, step S511 is to detect the level of the output waveform TX output by the input-output circuit 220 . Next, it is determined whether the output waveform changes from a first level to a second level (step S512). The first level is relative to the second level. For example, when the first level is a low level, the second level is a high level. When the first level is a high level, the second level is a low level.

When the output waveform does not change from a first level to a second level, go back to step S511. However, when the output waveform changes from a first level to a second level, a timer is enabled (step S513 ). Next, detect an input waveform (step S514). Taking the second figure as an example, step S514 is to detect the input waveform RX received by the input-output circuit 230 .

It is judged whether the input waveform changes from a third level to a fourth level (step S515). The third level is relative to the fourth level. For example, when the third level is a high level, the fourth level is a one level. When the third level is a low level, the fourth level is a high level. In some embodiments, the third level is the same as the first level. In this example, the fourth level is the same as the second level. In other embodiments, the third level is the same as the second level. In this example, the fourth level is the same as the first level.

When the input waveform (such as RX in FIG. 2 ) does not change from a third level to a fourth level, step S514 is executed. However, when the input waveform changes from a third level to a fourth level, the timer is read to obtain a first value (step S516 ). Taking FIG. 3A as an example, the first value in step S516 refers to the count value B.

Next, determine whether the first value is greater than a standard value (step S517). When the first value is greater than a standard value, decrease the time value for the output waveform to maintain at the second level (step S518 ). When the first value is less than the standard value, increase the time value for the output waveform to maintain at the second level (step S519 ). Taking FIG. 3A as an example, when the count value B is greater than a standard value, the control circuit 210 reduces the time value H_TIME during which the output waveform TX remains at a high level. When the count value B is less than a standard value, the control circuit 210 increases the time value H_TIME during which the output waveform TX remains at a high level.

In other embodiments, the calibration method 500 further includes a detection step (not shown). The detection step is located before step S511, and is used to detect whether a specific event occurs. When a specific event occurs, step S511 is executed. When the specific event does not occur, step S511 is not executed. In a possible embodiment, the specific event refers to that the ambient temperature deviates from a preset temperature range. In this example, the detection step is to detect an ambient temperature and determine whether the ambient temperature is out of a preset temperature range. When the ambient temperature is out of a preset temperature range, step S511 is executed. When the ambient temperature does not deviate from a preset temperature range, step S511 is not executed. In another possible embodiment, the detection step is to detect the voltage of a bus (such as the bus 130 in FIG. 2 ), and determine whether the voltage of the bus is out of a predetermined voltage range. When the voltage of the bus bar is out of a preset voltage range, step S511 is executed. When the voltage of the bus bar is not out of a preset voltage range, step S511 is not executed.

In other embodiments, a detection step is further included between steps S513 and S514 to determine whether the level of the input waveform (such as RX in FIG. 3A ) is equal to a critical value. In this example, when the level of the input waveform is equal to a critical value, the timer is read to obtain a second value, such as the count value A in FIG. 3A. Taking FIG. 2 as an example, the count value A is the delay time caused by the hardware components between the bus bar 130 and the input-output circuit 220 .

In addition, a third value (such as the count value A in FIG. 3A ) can be obtained by subtracting the second value (such as the count value A in FIG. 3A ) from the time value for maintaining the output waveform at the second level (such as H_TIME in FIG. 3A ). count value C). Taking FIG. 2 as an example, the third value is the delay time caused by the hardware between the bus bar 130 and the input and output circuits 220 / 230 .

In other examples, the calibration method 500 further includes a collision detection step (not shown). The conflict detection step is used to determine whether the level of the output waveform is the same as that of the input waveform. When the level of the output waveform is different from that of the input waveform, it is judged whether the second value falls within a valid range. When the second value falls within the valid range, it means that no signal conflict occurs on the bus (such as the bus 130 in FIG. 2 ). When the second value does not fall within a valid range, it indicates that a signal conflict occurs on the bus. Therefore, a preset waveform is issued to destroy the waveform on the bus. In this example, the conflict detection step determines whether the level of the bus is stable. When the level of the bus bar is unstable, the step S511 is not executed temporarily. When the level of the bus bar is stable, step S511 is executed.

In some embodiments, a bus (such as bus 130 in FIG. 2 ) transmits a series of data. In this example, the bus takes twice as long to transmit each bit of data as the first value. Taking Fig. 4 as an example, when the bus 130 transmits bit data BT _i , the time HTM for which the bus 130 maintains a fifth level (such as a high level) is equal to the time HTM for which the bus 130 maintains a sixth level (such as low level) time HTM. The fifth level is different from the sixth level.

In the DALI architecture, when the hardware circuit is adjusted or the components are replaced, the response time of the input waveform RX will be affected by the delay caused by the hardware components. However, by detecting the level change of the output waveform TX and the input waveform RX, the delay time caused by the hardware components can be inferred. The control circuit 210 automatically corrects the level of the output waveform TX according to the delay time caused by hardware components, so as to save test time. In addition, when the ambient temperature or the voltage of the DALI bus changes, the control circuit 210 enters the correction mode to correct the level of the output waveform TX, so that the practicability can be greatly improved.

It should be understood that when an element or layer is referred to as being "coupled" to another element or layer, it can be directly coupled or connected to the other element or layer or have the other element or layer interposed. Conversely, when an element or layer is "connected" to other elements or layers, there will be no intervening elements or layers.

The correcting method of the present invention, or a specific form or part thereof, may exist in the form of program code. The code may be stored on a physical medium, such as a floppy disk, a CD, a hard disk, or any other machine-readable (such as a computer-readable) storage medium, or a computer program product without limitation in an external form, wherein, When the program code is loaded and executed by a machine, such as a computer, the machine becomes an electronic device for participating in the present invention. Code may also be sent via some transmission medium, such as wire or cable, optical fiber, or any type of transmission in which, when the code is received, loaded, and executed by a machine, such as a computer, the machine becomes the one used to participate in this Invented electronic devices. When implemented on a general-purpose processing unit, the code combines with the processing unit to provide a unique device that operates similarly to application-specific logic circuits.

Unless otherwise defined, all terms (including technical and scientific terms) used herein are to be understood by those of ordinary skill in the art to which this invention belongs. In addition, unless expressly stated, the definition of a word in a general dictionary should be interpreted as consistent with the meaning in the article in its related technical field, and should not be interpreted as an ideal state or an overly formal voice. Although terms such as 'first' and 'second' may be used to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field may make some changes and modifications without departing from the spirit and scope of the present invention. . For example, the system, device or method described in the embodiments of the present invention can be implemented in physical embodiments of hardware, software, or a combination of hardware and software. Therefore, the scope of protection of the present invention should be defined by the scope of the appended patent application.

100: control system 110, 200: host device 121~123: terminal device 130: bus bar 141~143, 241: digital addressable lighting interface 210: control circuit 220, 230: input and output circuit 240: conversion circuit TX: output waveform RX: input waveform DIF1, DIF2, RES1, RES2: differential signal A~K: value 310~390: time point BT _i+1 , BT _i1 , BT _i-1 , BT _i-2 : bit data HTM: half Bit time BTM: Bit time 500: Calibration method S511~S519: Steps

Fig. 1 is a schematic diagram of the control system of the present invention. Fig. 2 is a schematic diagram of the host device of the present invention. Figures 3A-3C are schematic diagrams of output waveforms and input waveforms of the present invention. Fig. 4 is a schematic diagram of the DALI message of the present invention. Fig. 5 is a schematic flow chart of the calibration method of the present invention.

500: Correction method

S511~S519: steps

Claims (10)

A correction method for correcting an output waveform, the correction method comprising: detecting the output waveform; enabling a timer when the output waveform changes from a first level to a second level; detecting an input waveform; When the input waveform changes from a third level to a fourth level, read the timer; to obtain a first value; When the first value is greater than a standard value, reduce the time that the output waveform is maintained at the second level; and When the first value is less than the standard value, the time for the output waveform to be maintained at the second level is increased. The calibration method according to claim 1, wherein the first level is the same as the fourth level, and the second level is the same as the third level. The correction method of claim 1 further includes: detecting the voltage of a bus; and When the voltage of the bus bar deviates from a preset voltage range, the output waveform is detected. For example, the correction method of claim 3 further includes: When the level of the input waveform is equal to a critical value, reading the timer to obtain a second value; in: The input waveform is provided to a first input-output circuit; The second value is a delay time caused by hardware between the bus bar and the first input-output circuit. For example, the correction method of claim 4 further includes: subtracting the second value from the time during which the output waveform is maintained at the second level to obtain a third value; in: The output waveform is provided by a second input-output circuit; The third value is a delay time caused by hardware between the bus bar and the second input-output circuit. For example, the correction method of claim 4 further includes: judging whether the level of the output waveform is the same as the level of the input waveform; When the level of the output waveform is different from the level of the input waveform, determining whether the second value falls within a valid range; and When the second value does not fall within the effective range, the waveform of the bus is destroyed. An electronic device communicates with a terminal device through a digital addressable lighting interface bus, the electronic device includes: a control circuit for generating an output waveform; a first input-output circuit, used to output the output waveform; a conversion circuit, converting the output waveform to generate a differential signal pair to the DAI bus, and converting a reply received by the DAI bus to generate an input waveform; as well as a second input-output circuit, receiving the input waveform and providing the input waveform to the control circuit; in: When the output waveform changes from a first level to a second level, the control circuit enables a timer, and when the input waveform changes from a third level to a fourth level, the control circuit reads The timer is used to obtain a first value; When the first value is greater than a standard value, the control circuit reduces the time that the output waveform remains at the second level; When the first value is less than the standard value, the control circuit increases the time for the output waveform to maintain the second level. The electronic device of claim 7 further includes: a voltage sensing circuit for detecting the voltage of the digital addressable lighting interface bus; Wherein, when the voltage of the digital addressable lighting interface bus bar deviates from a preset voltage range, the control circuit detects the output waveform, and when the output waveform changes from the first level to the second level, the control circuit circuit enables the timer. The electronic device according to claim 8, wherein the time for the digital addressable lighting interface bus to transmit one bit of data is twice the first value. The electronic device of claim 7, wherein: The control circuit judges whether the level of the digital addressable lighting interface bus is stable; When the level of the DILI bus is unstable, the control circuit suspends the level change of the output waveform to enable the timer; and When the level of the digital addressable lighting interface bus is stable, the control circuit starts to enable the timer according to the level change of the output waveform.

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