TWI770685B - Method of low-power operation maintaining data transmission rate - Google Patents

Abstract

A method of low-power operation is provided for maintaining data transmission rate. A first frequency oscillator (high frequency oscillator, HOSC) is biased through a power management unit (PMU). The PMU is not affected by voltage, producing process and temperature. The HOSC generates a constant high-precision clock. The high-precision HOSC modifies a timing length of a timer. The timer uses a second frequency oscillator (low frequency oscillator, LOSC) for obtaining a reference clock. At last, the timing length is used for periodic high-precision data transmissions with compensation for voltage, producing process and temperature. Sometimes, for reducing power consumption, the HOSC and the PMU practice duty cycles for the data transmissions with fragmented occasions of sleeping or closing. Even so, the cycles of data transmissions remain stable and robust. Furthermore, the cycles are obtained through modifying the timing length of the timer, where the power consumed is lower than that of timing the whole cycles by the PMU coordinated with the HOSC. Thus, the present invention uses a PMU coordinated with an HOSC for obtaining stableness and robustness. In a simple way, the high-precision clock is copied to modify a timing length of a timer using another oscillator for obtaining a reference clock. On timing with the timer during sleeping, the stable and robust cycles remain even when the HOSC and the PMU are closed. As a result, the periodic data transmissions remain while retaining the advantage of the low power consumption of aperiodic data transmissions..

Description

Low-power operating method for systems with data transfer rates

The present invention relates to a low-power operation for systems with data transfer rates method, especially involving a power management unit (PMU) with a first frequency oscillator (HOSC) to obtain stable and robust clock characteristics, using a simple way to copy to other oscillator-based timing In terms of the timing length of the timer (such as the timer based on the second frequency oscillator (LOSC)), especially when the system is in sleep (Sleep), this timer counts, even if the first frequency oscillator and the power management unit are turned off , or can maintain a stable and robust data transfer rate.

Data generating components, such as sensors, generally use periodic (Periodic) or non- Periodic (No-Periodic) system operation mode. For a periodic system, in order to obtain a stable period, a stable robust (Robust) frequency oscillator is required to generate a clock pulse. Therefore, the bias voltage (Bias) and compensator (Compensator) of the system oscillator must be continuous, and it cannot turn off the power management or compensator (for example: Low Dropout regulator, LDO) when the system is sleeping. Bandgap), as shown in Figure 5 (a), because the power management or compensator is still operating, the slashed part in the figure represents that there is still a certain range of current consumption during sleep. Therefore, periodic systems cannot effectively reduce power consumption.

Event-Driven system operation is adopted for aperiodic systems mode, it can turn off the compensator and power supply when the system sleeps, as shown in Figure 5(b). However, it cannot wake up by itself, and other drivers must be opened to start the system, so an additional circuit needs to be added for triggering.

To sum up the above, therefore, the general accustomed user cannot meet the actual use of the user. need.

The main purpose of the present invention is to overcome the above-mentioned problems encountered in the prior art and to improve Provides a simple and easy way to replicate the stable and robust characteristics of a power management unit with a first frequency oscillator to the timing length of a timer based on other oscillators (such as timing based on a second frequency oscillator). When the system is dormant, this timer is used to keep a stable and robust periodicity even if the first frequency oscillator and the power management unit are turned off, so that a periodic system with a data transfer rate can maintain aperiodicity Low power consumption advantage of the system.

In order to achieve the above objects, the present invention is a low-power system for a data transfer rate system. The power consumption operation method is applied to a main system including a first frequency oscillator, a second frequency oscillator, a power management unit, a timer (Timer) and a regulator (Regulator), which at least includes the following steps: step 1: The main system has a base frequency (Base), which is a known constant, which is the ideal frequency ratio between the ideal first frequency oscillator and the ideal second frequency oscillator; Step 2: Turn on the power management unit and the first frequency oscillator; step 3: load the data transmission rate set by the user into the timer as the initial timing length (Initial), and then calculate the first frequency oscillator in the regulator through the first frequency oscillator The real period of the two-frequency oscillator is obtained, and the real frequency ratio that will drift and change is obtained as the real frequency (Real), and finally calculated by the regulator, the initial timing length is multiplied by the ratio of the fundamental frequency to the real frequency, Obtain the valid timing length (Valid) of the timer; step 4: wait for the system to sleep; step 5: turn off the power management unit and the first frequency oscillator; and step 6: wait for the timer to count to the valid timing length , go back to step 2 to continue step 2 to step 6 of the next cycle.

In the above-mentioned embodiment of the present invention, the first frequency oscillator is controlled by the power management unit Compensated and biased high frequency oscillators that are independent of voltage, process, and Compensated and biased high frequency oscillator, constant state that is not affected by voltage, process and temperature during the operation of the power management unit.

In the above-mentioned embodiment of the present invention, the second frequency oscillator is a low frequency without compensation rate oscillator, the state of change is affected by voltage, process and temperature.

In the above-mentioned embodiment of the present invention, the power management unit includes energy gap, low voltage regulator The oscillator and the compensator, when turned on by the timer, can provide bias and compensation to the first frequency oscillator according to the process, temperature and voltage.

In the above-mentioned embodiment of the present invention, the real frequency of the third step is the real first frequency vibration. The actual frequency ratio between the oscillator and the actual second frequency oscillator.

In the above-mentioned embodiment of the present invention, the system is busy in steps 2 to 5. (Busy) mode, in this step the sixth system enters the sleep mode.

Please refer to "Fig. 1 to Fig. 4", which are respectively the system power dissipation of the present invention. A schematic diagram of power consumption, a schematic diagram of the architecture of the main system of the present invention, a schematic diagram of a low-power consumption operation flow diagram of the present invention, and a schematic diagram of the results of an embodiment of the present invention. As shown in the figure: the present invention is a low-power operation method for a system with a data transfer rate, with stable and robust periodicity and low power consumption, as shown in FIG. 1 . The method proposed in the present invention applies a main system 1, including a first frequency oscillator (HOSC) 10, a second frequency oscillator (LOSC) 20, a power management unit (PMU) 30, a timer A Timer 40 and a Regulator 50 are shown in Figure 2.

The aforementioned first frequency oscillator 10 is compensated by the power management unit 30 high frequency oscillator with bias voltage, with high precision, high power and robustness, in the power management unit 30 During the action period, it is a constant state that is not affected by voltage, process and temperature.

The second frequency oscillator 20 is an uncompensated low frequency oscillator because there is no The compensation of the power management unit leads to low precision and low power, which is susceptible to changes in voltage, process and temperature.

The power management unit 30 includes an energy gap (Bandgap), a low dropout voltage regulator (Low Dropout regulator, LDO) and compensator (Compensator), when the timer 40 is turned on, can provide bias and compensation to the first frequency oscillator 10 according to the process, temperature and voltage.

The timer 40 is timed by the second frequency oscillator 20 and adjusted by the The timer 50 is used to set the timing length.

The regulator 50 oscillates according to the second frequency oscillator 20 and the first frequency The frequency ratio of the timer 10 sets the timing length of the timer 40.

The present invention uses the above-mentioned host system 1 for low power consumption operation of a system with a data transfer rate The process is shown in Figure 3, which includes at least the following steps: In step s11, the main system 1 has a base frequency (Base), which is a known constant and is the ideal frequency ratio between the ideal first frequency oscillator 10 and the ideal second frequency oscillator 20: Base = ideal HOSC frequency / ideal LOSC frequency. Step s12, the power management unit 30 and the first frequency oscillator 10 are turned on. Step s13, load the data rate (Data Rate) set by the user into the timer as Initial timing length (Initial): Initial = data transfer rate; Then, the real period of the second frequency oscillator 20 is calculated through the first frequency oscillator 10 in the regulator 50, and the real frequency ratio that will drift and change is obtained as the real frequency (Real): Real = real HOSC frequency / real LOSC frequency; Finally, through the calculation of the regulator 50, the initial timing length is multiplied by the ratio of the fundamental frequency to the real frequency to obtain the effective timing length (Valid) of the timer 40: Valid = Initial * Base / Real. Step s14, waiting for the system to sleep (Sleep). In step s15, the power management unit 30 and the first frequency oscillator 10 are turned off to save power. In step s16, after the timer 40 counts up to the valid timing length, return to step s12 to continue the next cycle of steps s12 to s16.

The system is in a busy (Busy) mode in the above-mentioned steps s12 to s15. Step s16 is to enter the sleep mode. If so, a new low-power operation method for a system with a data transfer rate is constructed by the above disclosed process.

The following examples are only examples for understanding the details and connotations of the present invention, but not for limitation The scope of the patent application of the present invention.

The following first frequency oscillator is denoted by HOSC, and the second frequency oscillator is denoted by LOSC The power management unit is represented by PMU. When used, the base frequency Base is a known frequency proportionality constant. For example: the ideal HOSC output frequency is 10MHz, and the ideal LOSC output frequency is 10KHz. According to the above step s11, Base is: Base = 1000 = 10M / 10K.

After opening HOSC and PMU, load the data transfer rate set by the user as the calculation The initial timing length of the timer. For example: It is known that the data transfer rate set by the user is 300 milliseconds (ms) To generate a piece of data, the timer is counted by the LOSC with a frequency of 10KHz. In order to achieve the data transmission rate set by the user, according to step s13, the initial timing length of the loaded timer is: Initial = 3000 LOSC cycles;

Real frequency Real is a real frequency ratio, which varies with voltage, process or temperature. E.g: Under the condition of voltage 3.8V and temperature 85°C, the actual output frequency of HOSC is 10MHz (HOSC can be compensated by PMU), and the actual output frequency of LOSC is 8KHz (LOSC is not compensated). According to the above step s13, the Real is: Real = 1250 = 10M / 8K;

Then the regulator calculates the effective timing length Valid of the timer. For example: Base = 1000, Real = 1250, Initial = 3000, according to the above step s13, Valid is: Valid = 2400 = 3000 * 1000 / 1250.

In a specific embodiment, as shown in FIG. 4, compared with 3.3V and 25°C in the first cycle, HOSC is obviously high voltage and high temperature at 3.8V and 85°C in the second cycle, but because of the compensation of PMU, it still maintains 10MHz. Even if it becomes 1.8V and -45°C low temperature and low voltage in the next cycle, it still maintains 10MHz . The uncompensated LOSC will drift to 8KHz due to the influence of high pressure and high temperature in the second cycle, and will drift to 12KHz at low temperature and low pressure in the third cycle. According to the above step s13, Real and Valid are: Real = 833 = 10M / 12K; Valid = 3601 = 3000 * 1000 / 833.

The three cycles listed comprehensively are calculated according to the data transmission rate 300ms set by the user. The initial timing length of the timer is 3000; the ideal HOSC frequency is 10MHz, the ideal LOSC frequency is 10KHz, and the base frequency Base is 1000; the system runs for three cycles, the real LOSC changes due to the influence of voltage and temperature, and the generated real frequency Real They are 1000, 1250, and 833 respectively; after the implementation of the present invention, according to the change of the real LOSC, the effective timing length Valid of the timer is corrected to 3000, 2400, and 3601 respectively to maintain the constant period length. It can be seen that with the operation method of the present invention, even if the LOSC changes due to external factors, the system can still maintain the data transmission rate set by the user.

It can be seen from the above that the HOSC of the present invention is not affected by voltage, due to the compensation of the PMU. The constant state affected by the process and temperature, and because LOSC has no compensation, it will be affected by the voltage, process and temperature change state, so use Base and Real to correct the initial of the timer, and use the corrected value as the timer. Valid. Using the Valid of the present invention to modify sqqqqqqqqqqqq to change the timing length of the timer to generate the cycle, the effect is like using the PMU bias and compensating the HOSC to generate a constant HOSC to time the entire cycle, so that each data transmission rate is stable and robust; and , the cycle is obtained by correcting the length of the timer, and its power is lower than that of using the PMU and the HOSC to time the entire cycle. In this way, the present invention replicates the stable and robust characteristics of the PMU with the HOSC in a simple way to the timing length of the timer based on other oscillators (such as LOSC), so that when the system is in sleep, the timer is used for timing. , even if the HOSC and PMU are turned off, a stable and robust periodicity can still be maintained, so that the periodic system with data transmission rate retains the advantages of low power consumption of the aperiodic system.

In summary, the present invention is a low-power operation for systems with data transfer rates The method can effectively improve the shortcomings of conventional methods, and copy the stable and robust characteristics obtained by biasing the power management unit (PMU) to the first frequency oscillator (HOSC) and use a simple method to copy the timing length of the timer based on other oscillators. (such as LOSC), so that when the system is in sleep (Sleep), this timer counts, even if the HOSC and PMU are turned off, it can still maintain a stable and robust periodicity, so that the periodic system with data transmission rate can maintain aperiodicity The advantages of low power consumption of the system make the invention more advanced, more practical, and more in line with the needs of users. It has indeed met the requirements of an invention patent application, and a patent application can be filed in accordance with the law.

However, the above are only preferred embodiments of the present invention, and should not be limited to this The scope of implementation of the present invention; therefore, any simple equivalent changes and modifications made according to the scope of the patent application of the present invention and the contents of the description of the invention should still fall within the scope of the patent of the present invention.

main system 1 first frequency oscillator 10 Second frequency oscillator 20 power management unit 30 timer 40 Regulator 50 Steps s11～s16

Figure 1 is a schematic diagram of the system power consumption of the present invention. Fig. 2 is a schematic diagram of the structure of the main system of the present invention. FIG. 3 is a schematic diagram of the low power consumption operation flow of the present invention. FIG. 4 is a schematic diagram of the results of a specific embodiment of the present invention. Figure 5 is a schematic diagram of the operation of the conventional power system.

Steps s11～s16

Claims (6)

A low-power operation method for a system with a data transfer rate, the application includes a first frequency oscillator (HOSC), a second frequency oscillator (LOSC), a power management unit (Power Management Unit, PMU), A main system of a Timer and a Regulator, which at least includes the following steps: Step 1: The main system has a base frequency (Base), which is a known constant and is an ideal frequency ratio between an ideal first frequency oscillator and an ideal second frequency oscillator; Step 2: turn on the power management unit and the first frequency oscillator; Step 3: Load the data transmission rate set by the user into the timer as the initial timing length (Initial), and then calculate the real period of the second frequency oscillator in the regulator through the first frequency oscillator , get the real frequency ratio that will drift and change as the real frequency (Real), and finally calculate through the regulator, multiply the initial timing length by the ratio of the fundamental frequency to the real frequency, and get the effective timing of the timer length(Valid); Step 4: Wait for the system to sleep (Sleep); Step 5: turning off the power management unit and the first frequency oscillator; and Step 6: After the timer counts up to a valid timing length, return to Step 2 to continue Step 2 to Step 6 in the next cycle. According to the low-power operation method for a system with a data transfer rate as described in claim 1, wherein the first frequency oscillator is a high-frequency oscillator compensated and biased by the power management unit, in A constant state that is not affected by voltage, process and temperature during the operation of the power management unit. According to the low-power operation method for a system with a data transfer rate as described in item 1 of the claimed scope, wherein the second frequency oscillator is an uncompensated low-frequency oscillator, and is subject to voltage, Changes in process and temperature effects. The low-power operation method for a system with a data transfer rate as described in item 1 of the scope of the patent application, wherein the power management unit includes a bandgap, a low-voltage regulator (Low Dropout regulator, LDO) and a compensator (Compensator), when the timer is turned on, it can provide bias voltage and compensation to the first frequency oscillator according to the process, temperature and voltage. According to the low-power operation method for a system with a data transfer rate as described in item 1 of the scope of the patent application, the real frequency in step 3 is the real first frequency oscillator and the real second frequency oscillator true frequency ratio between the According to the low-power operation method for a system with a data transfer rate as described in item 1 of the scope of the application, wherein the system is in a busy (Busy) mode in the steps 2 to 5, and enters a sleep mode in the step 6 model.

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