TWI769109B - Package structure and manufacturing method thereof - Google Patents

Abstract

A package structure is provided to include a carrier, an interconnect structure, and at least one anti-warpage film. The interconnect structure is located on a front surface of the carrier. The interconnect structure includes N dielectric layers and plural metal layers, where N is a positive integer greater than or equal to 3. The anti-warpage film is located on a rear surface of the carrier. The number of the anti-warpage film is a positive integer obtained by calculating N/2 and unconditionally rounding off.

Description

Package structure and manufacturing method thereof

The present disclosure relates to a package structure and a manufacturing method of the package structure.

With the increasing advancement of integrated circuit (IC) manufacturing technology, the demand for packaging processes has increased, and the line width/line spacing (L/S) of the redistribution (RDL) process of IC substrates is getting thinner and thinner, and the distribution is getting smaller and smaller. It will also integrate more integrated circuit chips into the same package to manufacture more advanced and multiplexed products. Currently, fan-out wafer-level packaging (FOWLP) is the mainstream.

The carrier may include a glass sheet with redistribution and dielectric layers thereon. During the manufacturing process, rewiring will generate thermal stress, and the thermal expansion coefficients of the dielectric layer and the glass sheet do not match, resulting in a warpage phenomenon. As a result, problems such as disconnection of rewiring or delamination of the dielectric layer may be caused. In addition, when the warpage value of the glass sheet is too large, it may cause the machine (such as the exposure machine and the developing machine) to be unable to absorb, and then a warning is issued to stop the automatic operation.

One technical aspect of the present disclosure is a package structure.

According to some embodiments of the present disclosure, a package structure includes a carrier, an interconnect structure, and at least one anti-warping film. The interconnect structure is located on the front side of the carrier. The interconnection structure includes N layers of dielectric layers and multiple layers of metal layers, and N is a positive integer greater than or equal to 3. An anti-warp film is located on the backside of the carrier. The amount of anti-warpage film is a positive integer obtained by unconditional rounding of N/2.

In some embodiments, the number of the above-mentioned anti-warping films is plural, and the thicknesses of these anti-warping films are different.

In some embodiments, the thermal expansion coefficient of the warp-resistant film described above is in the range of 40 ppm/°C to 70 ppm/°C.

In some embodiments, the number of the above-mentioned anti-warping films is plural, and the materials of these anti-warping films include epoxy resin and curing agents with different weight percentage concentrations.

One technical aspect of the present disclosure is a manufacturing method of a package structure.

According to some embodiments of the present disclosure, a method for manufacturing a package structure includes forming a first portion of an interconnect structure on a front surface of a carrier; measuring a first warpage value of the carrier; when the first warpage value is greater than a predetermined value, thermally pressing a first anti-warping film on the backside of the carrier; hard-baking the first anti-warping film; and forming a second portion of the interconnect structure on the first portion.

In some embodiments, the above-mentioned manufacturing method of the package structure further includes measuring a second warpage value of the carrier after forming the second portion of the interconnect structure.

In some embodiments, the above-mentioned manufacturing method of the package structure further includes, when the second warpage value is greater than a predetermined value, thermally pressing the second anti-warpage film on the backside of the first anti-warpage film.

In some embodiments, the above-mentioned manufacturing method of the package structure further includes turning the carrier so that the backside of the first anti-warpage film faces upward before hot pressing the second anti-warpage film on the backside of the first anti-warpage film.

In some embodiments, the above-mentioned manufacturing method of the package structure further includes after hot pressing the second anti-warpage film on the backside of the first anti-warpage film, turning the carrier again so that the backside of the second anti-warpage film faces down.

In some embodiments, the above-mentioned manufacturing method of the package structure further includes hard-baking the second anti-warping film.

In some embodiments, the temperature of the above-described hard bake second anti-warp film is in the range of 170°C to 180°C.

In some embodiments, the temperature of the hot-pressed second anti-warpage film on the backside of the first anti-warpage film is in the range of 70°C to 90°C.

In some embodiments, the above-mentioned manufacturing method of the package structure further includes turning the carrier so that the back side of the carrier faces upward before thermally pressing the first anti-warping film on the back side of the carrier.

In some embodiments, the above-mentioned manufacturing method of the package structure further includes, after hot pressing the first anti-warpage film on the backside of the carrier, turning the carrier over again so that the backside of the first anti-warpage film faces down.

In some embodiments, the above predetermined value is in the range of 0.8 mm to 1.2 mm.

In some embodiments, the temperature of the hot-pressed first anti-warpage film on the backside of the carrier is in the range of 70°C to 90°C.

In some embodiments, the temperature of the above-mentioned hard-bake first anti-warp film is in the range of 170°C to 180°C.

In some embodiments, the second part of the interconnect structure is formed on the first part, so that the first part and the second part together include three or more dielectric layers.

In the above-mentioned embodiment of the present disclosure, after the first part of the interconnect structure is on the front side of the carrier, the first warpage value of the carrier can be measured first, and if the first warpage value is too large, the first anti-warpage film can be hot-pressed The first anti-warping film is hard-baked on the back of the carrier to realize the mechanism of increasing the anti-warping film while measuring the amount of warpage. In this way, the first anti-warpage film can generate shrinkage stress and suppress the warpage of the carrier, so that the warpage is reduced to close to 0 mm. Subsequently, the second part of the interconnect structure can be continuously formed to avoid problems such as disconnection of rewiring or delamination of the dielectric layer, and the flattening of the package structure can be stably absorbed by the machine (for example, the exposure machine and the developing machine). , which is conducive to automated operations. In addition, after the packaging structure of the present disclosure is fabricated, since the anti-warping film is located on the back side of the carrier, it can provide support, which is not only convenient for shipment, but also in subsequent chip bonding and molding processes. The metal layer of the interconnect structure is prevented from breaking.

The embodiments disclosed below provide many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present case. Of course, these examples are merely examples and are not intended to be limiting. In addition, reference numerals and/or letters may be repeated in various instances herein. This repetition is for brevity and clarity, and does not in itself specify the relationship between the various embodiments and/or configurations discussed.

Spatially relative terms such as "below," "below," "lower," "above," "above," and the like may be used herein for convenience of description to describe The relationship of one element or feature to another element or feature as shown in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation shown in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

FIG. 1 is a cross-sectional view of a package structure 100 according to an embodiment of the present disclosure. As shown in the figure, the package structure 100 includes a carrier 110 , an interconnect structure 120 and at least one warp film. In this embodiment, the package structure 100 includes a first anti-warp film 130 a and a second anti-warp film 130 b. The interconnect structure 120 is located on the front side 112 of the carrier 110 . The interconnect structure 120 includes N dielectric layers, and N is a positive integer greater than or equal to 3. In this embodiment, N is 5, and the interconnect structure 120 includes five layers of dielectric layers 122a, 122b, 122c, 122d, and 122e and multiple layers of metal layers 124a, 124b, 124c, 124d, 124e, and 124f. In addition, the number of anti-warping films is N/2, a positive integer obtained by unconditional rounding off. Since N is 5, the package structure 100 includes two anti-warping films, such as the first anti-warping film 130a and the second anti-warping film 130a. Warp film 130b. The first anti-warping film 130a and the second anti-warping film 130b are located on the back surface 114 of the carrier 110, and the first anti-warping film 130a is located between the carrier 110 and the second anti-warping film 130b.

In this embodiment, the metal layers 124a, 124f may be Under bump metal (UBM), which can be electrically connected to a chip or a circuit board, and the metal layers 124b, 124c, 124d, 124e may be redistribution lines; RDL), which can transmit electrical signals. In this embodiment, the material of the dielectric layers 122a, 122b, 122c, 122d, and 122e may be polyimide (PI), and the material of the metal layers 124a, 124b, 124c, 124d, 124e, and 124f may be copper. , the material of the carrier 110 may be glass, which is not intended to limit the present disclosure. The materials of the first anti-warping film 130a and the second anti-warping film 130b may include epoxy resin and curing agent. The thermal expansion coefficients of the first anti-warpage film 130a and the second anti-warpage film 130b may be in the range of 40 ppm/°C to 70 ppm/°C.

Specifically, after the first part of the interconnect structure 120 (eg, the dielectric layers 122a, 122b and the metal layers 124a, 124b) is formed on the carrier 110, due to the mismatch of thermal expansion coefficients of copper, polyimide and glass, it is easy to warping problem occurs. Therefore, when the warpage value measured by the carrier 110 is too large (for example, greater than 1.0 mm), the first anti-warping film 130a can be provided on the back surface 114 of the carrier 110 to suppress the shrinkage stress generated by the first anti-warping film 130a The warpage amount of the carrier 110 reduces the warpage amount to close to 0 mm, which can avoid problems such as rewiring disconnection and polyimide delamination in the subsequent process, and can be affected by the machine (for example: exposure machine due to flattening). and developing machine) stable adsorption, which is conducive to automatic operation. Subsequently, the second part of the interconnection structure 120 (eg, the dielectric layers 122c, 122d and the metal layers 124c, 124d) can be further formed on the first part of the interconnection structure 120. When the warpage value measured by the carrier 110 is too large again (For example, greater than 1.0 mm), a second anti-warping film 130b can be further disposed on the back surface 134 of the first anti-warping film 130a, and the shrinkage stress generated by the first anti-warping film 130a and the second anti-warping film 130b can be used The warpage amount of the carrier 110 is suppressed, and the warpage amount is reduced to approximately 0 mm. Subsequently, the third part of the interconnection structure 120 (eg, the dielectric layer 122e and the metal layers 124e and 124f ) can be further formed on the second part of the interconnection structure 120 to obtain the package structure 100 of FIG. 1 . Since the first anti-warping film 130a and the second anti-warping film 130b are located on the back surface 114 of the carrier 110, they can provide support and facilitate shipping to avoid damage to the interconnect structure 120 due to warping.

In another embodiment, the first portion of interconnect structure 120 includes dielectric layers 122a, 122b, 122c and metal layers 124a, 124b, 124c, and the second portion of interconnect structure 120 includes dielectric layers 122d, 122e and metal layers 124d, 124e, 124f, after the second part of the interconnect structure 120 is formed, the second anti-warping film 130b is disposed on the back surface 134 of the first anti-warping film 130a, and the package structure 100 of FIG. 1 can be obtained without the need for Forming a third portion of interconnect structure 120 continues on the second portion.

The above-mentioned descriptions about the first part, the second part and the third part of the interconnection structure 120 are only examples, which are mainly determined according to the number N of the stacked dielectric layers and the warpage of the carrier 110 at that time. . In some embodiments, as long as the number of anti-warpage films is half of the number of dielectric layers and a positive integer obtained by unconditional rounding off, the carrier 110 can be prevented from having excessive warpage (eg, greater than 1.0 mm) during the manufacturing process. .

In the following description, a method of manufacturing the package structure 100 will be explained.

FIG. 2 is a flowchart of a method for manufacturing a package structure according to an embodiment of the present disclosure. The manufacturing method of the package structure includes but is not limited to the following steps S1 to S5. In step S1, a first portion of the interconnect structure is formed on the front side of the carrier. In step S2, the first warpage value of the carrier is measured. In step S3, when the first warpage value is greater than the predetermined value, the first anti-warpage film is hot-pressed on the backside of the carrier. In step S4, the first anti-warping film is hard baked. In step S5, a second portion of the interconnect structure is formed on the first portion. In the following description, the above-mentioned steps S1 to S5 and other steps before, during, and after them will be explained in detail.

FIG. 3 to FIG. 8 are cross-sectional views of each step of a manufacturing method of a package structure according to an embodiment of the present disclosure. In order to make the drawings clear and concise and to facilitate the description, the internal structure of the interconnection structure 120 in the subsequent drawings is omitted (see FIG. 1 ), which will be described first. Referring to FIG. 3 , a first portion of the interconnect structure 120 is formed on the front surface 112 of the carrier 110 . In this step, a dielectric layer 122a and a metal layer 124a can be formed on the front surface 112 of the carrier 110, then a metal layer 124b can be formed on the dielectric layer 122a and the metal layer 124a, and then a dielectric layer 122b can be formed on the metal layer 124b and the dielectric layer 124b. on the electrical layer 122a. In some embodiments, the dielectric layers 122a and 122b may be formed by coating, and the metal layers 124a and 124b may be formed by physical vapor deposition (PVD) and patterning steps (such as exposure, development, and etching). However, it is not intended to limit this disclosure. Subsequent formation steps of other dielectric layers and metal layers are similar to the above-mentioned methods, and will not be repeated.

Referring to FIGS. 3 and 4 at the same time, after the first portion of the interconnect structure 120 is formed on the front surface 112 of the carrier 110 , the first warpage value W1 of the carrier 110 can be measured. When the first warpage value W1 is greater than the predetermined value, the first anti-warpage film 130 a is thermally pressed on the back surface 114 of the carrier 110 . In this embodiment, the predetermined value may be in the range of 0.8 mm to 1.2 mm, eg 1.0 mm. If the first warpage value W1 is greater than the predetermined value, it may exceed the allowable value of the process tool, and the subsequent formation of other parts of the interconnect structure 120 is likely to cause problems such as disconnection of rewiring or delamination of the dielectric layer. In addition, before the first anti-warpage film 130a is hot-pressed on the backside 114 of the carrier 110 , the carrier 110 can be turned over so that the backside 114 of the carrier 110 faces upwards, so that the first anti-warpage film 130a can be hot-pressed and attached to the backside of the carrier 110 . 114. In this embodiment, the temperature at which the first anti-warping film 130a is hot-pressed on the back surface 114 of the carrier 110 is in the range of 70°C to 90°C, for example, 80°C. In some embodiments, the first part of the interconnect structure 120 may include the dielectric layers 122a, 122b and the metal layers 124a, 124b of FIG. The electrical layers 122a, 122b, 122c and the metal layers 124a, 124b, 124c.

Referring to FIGS. 4 and 5 at the same time, after the first anti-warping film 130a is hot-pressed on the backside 114 of the carrier 110, the carrier 110 is turned over again so that the backside 134 of the first anti-warping film 130a faces downward. Next, the first anti-warpage film 130a may be hard-baked. Since the material of the first anti-warping film 130a includes epoxy resin, the thermal expansion coefficient of which can be in the range of 40 ppm/°C to 70 ppm/°C, the first anti-warping film 130a will shrink to generate stress, which further controls the carrier The warpage amount of 110 reduces the warpage amount to close to 0 mm, achieves the purpose of flattening, and realizes the mechanism of increasing the warpage resistance film while measuring the warpage amount. In this embodiment, the temperature of hard-baking the first anti-warping film 130 a is in the range of 170° C. to 180° C., for example, hard-baking at 175° C. for 2 hours.

Referring to FIGS. 5 and 6 at the same time, after the first anti-warpage film 130a is hard-baked, since the amount of warpage has been greatly reduced, the second part of the interconnection structure 120 can continue to be formed on the first part without causing Problems such as rewiring disconnection or dielectric layer delamination, and due to the flattening of the package structure, it can be stably adsorbed by the machine (eg: exposure machine and developing machine), which is conducive to automated operations. However, after the second portion of the interconnect structure 120 is formed, the amount of warpage of the carrier 110 may increase. Therefore, after the second portion of the interconnect structure 120 is formed, the second warpage value W2 of the carrier 110 can be measured. In some embodiments, the second portion of the interconnect structure 120 may include the dielectric layers 122c, 122d and the metal layers 124c, 124d in FIG. 1, but not limited thereto, for example, the second portion may also include the first The dielectric layers 122d, 122e and the metal layers 124d, 124e, 124f are shown in the figure. After the second part of the interconnection structure 120 is formed on the first part, the first part and the second part together include three or more dielectric layers, for example, four or five layers.

Referring to FIG. 6 and FIG. 7 at the same time, when the second warpage value W2 is greater than the predetermined value, the second anti-warpage film 130b is hot-pressed on the back surface 134 of the first anti-warpage film 130a to measure the warpage amount. Mechanism to increase the anti-warpage film. In some embodiments, the first anti-warpage film 130a and the second anti-warpage film 130b may include curing agents (eg, epoxy groups) in different weight percentage concentrations, for example, the curing agent contained in the second anti-warpage film 130b The weight percent concentration of the first anti-warping film 130a is greater than the weight percent concentration of the curing agent contained in the first anti-warping film 130a, so as to provide better anti-warping ability. The weight percent concentration of the curing agent of the first anti-warpage film 130a may be in the range of 23% to 25%, and the weight percent concentration of the curing agent of the second anti-warpage film 130b may be in the range of 30% to 33% middle. In addition, the thicknesses of the first anti-warping film 130a and the second anti-warping film 130b may be different, for example, the thickness of the second anti-warping film 130b is greater than the thickness of the first anti-warping film 130a, so as to provide better Warpage resistance. For example, the thickness of the first anti-warpage film 130a may be about 50 μm, and the thickness of the second anti-warpage film 130b may be about 80 μm.

In other embodiments, the weight percent concentration of the curing agent contained in the second anti-warpage film 130b may be smaller than the weight percent concentration of the curing agent contained in the first anti-warping film 130a, and the thickness of the second anti-warping film 130b The thickness may be smaller than the thickness of the first anti-warping film 130a, depending on design requirements.

In addition, before hot pressing the second anti-warpage film 130b on the back surface 134 of the first anti-warpage film 130a, the carrier 110 can be turned over so that the backside 134 of the first anti-warpage film 130a faces upwards, so as to facilitate the second anti-warpage film 130a. 130b is thermocompressed and bonded to the back surface 134 of the first anti-warping film 130a. In this embodiment, the temperature at which the second anti-warpage film 130b is hot-pressed on the back surface 134 of the first anti-warpage film 130a is in the range of 70°C to 90°C, eg, 80°C.

Referring to FIGS. 7 and 8 at the same time, after hot pressing the second anti-warpage film 130b on the backside 134 of the first anti-warpage film 130a, the carrier 110 is turned over again so that the backside 135 of the second anti-warpage film 130b faces down . Next, the second anti-warpage film 130b may be hard-baked. Since the material of the second anti-warping film 130b includes epoxy resin, the thermal expansion coefficient of which can be in the range of 40 ppm/°C to 70 ppm/°C, the second anti-warping film 130b will shrink to generate stress, which further controls the carrier The warpage amount of 110 reduces the warpage amount to close to 0 mm, achieves the purpose of flattening, and realizes the mechanism of increasing the warpage resistance film while measuring the warpage amount. In the present embodiment, the temperature of hard-baking the second anti-warpage film 130b is in the range of 170° C. to 180° C., for example, hard-baking at 175° C. for 2 hours. In addition, when the second anti-warpage film 130b is hard-baked, the first anti-warpage film 130a is also at a similar temperature (eg, 175° C.).

After hard-baking the second anti-warpage film 130b, the amount of warpage has been greatly reduced, and the package structure 100 shown in FIG. 1 can be obtained. In another embodiment, the third part of the interconnect structure 120 (for example, the dielectric layer 122e and the metal layers 124e and 124f in FIG. 1) needs to be further formed on the second part to obtain the interconnection structure as shown in FIG. 1. In the package structure 100, because the first anti-warping film 130a and the second anti-warping film 130b have sufficient anti-warping ability, there will be no problems such as disconnection of rewiring or delamination of the dielectric layer.

After the package structure 100 shown in FIG. 1 is fabricated, since the first anti-warping film 130a and the second anti-warping film 130b are located on the back surface 114 of the carrier 110, they can provide support, which is not only convenient for shipment, but also in subsequent chip bonding. The metal layer of the interconnect structure 120 is prevented from being broken during the bonding and molding processes. After the fabrication of the package structure 100 is completed, the following processes can be continued.

FIG. 9 is a cross-sectional view of the package structure 100 after the bonding and molding process according to an embodiment of the present disclosure. FIG. 10 is a cross-sectional view of the interconnect structure 120 of FIG. 9 after being bonded to the circuit board 230 . Referring to FIGS. 9 and 10 at the same time, the package structure 100 includes a carrier 110 , an interconnect structure 120 , a first anti-warping film 130 a and a second anti-warping film 130 b. After the package structure 100 is processed through the processes shown in FIGS. 2 to 8 , the chip 210 can be bonded on the package structure 100 , and then the molding chip 210 can be molded into the molding material 220 . The chip 210 can be bonded to the interconnect structure 120 of the package structure 100 through the conductive structure 212 . In some embodiments, the conductive structure 212 electrically connects the die 210 with the metal layer 124f of the interconnect structure 120 (see FIG. 1).

In a subsequent step, the carrier 110 , the first anti-warpage film 130 a and the second anti-warpage film 130 b may be removed along the dotted line L to expose the bottom surface of the interconnect structure 120 . Next, the interconnection structure 120 is disposed on the circuit board 230 to obtain the electronic device 200 of FIG. 10 . The interconnect structure 120 can be bonded to the circuit board 230 through the conductive structure 232 . In some embodiments, the conductive structure 232 is electrically connected to the circuit board 230 and the metal layer 124a of the interconnect structure 120 (see FIG. 1 ).

The foregoing has outlined features of several embodiments so that those skilled in the art may better understand aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments described herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they can make various changes, substitutions and alterations herein without departing from the spirit and scope of the present disclosure.

100: Package structure 110: Carrier 112: front 114: Back 120: Interconnect structure 122a, 122b, 122c, 122d, 122e: Dielectric layer 124a, 124b, 124c, 124d, 124e, 124f: metal layers 130a: first anti-warping film 130b: Second anti-warping film 134,135: Back 200: Electronics 210: Wafer 212: Conductive Structures 220: Molded material 230: circuit board 232: Conductive Structures L: dotted line S1, S2, S3, S4, S5: Steps W1: first warp value W2: Second warp value

Aspects of the present disclosure are best understood from the following description when read in conjunction with the accompanying drawings. Note that in accordance with standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion. FIG. 1 is a cross-sectional view of a package structure according to an embodiment of the present disclosure. FIG. 2 is a flowchart of a method for manufacturing a package structure according to an embodiment of the present disclosure. FIG. 3 to FIG. 8 are cross-sectional views of each step of a manufacturing method of a package structure according to an embodiment of the present disclosure. FIG. 9 is a cross-sectional view of the package structure after bonding and molding processes according to an embodiment of the present disclosure. FIG. 10 is a cross-sectional view of the interconnection structure of FIG. 9 after being bonded to a circuit board.

Domestic storage information (please note in the order of storage institution, date and number) none Foreign deposit information (please note in the order of deposit country, institution, date and number) none

100: Package structure

110: Carrier

112: front

114: Back

120: Interconnect structure

122a, 122b, 122c, 122d, 122e: Dielectric layer

124a, 124b, 124c, 124d, 124e, 124f: metal layers

130a: first anti-warping film

130b: Second anti-warping film

134,135: Back

Claims (17)

A package structure, comprising: a carrier; an interconnection structure located on the front side of the carrier, wherein the interconnection structure comprises N layers of dielectric layers and a plurality of layers of metal layers, and N is a positive integer greater than or equal to 3; and a plurality of Anti-warping film, located on the back of the carrier, wherein the number of these anti-warping films is a positive integer obtained by unconditional rounding of N/2, and the materials of these anti-warping films include epoxy resin and different weights percent concentration of curing agent. The package structure of claim 1, wherein the thicknesses of the anti-warpage films are different. The package structure of claim 1, wherein the thermal expansion coefficients of the anti-warping films are in the range of 40 ppm/°C to 70 ppm/°C. A manufacturing method of a package structure, comprising: forming a first part of an interconnection structure on the front surface of a carrier; measuring a first warpage value of the carrier; when the first warpage value is greater than a predetermined value, heat pressing a first anti-warping film on the back of the carrier; hard-baking the first anti-warping film; and forming a second portion of the interconnect structure on the first portion. The manufacturing method of the package structure according to claim 4, further comprising: measuring a second warpage value of the carrier after forming the second part of the interconnect structure. The manufacturing method of the package structure according to claim 5, further comprising: when the second warpage value is greater than the predetermined value, hot pressing a second anti-warpage film on the back of the first anti-warpage film. The manufacturing method of the package structure according to claim 6, further comprising: before hot pressing the second anti-warping film on the back of the first anti-warping film, inverting the carrier to make the first anti-warping film Back side up. The manufacturing method of the package structure according to claim 7, further comprising: after hot pressing the second anti-warping film on the back of the first anti-warping film, turning the carrier again to make the second anti-warping film back side down. The manufacturing method of the package structure according to claim 6, further comprising: hard-baking the second anti-warping film. The manufacturing method of the package structure according to claim 9, wherein the temperature of hard-baking the second anti-warping film is in the range of 170°C to 180°C. The manufacturing method of the package structure according to claim 6, wherein the temperature at which the second anti-warpage film is hot-pressed on the backside of the first anti-warpage film is in the range of 70°C to 90°C. The manufacturing method of the package structure according to claim 4, further comprising: turning the carrier so that the backside of the carrier faces upwards before hot pressing the first anti-warping film on the backside of the carrier. The manufacturing method of the package structure according to claim 12, further comprising: after hot pressing the first anti-warping film on the back of the carrier, turning the carrier again so that the back of the first anti-warping film faces down. The manufacturing method of a package structure as claimed in claim 4, wherein the predetermined value is in the range of 0.8 mm to 1.2 mm. The manufacturing method of the package structure according to claim 4, wherein the temperature of hot pressing the first anti-warpage film on the backside of the carrier is in the range of 70°C to 90°C. The manufacturing method of the package structure according to claim 4, wherein the temperature of hard-baking the first anti-warping film is in the range of 170°C to 180°C. The manufacturing method of the package structure as claimed in claim 4, wherein the second part of the interconnect structure is formed on the first part so that the first part and the second part together comprise three or more dielectric layers.

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