TWI762279B - Semiconductor part protective coating and method of fabricating the same - Google Patents
Semiconductor part protective coating and method of fabricating the same Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
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- H01J37/32477—Vessel characterised by the means for protecting vessels or internal parts, e.g. coatings
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/04—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings of inorganic non-metallic material
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- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
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- H01J37/16—Vessels; Containers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32458—Vessel
- H01J37/32477—Vessel characterised by the means for protecting vessels or internal parts, e.g. coatings
- H01J37/32495—Means for protecting the vessel against plasma
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- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J9/00—Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
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Abstract
Description
本發明是指一種半導體零件保護塗層及其製造方法,特別是指一種具有第一晶種層的半導體零件保護塗層及其製造方法。 The present invention refers to a protective coating for semiconductor parts and a manufacturing method thereof, in particular to a protective coating for semiconductor parts having a first seed layer and a manufacturing method thereof.
在半導體技術產業中,常用之半導體製程如化學氣相沉積(CVD)、物理氣相沉積(PVD)、反應離子蝕刻(RIE,Reactive Ion Etching)、面板及自動化設備運用等等,均採用陶瓷層來保護腔體內之金屬部件。由於電漿蝕刻是將電磁能量運用在含有化學反應成分的氣體(如氟或氯)中進行,電漿會釋放帶電的離子並撞擊晶圓以蝕刻材料,並產生化學反應。該電漿與被蝕刻的材料交互作用形成揮發性或非揮發性的殘留物。因此,在半導體零件的金屬層上方的陶瓷層便成為很好的防護層。此外,當半導體零件暴露在氟基電漿時,經過腐蝕後之陶瓷層會被氟化而生成顆粒,此顆粒會汙染腔體環境,導致半導體零件產生缺陷。 In the semiconductor technology industry, commonly used semiconductor processes such as chemical vapor deposition (CVD), physical vapor deposition (PVD), reactive ion etching (RIE, Reactive Ion Etching), panel and automated equipment applications, etc., all use ceramic layers To protect the metal parts in the cavity. Because plasma etching uses electromagnetic energy in a gas containing chemically reactive components, such as fluorine or chlorine, the plasma releases charged ions and strikes the wafer to etch the material and create a chemical reaction. The plasma interacts with the etched material to form volatile or non-volatile residues. Therefore, the ceramic layer above the metal layer of the semiconductor part becomes a good protective layer. In addition, when the semiconductor part is exposed to the fluorine-based plasma, the etched ceramic layer will be fluorinated to generate particles, which will pollute the cavity environment and cause defects in the semiconductor part.
目前用來保護半導體零件的抗電漿蝕刻塗層是使用電漿噴塗為主。然而,由於典型的抗電漿蝕刻塗層為多晶陶瓷,多晶陶瓷中晶粒邊界蝕刻速率較快,容易造成蝕刻後的表面粗糙度增加以及形成汙染。 The anti-plasma etch coatings currently used to protect semiconductor parts are mainly plasma sprayed. However, since the typical anti-plasma etching coating is polycrystalline ceramics, the grain boundary etching rate in polycrystalline ceramics is relatively fast, which is likely to cause increased surface roughness and contamination after etching.
隨著半導體技術的成長,元件微小化為最大重點,與之相應的對缺陷敏感性會增加,元件所允許的顆粒與污染物會變得更加嚴格。為了減少在製程時由腔體所造成之顆粒汙染與缺陷,目前之技術通常著重在材料的改變如Y2O3、YF3、 YOF、Y3Al5O12(YAG)、Er3Al5O12(EAG)和Y2O3-ZrO2等固溶體或是包括以Y2O3與Al2O3為主之固溶體並添加稀土氧化物如Er2O3、Nd2O3、CeO2、Sm2O3、Yb2O3、La2O3、Sc2O3等之陶瓷材料,廣泛而言,為具備較佳耐電漿腐蝕之目的,抗電漿腐蝕層可選自質量較種之過度金屬所形成之陶瓷材料,如元素周期表原子序39至80之過度金屬的氧化物、氮化物、氟化物等,亦可以不同比例之過度金屬氧化物、氮化物或氟化物形成抗電漿腐蝕層,或形成多層膜型態,以進一步提升其抗電漿腐蝕層之能力。 As semiconductor technology grows, component miniaturization becomes the greatest focus, with the corresponding increase in susceptibility to defects and stricter tolerances for particles and contaminants. In order to reduce the particle contamination and defects caused by the cavity during the process, the current technology usually focuses on the change of materials such as Y 2 O 3 , YF 3 , YOF, Y 3 Al 5 O 12 (YAG), Er 3 Al 5 Solid solutions such as O 12 (EAG) and Y 2 O 3 -ZrO 2 or solid solutions containing mainly Y 2 O 3 and Al 2 O 3 and adding rare earth oxides such as Er 2 O 3 and Nd 2 O 3. Ceramic materials such as CeO 2 , Sm 2 O 3 , Yb 2 O 3 , La 2 O 3 , Sc 2 O 3 , etc. Generally speaking, for the purpose of better resistance to plasma corrosion, the anti-plasma corrosion layer is optional Ceramic materials formed from transition metals of higher quality, such as oxides, nitrides, fluorides of transition metals with atomic numbers 39 to 80 in the periodic table of elements, or transition metal oxides, nitrides or fluorine in different proportions The compound forms an anti-plasma corrosion layer, or forms a multi-layer film type to further enhance its ability to resist the plasma corrosion layer.
然而,根據專利號I389248所述,使用原子層沈積(Atomic Layer Deposition,ALD)所鍍出具有晶格方向之抗電漿層比沉積方式如化學氣相沉積(CVD)、物理氣相沉積(PVD)、電漿噴塗(Plasma Thermal Spray)所形成的抗電漿層具有更加的保護性。但是,需要極低的沉積速率才會生長成具有晶格方向的鍍層。並且,當需要沉積出所適用的厚度的抗電漿層時,將耗費大量的時間與成本。 However, according to Patent No. I389248, using atomic layer deposition (ALD) to deposit an anti-plasma layer with a lattice direction than deposition methods such as chemical vapor deposition (CVD), physical vapor deposition (PVD) ), the anti-plasma layer formed by plasma spraying (Plasma Thermal Spray) has more protection. However, extremely low deposition rates are required to grow a coating with a lattice orientation. Moreover, when it is necessary to deposit a suitable thickness of the anti-plasma layer, it will consume a lot of time and cost.
因此,目前亟需新的半導體零件保護塗層之製作方法或自身結構上之改變,以達到高產品之特性的要求。 Therefore, there is an urgent need for a new fabrication method of a protective coating for semiconductor parts or a change in its own structure to meet the requirements of high product characteristics.
本發明提供一種半導體零件保護塗層,該半導體零件保護塗層的製程時間較短,可降低製造成本。並且,該半導體零件保護塗層能提升半導體零件抗電漿腐蝕的特性以減少半導體零件遭受汙染。 The present invention provides a protective coating for semiconductor parts, the process time of the protective coating for semiconductor parts is short, and the manufacturing cost can be reduced. In addition, the protective coating for the semiconductor part can improve the anti-plasma corrosion property of the semiconductor part so as to reduce the contamination of the semiconductor part.
本發明之半導體零件保護塗層是應用於一半導體零件,半導體零件保護塗層包括一第一晶種層及一第一零件保護層。其中,第一晶種層是沉積於半導體零件的表面。此外,第一零件保護層是沉積於該第一晶種層的表面,以 使該第一零件保護層之表面的晶格方向相同於第一晶種層之表面的晶格方向。其中,第一零件保護層的厚度是第一晶種層的厚度的7倍或7倍以上。 The semiconductor component protective coating of the present invention is applied to a semiconductor component, and the semiconductor component protective coating includes a first seed layer and a first component protective layer. Wherein, the first seed layer is deposited on the surface of the semiconductor component. In addition, a first part protective layer is deposited on the surface of the first seed layer, so as to The crystal lattice direction of the surface of the first part protective layer is the same as the crystal lattice direction of the surface of the first seed crystal layer. Wherein, the thickness of the protective layer of the first part is 7 times or more than the thickness of the first seed crystal layer.
本發明另一實施例之半導體零件保護塗層是應用於一半導體零件,半導體零件保護塗層包括一第一晶種層、一黏著層及一第一零件保護層。其中,第一晶種層是沉積於半導體零件的表面,而黏著層是位於該第一晶種層及該半導體零件之間。此外,第一零件保護層是沉積於該第一晶種層的表面,以使該第一零件保護層之表面的晶格方向相同於第一晶種層之表面的晶格方向。其中,第一零件保護層的厚度是第一晶種層的厚度的7倍或7倍以上。 Another embodiment of the semiconductor component protective coating of the present invention is applied to a semiconductor component. The semiconductor component protective coating includes a first seed layer, an adhesive layer and a first component protective layer. Wherein, the first seed layer is deposited on the surface of the semiconductor component, and the adhesive layer is located between the first seed layer and the semiconductor component. In addition, the first component protective layer is deposited on the surface of the first seed crystal layer, so that the crystal lattice direction of the surface of the first component protective layer is the same as the crystal lattice direction of the surface of the first seed crystal layer. Wherein, the thickness of the protective layer of the first part is 7 times or more than the thickness of the first seed crystal layer.
在上所述之半導體零件保護塗層還包括至少一第二晶種層及至少一第二零件保護層,第二晶種層是沉積於第一零件保護層的表面,而第二零件保護層是沉積於第二晶種層的表面,以使第二零件保護層之表面的晶格方向相同於第二晶種層之表面的晶格方向。 The above-mentioned semiconductor component protective coating further includes at least one second seed layer and at least one second component protective layer. The second seed layer is deposited on the surface of the first component protective layer, and the second zero layer is deposited on the surface of the first component protective layer. The component protection layer is deposited on the surface of the second seed crystal layer, so that the crystal lattice direction of the surface of the second component protection layer is the same as the crystal lattice direction of the surface of the second seed crystal layer.
在上所述之半導體零件保護塗層,第二晶種層之表面的晶格方向不同於第一晶種層之表面的晶格方向。 In the above-mentioned protective coating for semiconductor parts, the crystal lattice direction of the surface of the second seed layer is different from the crystal lattice direction of the surface of the first seed layer.
在上所述之半導體零件保護塗層,第二零件保護層之表面的晶格方向不同於第一零件保護層之表面的晶格方向。 In the above-mentioned protective coating for semiconductor parts, the lattice direction of the surface of the protective layer of the second part is different from the lattice direction of the surface of the protective layer of the first part.
在上所述之半導體零件保護塗層,第一零件保護層之沉積速率為該第一晶種層之沉積速率的20倍或20倍以上。 In the above-mentioned protective coating for semiconductor parts, the deposition rate of the first part protective layer is 20 times or more the deposition rate of the first seed layer.
在上所述之半導體零件保護塗層,第一晶種層選自元素周期表原子序39至80之過渡金屬元素之氧化物、氮化物、硼化物、氟化物之一或者其任意組合。 In the above-mentioned protective coating for semiconductor parts, the first seed layer is selected from one of oxides, nitrides, borides, fluorides or any combination thereof of transition metal elements with atomic numbers 39 to 80 of the periodic table.
在上所述之半導體零件保護塗層,第一零件保護層選自元素周期表原子序39至80之過渡金屬元素之氧化物、氮化物、硼化物、氟化物之一或者其任意組合。 In the above-mentioned protective coating for semiconductor parts, the first protective layer is selected from one of oxides, nitrides, borides, fluorides or any combination of transition metal elements with atomic numbers 39 to 80 of the periodic table.
在上所述之半導體零件保護塗層,第一晶種層的材質不同於該第一零件保護層的材質。 In the above-mentioned protective coating for semiconductor parts, the material of the first seed layer is different from the material of the protective layer of the first part.
在上所述之半導體零件保護塗層,第一零件保護層之表面的晶格方向沿最密堆積方向。 In the above-mentioned protective coating for semiconductor parts, the crystal lattice direction of the surface of the protective layer of the first part is along the closest packing direction.
在上所述之半導體零件保護塗層,第一零件保護層的熱膨脹係數介於6.0x10-6/℃至8.0x10-6/℃之間。 In the above-mentioned protective coating for semiconductor parts, the thermal expansion coefficient of the protective layer for the first part is between 6.0x10 -6 /°C and 8.0x10 -6 /°C.
在上所述之半導體零件保護塗層,第一零件保護層的抗折強度大於150MPa。 In the above-mentioned protective coating for semiconductor parts, the flexural strength of the protective layer for the first part is greater than 150 MPa.
在上所述之半導體零件保護塗層,其中該黏著層的材質為選自氧化鋁(Al2O3)、氮化鋁(AlN)、氟化鋁(AlF3)之一或其任意組合。 In the above-mentioned protective coating for semiconductor parts, the material of the adhesive layer is one selected from aluminum oxide (Al 2 O 3 ), aluminum nitride (AlN), aluminum fluoride (AlF 3 ) or any combination thereof.
本發明另一目的是提供一種半導體零件保護塗層之製造方法,本方法能縮短半導體零件保護塗層的製作時間,所以能降低半導體零件保護塗層的生產成本。並且,本方法所製作出的半導體零件保護塗層能提升半導體零件抗電漿腐蝕的特性並減少半導體零件遭受汙染。 Another object of the present invention is to provide a method for manufacturing the protective coating for semiconductor parts, which can shorten the production time of the protective coating for semiconductor parts, so that the production cost of the protective coating for semiconductor parts can be reduced. In addition, the protective coating of the semiconductor parts produced by the method can improve the anti-plasma corrosion properties of the semiconductor parts and reduce the contamination of the semiconductor parts.
本發明之半導體零件保護塗層之製造方法包括下列步驟。首先,沉積一第一晶種層於一半導體零件的表面。之後,沉積一第一零件保護層於該第一晶種層的表面,以使該第一零件保護層之表面的晶格方向相同於該第一晶種層之表面的晶格方向。其中,第一零件保護層的厚度是第一晶種層的厚度的7倍或7倍以上。 The manufacturing method of the protective coating for semiconductor parts of the present invention includes the following steps. First, a first seed layer is deposited on the surface of a semiconductor component. Afterwards, a first component protective layer is deposited on the surface of the first seed crystal layer, so that the crystal lattice direction of the surface of the first component protective layer is the same as the crystal lattice direction of the surface of the first seed crystal layer. Wherein, the thickness of the protective layer of the first part is 7 times or more than the thickness of the first seed crystal layer.
在上所述之半導體零件保護塗層之製造方法,第一零件保護層之沉積速率是該第一晶種層之沉積速率的20倍或20倍以上。 In the above-mentioned manufacturing method of the protective coating for semiconductor parts, the deposition rate of the protective layer of the first part is 20 times or more than the deposition rate of the first seed layer.
在上所述之半導體零件保護塗層之製造方法,第一晶種層的材質不同於該第一零件保護層的材質。 In the above-mentioned manufacturing method of the protective coating for semiconductor parts, the material of the first seed layer is different from the material of the protective layer of the first part.
在上所述之半導體零件保護塗層之製造方法,第一零件保護層之表面的晶格方向沿最密堆積方向。 In the above-mentioned manufacturing method of the protective coating for semiconductor parts, the lattice direction of the surface of the protective layer of the first part is along the closest packing direction.
在上所述之半導體零件保護塗層之製造方法,第一零件保護層的熱膨脹係數介於6.0x10-6/℃至8.0x10-6/℃之間。 In the above-mentioned manufacturing method of the protective coating for semiconductor parts, the thermal expansion coefficient of the protective layer for the first part is between 6.0×10 -6 /°C and 8.0×10 -6 /°C.
在上所述之半導體零件保護塗層之製造方法,第一零件保護層的抗折強度大於150MPa。 In the above-mentioned manufacturing method of the protective coating for semiconductor components, the flexural strength of the protective coating for the first component is greater than 150 MPa.
在上所述之半導體零件保護塗層之製造方法,在沉積第一晶種層的步驟後還包括下列步驟:進行預熱處理。 The above-mentioned manufacturing method of the protective coating for semiconductor parts further includes the following step after the step of depositing the first seed layer: preheating treatment.
在上所述之半導體零件保護塗層之製造方法,預熱處理的溫度為80℃或80℃以上。 In the above-mentioned manufacturing method of the protective coating for semiconductor parts, the temperature of the preheating treatment is 80°C or more.
在上所述之半導體零件保護塗層之製造方法,在沉積第一零件保護層後還包括下列步驟:進行持溫處理與降溫處理。 The above-mentioned manufacturing method of the protective coating for semiconductor parts further includes the following steps after depositing the first protective coating for the semiconductor parts: temperature-maintaining treatment and cooling treatment.
在上所述之半導體零件保護塗層之製造方法,持溫處理的溫度為80℃或80℃以上。 In the above-mentioned manufacturing method of the protective coating for semiconductor parts, the temperature of the temperature-holding treatment is 80°C or more.
在上所述之半導體零件保護塗層之製造方法,降溫處理的速率為每分鐘中下降5℃或每分鐘中下降超過5℃。 In the above-mentioned manufacturing method of the protective coating for semiconductor parts, the rate of the cooling treatment is 5°C per minute or more than 5°C per minute.
在上所述之半導體零件保護塗層之製造方法,在進行持溫處理與降溫處理後還包括下列步驟:進行回火處理。 The above-mentioned manufacturing method of the protective coating for semiconductor parts further includes the following steps after the temperature-maintaining treatment and the cooling-down treatment: tempering treatment.
在上所述之半導體零件保護塗層之製造方法,回火處理的溫度為500℃或500℃以上。 In the above-mentioned manufacturing method of the protective coating for semiconductor parts, the temperature of the tempering treatment is 500°C or more.
1、2、3、4:半導體零件保護塗層 1, 2, 3, 4: protective coating for semiconductor parts
11:第一晶種層 11: The first seed layer
11’:第二晶種層 11': second seed layer
12:第一零件保護層 12: The first part protective layer
12’:第二零件保護層 12': Second part protective layer
14:織構陶瓷層 14: Textured ceramic layer
15、15’:黏著層 15, 15': Adhesive layer
7:雷射退火處理機 7: Laser annealing machine
8:半導體零件 8: Semiconductor parts
S1~S7:步驟 S1~S7: Steps
圖1所繪示為本實施例之半導體零件保護塗層1及半導體零件8的示意圖。
FIG. 1 is a schematic diagram of the semiconductor component protective coating 1 and the
圖2所繪示為半導體零件保護塗層1經由雷射退火處理的示意圖。 FIG. 2 is a schematic diagram illustrating the laser annealing process of the protective coating 1 for semiconductor parts.
圖3所繪示為形成織構陶瓷層14的示意圖。
FIG. 3 is a schematic diagram of forming the textured
圖4所繪示為另一實施例之半導體零件保護塗層2及半導體零件8的示意圖。
FIG. 4 is a schematic diagram of a semiconductor component protective coating 2 and a
圖5A所繪示為再一實施例之半導體零件保護塗層3及半導體零件8的示意圖。
FIG. 5A is a schematic diagram of a semiconductor component
圖5B所繪示為又一實施例之半導體零件保護塗層4及半導體零件8的示意圖。
FIG. 5B is a schematic diagram of a semiconductor component
圖6所繪示為本發明之半導體零件保護塗層之製造方法的流程圖。 FIG. 6 is a flow chart of the manufacturing method of the protective coating for semiconductor parts of the present invention.
請參閱圖1,圖1所繪示為本實施例之半導體零件保護塗層1及半導體零件8的示意圖。本實施例之半導體零件保護塗層1是應用於一半導體零件8,半導體零件保護塗層1是包括一具有晶格方向的第一晶種層11及一第一零件保護層12。其中,第一晶種層11的材質例如為選自元素周期表原子序39-80之過渡金屬元素之氧化物、氮化物、硼化物、氟化物之一或者其任意組合。
Please refer to FIG. 1 . FIG. 1 is a schematic diagram of the semiconductor component protective coating 1 and the
在本實施例中,第一晶種層11是使用低沉積速率製程沉積在半導體零件8的上方表面,且半導體零件8是至少沉積一層具晶格最密堆積方向之第一晶種層11。具體來說,低沉積速率製程例如為化學氣相沉積(CVD)、物理氣相沉積
(PVD)、分子束磊晶(MBE)、及原子層沉積(ALD)等,且第一晶種層11所沉積之層厚度是介於0.3um至8um,而第一晶種層11的熱膨脹係數是介於6.0x10-6/℃至8.0x10-6/℃之間,其抗折強度介於150MPa至400MPa之間。
In this embodiment, the
此外,第一零件保護層12的材質例如為選自元素周期表原子序39-80之過度金屬之氧化物、氮化物、硼化物、氟化物之一或者其任意組合。值得注意的是,在其他實施例中,第一零件保護層12的材質可不同於第一晶種層11的材質。
In addition, the material of the first part
在本實施例中,第一零件保護層12是使用高沉積速率製程沉積在第一晶種層11的上方表面,該高沉積速率製程例如為真空電漿噴塗(VPS)、大氣電漿噴塗(APS)、懸浮液電漿噴塗(SPS)、氣溶膠沉積(ADM)等。值得注意的是,使用高沉積速率製程的第一零件保護層12與使用低沉積速率製程的第一晶種層11是有相同結晶方向。具體來說,第一零件保護層12之表面的晶格方向是相同於第一晶種層11之表面的晶格方向,以氧化釔(Y2O3)與釔鋁石榴石(YAG)為例會形成(2 2 2)與(4 2 0)最密堆積方向,所以沉積之第一零件保護層12的厚度可介於60um至200um的範圍。
In this embodiment, the first component
此外,第一零件保護層12之熱膨脹係數介於6.0x10-6/℃至8.0x10-6/℃之間,第一零件保護層12的抗折強度是介於150MPa。倘若第一零件保護層12和第一晶種層11兩者的膨脹係數相差過大,會在預熱處理製程、降溫處理製程(下列段落會再詳細說明)甚至是在蝕刻環境時,因溫度急遽變化造成第一零件保護層12產生裂痕,使成品強度下降或產生嚴重缺陷。另外,本實施例之第一晶種層11之功用在於提升第一零件保護層12之結晶速率並有助於形成具有優選方向性之晶相(Texture Grain Structure),使第一零件保護層12達到最密堆積晶體結構來提升
抗電漿腐蝕之特性,其中,第一零件保護層12之沉積速率為第一晶種層11之沉積速率的20倍或20倍以上,而第一零件保護層12的厚度是第一晶種層11的厚度的7倍或7倍以上。並且,在較佳的實施例中,第一零件保護層12的厚度是第一晶種層11的厚度的15倍以上,利用此方法可以大幅縮短半導體零件保護塗層1製程時間並製造出高品質之抗電漿塗層。
In addition, the thermal expansion coefficient of the first part
請參閱圖2,圖2所繪示為半導體零件保護塗層1經由雷射退火處理的示意圖。本實施例之半導體零件保護塗層1可由雷射退火方式來增進抗電漿膜層之性能。詳細來說,藉由一雷射退火處理機7雷射照射第一零件保護層12,進行高溫熔融並利用低沉積速率層(第一晶種層11)作為晶種而觸發高沉積速率層(第一零件保護層12)之單一晶格方向的成長,進而達到具有最密堆積方向之織構陶瓷層14(請參閱圖3,圖3所繪示為形成織構陶瓷層14的示意圖。)。並且,在同時退火的過程中,第一零件保護層12變為熔融態可降低快速沉積而形成的孔隙。
Please refer to FIG. 2 . FIG. 2 is a schematic diagram illustrating the laser annealing process of the protective coating 1 of the semiconductor part. The protective coating 1 of the semiconductor part of the present embodiment can be used to improve the performance of the anti-plasma layer by means of laser annealing. In detail, the first part
請參閱圖4,圖4所繪示為另一實施例之半導體零件保護塗層2及半導體零件8的示意圖。半導體零件保護塗層2與半導體零件保護塗層1的差異在於:半導體零件保護塗層2還包括一黏著層15,黏著層15是位於第一晶種層11及半導體零件8之間。具體話說,在半導體零件8(鋁或含陽極處理之部件)上以低沉積速率沉積一層具緻密結構之黏著層15。其中,黏著層15的材質可選自氧化鋁(Al2O3),氮化鋁(AlN)或氟化鋁(AlF3)之一或其組合。黏著層15之功用在於加強後續第一零件保護層12與半導體零件8之附著力,所沉積之黏著層15的厚度可介於0.1um至5um,且黏著層15之熱膨脹係數是介於6.0x10-6/℃至11.0x10-6/℃
之間,黏著層15的抗折強度介於300MPa至700MPa之間,若強度不足會造成使用上之風險。
Please refer to FIG. 4 . FIG. 4 is a schematic diagram of a semiconductor component protective coating 2 and a
請參閱圖5A,圖5A所繪示為再一實施例之半導體零件保護塗層3及半導體零件8的示意圖。半導體零件保護塗層3與半導體零件保護塗層1的差異在於:半導體零件保護塗層3還包括一第二晶種層11’及第二零件保護層12’。其中,第二零件保護層12’是沉積在第二晶種層11’的上方表面,第二零件保護層12’所沉積之陶瓷層厚度可介於40um至60um,而第二晶種層11’是沉積在第一零件保護層12的上方表面,第二晶種層11’所沉積之陶瓷層厚度可介於0.3um至3um。因此,半導體零件保護塗層3相當於兩組半導體零件保護塗層1進行堆疊,使其晶體織構化更佳。值得注意的是,第二零件保護層12’的材質與第一零件保護層12的材質可以不一樣,兩者的晶格方向也可以不一樣。同理,第二晶種層11’的材質也能不同於第一晶種層11的材質,而第二晶種層11’的晶格方向也能不同於第一晶種層11的晶格方向。這樣一來,便能進一步強化半導體零件保護塗層3之強度。
Please refer to FIG. 5A . FIG. 5A is a schematic diagram of a semiconductor component
上述中,半導體零件保護塗層3是相當於使用兩組半導體零件保護塗層1進行堆疊,第一晶種層11與第一零件保護層12的組合可視為第一組,第二晶種層11’與第二零件保護層12’的組合可視為第二組。然而,在其他的實施例中,半導體零件保護塗層3也可使用更多組的半導體零件保護塗層1進行相互堆疊,例如:三組或三組以上,同樣能強化整體塗層的強度。
In the above, the semiconductor component
圖5B所繪示為又一實施例之半導體零件保護塗層4及半導體零件8的示意圖。半導體零件保護塗層4與半導體零件保護塗層3的差異在於:半導體零件保護塗層3還包括一黏著層15’,黏著層15’是位於第一晶種層11及半導體零件8之
間。其中,黏著層15’的材質可選自氧化鋁(Al2O3),氮化鋁(AlN)或氟化鋁(AlF3)之一或其組合。黏著層15’之功用同樣在加強後續第一零件保護層12與半導體零件8之附著力。
FIG. 5B is a schematic diagram of a semiconductor component
綜上所述,本發明之半導體零件保護塗層的製程時間較短,可降低製造成本。並且,該半導體零件保護塗層能提升半導體零件抗電漿腐蝕的特性以減少半導體零件遭受汙染。 To sum up, the process time of the protective coating for semiconductor parts of the present invention is short, and the manufacturing cost can be reduced. In addition, the protective coating for the semiconductor part can improve the anti-plasma corrosion property of the semiconductor part so as to reduce the contamination of the semiconductor part.
請參閱圖6,圖6所繪示為本發明之半導體零件保護塗層之製造方法的流程圖。半導體零件保護塗層之製造方法是包括下列步驟:
首先,請參閱步驟S1,提供一半導體零件8,半導體零件8例如為鋁或含陽極處理之部件。
Please refer to FIG. 6 . FIG. 6 is a flow chart of the manufacturing method of the protective coating for semiconductor parts of the present invention. The manufacturing method of the protective coating for semiconductor parts includes the following steps:
First, referring to step S1, a
之後,請參閱步驟S2,沉積一黏著層15於半導體零件8的表面。
After that, referring to step S2 , an
之後,請參閱步驟S3,沉積一第一晶種層11於黏著層15的表面。然而,在其他的實施例中,可以省略步驟S2,無須將黏著層15沉積於半導體零件8的表面上。因此,第一晶種層11會沉積於半導體零件8的表面。並且,第一晶種層11的表面具有一晶格方向。
After that, referring to step S3 , a
之後,請參閱步驟S4,進行預熱處理,預熱處理的溫度可在80℃或80℃以上,較佳之預熱處理的溫度為100℃以上。 After that, please refer to step S4 to perform preheating treatment. The temperature of the preheating treatment can be 80°C or above, and the preferred temperature of the preheating treatment is above 100°C.
之後,請參閱步驟S5,沉積一第一零件保護層12於第一晶種層11的表面,以使第一零件保護層12之表面的晶格方向相同於第一晶種層11之表面的晶格方向。值得注意的是,第一零件保護層12的厚度是第一晶種層11的厚度的7倍或7倍以上。
After that, please refer to step S5 , deposit a first component
之後,請參閱步驟S6,進行持溫處理與降溫處理。其中,持溫處理的溫度可在80℃或80℃以上,較佳之持溫處理的溫度為100℃或100℃以上,並以300℃為上限。其保溫時間為1分鐘以上。此外,降溫處理的速率為每分鐘中下降5℃或每分鐘中下降低於5℃,降溫速率越慢其結晶效果越佳。 After that, please refer to step S6 to perform the temperature-maintaining treatment and the cooling-down treatment. Wherein, the temperature of the temperature-maintaining treatment can be 80°C or above, preferably the temperature of the temperature-maintaining treatment is 100°C or above, and the upper limit is 300°C. The holding time is more than 1 minute. In addition, the rate of cooling treatment is 5°C per minute or lower than 5°C per minute, and the slower the cooling rate, the better the crystallization effect.
之後,請參閱步驟S7,進行回火處理,該回火處理的溫度為500℃或500℃以上。具體來說,透過後續的熱處理製程(回火處理)以增進膜層之結晶方向性與抗電漿特性,以雷射退火為例:利用高溫熔融抗電漿層形成燒結效果,並以第一晶種層11(中間層)作為晶種來觸發單一晶格方向的陶瓷成長,較佳為其結晶方向為最密堆積方向之織構陶瓷層。雷射退火之雷射的功率介於10W~100W之間如此保持薄膜表面溫度為500℃或500℃以上,若雷射功率過低則無改善的效果,若雷射功率過高,則可能會有膜層破裂產生,經由雷射退火後之第一零件保護層12的表面粗糙度是介於3um~6um。
After that, referring to step S7, a tempering treatment is performed, and the temperature of the tempering treatment is 500°C or above. Specifically, through the subsequent heat treatment process (tempering treatment), the crystallographic orientation and anti-plasma properties of the film layer are improved. Taking laser annealing as an example: the sintering effect is formed by melting the anti-plasma layer at high temperature, and the first The seed layer 11 (intermediate layer) acts as a seed to trigger the growth of ceramics in a single crystal lattice direction, preferably a textured ceramic layer whose crystallographic direction is the closest-packed direction. The power of the laser annealing laser is between 10W and 100W so that the surface temperature of the film is kept at 500℃ or above. If the laser power is too low, there will be no improvement effect. If the laser power is too high, it may There are film cracks, and the surface roughness of the first part
綜上所述,經由本發明所採用之技術手段,可在較低成本之下,生產具有一定之結晶方向性抗電漿層,提高在電漿環境中之抗電漿能力。 To sum up, through the technical means adopted in the present invention, an anti-plasma layer with a certain crystallographic orientation can be produced at a lower cost, and the anti-plasma capability in a plasma environment can be improved.
1:半導體零件保護塗層 1: Protective coating for semiconductor parts
11:第一晶種層 11: The first seed layer
12:第一零件保護層 12: The first part protective layer
8:半導體零件 8: Semiconductor parts
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