TWI675293B - A host boot detection method and its system - Google Patents

Abstract

A host startup detection system is electrically connected to a monitoring unit and is suitable for detecting a power management module included in a host, and includes a first logic element, a second logic element, and a status display element. The first logic element sends a power supply instruction set to the power management module, so that the power management module generates a set of power supply status signals in response to the power supply instruction set. The first logic element generates a detection data according to the power supply instruction set and the set of power supply status signals. The second logic element generates and outputs status information to the status display element according to the detection data. The monitoring unit sends a data request to the second logic element, so that the second logic element responds to the data request and converts the detection data into a string of information and sends it to the monitoring unit.

Description

Main machine startup detection method and system

The invention relates to a detection method and a system thereof, and particularly to a host startup detection method and a system thereof that achieve automatic detection during the startup process.

In the prior art, during the startup process of a host, a Complex Programmable Logic Device (CPLD) manages the startup timing of multiple power components in the power module of the host according to a predetermined power supply sequence.

However, the CPLD operates like the same black box. When the host fails to boot smoothly, the inspector cannot know which power component cannot be successfully activated during the boot sequence. The inspector can only check and measure one by one. The operation of each power element can know which power element has a problem. Therefore, it takes a lot of time to debug. In view of this, we must find a solution to improve the above problems and speed up the problem elimination.

Therefore, an object of the present invention is to provide a host startup detection method for automatically detecting a host's power management module during a host startup process.

Therefore, the host power-on detection method of the present invention is suitable for detecting a power management module included in a host, and is implemented by a host power-on detection system including a detection unit electrically connected to a monitoring unit, and A first logic element included in the host and electrically connected to the detection unit and the power management module. The detection unit includes a second logic element and a status display element electrically connected to the second logic element. The method includes the following steps:

(A) the first logic element transmits a power supply instruction set to the power management module, so that the power management module generates a set of power supply status signals in response to the power supply instruction set and transmits the signal to the first logic element;

(B) when the first logic element receives the set of power supply status signals, the first logic element generates a detection data according to the power supply instruction set and the set of power supply status signals, and transmits it to the second logic element;

(C) the second logic element generates and outputs status information to the status display element based on the detection data; and

(D) When the second logic element receives a data request from the monitoring unit, the second logic element converts the detection data into a string of information and transmits it to the monitoring unit.

Therefore, another object of the present invention is to provide a host boot detection system for automatically detecting a power management module of a host during the boot process of the host.

Therefore, the host startup detection system of the present invention is suitable for detecting a power management module included in a host, and includes a first logic element, a detection unit, and a monitoring unit.

The first logic element is included in the host and is electrically connected to the power management module, and transmits a power supply instruction set to the power management module, so that the power management module generates a set of power supply status signals in response to the power supply instruction set. And the first logic element generates a detection data according to the power supply instruction set and the set of power supply status signals.

The detection unit is electrically connected to the first logic element, and has a second logic element and a status display element electrically connected to the second logic element. The second logic element generates and outputs status information to the second logic element based on the detection data. Status display element.

The monitoring unit is electrically connected to the detection unit, and the monitoring unit sends a data request to the second logic element, so that the second logic element responds to the data request and converts the detection data into a string of information and sends the information to the monitoring unit. unit.

The effect of the present invention is that the power supply status signals of the power components are automatically collected by the first logic element, and the signals are converted into the detection data and provided to the status display element to display in real time the current host during the boot process. Power supply components have been activated, which is convenient for inspectors to find out the problem of power supply sequence of these power components. In addition, when an abnormality occurs in the inspection, the inspector can view further information through the monitoring unit for subsequent debugging. .

Before the present invention is described in detail, it should be noted that in the following description, similar elements are represented by the same numbers.

Referring to FIG. 1, an embodiment of a host power-on detection method according to the present invention is applicable to detect a power management module 11 and a module 12 to be monitored included in a host 1, and is implemented by a host power-on detection system. The host startup detection system is electrically connected to a monitoring unit 2, the power management module 11 and the module to be monitored 12, and includes a detection unit 14 electrically connected to the monitoring unit 2, and a host 1 and electrically The detection unit 14, the power management module 11 and the first logic element 13 of the module 12 to be monitored are connected. In this embodiment, the implementation of the detection unit 14 may be a test circuit board directly inserted on the host computer 1, or may be a test circuit board electrically connected to the host computer 1 through a connection line, and the first A logic element 13 is, for example, a complex programmable logic device (Complex Programmable Logic Device, CPLD for short), but is not limited thereto.

The power management module 11 includes a plurality of power components 111, 112, 113, and 114, and is coupled to a power supply (not shown). The module to be monitored 12 includes a plurality of components to be tested 121, 122, and 123. . In this embodiment, the first logic element 13 can trigger the power supply of the power supply, so that the power supply can directly or indirectly supply power to each power element 111/112/113/114, and each power element 111 / 112/113/114 is a power management IC (Power Management IC, PMIC for short). The implementation of these power management chips can be a transformer or a power converter, but not limited to this. Each power component is 111/112/113. / 114 may also be a Power Management Unit (PMU); among them, the enable pins in the power elements 111, 112, 113, and 114 are different from the general-purpose ones of the first logic element 13. The output pins of the General-Purpose Input / Output (hereinafter referred to as GPIO) are electrically connected. The power good pins of the power supply elements 111, 112, 113, and 114 are different from those of the first logic element 13. The GPIO input pins are electrically connected; each power element 111/112/113/114 can receive power directly or indirectly from the power supply, and can be activated according to a first predetermined sequence during the boot process of the host 1 And start normally in all of them The power supply then receives power from the power supply and transforms the received power to supply power (such as 3.3V, 5V, 12V, 24V, etc.) to the power required for the host 1 to run; the waiting test element 121, 122 and 123 are used to initialize the host device 1 according to a second predetermined sequence after the power components 111, 112, 113, and 114 are normally started (that is, normal power supply), and are used to transmit a The group indicates an initialization status signal of its initialization status to the first logic element 13, and the wait-for-measurement elements 121, 122, and 123 may be, for example, a Baseboard Management Controller (BMC) and a Central Processor (Central Processor). Unit (CPU for short) and Platform Controller Hub (PCH for short), but not limited to this.

The detection unit 14 includes a second logic element 141 and a status display element 142 electrically connected to the second logic element 141. In this embodiment, the second logic element 141 may be a CPLD, and the first logic element 13 and the second logic element 141 may communicate through a GPIO connector and its transmission method is serial transmission, but it is not This limit.

The monitoring unit 2 includes a control element 21 and a monitoring element 22. In this embodiment, the monitoring unit 2 is, for example, a computer, but not limited to this.

Referring to FIG. 1 and FIG. 2, the following describes in detail the steps of the detection method of the host 1 during the booting process of the host 1 according to the present invention, and the first power supply element 111 is 3.3V, 5V, 12V, and 24V, respectively. , The second power supply element 112, the third power supply element 113, and the fourth power supply element 114, and the first test element 121, the second test element 122, and the third test element 123 are respectively BMC, CPU, and PCH. Explanation, but not in this limit.

First, in step 30, the first logic element 13 transmits a power supply instruction set to the power management module 11. In this embodiment, the first logic element 13 (CPLD is used as an example in this embodiment) triggers the power supply to supply power by using the power supply instruction set, wherein the power supply instruction set has multiple instructions, and each instruction These correspond to one-bit logic values. The instructions are the GPIO output pins of the first logic element 13 which are electrically connected to the enable pins of the power elements 111, 112, 113, 114 in the first logic element 13. The voltage level of the enable pins generated to control the power elements 111, 112, 113, and 114 is switched from "low" to "high"; it is worth mentioning that at the beginning, when the first logic A GPIO output pin electrically connected to the enable pin (hereinafter referred to as the EN pin) of the first power supply element 111 in the element 13 controls the voltage level switching of the EN pin of the first power supply element 111 by transmitting a command When it reaches "high" (that is, a signal with a logic level of 1), at this moment, other GPIO output pins in the first logic element 13 that are electrically connected to the EN pins of the power supply elements 112, 113, 114 are transmitted correspondingly. The instructions make the EN pins of these power components 112, 113, 114 The voltage level is still “low” (logic level is 0) until a GPIO input pin of the first logic element 13 receives the power good pin of the first power element 111 (hereinafter After referring to the power good signal from the PG pin), it is determined that the voltage level of the PG pin of the first power supply element 111 has been switched to "high" (logic level is 1), and the first logic element is 13 then changes the bit logic value corresponding to the instruction transmitted by another GPIO output pin electrically connected to the EN pin of the second power supply element 112 to control the voltage level of the EN pin of the second power supply element 112 The bit is switched to “high”. At this time, the first logic element 13 continues to transmit an instruction to maintain the voltage level of the EN pin of the first power element 111 to the “high” state to the first power element 111. EN pin; that is, the power supply elements 111, 112, 113, and 114 follow the first schedule (power supply element 111 → power supply element 112 → power supply element 113 → power supply element 114) during the power-on process of the host 1. The sequence is started when the first logic element 13 controls the power sources When one of the components 111, 112, 113, and 114 is started, the power supply instruction transmitted from the first logic element 13 to the power management module 11 corresponds to one of the power elements 111, 112, 113, and 114. The first instruction is an enable instruction and is represented by "1". When the first logic element 13 controls one of the power supply elements 111, 112, 113, and 114 without starting, the first logic element 13 is transmitted to The power supply instruction set of the power management module 11 corresponding to one of the power supply elements 111, 112, 113, 114 is a disable instruction, and is represented by "0". For example, if the power supply instruction set is 1000, it means that the first logic element 13 controls the first power supply element 111 to start; if the power supply instruction set is 1100, it means that the first logic element 13 controls the first power supply Element 111 starts with the second power element 112; if the power supply instruction set is 1110, it means that the first logic element 13 controls the first power element 111, the second power element 112, and the third power element 113 to perform Start; if the power supply instruction set is 1111, it means that the first logic element 13 controls the first power element 111, the second power element 112, the third power element 113, and the fourth power element 114 to start.

In step 31, the first logic element 13 receives a set of power supply status signals generated by the power management module 11 in response to the power supply instruction set. It is worth mentioning that when the power supply element 111/112/113/114 was successfully started in response to the instruction of the first logic element 13, the power supply status signal responded by the power supply element 111/112/113/114 is "1" ; When the power supply element 111/112/113/114 fails and cannot be successfully started due to the instruction of the first logic element 13, or has not been started, the power supply status signal responded by the power supply element 111/112/113/114 is "0". For example, if the power supply status signal is 1000, it means that the first power supply element 111 is activated by the power supply instruction set; if the power supply instruction set is 1100, it means that the first power supply element 111 and the second power supply The components 112 are all started by being instructed by the power supply instruction set; if the power supply instruction set is 1110, it means that the first power supply component 111, the second power supply component 112, and the third power supply component 113 are all instructed by the power supply instruction set. Start up; if the power supply instruction set is 1111, it means that the first power supply element 111, the second power supply element 112, the third power supply element 113, and the fourth power supply element 114 are all started by instructions of the power supply instruction set.

In step 32, the first logic element 13 receives an initialization status signal indicating the initialization status of the group transmitted by the module 12 to be monitored. It is worth mentioning that the execution order of step 31 and step 32 can also be performed simultaneously. In addition, when the device under test 121/122/123 is successfully initialized, the initialization status signal transmitted by the device under test 121/122/123 is “1”; when the device under test 121/122/123 fails and cannot be successfully initialized , Or the initialization status signal transmitted by the device under test 121/122/123 is “0” when it is not initialized. If the bits of the set of initialization status signals are 100, it means that the first device under test 121 has been initialized, and the second device under test 122 and the third device under test 123 have not been initialized. The bits of the signal are 110, which means that the first DUT 121 and the second DUT 122 have been initialized, and the third DUT 123 has not been initialized. If the bits of the set of initialization status signals are The element is 010, which indicates that an abnormality occurs after the first DUT 121 is successfully initialized, the second DUT 122 has been initialized, and the third DUT 123 has not been initialized, and so on, so it is not repeated.

In step 33, after the first logic element 13 receives the set of power supply status signals from the power management module 11 and the set of initialization status signals from the set of modules to be monitored 12 indicating its initialization status, the The first logic element 13 generates a detection data according to the power supply instruction set, the set of power supply status signals, and the set of initialization status signals, and transmits the detection data to the second logic element 141.

Next, in step 34, after the second logic element 141 receives the detection data, the second logic element 141 generates and outputs status information to the status display element 142 according to the detection data. In this embodiment, the status display element 142 is a seven-segment display; wherein the status information indicates the instant startup status of the power supply elements 111, 112, 113, and 114 (i.e., can be The startup sequence code or component code corresponding to the several power components in the first predetermined sequence has been successfully started so far, and the instant initialization status of the waiting-to-be-measured components 121, 122, and 123 (that is, the initialization to the current (The initial sequence code or component code corresponding to the number of components to be tested in the second predetermined sequence). For example, since the power supply elements 111, 112, 113, 114 are activated in the first predetermined sequence during the boot process, the waiting test elements 121, 122, 123 are activated in the power supply elements 111, 112, After both 113 and 114 are started normally (that is, normal power supply), they will be initialized according to the second predetermined sequence. It is assumed that the first logic element 13 has now issued the power supply instruction set of 1110, but the power supply element 113 is unable to perform due to an abnormality. Normal startup, the detection data is 11101100000, of which the first 4 bits are the power supply instruction set 1110, and the 5th to 8th bits are the power supply status signals of these power components 111, 112, 113, 114, The power supply status signals indicate that the power element 111 is activated, the power element 112 is activated, the power element 113 is not activated, and the power element 114 is not activated. The last three bits are the waiting-for-measurement elements 121, 122, 123 is an initialization status signal. The set of initialization status signals indicates that the device under test 121 is not initialized, the device under test 122 is not initialized, and the device under test 123 is not initialized. Corresponding to the detection data 11101100000, the second logic element 141 will output status information uniquely corresponding to the detection data 11101100000. With the status information output by the second logic element 141, the inspector can infer based on the unique status information According to the power supply instruction set 1110, the power supply element 113 is instructed to start, but the power supply element 113 is not started. Therefore, the power supply element 113 may have failed and needs to be repaired.

In step 35, the first logic element 13 determines whether the power element of the power management module 11 that has been instructed to be started by the power supply instruction set has been activated according to the power supply instruction set and the set of power supply status signals. If the determination result is positive, the flow proceeds to step 36. Otherwise, the flow proceeds to step 37.

In this embodiment, since the set of power supply status signals has multiple bits for indicating whether the power supply elements 111, 112, 113, and 114 are activated; it is assumed that if the power supply instruction set is 1000, the The first logic element 13 can determine whether the first power element 111 has been activated according to the first bit of the power supply status signal; if the power supply instruction set is 1100, the first logic element 13 can The first and second bits of the power supply status signal determine whether the first power supply element 111 and the second power supply element 112 have been activated; if the power supply instruction set is 1110, the first logic element 13 may be based on the The first to third bits of the group power supply status signal determine whether the first power supply element 111, the second power supply element 112, and the third power supply element 113 have been activated; if the power supply instruction set is 1111, the first A logic element 13 can determine whether the first power element 111, the second power element 112, the third power element 113, and the fourth power element 114 have been activated according to the first to fourth bits of the power supply status signal. . For example, if the power supply instruction set is 1000 and the power supply status signal is 1000, it means that the first power supply element 111 has been activated; if the power supply instruction set is 1100, and the first power supply status signal is the first If the bit is 1 000, it means that the first power supply element 111 has been activated and the second power supply element 112 is abnormal. If the power supply instruction set is 1100 and the first bit of the power supply status signal is 0100, then It indicates that the first power supply element 111 has been activated in a first power-on sequence of the first power supply element 111 during the startup process according to the first predetermined sequence, but the second power supply element 111 has been activated. In a second power-up sequence of the power supply element 112, an abnormality occurs in the first power supply element 111, the second power supply element 112 has been activated, and so on, and details are not described herein.

In addition, when the first logic element 13 determines that each of the power supply elements 111/112/113/114 activated by the instruction of the power supply instruction set is activated, the value of each element in the power supply instruction set and the set of power supply status signals The corresponding bit values of will be the same.

Next, in step 36, the first logic element 13 determines whether all the power elements 111, 112, 113, 114 of the power management module 11 are activated. If the result of the determination is yes, the process proceeds to step 37; if not, the process proceeds to step 38.

In step 37, the first logic element maintains the power supply instruction set during the previous execution of step 31, and returns to step 31.

In step 38, the first logic element 13 updates the power supply instruction set according to the first predetermined order, so that the updated power supply instruction set indicates the next power supply element in the power management module 11 that conforms to the first predetermined order. Start and return to step 31. In this embodiment, assuming that the power supply instruction set is 1000, the updated power supply instruction set is 1100, and the next power supply element of the first power supply element 111 that is activated by the power supply instruction set is 1000, namely Is the second power supply element 112.

In addition, when a tester wants to indicate the abnormality from the status information displayed on the status display element 142, and wants to further check the test result, the monitoring unit 2 can be used after the time that the normal power-on procedure of the host computer 1 is started. A control element 21 inputs a data request and transmits it to the second logic element 141 of the detection unit 14, so that the second logic element 141 responds to the data request, converts the detection data into a string of information, and transmits it to This is displayed in the monitoring element 22 of the monitoring unit 2. In the preferred embodiment, the string information indicates the power supply status of each power element 111/112/113/114 and the initialization status of each DUT. It is worth mentioning that the inspector can also use the control element 21 to further store the character string information into a text file for subsequent data analysis and use, so as to improve the design defect of the host 1.

In summary, the present invention automatically collects the power supply status signals of the power supply elements 111, 112, 113, and 114, and the initialization status signals of the wait-for-test components 121, 122, and 123 through the first logic element 13, and When the signal is converted into the detection data and provided to the status display element 142, the current power supply element of the host 1 during the startup process is displayed in real time, or when the power supply elements 111, 112, 113, 114 are normally started, Display the initialization status of the waiting-to-be-measured elements 121, 122, and 123, which is convenient for the inspector to find out the problem points of the power supply elements 111, 112, 113, and 114 during the power-on sequence, or the waiting-to-be-measured elements 121, 122, and 123. Which one fails to initialize; in addition, when an abnormality is detected, the inspector can check further information through the monitoring unit 2 to perform subsequent debugging, so it can indeed achieve the purpose of the invention.

However, the above are only examples of the present invention. When the scope of implementation of the present invention cannot be limited by this, any simple equivalent changes and modifications made according to the scope of the patent application and the contents of the patent specification of the present invention are still Within the scope of the invention patent.

1‧‧‧host

11‧‧‧Power Management Module

111‧‧‧first power supply element

112‧‧‧Second power supply element

113‧‧‧Third power supply element

114‧‧‧Fourth power supply element

12‧‧‧Monitoring module

121‧‧‧First DUT

122‧‧‧Second DUT

123‧‧‧Third component under test

13‧‧‧first logic element

14‧‧‧ Detection Unit

141‧‧‧Second logic element

142‧‧‧Status display element

2‧‧‧monitoring unit

21‧‧‧Control element

22‧‧‧ Surveillance element

30 ~ 38‧‧‧step

Other features and effects of the present invention will be clearly presented in the embodiment with reference to the drawings, wherein: FIG. 1 is a block diagram illustrating an embodiment of the host boot detection system of the present invention; and FIG. 2 is a The flowchart exemplifies how the host power-on detection system of this embodiment executes a power-on detection program.

Claims (10)

A host startup detection method is suitable for detecting a power management module included in a host, and is implemented by a host startup detection system. The host startup detection system includes a detection unit electrically connected to a monitoring unit, and a detection unit The host is electrically connected to the detection unit and a first logic element of the power management module. The detection unit includes a second logic element and a status display element electrically connected to the second logic element. The host power-on detection method includes the following Steps: (A) the first logic element sends a power supply instruction set to the power management module, so that the power management module generates a set of power supply status signals in response to the power supply instruction set and transmits the power supply status signal to the first logic element; (B) When the first logic element receives the group of power supply status signals, the first logic element generates a detection data according to the power supply instruction set and the group of power supply status signals, and transmits it to the second logic element; (C ) The second logic element generates and outputs a status information to the status display element according to the detection data; and (D) when the second logic element receives it A data request in the monitoring unit, the second logic element to be a sum of converting the detected data string information and transmitted to the monitoring unit. The host power-on detection method according to claim 1, wherein the power management module has a plurality of power components, and the power components are activated according to a first predetermined sequence during the host power-on process, in step (A) After that, the host power-on detection method also includes the following steps: (E) the first logic element determines, based on the power supply instruction set and the set of power supply status signals, whether the power supply element of the power management module that has been instructed to start by the power supply instruction set has been activated; and (F) when When the first logic element determines that none of the power supply elements instructed to be started by the power supply instruction set have been activated, the first logic element maintains the power supply instruction set during the previous execution of step (A), and returns to step (A) . According to the host power-on detection method described in claim 2, after step (E), the host power-on detection method further includes the following steps: (G) when the first logic element determines that the power supply element is started by the instruction of the power supply instruction set When all are activated, the first logic element determines whether all power elements of the power management module are activated; and (H) when the first logic element determines that all power elements of the power management module are not activated When the first logic element updates the power supply instruction set according to the first predetermined order, so that the updated power supply instruction set instructs the next power supply element in the power management module that conforms to the first predetermined order to start, and returns to Step (A). The host power-on detection method according to claim 1, wherein the power management module has a plurality of power components, and in step (D), the string information indicates a power supply status of each power component. The host power-on detection method according to claim 1, is also applicable to detecting a to-be-monitored module included in the host and electrically connected to the first logic element. The to-be-monitored module has a plurality of to-be-tested components. The test device is used for initializing according to a second predetermined sequence during the boot process of the host, and transmitting Sending a set of initialization status signals indicating the initialization status to the first logic element, wherein: in step (B), the first logic element will not only receive the set of power supply status signals from the power management module , And will also receive the set of initialization status signals from the module to be monitored. When the first logic element receives the set of power supply status signals and the set of initialization status signals, the first logic element is based on the power supply instruction set, The set of power supply status signals and the set of initialization status signals generate a detection data and are transmitted to the second logic element. The host power-on detection method according to claim 5, wherein in step (D), the string information further indicates an initialization state of each component under test. A host startup detection system is electrically connected to a monitoring unit and is suitable for detecting a power management module included in a host. The host startup detection system includes a first logic element included in the host and electrically connected to the power management module. And sends a power supply instruction set to the power management module, so that the power management module generates a set of power supply status signals in response to the power supply instruction set, and the first logic element supplies power according to the power supply instruction set and the group The status signal generates a detection data; and a detection unit, which is electrically connected to the first logic element, and has a second logic element and a status display element which is electrically connected to the second logic element, and the second logic element is based on the detection data To generate and output status information to the status display element. When the second logic element receives a data request from the monitoring unit, the second logic element converts the detection data into a string of information and sends it to the monitoring unit. unit. The host startup detection system according to claim 7, wherein the power management module has a plurality of power components, and the string information indicates a power supply status of each power component. The host startup detection system according to claim 7, is also suitable for detecting a module to be monitored included in the host and electrically connected to the first logic element. The module to be monitored has a plurality of components to be tested. The test device is used for initializing according to a second predetermined sequence during the booting process of the host, and transmits a set of initialization status signals indicating the initialization status to the first logic element, wherein the first logic element not only Receiving the set of power supply status signals from the power management module, and also receiving the set of initialization status signals from the module to be monitored, when the first logic element receives the set of power supply status signals and the set of initialization status When signalling, the first logic element generates a detection data according to the power supply instruction set, the set of power supply status signals, and the set of initialization status signals, and transmits the detection data to the second logic element. According to the host startup detection system described in claim 9, the string information also indicates an initialization status of each component under test.