TWI662630B - A separation apparatus and a method for separating a cap layer from a chip package by means of the separation apparatus - Google Patents
A separation apparatus and a method for separating a cap layer from a chip package by means of the separation apparatus Download PDFInfo
- Publication number
- TWI662630B TWI662630B TW104102651A TW104102651A TWI662630B TW I662630 B TWI662630 B TW I662630B TW 104102651 A TW104102651 A TW 104102651A TW 104102651 A TW104102651 A TW 104102651A TW I662630 B TWI662630 B TW I662630B
- Authority
- TW
- Taiwan
- Prior art keywords
- vacuum
- nozzle head
- layer
- chip package
- cover layer
- Prior art date
Links
Landscapes
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
本發明提供一種剝離裝置,用於剝離一基底和一蓋層所構成之堆疊結構,其包括一真空吸嘴頭,具相對上、下表面的吸盤、一貫穿吸盤上、下表面的真空孔及一耦接真空孔和一真空泵的中空真空管、一平台,位在真空吸嘴頭下方且與吸盤實質對準,使堆疊結構可固定於平台上、一控制機構,耦接至真空吸嘴頭,使其可相對於平台被舉升或下降、及一第一刀具,具有第一本體及一第一刀刃部。蓋層被真空吸嘴頭吸附後,第一刀刃部經堆疊結構的第一側壁切入基底與蓋層間的介面層,並藉由真空吸嘴頭的吸力及真空吸嘴頭被向上舉升產生的舉升力,使基底與蓋層被剝離。 The invention provides a peeling device for peeling a stacked structure composed of a substrate and a cover layer. The peeling device includes a vacuum nozzle head, suction cups with opposite upper and lower surfaces, a vacuum hole penetrating the upper and lower surfaces of the suction cup, and A hollow vacuum tube coupled to a vacuum hole and a vacuum pump, a platform, located below the vacuum nozzle head and substantially aligned with the suction cup, so that the stacking structure can be fixed on the platform, a control mechanism, coupled to the vacuum nozzle head, It can be lifted or lowered relative to the platform, and a first cutter has a first body and a first blade portion. After the cover layer is adsorbed by the vacuum nozzle head, the first blade portion is cut into the interface layer between the substrate and the cover layer through the first side wall of the stacked structure, and is generated by the suction force of the vacuum nozzle head and the vacuum nozzle head being lifted upwards. The lifting force causes the substrate and the cover layer to be peeled off.
Description
本發明是關於一種剝離裝置,且特別是有關於一種用於剝離晶片封裝體表面蓋層的剝離裝置,以及一種利用此剝離裝置剝離晶片封裝體表面改層的方法。 The invention relates to a peeling device, and in particular to a peeling device for peeling a surface cover layer of a chip package, and a method for peeling a surface of a chip package by using the peeling device.
具有感測功能之晶片封裝體的感測元件在傳統的製作過程中容易受到汙染或破壞,造成感測元件的效能降低,進而降低晶片封裝體的可靠度或品質。此外,為符合電子產品朝向微型化之發展趨勢,有關電子產品封裝構造中,用以承載半導體晶片的封裝基板如何降低厚度,亦為電子產品研發中一項重要的課題。有關封裝基板之製作過程中,其係於薄形芯層上製作線路。若封裝基板為符合微型化之要求,而選用厚度過薄的封裝基板時,不但封裝基板之生產作業性不佳,封裝基板也易因厚度過薄,而於封裝製程受到環境因素影響會產生變形翹曲或損壞,造 成產品不良等問題。 The sensing elements of a chip package with a sensing function are susceptible to contamination or damage during the traditional manufacturing process, resulting in a decrease in the efficiency of the sensing element, thereby reducing the reliability or quality of the chip package. In addition, in order to comply with the trend of miniaturization of electronic products, how to reduce the thickness of the packaging substrate used to carry semiconductor wafers in the packaging structure of electronic products is also an important issue in the development of electronic products. In the manufacturing process of the package substrate, the circuit is fabricated on a thin core layer. If the package substrate meets the requirements of miniaturization, when a package substrate with an excessively thin thickness is selected, not only the production workability of the package substrate is poor, but also the package substrate is liable to be deformed due to environmental factors in the packaging process due to the excessively thin thickness. Warping or damage Into defective products.
為克服前述問題,業界發展出SLP(Small Leadless Package)技術,該技術主要係於封裝基板製作時,預先於其另一側壓合一承載材,藉由承載材對封封基板之本體提供補強與支撐之功能,克服封裝基板厚度過薄,於封裝製程易變形與受損之問題,待封裝基板完成模壓製程後,再將該承載材予以移除,而符合微型化之產品需求。惟前述封裝基板中,承載材係壓合於封裝基板的本體一側,因承載材與本體間壓合後之結合力量大,後續將承載材剝離時,易因剝離手段之處理不當而使封裝基板之本體上的線路層受損。 In order to overcome the aforementioned problems, the industry has developed SLP (Small Leadless Package) technology. This technology is mainly used to pre-laminate a carrier material on the other side of the package substrate when it is manufactured. The carrier material provides reinforcement to the body of the sealed substrate. The function of supporting and overcoming the problem of overly thin package substrate and easy deformation and damage in the packaging process. After the packaging substrate completes the molding process, the carrier material is removed to meet the needs of miniaturized products. However, in the aforementioned packaging substrate, the carrier material is laminated on the body side of the packaging substrate. Due to the strong bonding force between the carrier material and the body, when the carrier material is subsequently peeled off, the packaging is likely to be caused by improper handling of the peeling means. The wiring layer on the substrate body is damaged.
本發明之一實施例提供一種剝離裝置,用於剝離包括一基底和一蓋層(cap layer)所構成之堆疊結構,此剝離裝置包括一真空吸嘴頭(vacuum nozzle head),具有相對上、下表面的吸盤、一貫穿吸盤的該上、下表面的真空孔及一耦接真空孔和一真空泵的中空真空管、一平台(stage),位在真空吸嘴頭下方,且與吸盤實質對準,使得堆疊結構可固定於平台上、一控制機構,耦接至真空吸嘴頭,使得真空吸嘴頭可相對於平台被舉升或下降、及一第一刀具,具有一第一本體及一連接第一本體的第一刀刃部(knife)。其中,蓋層被下表面抵壓住並因該真孔泵對中空 真空管抽真空而被吸附後,第一刀刃部經堆疊結構的第一側壁,切入一位在基底與蓋層間的介面層,並藉由真空吸嘴頭的吸力及真空吸嘴頭被向上舉升所產生的舉升力,使得基底與該蓋層被剝離。 An embodiment of the present invention provides a peeling device for peeling a stacked structure including a substrate and a cap layer. The peeling device includes a vacuum nozzle head, which has a top and a bottom. The suction cup on the lower surface, a vacuum hole passing through the upper and lower surfaces of the suction cup, a hollow vacuum tube coupled to the vacuum hole and a vacuum pump, and a stage are located under the vacuum nozzle head and are substantially aligned with the suction cup So that the stacking structure can be fixed on the platform, a control mechanism, coupled to the vacuum nozzle head, so that the vacuum nozzle head can be raised or lowered relative to the platform, and a first cutter having a first body and a Connected to the first knife of the first body. Wherein, the cover layer is pressed by the lower surface and is hollow due to the true hole pump. After the vacuum tube is evacuated and sucked, the first blade portion passes through the first side wall of the stacked structure, cuts an interface layer between the substrate and the cover layer, and is lifted upward by the suction force of the vacuum nozzle head and the vacuum nozzle head. The generated lifting force causes the substrate and the cover layer to be peeled off.
本發明又一實施例提供另一種剝離裝置,用於剝離由一基底和一蓋層(cap layer)所構成之堆疊結構,包括一真空吸嘴頭(vacuum nozzle head),具有相對上、下表面的吸盤、一環繞於下表面邊緣的邊框(edge frame)、一貫穿吸盤的上、下表面的真空孔及一耦接至真空孔和一真空泵的中空真空管、一平台(stage),位在真空吸嘴頭下方,且與吸盤實質對準,使得堆疊結構可固定於平台上、及一控制機構,耦接至該空吸嘴頭,使得真空吸嘴頭可被帶動旋轉,並相對於平台被舉升或下降。其中,蓋層被吸盤的下表面抵壓住且因該真空泵對該中空真空管抽真而被吸附後,該制機構使該真空吸嘴頭旋轉一段時間以產生扭力並同時帶動該空吸嘴頭向上舉升,使得蓋層在一扭力以及一向上舉升力的作用下被剝離。 Another embodiment of the present invention provides another peeling device for peeling a stacked structure composed of a substrate and a cap layer, including a vacuum nozzle head having opposite upper and lower surfaces. Suction cup, an edge frame surrounding the edge of the lower surface, a vacuum hole penetrating the upper and lower surfaces of the suction cup, a hollow vacuum tube coupled to the vacuum hole and a vacuum pump, a stage, located in a vacuum The nozzle head is below, and is substantially aligned with the suction cup, so that the stacking structure can be fixed on the platform, and a control mechanism is coupled to the empty nozzle head, so that the vacuum nozzle head can be driven to rotate and be relative to the platform. Raise or lower. Wherein, after the cover layer is pressed against the lower surface of the suction cup and is adsorbed because the vacuum pump draws the hollow vacuum tube, the mechanism rotates the vacuum nozzle head for a period of time to generate a torque and simultaneously drives the empty nozzle head. Lifting upward causes the cover layer to be peeled off under a torsional force and an upward lifting force.
本發明又一實施例提供一種剝離晶片封裝體表面蓋層的方法,其步驟包括提供一晶片封裝體蓋層(cap layer)的剝離裝置,包括一真空吸嘴頭(vacuum nozzle head),具有相對上、下表面的吸盤、一貫穿吸盤的上、下表面的真空孔及一耦接至真空孔和一真空泵的中空真空 管、一平台(stage),位在真空吸嘴頭下方,且與吸盤實質對準、一控制機構,耦接至真空吸嘴頭,使得真空吸嘴頭可相對於平台被舉升或下降、及一第一刀具,包括一第一本體及一連接第一本體的第一刀刃部(knife);提供一晶片封裝體並固定於平台上,晶片封裝體包括一基底,具有相對的第一表面及第二表面,其中鄰近第一表面處形成有一感測元件,而鄰近第二表面處則形成有一重佈線層,且重佈線層電性連接至感測元件、一蓋層,包括相對的第三表面及第四表面,第三表面包括一面積等於第一表面面積的結合區域(bonding area)及一環繞結合區域的周邊區域,蓋層藉由結合區域覆蓋於該基底的該第一表面上、及一黏著層,位於基底與蓋層之間,且覆蓋感測元件,其中,晶片封裝體更包括由蓋層、黏著層及基礎層之邊緣所成的第一、第二、第三、第四側壁,且第一、第二側壁彼此相對,第三、第四側壁彼此相對;使吸盤的下表面抵壓住蓋層的第四表面;利用該真空源對中空真空管抽取真空,使得蓋層被該吸盤所吸附;以及使第一刀具以相對於晶片封裝體運動的方式,朝晶片封裝體的第一側壁接近,進而使第一刀刃部進入鄰近第一側壁的周邊區域,沿著位在周邊區域的第三表面切入黏著層,並同時操作該控制機構以帶動真空吸嘴頭向上舉升,使得蓋層及黏著層被剝離該晶片封裝體。 Another embodiment of the present invention provides a method for peeling a surface cover layer of a chip package. The steps include providing a stripping device for a cap layer of a chip package, including a vacuum nozzle head. Suction cups on the upper and lower surfaces, a vacuum hole penetrating the upper and lower surfaces of the suction cup, and a hollow vacuum coupled to the vacuum holes and a vacuum pump A tube, a stage, located below the vacuum nozzle head and substantially aligned with the suction cup, a control mechanism coupled to the vacuum nozzle head, so that the vacuum nozzle head can be raised or lowered relative to the platform, And a first cutter, comprising a first body and a first knife connected to the first body; providing a chip package and fixing it on a platform, the chip package including a base having an opposite first surface And a second surface, wherein a sensing element is formed adjacent to the first surface, and a redistribution layer is formed adjacent to the second surface, and the redistribution layer is electrically connected to the sensing element and a capping layer, including the opposite first Three surfaces and a fourth surface. The third surface includes a bonding area with an area equal to the first surface area and a peripheral area surrounding the bonding area. The capping layer covers the first surface of the substrate through the bonding area. And an adhesive layer located between the substrate and the cover layer and covering the sensing element, wherein the chip package further includes first, second, third, and third layers formed by the edges of the cover layer, the adhesive layer and the base layer. Fourth side wall And the first and second side walls are opposed to each other, and the third and fourth side walls are opposed to each other; the lower surface of the suction cup is pressed against the fourth surface of the cover layer; the vacuum source is used to extract a vacuum from the hollow vacuum tube, so that the cover layer is Sucked by the suction cup; and moving the first cutter toward the first side wall of the chip package in a manner relative to the chip package, so that the first blade portion enters the peripheral region adjacent to the first side wall, and is located along the peripheral region. The third surface is cut into the adhesive layer, and at the same time, the control mechanism is operated to drive the vacuum nozzle head upward, so that the cover layer and the adhesive layer are peeled off the chip package.
本發明又一實施例提供另一種剝離晶片封裝體表面蓋層的方法,其步驟包括提供一晶片封裝體蓋層(cap layer)的剝離裝置,包括一真空吸嘴頭(vacuum nozzle head),具有相對上、下表面的吸盤、一貫穿該吸盤的上、下表面的真空孔及一耦接至真空孔和一真空泵的中空真空管、一平台(stage),位在真空吸嘴頭下方且與該吸盤實質對準、一控制機構,耦接至真空吸嘴頭,使得真空吸嘴頭可相對於該平台被舉升或下降、及一第一刀具,包括一第一本體及一連接第一本體的第一刀刃部(knife);提供一晶片封裝體並固定於該平台上,晶片封裝體包括一基底,具相對的第一表面及第二表面、一感測元件,設置於鄰近第一表面之處、一蓋層,具相對的第三表面及第四表面,第三表面覆蓋於基底的第一表面上、及一黏著層,位於基底與蓋層之間,且覆蓋感測元件,其中,晶片封裝體更包括由蓋層、黏著層及基底之邊緣所成的第一、第二、第三、第四側壁,且第一、第二側壁彼此相對,第三、第四側壁彼此相對;使吸盤的下表面抵壓住該蓋層的第四表面;利用真空泵對中空真空管抽取真空,使得晶片封裝體被吸盤所吸附;以及使第一刀具以相對於晶片封裝體運動的方式,朝晶片封裝體的第一側壁接近,進而使第一刀刃部沿著該蓋層的第三表面切入黏著層,並同時操作控制機構以帶動真空吸嘴頭向上舉升,使得蓋層被剝離晶片封裝體。 Another embodiment of the present invention provides another method for peeling a surface cover layer of a chip package. The steps include providing a stripping device for a cap layer of a chip package, including a vacuum nozzle head. A suction cup opposite to the upper and lower surfaces, a vacuum hole penetrating the upper and lower surfaces of the suction cup, a hollow vacuum tube coupled to the vacuum hole and a vacuum pump, and a stage are located under the vacuum nozzle head and communicate with the The suction cup is substantially aligned, a control mechanism is coupled to the vacuum nozzle head, so that the vacuum nozzle head can be raised or lowered relative to the platform, and a first cutter, including a first body and a connection to the first body A first knife edge (knife); a chip package is provided and fixed on the platform, the chip package includes a substrate with opposite first and second surfaces, and a sensing element disposed adjacent to the first surface A cover layer having a third surface and a fourth surface opposite to each other, the third surface covering the first surface of the substrate, and an adhesive layer located between the substrate and the cover layer and covering the sensing element, wherein , Chip The body further includes first, second, third, and fourth side walls formed by the cover layer, the adhesive layer, and the edge of the base, and the first and second side walls are opposed to each other, and the third and fourth side walls are opposed to each other; The lower surface of the chuck is pressed against the fourth surface of the cover layer; the hollow vacuum tube is evacuated by a vacuum pump so that the chip package is attracted by the chuck; and the first cutter is moved toward the chip package in a manner relative to the chip package. The first side wall of the body is approached, so that the first blade edge portion is cut into the adhesive layer along the third surface of the cover layer, and at the same time, the control mechanism is operated to drive the vacuum nozzle head to lift up, so that the cover layer is peeled off the chip package.
本發明又一實施例提供另一種剝離晶片封裝體表面蓋層的方法,一種剝離晶片封裝體表面蓋層的方法,其步驟包括提供一晶片封裝體蓋層(cap layer)的剝離裝置,包括一真空吸嘴頭(vacuum nozzle head),具有相對上、下表面的吸盤、一環繞於下表面邊緣的邊框(edge frame)、一貫穿吸盤的上、下表面的真空孔及一耦接至真空孔和一真空泵的中空真空管、一平台(stage),位在真空吸嘴頭下方,且與吸盤實質對準、及一控制機構,耦接至真空吸嘴頭,使得真空吸嘴頭可受控制地旋轉及相對於平台被舉升(lift)或下降;提供一晶片封裝體並固定於平台上,晶片封裝體包括一基底,具有相對的第一表面及第二表面,第二表面面對該平台、一感測元件,設置於鄰近第一表面之處、一蓋層,具有相對的第三表面及第四表面,及一環繞於第三、第四表面之間的側壁,第三表面覆蓋於基底的第一表面上、及一黏著層,位於基底與蓋層之間,且覆蓋感測元件;操作控制機構,使真空吸嘴頭朝平台下降,並以吸盤的下表面抵壓蓋層的第四表面,使吸盤的邊框緊抵蓋層的部分側壁;利用真空泵對中空真空管抽氣,以達到一預定的真空度Pi,使蓋層被該吸嘴頭吸附,Pi-90Kpa;以及操作控制機構,使真空吸嘴頭以300-750度/秒的轉速旋轉一tl時間以產生一扭力TF(torque force),並帶動真空吸嘴頭向上舉升以產生一向上舉升力LF(lift force),使得蓋層在 扭力及向上舉升力作用下被剝離晶片封裝體,其中0秒<tl<5秒。 Yet another embodiment of the present invention provides another method for peeling a surface cover layer of a chip package, and a method for peeling a surface cover layer of a chip package. The steps include providing a peeling device for a cap layer of a chip package, including: A vacuum nozzle head has suction cups facing the upper and lower surfaces, an edge frame surrounding the edge of the lower surface, a vacuum hole penetrating the upper and lower surfaces of the suction cup, and a vacuum hole coupled to the vacuum nozzle head. And a hollow vacuum tube of a vacuum pump, a stage, which is located below the vacuum nozzle head, is substantially aligned with the suction cup, and a control mechanism is coupled to the vacuum nozzle head, so that the vacuum nozzle head can be controlled Rotate and be lifted or lowered relative to the platform; provide a chip package and fix it on the platform, the chip package includes a substrate with opposite first and second surfaces, and the second surface faces the platform A sensing element is disposed adjacent to the first surface, a cover layer has a third surface and a fourth surface opposite to each other, and a side wall surrounding the third and fourth surfaces, and the third surface covers On the first surface of the substrate, and an adhesive layer, located between the substrate and the cover layer, and covering the sensing element; the control mechanism is operated to lower the vacuum nozzle head toward the platform and press the cover surface against the cover layer The fourth surface of the suction cup against the side wall of the cover layer; using a vacuum pump to evacuate the hollow vacuum tube to reach a predetermined vacuum Pi, so that the cover layer is adsorbed by the nozzle head, Pi -90Kpa; and the operation control mechanism, the vacuum nozzle head is rotated at a rotation speed of 300-750 degrees per second for one t time to generate a torque TF (torque force), and the vacuum nozzle head is lifted upward to generate an upward lift Lift force LF (lift force) makes the cover layer be peeled off the chip package under the action of torsion and upward lifting force, where 0 seconds <tl <5 seconds.
100‧‧‧基礎層 100‧‧‧ foundation layer
100a,1122‧‧‧第一表面 100a, 1122‧‧‧First surface
100b,1121‧‧‧第二表面 100b, 1121‧‧‧ second surface
112‧‧‧基底 112‧‧‧ substrate
120‧‧‧晶片區 120‧‧‧Chip Area
140‧‧‧導電墊 140‧‧‧Conductive pad
160‧‧‧感測元件 160‧‧‧sensing element
180‧‧‧黏著層 180‧‧‧ Adhesive layer
200‧‧‧蓋層 200‧‧‧ cap
200a‧‧‧結合區域 200a‧‧‧Combination area
200b‧‧‧周邊區域 200b‧‧‧surrounding area
201、301、401、501、601‧‧‧真空吸嘴頭 201, 301, 401, 501, 601‧‧‧vacuum nozzle head
202、302、402、502、602‧‧‧吸盤 202, 302, 402, 502, 602‧‧‧
204、304、404、504、604‧‧‧上表面 204, 304, 404, 504, 604‧‧‧ upper surface
206、306、406、506、606‧‧‧下表面 206, 306, 406, 506, 606‧‧‧ lower surface
208、308、408、508、608‧‧‧真空孔 208, 308, 408, 508, 608‧‧‧vacuum holes
210、310、410、510、610‧‧‧中空真空管 210, 310, 410, 510, 610‧‧‧ hollow vacuum tube
212、312、412、512、612‧‧‧中空管道 212, 312, 412, 512, 612‧‧‧ hollow pipes
214、314、414、514、614‧‧‧控制機構 214, 314, 414, 514, 614‧‧‧ Control agencies
216、316、416、516、616‧‧‧平台 216, 316, 416, 516, 616‧‧‧ platforms
220、330、420‧‧‧第一刀具 220, 330, 420‧‧‧The first cutter
330’、420’‧‧‧第二刀具 330 ’, 420’‧‧‧Second cutter
222、332、422‧‧‧第一本體 222, 332, 422‧‧‧ First Body
332’、422’‧‧‧第二本體 332 ’, 422’‧‧‧Second body
224、334、424‧‧‧第一刀刃部 224, 334, 424‧‧‧‧The first blade
334’、424’‧‧‧第二刀刃部 334 ’, 424’‧‧‧Second blade section
315‧‧‧第一開口 315‧‧‧first opening
320‧‧‧絕緣層 320‧‧‧ Insulation
340‧‧‧重佈線層 340‧‧‧ redistribution layer
360‧‧‧鈍化保護層 360‧‧‧Passive protective layer
380‧‧‧第二開口 380‧‧‧Second opening
400‧‧‧導電結構 400‧‧‧ conductive structure
424‧‧‧保護層 424‧‧‧protective layer
426、603‧‧‧邊框 426, 603‧‧‧ border
428‧‧‧第一縫隙 428‧‧‧The first gap
430‧‧‧第二縫隙 430‧‧‧Second Gap
620‧‧‧密封環 620‧‧‧seal ring
L’‧‧‧分隔渠道 L’ ‧‧‧ separated channels
1000‧‧‧晶片封裝體 1000‧‧‧Chip Package
2000、3000、4000、5000、6000‧‧‧剝離裝置 2000, 3000, 4000, 5000, 6000 ‧‧‧ stripping devices
第1A圖顯示一具有蓋層的晶片封裝體的立體透視圖。 FIG. 1A shows a perspective view of a chip package with a cap layer.
第1B~1D顯示根據第1A圖之剖面線B-B’所呈現的剖面示意圖。 1B to 1D show schematic sectional views according to the section line B-B 'of FIG. 1A.
第1A’~1F’圖顯示具如第1D圖所示的剖面示意圖的晶片封裝體之製造方法。 Figures 1A 'to 1F' show a method for manufacturing a chip package having a schematic cross-sectional view as shown in Figure 1D.
第2A~2E圖顯示本發明第一實施例的剝離裝置,及利用此剝離裝置剝離一晶片封裝體表面蓋層的剖面示意圖。 Figures 2A to 2E are schematic cross-sectional views showing a peeling device according to the first embodiment of the present invention, and peeling a surface cover layer of a chip package by using the peeling device.
第3A~3E圖顯示本發明第二實施例的剝離裝置,及利用此剝離裝置剝離一晶片封裝體表面蓋層的剖面示意圖。 FIGS. 3A to 3E are schematic cross-sectional views showing a peeling device according to a second embodiment of the present invention, and peeling a surface cover layer of a chip package by using the peeling device.
第4A~4E圖顯示本發明第三實施例的剝離裝置,及利用此剝離裝置剝離一晶片封裝體表面蓋層的剖面示意圖。 FIGS. 4A to 4E are schematic cross-sectional views showing a peeling device according to a third embodiment of the present invention, and peeling a surface cover layer of a chip package by using the peeling device.
第5A~5D圖顯示本發明第四實施例的剝離裝置,及利用此剝離裝置剝離一晶片封裝體表面蓋層的剖面示意圖 5A to 5D are schematic cross-sectional views showing a peeling device according to a fourth embodiment of the present invention, and a peeling device for peeling off a surface cover layer of a chip package by using the peeling device;
第6A~6D圖顯示本發明第五實施例的剝離裝置,及利用此剝離裝置剝離一晶片封裝體表面蓋層的剖面示意圖。 FIGS. 6A to 6D are schematic cross-sectional views of a peeling device according to a fifth embodiment of the present invention, and peeling a surface cover layer of a chip package by using the peeling device.
以下將詳細說明本發明實施例之製作與使用方式。然應注意的是,本發明提供許多可供應用的發明概 念,其可以多種特定型式實施。文中所舉例討論之特定實施例僅為製造與使用本發明之特定方式,非用以限制本發明之範圍。此外,在不同實施例中可能使用重複的標號或標示。這些重複僅為了簡單清楚地敘述本發明,不代表所討論之不同實施例及/或結構之間具有任何關連性。以下將詳細說明。 The following will explain in detail the manufacturing and using methods of the embodiments of the present invention. It should be noted, however, that the present invention provides many applicable inventions Concept, it can be implemented in many specific types. The specific embodiments discussed by way of example are merely specific ways of making and using the invention, and are not intended to limit the scope of the invention. In addition, duplicate numbers or designations may be used in different embodiments. These repetitions are merely for the purpose of simply and clearly describing the invention, and do not represent any relevance between the different embodiments and / or structures discussed. This will be explained in detail below.
本發明實施例之晶片封裝體可用以封裝微機電系統晶片。然其應用不限於此,例如在本發明之晶片封裝體的實施例中,其可應用於各種包含主動元件或被動元件(active or passive elements)、數位電路或類比電路(digital or analog circuits)等積體電路的電子元件(electronic components),例如是有關於光電元件(opto electronic devices)、微機電系統(Micro Electro Mechanical System;MEMS)、微流體系統(micro fluidic systems)、或利用熱、光線及壓力等物理量變化來測量的物理感測器(Physical Sensor)。特別是可選擇使用晶圓級封裝(wafer scale package;WSP)製程對影像感測元件、發光二極體(light-emitting diodes;LEDs)、太陽能電池(solar cells)、射頻元件(RF circuits)、加速計(accelerators)、陀螺儀(gyroscopes)、微制動器(micro actuators)、表面聲波元件(surface acoustic wave devices)、壓力感測器(process sensors)或噴墨頭(ink printer heads)等半導體晶片進行封 裝。 The chip package according to the embodiment of the present invention can be used to package a micro-electro-mechanical system chip. However, its application is not limited to this. For example, in the embodiment of the chip package of the present invention, it can be applied to various types including active or passive elements, digital circuits or analog circuits. The electronic components of integrated circuits are, for example, related to opto electronic devices, micro electro mechanical systems (MEMS), micro fluidic systems, or the use of heat, light, and A physical sensor that measures changes in physical quantities such as pressure. In particular, a wafer scale package (WSP) process can be used to select image sensing elements, light-emitting diodes (LEDs), solar cells, RF circuits, Accelerators, gyroscopes, micro actuators, surface acoustic wave devices, process sensors, or ink printer heads seal Installed.
其中上述晶圓級封裝製程主要係指在晶圓階段完成封裝步驟後,再予以切割成獨立的封裝體,然而,在一特定實施例中,例如將已分離之半導體晶片重新分布在一承載晶圓上,再進行封裝製程,亦可稱之為晶圓級封裝製程。另外,上述晶圓級封裝製程亦適用於藉堆疊(stack)方式安排具有積體電路之多片晶圓,以形成多層積體電路(multi-layer integrated circuit devices)之晶片封裝體。 The above-mentioned wafer-level packaging process mainly refers to cutting into individual packages after the packaging steps are completed at the wafer stage. However, in a specific embodiment, for example, the separated semiconductor wafers are redistributed on a carrier wafer. On the circle, a packaging process is performed, which can also be referred to as a wafer-level packaging process. In addition, the above-mentioned wafer-level packaging process is also suitable for arranging a plurality of wafers with integrated circuits by a stack method to form a multi-layer integrated circuit devices chip package.
以下將配合第1A至1D圖以及第1A’至第1F’圖,說明習知的晶片封裝體結構。 Hereinafter, the conventional chip package structure will be described with reference to FIGS. 1A to 1D and FIGS. 1A 'to 1F'.
請參照第1A圖,其顯示一晶片封裝體1000的立體透視圖。晶片封裝體1000具有具有一基底112、一蓋層200以及一夾在基底112與蓋層200之間的黏著層180。蓋層200、黏著層180以及基底112的側壁構成一第一側壁250a、第二側壁250b、第三側壁250c以及第四側壁250d,其中,第一側壁250a、第二側壁250b彼此相對,第三側壁250c、第四側壁250d彼此相對,且第一側壁250a、第二側壁250b同時與第三側壁250c、第四側壁250d仳連。蓋層200可為玻璃、氮化鋁、透明膠帶、藍寶石或其他適合的保護材料。黏著層180可為對光敏感的樹脂(例如,環氧樹脂或UV膠)、無機材料(例如,氧化矽、氮化矽、氮氧化矽、金屬氧化物或其組合)、有機高分子材料(例如,聚醯亞胺樹脂、苯環丁烯、聚對二甲苯、萘聚合物、氟碳化合物、丙烯酸酯)或 其他適合的黏著材料。 Please refer to FIG. 1A, which shows a perspective view of a chip package 1000. The chip package 1000 has a substrate 112, a capping layer 200, and an adhesive layer 180 sandwiched between the substrate 112 and the capping layer 200. The sidewalls of the cover layer 200, the adhesive layer 180, and the substrate 112 constitute a first sidewall 250a, a second sidewall 250b, a third sidewall 250c, and a fourth sidewall 250d, wherein the first sidewall 250a, the second sidewall 250b are opposed to each other, and the third The side wall 250c and the fourth side wall 250d are opposite to each other, and the first side wall 250a and the second side wall 250b are simultaneously connected to the third side wall 250c and the fourth side wall 250d. The cover layer 200 may be glass, aluminum nitride, scotch tape, sapphire, or other suitable protective materials. The adhesive layer 180 may be a light-sensitive resin (for example, epoxy resin or UV glue), an inorganic material (for example, silicon oxide, silicon nitride, silicon oxynitride, metal oxide, or a combination thereof), an organic polymer material ( (E.g. polyimide resin, phenylcyclobutene, parylene, naphthalene polymers, fluorocarbons, acrylates) or Other suitable adhesive materials.
請參照第1B圖,其顯示根據第1A圖所示的B-B’剖面線方向所呈現的晶片封裝體1000的剖面圖。如第1B圖所示,基底112包括一第一表面1122及一與其相對的第二表面1121,蓋層200包括一第三表面1221及一與其相對的第四表面1222,且第二表面1121藉黏著層180與第三表面1221接觸。在一實施例中,晶片封裝體1000更包括一印刷電路板(未顯示),結合於基底112的第二表面1121。基底112的詳細結構,將於第1C圖及第1D詳細說明。 Please refer to FIG. 1B, which shows a cross-sectional view of the chip package 1000 according to the direction of the line B-B 'shown in FIG. 1A. As shown in FIG. 1B, the substrate 112 includes a first surface 1122 and a second surface 1121 opposite thereto, and the cover layer 200 includes a third surface 1221 and a fourth surface 1222 opposite thereto, and the second surface 1121 borrows The adhesive layer 180 is in contact with the third surface 1221. In one embodiment, the chip package 1000 further includes a printed circuit board (not shown) bonded to the second surface 1121 of the substrate 112. The detailed structure of the substrate 112 will be described in detail in FIG. 1C and FIG. 1D.
如第1C圖以及第1D圖所示,基底112包括一基礎層100,具有一上表面100a及一下表面100b,且在鄰近上表面100a處具有一感測元件160、複數鄰近感測元件160的導電墊140。基礎層100可為一矽基底或其他半導體基底,或一矽晶圓,以利於進行晶圓級封裝製程。感測元件160可包括影像感測元件、感測元件160用以感測生物特徵,例如指紋辨識元件、感測環境特徵元件,例如溫度感測元件、溼度感測元件、壓力感測元件或其他適合的感測元件。此外,感測元件160可透過內連線結構(未繪示)而與導電墊140電性連接。 As shown in FIG. 1C and FIG. 1D, the substrate 112 includes a base layer 100 having an upper surface 100a and a lower surface 100b, and a sensing element 160 and a plurality of adjacent sensing elements 160 adjacent to the upper surface 100a. Conductive pad 140. The base layer 100 may be a silicon substrate or other semiconductor substrates, or a silicon wafer to facilitate the wafer-level packaging process. The sensing element 160 may include an image sensing element, and the sensing element 160 is used to sense a biological feature, such as a fingerprint recognition element, a sensing environment feature element, such as a temperature sensing element, a humidity sensing element, a pressure sensing element, or other Suitable sensing element. In addition, the sensing element 160 can be electrically connected to the conductive pad 140 through an interconnect structure (not shown).
如第1C圖以及第1D圖所示,基礎層100的下表面100b更包括複數個露出導電墊140的第一開口315,且每一第一開口315內均具有一連接至導電墊140的重佈線層340,藉由一絕緣層320電性隔離重佈線層340與基礎層100。重佈線層的導線340可包括銅、鋁、金、鉑、鎳、錫、 前述之組合、導電高分子材料、導電陶瓷材料(例如,氧化銦錫或氧化銦鋅)或其他適合的導電材料。另外,在重佈線層340上更覆蓋有一鈍化保護層360,且鈍化保護層360上形成複數第二開口380,以暴露出位於基礎層100的下表面100b上的重佈線層340的一部分,且每一第二開口380內形成一導電結構(例如,焊球、凸塊或導電柱)400,以直接接觸暴露出的重佈線層340。鈍化保護層360可包括環氧樹脂、綠漆(solder mask)、無機材料(例如,氧化矽、氮化矽、氮氧化矽、金屬氧化物或前述之組合)、有機高分子材料(例如,聚醯亞胺樹脂、苯環丁烯、聚對二甲苯、萘聚合物、氟碳化物、丙烯酸酯)或其他適合的絕緣材料。導電結構400可包括錫、鉛、銅、金、鎳、前述之組合或其他適合的導電材料。 As shown in FIG. 1C and FIG. 1D, the lower surface 100b of the base layer 100 further includes a plurality of first openings 315 exposing the conductive pad 140, and each of the first openings 315 has a weight connected to the conductive pad 140 The wiring layer 340 is electrically isolated from the redistribution layer 340 and the base layer 100 by an insulating layer 320. The wiring 340 of the redistribution layer may include copper, aluminum, gold, platinum, nickel, tin, The foregoing combination, a conductive polymer material, a conductive ceramic material (for example, indium tin oxide or indium zinc oxide), or other suitable conductive materials. In addition, the redistribution layer 340 is further covered with a passivation protection layer 360, and a plurality of second openings 380 are formed in the passivation protection layer 360 to expose a part of the redistribution layer 340 on the lower surface 100b of the base layer 100, A conductive structure (for example, a solder ball, a bump, or a conductive pillar) 400 is formed in each of the second openings 380 to directly contact the exposed redistribution layer 340. The passivation protection layer 360 may include an epoxy resin, a solder mask, an inorganic material (for example, silicon oxide, silicon nitride, silicon oxynitride, metal oxide, or a combination thereof), an organic polymer material (for example, polymer Fluorene imine resin, phenylcyclobutene, parylene, naphthalene polymer, fluorocarbon, acrylate) or other suitable insulating materials. The conductive structure 400 may include tin, lead, copper, gold, nickel, a combination of the foregoing, or other suitable conductive materials.
相較於第1C圖所示的晶片封裝體結構,第1D圖所示的晶片封裝體,有部分的基礎層100及黏著層180被去除,以暴露蓋層200的部分第三表面1221,使得第三表面1221形成一具有面積與基礎層100的上表面100a相等的結合區域200a以及一環繞於結合區域200a的周邊區域200b。第1D圖所示的晶片封裝體,其製程將於第1A’圖~1F’圖中詳細說明。 Compared with the structure of the chip package shown in FIG. 1C, a part of the base layer 100 and the adhesive layer 180 of the chip package shown in FIG. 1D are removed to expose a part of the third surface 1221 of the cover layer 200, so that The third surface 1221 forms a bonding region 200 a having an area equal to that of the upper surface 100 a of the base layer 100 and a peripheral region 200 b surrounding the bonding region 200 a. The manufacturing process of the chip package shown in FIG. 1D will be described in detail in FIGS. 1A ′ to 1F ′.
如第1A’圖所示,提供一基礎層100,其具有一第一表面100a及與其相對的一第二表面100b,且包括複數晶片區120。基礎層100的每一晶片區120內具有複數導電墊140,其可鄰近於第一表面100a。為簡化圖式,此處僅繪示 出相鄰的兩個晶片區120以及分別位於基礎層100的單一晶片區120內的兩個導電墊140。在一實施例中,導電墊140可為單層導電層或具有多層之導電層結構。此處,僅以單層導電層作為範例說明。在本實施例中,基礎層100的每一晶片區120內具有一感測元件160,其可鄰近於基礎層100的第一表面100a。 As shown in FIG. 1A ', a base layer 100 is provided, which has a first surface 100a and a second surface 100b opposite to the first surface 100a, and includes a plurality of wafer regions 120. A plurality of conductive pads 140 are provided in each wafer region 120 of the base layer 100, which may be adjacent to the first surface 100a. In order to simplify the diagram, only shown here Two adjacent wafer regions 120 and two conductive pads 140 respectively located in a single wafer region 120 of the base layer 100 are obtained. In one embodiment, the conductive pad 140 may be a single-layer conductive layer or a multi-layer conductive layer structure. Here, only a single conductive layer is used as an example. In this embodiment, each chip region 120 of the base layer 100 has a sensing element 160 which can be adjacent to the first surface 100 a of the base layer 100.
接著,請參照第1B’圖,透過一黏著層180,將一具有第三表面1221以及第四表面1222的蓋層200,以其第三表面1221貼附於基礎層100的第一表面100a上。以蓋層200作為承載基板,對基礎層100的第二表面100b進行薄化製程(例如,蝕刻製程、銑削(milling)製程、機械研磨(mechanical grinding)製程或化學機械研磨(chemical mechanical polishing)製程),以減少基礎層100的厚度。接著,可透過微影製程及蝕刻製程(例如,乾蝕刻製程、濕蝕刻製程、電漿蝕刻製程、反應性離子蝕刻製程或其他適合的製程),在基礎層100的每一晶片區120內形成複數第一開口310。第一開口315自基礎層100的第二表面100b朝第一表面100a延伸,且分別暴露出鄰近於第一表面100a的對應的導電墊140。接著,可透過沉積製程(例如,塗佈製程、物理氣相沈積製程、化學氣相沈積製程或其他適合的製程),在基礎層100的第二表面100b上順應性形成一絕緣層320,其延伸至基礎層100的第一開口315內。 Next, referring to FIG. 1B ′, a cover layer 200 having a third surface 1221 and a fourth surface 1222 is attached to the first surface 100 a of the base layer 100 with the third surface 1221 through an adhesive layer 180. . With the cover layer 200 as a carrier substrate, a thinning process (for example, an etching process, a milling process, a mechanical grinding process, or a chemical mechanical polishing process) is performed on the second surface 100b of the base layer 100. ) To reduce the thickness of the base layer 100. Then, it can be formed in each wafer region 120 of the base layer 100 through a lithography process and an etching process (for example, a dry etching process, a wet etching process, a plasma etching process, a reactive ion etching process, or other suitable processes). Plural first opening 310. The first openings 315 extend from the second surface 100b of the base layer 100 toward the first surface 100a, and respectively expose corresponding conductive pads 140 adjacent to the first surface 100a. Then, an insulating layer 320 may be conformably formed on the second surface 100b of the base layer 100 through a deposition process (for example, a coating process, a physical vapor deposition process, a chemical vapor deposition process, or other suitable processes), which is Extending into the first opening 315 of the base layer 100.
請參照第1C’圖,可透過微影製程及蝕刻製程(例如,乾蝕刻製程、濕蝕刻製程、電漿蝕刻製程、反應性 離子蝕刻製程或其他適合的製程),去除第一開口315的底部上的絕緣層320,以暴露出導電墊140的表面。接著,可透過沉積製程(例如,塗佈製程、物理氣相沉積製程、化學氣相沉積製程、電鍍製程、無電鍍製程或其他適合的製程)、微影製程及蝕刻製程,在絕緣層320上形成圖案化的重佈線層340。 Please refer to Figure 1C ’. Through the lithography process and the etching process (for example, dry etching process, wet etching process, plasma etching process, reactivity An ion etching process or other suitable processes), removing the insulating layer 320 on the bottom of the first opening 315 to expose the surface of the conductive pad 140. Next, the insulating layer 320 may be deposited through a deposition process (for example, a coating process, a physical vapor deposition process, a chemical vapor deposition process, a plating process, an electroless plating process, or other suitable processes), a lithography process, and an etching process. A patterned redistribution layer 340 is formed.
重佈線層340順應性延伸至基礎層100的第一開口315的底部,且與暴露出的導電墊140直接接觸,以電性連接至導電墊140,並透過絕緣層320與基礎層100電性隔離。因此,第一開口315內的重佈線層的導線340也稱為矽通孔電極(through silicon via,TSV)。接著,可透過沉積製程,在重佈線層340上形成一鈍化保護層360,且填入基礎層100的第一開口315內,以覆蓋重佈線層340。然後,可透過微影製程及蝕刻製程,在每一晶片區120的鈍化保護層360內形成複數第二開口380,以暴露出位於基礎層100的第二表面100b上的重佈線層的導線340的一部分。 The redistribution layer 340 conformably extends to the bottom of the first opening 315 of the base layer 100 and directly contacts the exposed conductive pad 140 to be electrically connected to the conductive pad 140 and is electrically connected to the base layer 100 through the insulating layer 320 isolation. Therefore, the lead 340 of the redistribution layer in the first opening 315 is also referred to as a through silicon via (TSV). Then, a passivation protection layer 360 is formed on the redistribution layer 340 through a deposition process, and is filled into the first opening 315 of the base layer 100 to cover the redistribution layer 340. Then, through the lithography process and the etching process, a plurality of second openings 380 are formed in the passivation protection layer 360 of each wafer region 120 to expose the redistribution layer wires 340 on the second surface 100 b of the base layer 100. a part of.
接著,請參照第1D’圖,在鈍化保護層360的第二開口380內形成導電結構(例如,焊球、凸塊或導電柱)400,以直接接觸暴露出的重佈線層340,而與圖案化的重佈線層的導線340電性連接。舉例來說,可透過電鍍製程、網版印刷製程或其他適合的製程,在鈍化保護層360的第二開口380內形成焊料(solder),且進行迴焊(reflow)製程,以形成導電結構400。另外,雖然未繪示於圖式中,但從上視方向來看,導電結構400可在基礎層100的第二表面 100b上排列成一矩陣。在本實施例中,導電結構400可包括錫、鉛、銅、金、鎳、前述之組合或其他適合的導電材料。接著,在鈍化保護層360及導電結構400上形成一保護層420(例如,膠帶),以提供平坦的表面及保護導電結構400。 Next, referring to FIG. 1D ′, a conductive structure (for example, a solder ball, a bump, or a conductive pillar) 400 is formed in the second opening 380 of the passivation protective layer 360 so as to directly contact the exposed redistribution layer 340 and The conductive lines 340 of the patterned redistribution layer are electrically connected. For example, a solder can be formed in the second opening 380 of the passivation protective layer 360 through a plating process, a screen printing process, or other suitable processes, and a reflow process can be performed to form the conductive structure 400. . In addition, although not shown in the drawings, the conductive structure 400 may be on the second surface of the base layer 100 when viewed from above. 100b is arranged in a matrix. In this embodiment, the conductive structure 400 may include tin, lead, copper, gold, nickel, a combination of the foregoing, or other suitable conductive materials. Next, a protective layer 420 (for example, an adhesive tape) is formed on the passivation protective layer 360 and the conductive structure 400 to provide a flat surface and protect the conductive structure 400.
然後,請參照第1E’圖,提供另一載板270,將第1D’圖所示的結構翻轉,使蓋板200以其第四表面1222貼附於載板270上,之後去除保護層420。接著,蝕刻去除相鄰晶片區120處的部分鈍化保護層360、重佈線層340、絕緣層320、基礎層100以及黏著層180,形成一暴露出蓋層200之部分第三表面1221的分隔渠道L’。 Then, referring to FIG. 1E ′, another carrier board 270 is provided. The structure shown in FIG. 1D ′ is reversed, so that the cover plate 200 is attached to the carrier board 270 with its fourth surface 1222, and then the protective layer 420 is removed. . Next, a portion of the passivation protective layer 360, the redistribution layer 340, the insulating layer 320, the base layer 100, and the adhesive layer 180 at the adjacent wafer region 120 is removed by etching to form a separation channel exposing a portion of the third surface 1221 of the capping layer 200. L '.
最後,請參照第1F’圖,沿分隔渠道L’自基礎層100朝蓋層200的方向進行切割製程,形成複數個剖面示意圖如第1D圖所示的晶片封裝體1000。 Finally, referring to FIG. 1F ', a cutting process is performed along the separation channel L' from the base layer 100 toward the cover layer 200 to form a plurality of chip packages 1000 with schematic cross-sectional views as shown in FIG. 1D.
第2A~2E圖顯示根據本發明第一實施例以剝離如第1C圖或第1D圖所示的晶片封裝體1000的蓋層200的剖面示意圖,為方便敘述了解本實施例的技術特徵,以下將以第1B圖所示的剖面示意圖闡述說明之。 Figures 2A to 2E show schematic cross-sectional views of the cover layer 200 of the chip package 1000 shown in Figure 1C or Figure 1D according to the first embodiment of the present invention. In order to facilitate understanding of the technical characteristics of this embodiment, the following This will be explained with reference to the schematic sectional view shown in FIG. 1B.
請先參照第2A圖,其顯示根據本發明第一實施例的剝離裝置2000。此剝離裝置2000包括一真空吸嘴頭201、一位在真空吸嘴頭201下方的平台216、一耦接至真空吸嘴頭201的控制機構214,以及一耦接至控制機構214的第一刀具220以及一供晶片封裝體1000放置的平台216。其中,真空吸嘴頭201包括一具有相對上、下表面204、206 的真空吸盤202、一貫穿真空吸盤202上、下表面204、206的真空孔208,及一與真空泵連接的中空真空管210,且中空真空管210內具有一中空管道212與真空孔208耦接,且真空吸嘴頭201可在其所耦接的控制機構214帶動下,相對於平台被舉升或下降。第一刀具220具有一第一本體222及一自第一本體222末端沿伸出的第一刀刃部224。 Please refer to FIG. 2A, which shows a peeling device 2000 according to a first embodiment of the present invention. The peeling device 2000 includes a vacuum nozzle head 201, a platform 216 below the vacuum nozzle head 201, a control mechanism 214 coupled to the vacuum nozzle head 201, and a first mechanism coupled to the control mechanism 214. The cutter 220 and a platform 216 on which the chip package 1000 is placed. Among them, the vacuum nozzle head 201 includes a surface having opposite upper and lower surfaces 204 and 206. A vacuum chuck 202, a vacuum hole 208 penetrating the upper and lower surfaces 204, 206 of the vacuum chuck 202, and a hollow vacuum tube 210 connected to a vacuum pump, and the hollow vacuum tube 210 has a hollow pipe 212 coupled to the vacuum hole 208, and The vacuum nozzle head 201 can be lifted or lowered relative to the platform by the control mechanism 214 coupled to the vacuum nozzle head 201. The first cutter 220 has a first body 222 and a first cutting edge portion 224 extending from an end of the first body 222.
請參照第2B圖,先將如第1B圖所示的晶片封裝體1000以其第二表面1121放置在平台216上。接著,請參照第2C圖,操作剝離裝置200的控制機構214,使得真空吸嘴頭201相對於平台216下降,並使真空吸盤202的下表面206抵壓住蓋層200的第四表面1222。然後,啟動真空泵對中空真空管210抽真空,使晶片封裝體1000被真空吸盤202吸住。 Referring to FIG. 2B, the chip package 1000 shown in FIG. 1B is first placed on the platform 216 with the second surface 1121 thereof. Next, referring to FIG. 2C, the control mechanism 214 of the peeling device 200 is operated so that the vacuum nozzle head 201 is lowered relative to the platform 216, and the lower surface 206 of the vacuum chuck 202 is pressed against the fourth surface 1222 of the cover layer 200. Then, the vacuum pump is started to evacuate the hollow vacuum tube 210, so that the chip package 1000 is sucked by the vacuum chuck 202.
然後,請參照第2D圖,操作控制機構214,使其所耦接的第一刀具220以相對於晶片封裝體1000運動的方式,朝晶片封裝體1000第一側壁250a接近,進而使其第一刀刃部224沿蓋層200的第三表面1221邊緣,切入黏著層180,以減少蓋層200與基底112間的附著力。 Then, referring to FIG. 2D, the control mechanism 214 is operated so that the first tool 220 coupled to the first tool 220 moves toward the first side wall 250a of the chip package 1000 in a manner to move relative to the chip package 1000, thereby making it first. The blade portion 224 cuts into the adhesive layer 180 along the edge of the third surface 1221 of the cover layer 200 to reduce the adhesion between the cover layer 200 and the substrate 112.
接著,請參照第2E圖,操作控制機構214以帶動真空吸嘴頭201向上舉升,使得蓋層200及黏著層180被剝離基底112。 Next, referring to FIG. 2E, the control mechanism 214 is operated to drive the vacuum nozzle head 201 to be lifted upward, so that the cover layer 200 and the adhesive layer 180 are peeled off the substrate 112.
其中,當晶片封裝體1000是如第1D圖所示般具有一暴露出蓋層第三表面1221的周邊區域200b時,將使第一刀具220的第一刀刃部224更精準地沿著周邊區域200b的第三表面1221邊緣切入黏著層180,且在控制機構214帶動 真空吸嘴頭201往上舉升時,藉由第一刀刃部224勾住周邊區域200b,並隨著真空吸嘴頭201被向上舉升,加速蓋層200以及黏著層180被剝離基底112。 Wherein, when the chip package 1000 has a peripheral region 200b that exposes the third surface 1221 of the cap layer as shown in FIG. 1D, the first cutting edge portion 224 of the first cutter 220 will be more accurately along the peripheral region. The edge of the third surface 1221 of 200b is cut into the adhesive layer 180 and is driven by the control mechanism 214 When the vacuum nozzle head 201 is lifted upward, the peripheral area 200b is caught by the first blade portion 224, and as the vacuum nozzle head 201 is lifted upward, the cover layer 200 and the adhesive layer 180 are peeled off the substrate 112.
此外,當本實施例的黏著層180是選用光敏感樹脂(例如UV膠)時,晶片封裝體1000在進行蓋層200剝離製程前,可先經過照光及/或加熱預處理,使得蓋層200以及黏著層180更容易被剝離裝置2000剝離基底112。其中,照光預處理是以波長254nm的紫外光進行照射,而加入預處理則是在溫度介於25度C至60度C的環境下進行。 In addition, when the adhesive layer 180 of this embodiment is selected from a light-sensitive resin (such as UV glue), the chip package 1000 may be pre-treated with light and / or heat before the cover layer 200 is stripped, so that the cover layer 200 And the adhesive layer 180 is more easily peeled off the substrate 112 by the peeling device 2000. Among them, the light pretreatment is irradiated with ultraviolet light with a wavelength of 254nm, and the pretreatment is performed under an environment with a temperature between 25 ° C and 60 ° C.
第3A~3E圖顯示根據本發明第二實施例以剝離如第1C圖或第1D圖所示的晶片封裝體1000的蓋層200的剖面示意圖,為方便敘述了解本實施例的技術特徵,以下將以第1B圖所示的剖面示意圖闡述說明。 FIGS. 3A to 3E are schematic cross-sectional views of the cover layer 200 of the chip package 1000 shown in FIG. 1C or FIG. 1D according to the second embodiment of the present invention. In order to facilitate understanding of the technical features of this embodiment, Explanation will be given with a schematic sectional view shown in FIG. 1B.
請先參照第3A圖,其顯示根據本發明第二實施例的剝離裝置3000。此剝離裝置3000包括一真空吸嘴頭301、一位在真空吸嘴頭301下方的平台316、一耦接至真空吸嘴頭301的控制機構314,以及一耦接至控制機構314的第一刀具330、第二刀具330’以及一供晶片封裝體1000放置的平台316。其中,真空吸嘴頭301包括一具有相對上、下表面304、306的真空吸盤302、一貫穿真空吸盤302上、下表面304、306的真空孔308,及一與真空泵連接的中空真空管311,且中空真空管311內具有一中空管道312與真空孔308耦接,且真空吸嘴頭301可在其所耦接的控制機構314帶動 下,相對於平台被舉升或下降。第一刀具330具有一第一本體322及一自第一本體末端沿伸出的第一刀刃部324,且藉由第一本體與控制機構314耦接,第二刀具330’具有一第二本體322’及一自第二本體322’末端沿伸出的第二刀刃部324’,且藉由第二本體322’與控制機構314耦接。 Please refer to FIG. 3A, which shows a peeling device 3000 according to a second embodiment of the present invention. The peeling device 3000 includes a vacuum nozzle head 301, a platform 316 below the vacuum nozzle head 301, a control mechanism 314 coupled to the vacuum nozzle head 301, and a first mechanism coupled to the control mechanism 314. The cutter 330, the second cutter 330 ′, and a platform 316 on which the chip package 1000 is placed. The vacuum nozzle head 301 includes a vacuum chuck 302 having opposite upper and lower surfaces 304 and 306, a vacuum hole 308 penetrating the upper and lower surfaces 304 and 306 of the vacuum chuck 302, and a hollow vacuum tube 311 connected to a vacuum pump. The hollow vacuum tube 311 has a hollow pipe 312 coupled to the vacuum hole 308, and the vacuum nozzle head 301 can be driven by the control mechanism 314 to which the vacuum nozzle head 301 is coupled. Down, relative to the platform being lifted or lowered. The first cutter 330 has a first body 322 and a first blade portion 324 extending from the end of the first body, and is coupled to the control mechanism 314 through the first body. The second cutter 330 'has a second body 322 'and a second blade portion 324' extending from the end of the second body 322 ', and coupled to the control mechanism 314 through the second body 322'.
請參照第3B圖,先將如第1B圖所示的晶片封裝體1000以其第二表面1121放置在平台316上。接著,請參照第3C圖,操作剝離裝置3000的控制機構314,使得真空吸嘴頭301相對於平台316下降,並使真空吸盤302的下表面306抵壓住蓋層200的第四表面1222。然後,啟動真空泵對中空真空管310抽真空,使晶片封裝體1000被真空吸盤302吸住。 Referring to FIG. 3B, the chip package 1000 shown in FIG. 1B is first placed on the platform 316 with its second surface 1121. Next, referring to FIG. 3C, the control mechanism 314 of the peeling device 3000 is operated so that the vacuum nozzle head 301 is lowered relative to the platform 316, and the lower surface 306 of the vacuum chuck 302 is pressed against the fourth surface 1222 of the cover layer 200. Then, the vacuum pump is started to evacuate the hollow vacuum tube 310, so that the chip package 1000 is sucked by the vacuum chuck 302.
然後,請參照第3D圖,操作控制機構314,使其所耦接的第一刀具330、第二刀具330’以相對於晶片封裝體1000運動的方式,分別朝晶片封裝體1000的第一側壁250a、第二側壁250b接近,進而使其第一刀刃部324、第二刀刃部324’分別切入黏著層180,以減少蓋層200與基底112間的附著力。 Then, referring to FIG. 3D, the control mechanism 314 is operated so that the first tool 330 and the second tool 330 ′ coupled to the first tool 330 and the second tool 330 'are moved relative to the chip package 1000 toward the first side wall of the chip package 1000, respectively. 250a and the second side wall 250b are approached, so that the first blade portion 324 and the second blade portion 324 'are respectively cut into the adhesive layer 180 to reduce the adhesion between the cover layer 200 and the substrate 112.
最後,請參照第3E圖,操作控制機構314以帶動真空吸嘴頭301向上舉升,使得蓋層200及黏著層180被剝離基底112。 Finally, referring to FIG. 3E, the control mechanism 314 is operated to drive the vacuum nozzle head 301 to be lifted upward, so that the cover layer 200 and the adhesive layer 180 are peeled off the substrate 112.
其中,當晶片封裝體1000是如第1D圖所示般具有一暴露出蓋層第三表面1221的周邊區域200b時,將使第一刀具330的第一刀刃部324以及第二刀具330’的第二刀刃部324’更精準地沿著周邊區域200b的第三表面1221邊緣切 入黏著層180,且在控制機構314帶動真空吸嘴頭301往上舉升時,藉由第一、第二刀刃部224、224’勾住周邊區域200b,並隨著真空吸嘴頭201被向上舉升,加速蓋層200以及黏著層180被剝離基底112。 Wherein, when the chip package 1000 has a peripheral region 200b that exposes the third surface 1221 of the cap layer as shown in FIG. 1D, the first blade portion 324 of the first tool 330 and the second blade 330 ' The second blade portion 324 'cuts more accurately along the edge of the third surface 1221 of the peripheral region 200b. Into the adhesive layer 180, and when the vacuum nozzle head 301 is lifted upward by the control mechanism 314, the peripheral area 200b is hooked by the first and second blade portions 224, 224 ', and is moved along with the vacuum nozzle head 201. Lifting upward, the cover layer 200 and the adhesive layer 180 are peeled off the substrate 112.
此外,當本實施例的黏著層180是選用光敏感樹脂(例如UV膠)時,晶片封裝體1000在進行蓋層200剝離製程前,可先經過照光及/或加熱預處理,使得蓋層200以及黏著層180更容易被剝離裝置3000剝離基底112。其中,照光預處理是以波長254nm的紫外光進行照射,而加入預處理則是在溫度介於25度C至60度C的環境下進行。 In addition, when the adhesive layer 180 of this embodiment is selected from a light-sensitive resin (such as UV glue), the chip package 1000 may be pre-treated with light and / or heat before the cover layer 200 is stripped, so that the cover layer 200 And the adhesive layer 180 is more easily peeled off the substrate 112 by the peeling device 3000. Among them, the light pretreatment is irradiated with ultraviolet light with a wavelength of 254nm, and the pretreatment is performed under an environment with a temperature between 25 ° C and 60 ° C.
第4A~4E圖顯示根據本發明第三實施例以剝離第1C圖或第1D圖所示的晶片封裝體1000的蓋層200的剖面示意圖,為方便敘述了解本實施例的技術特徵,以下將以第1B圖所示的剖面示意圖闡述說明。 FIGS. 4A to 4E are schematic cross-sectional views of the cover layer 200 of the chip package 1000 shown in FIG. 1C or FIG. 1D according to a third embodiment of the present invention. To facilitate the understanding of the technical features of this embodiment, the following will be described. Explanation will be given with a schematic sectional view shown in FIG. 1B.
請先參照第4A圖,其顯示根據本發明第三實施例的剝離裝置400。此剝離裝置4000包括一真空吸嘴頭401、一位在真空吸嘴頭401下方的平台416、一耦接至真空吸嘴頭401的控制機構414,以及一耦接至控制機構414的第一刀具420、第二刀具420’以及一供晶片封裝體1000放置的平台416。其中,真空吸嘴頭401包括一具有相對上、下表面404、406的真空吸盤402、一貫穿真空吸盤402上、下表面404、406的真空孔408,及一與真空泵連接的中空真空管410,且真空吸盤402的下表面406邊緣更環繞有一邊框 426,且邊框426具有一第一縫隙428、第二縫隙430。此外,中空真空管410內具有一中空管道412與真空孔408耦接,且真空吸嘴頭401可在其所耦接的控制機構414帶動下,相對於平台被舉升或下降。第一刀具420具有一第一本體422及一自第一本體末端沿伸出的第一刀刃部424,且藉由第一本體與控制機構414耦接,第二刀具420’具有一第二本體422’及一自第二本體422’末端沿伸出的第二刀刃部424’,且藉由第二本體422’與控制機構414耦接。 Please refer to FIG. 4A, which shows a peeling device 400 according to a third embodiment of the present invention. The peeling device 4000 includes a vacuum nozzle head 401, a platform 416 below the vacuum nozzle head 401, a control mechanism 414 coupled to the vacuum nozzle head 401, and a first mechanism coupled to the control mechanism 414. The cutter 420, the second cutter 420 ′, and a platform 416 on which the chip package 1000 is placed. The vacuum nozzle head 401 includes a vacuum chuck 402 having opposite upper and lower surfaces 404 and 406, a vacuum hole 408 passing through the upper and lower surfaces 404 and 406 of the vacuum chuck 402, and a hollow vacuum tube 410 connected to a vacuum pump. And the edge of the lower surface 406 of the vacuum suction cup 402 is surrounded by a border. 426, and the frame 426 has a first slit 428 and a second slit 430. In addition, the hollow vacuum tube 410 has a hollow pipe 412 coupled to the vacuum hole 408, and the vacuum nozzle head 401 can be lifted or lowered relative to the platform by the control mechanism 414 coupled thereto. The first cutter 420 has a first body 422 and a first cutting edge portion 424 extending from an end of the first body. The first cutter 420 is coupled to the control mechanism 414. The second cutter 420 'has a second body. 422 'and a second blade portion 424' extending from the end of the second body 422 ', and coupled to the control mechanism 414 through the second body 422'.
請參照第4B圖,先將如第1圖所示的晶片封裝體1000以其第二表面1121放置在平台416上。接著,請參照第4C圖,操作剝離裝置400的控制機構414,使得真空吸嘴頭401相對於平台416下降,並使真空吸盤402的下表面406抵壓住蓋層200的第四表面1222,邊框426緊抵晶片封裝體1000的第一側壁250a、第二側壁250b、第三側壁250c、第四側壁250d側壁以及平台416表面。其中,第一縫隙428及第二縫隙430分別是面向第一側壁250a以及第二側壁250b。然後,啟動真空泵對中空真空管410抽真空,使晶片封裝體1000被真空吸盤402吸住。 Referring to FIG. 4B, the chip package 1000 shown in FIG. 1 is first placed on the platform 416 with its second surface 1121. Next, referring to FIG. 4C, the control mechanism 414 of the peeling device 400 is operated, so that the vacuum nozzle head 401 is lowered relative to the platform 416, and the lower surface 406 of the vacuum chuck 402 is pressed against the fourth surface 1222 of the cover layer 200. The frame 426 abuts the surface of the first sidewall 250 a, the second sidewall 250 b, the third sidewall 250 c, the fourth sidewall 250 d, and the platform 416 of the chip package 1000. The first slit 428 and the second slit 430 face the first sidewall 250a and the second sidewall 250b, respectively. Then, the vacuum pump is started to evacuate the hollow vacuum tube 410, so that the chip package 1000 is sucked by the vacuum chuck 402.
然後,請參照第4D圖,操作控制機構414,使其所耦接的第一刀具420、第二刀具420’以相對於晶片封裝體1000運動的方式,分別朝晶片封裝體1000的第一側壁250a、第二側壁250b接近,使得第一刀刃部424、第二刀刃部424’分別穿過第一縫隙428、第二縫隙430後,沿著蓋層200的第三表面1221切入黏著層414,以減少蓋層200與基底 112間的附著力。 Then, referring to FIG. 4D, the control mechanism 414 is operated so that the first tool 420 and the second tool 420 ′ coupled to the first tool 420 and the second tool 420 ′ move toward the first side wall of the chip package 1000 respectively. 250a and the second side wall 250b are close, so that the first blade portion 424 and the second blade portion 424 'pass through the first slit 428 and the second slit 430, respectively, and then cut into the adhesive layer 414 along the third surface 1221 of the cover layer 200, To reduce the cover layer 200 and the substrate Adhesion between 112.
最後,請參照第4E圖,操作控制機構414以帶動真空吸嘴頭401向上舉升,使得蓋層200及黏著層180被剝離基底112的第二表面1121。 Finally, referring to FIG. 4E, the control mechanism 414 is operated to drive the vacuum nozzle head 401 to be lifted upward, so that the cover layer 200 and the adhesive layer 180 are peeled off the second surface 1121 of the substrate 112.
其中,當晶片封裝體1000是如第1D圖所示般具有一暴露出蓋層第三表面1221的周邊區域200b時,將使第一刀具420的第一刀刃部424以及第二刀具420’的第二刀刃部424’更精準地沿著周邊區域200b的第三表面1221邊緣切入黏著層180,且在控制機構414帶動真空吸嘴頭401往上舉升時,藉由第一、第二刀刃部424、424’勾住周邊區域200b,並隨著真空吸嘴頭201被向上舉升,加速蓋層200以及黏著層180被剝離基底112。 Wherein, when the chip package 1000 has a peripheral region 200b that exposes the third surface 1221 of the cap layer as shown in FIG. 1D, the first blade portion 424 of the first cutter 420 and the second blade 420 ' The second blade portion 424 'cuts the adhesive layer 180 more accurately along the edge of the third surface 1221 of the peripheral region 200b, and when the control mechanism 414 drives the vacuum nozzle head 401 to rise upward, the first and second blade edges The portions 424 and 424 'catch the peripheral area 200b, and as the vacuum nozzle head 201 is lifted upward, the acceleration cover layer 200 and the adhesive layer 180 are peeled off the substrate 112.
此外,當本實施例的黏著層180是選用光敏感樹脂(例如UV膠)時,晶片封裝體1000在進行蓋層200剝離製程前,可先經過照光及/或加熱預處理,使得蓋層200以及黏著層180更容易被剝離裝置4000剝離基底112。其中,照光預處理是以波長254nm的紫外光進行照射,而加入預處理則是在溫度介於25度C至60度C的環境下進行。 In addition, when the adhesive layer 180 of this embodiment is selected from a light-sensitive resin (such as UV glue), the chip package 1000 may be pre-treated with light and / or heat before the cover layer 200 is stripped, so that the cover layer 200 And the adhesive layer 180 can be more easily peeled off the substrate 112 by the peeling device 4000. Among them, the light pretreatment is irradiated with ultraviolet light with a wavelength of 254nm, and the pretreatment is performed under an environment with a temperature between 25 ° C and 60 ° C.
第5A~5D圖顯示根據本發明第四實施例以剝離第1A~1C圖所示的晶片封裝體1000的蓋層200的剖面流程示意圖圖,為方便敘述了解本實施例的技術特徵,以下將以第1B圖所示的剖面示意圖闡述說明之。 FIGS. 5A to 5D are schematic cross-sectional flow diagrams of peeling the cover layer 200 of the chip package 1000 shown in FIGS. 1A to 1C according to a fourth embodiment of the present invention. In order to facilitate the understanding of the technical features of this embodiment, the following will be described. This is illustrated and explained with the cross-sectional schematic diagram shown in FIG. 1B.
請先參照第5A圖,其顯示根據本發明第四實施 例的剝離裝置5000。此剝離裝置5000包括一真空吸嘴頭501、一位在真空吸嘴頭501下方的平台516以及一耦接至真空吸嘴頭501的控制機構514。其中,真空吸嘴頭501包括一具有相對上、下表面504、506的真空吸盤502、一貫穿真空吸盤502上、下表面504、506的真空孔508,及一與真空泵連接的中空真空管510,且真空吸盤502的下表面506邊緣更環繞有一邊框509。此外,510中空真空管內具有一中空管道512與真空孔508耦接,且真空吸嘴頭501可在其所耦接的控制機構514帶動下,可受控制的旋轉及相對於平台被舉升或下降。 Please refer to FIG. 5A, which shows a fourth embodiment of the present invention. Example peeling device 5000. The peeling device 5000 includes a vacuum nozzle head 501, a platform 516 below the vacuum nozzle head 501, and a control mechanism 514 coupled to the vacuum nozzle head 501. The vacuum nozzle head 501 includes a vacuum chuck 502 having opposite upper and lower surfaces 504 and 506, a vacuum hole 508 penetrating the upper and lower surfaces 504 and 506 of the vacuum chuck 502, and a hollow vacuum tube 510 connected to a vacuum pump. A border 509 surrounds the edge of the lower surface 506 of the vacuum chuck 502. In addition, the 510 hollow vacuum tube has a hollow pipe 512 coupled to the vacuum hole 508, and the vacuum nozzle head 501 can be controlled to rotate and be lifted relative to the platform or driven by the control mechanism 514 to which it is coupled. decline.
請參照第5B圖,先將如第1B圖所示的晶片封裝體1000以其第二表面1121放置在平台516上。接著,請參照第5C圖,操作剝離裝置5000的控制機構514,使得真空吸嘴頭501相對於平台516下降,並使真空吸盤502的下表面506抵壓住蓋層200的第四表面1222,邊框509緊抵晶片封裝體1000的第一、第二、第三、第四側壁以及平台516表面。然後,啟動真空泵對中空真空管510抽真空,以達到一預定的真空度Pi,且Pi-90Kpa,使晶片封裝體1000被真空吸盤502吸住。 Referring to FIG. 5B, the chip package 1000 shown in FIG. 1B is first placed on the platform 516 with the second surface 1121 thereof. Next, referring to FIG. 5C, the control mechanism 514 of the peeling device 5000 is operated, so that the vacuum nozzle head 501 is lowered relative to the platform 516, and the lower surface 506 of the vacuum chuck 502 is pressed against the fourth surface 1222 of the cover layer 200. The frame 509 abuts against the first, second, third, and fourth side walls of the chip package 1000 and the surface of the platform 516. Then, the vacuum pump is started to evacuate the hollow vacuum tube 510 to reach a predetermined vacuum degree Pi, and Pi -90Kpa, so that the chip package 1000 is sucked by the vacuum chuck 502.
然後,請參照第5D圖,操作控制機構514使真空吸嘴頭501以300~750度/秒的轉速,旋轉小於五秒鐘的時間,使真空吸嘴頭501相對晶片封裝體1000產生一扭力(torque force)。之後操作控置機構514帶動真空吸嘴頭501向上舉升以產生一向上舉升力(lift force),使得蓋層200以 及黏著層180在扭力以及向上舉升力的作用下,被剝離基底112的第一表面1122。 Then, referring to FIG. 5D, the operation control mechanism 514 causes the vacuum nozzle head 501 to rotate at a rotation speed of 300 to 750 degrees / second for less than five seconds, so that the vacuum nozzle head 501 generates a torque with respect to the chip package 1000. (torque force). Thereafter, the control mechanism 514 is operated to drive the vacuum nozzle head 501 to be lifted upwards to generate an upward lift force, so that the cover layer 200 The first surface 1122 of the substrate 112 is peeled from the adhesive layer 180 under the action of torsion and upward lifting force.
此外,當本實施例的黏著層180是選用光敏感樹脂(例如UV膠)時,晶片封裝體1000在進行蓋層200剝離製程前,可先經過照光及/或加熱預處理,使得蓋層200以及黏著層180更容易被剝離裝置5000剝離基底112。其中,照光預處理是以波長254nm的紫外光進行照射,而加入預處理則是在溫度介於25度C至60度C的環境下進行。 In addition, when the adhesive layer 180 of this embodiment is selected from a light-sensitive resin (such as UV glue), the chip package 1000 may be pre-treated with light and / or heat before the cover layer 200 is stripped, so that the cover layer 200 And the adhesive layer 180 is more easily peeled from the substrate 112 by the peeling device 5000. Among them, the light pretreatment is irradiated with ultraviolet light with a wavelength of 254nm, and the pretreatment is performed under an environment with a temperature between 25 ° C and 60 ° C.
第6A~6D圖顯示根據本發明第五實施例以剝離第1A~1C圖所示的晶片封裝體1000的蓋層200的剖面流程示意圖圖,為方便敘述了解本實施例的技術特徵,以下將以第1B圖所示的剖面示意圖闡述說明。 FIGS. 6A to 6D are schematic cross-sectional flow diagrams of peeling the cover layer 200 of the chip package 1000 shown in FIGS. 1A to 1C according to the fifth embodiment of the present invention. In order to facilitate the understanding of the technical features of this embodiment, the following will be described. Explanation will be given with a schematic sectional view shown in FIG. 1B.
請先參照第6A圖,其顯示根據本發明第五實施例的剝離裝置6000。此剝離裝置6000包括一真空吸嘴頭601、一位在真空吸嘴頭601下方的平台616以及一耦接至真空吸嘴頭601的控制機構614。其中,真空吸嘴頭601包括一具有相對上、下表面604、606的真空吸盤602、一貫穿真空吸盤602上、下表面604、606的真空孔608,及一與真空泵連接的中空真空管610,且真空吸盤602的下表面606邊緣更環繞有一邊框603,且在邊框603內側更環繞有一密封環620,例如O-型環。此外,中空真空管610內具有一中空管道612與真空孔608耦接,且真空吸嘴頭601可在其所耦接的控制機構614帶動下,可受控制的旋轉及相對於平台被舉升 或下降。 Please refer to FIG. 6A, which shows a peeling device 6000 according to a fifth embodiment of the present invention. The peeling device 6000 includes a vacuum nozzle head 601, a platform 616 below the vacuum nozzle head 601, and a control mechanism 614 coupled to the vacuum nozzle head 601. The vacuum nozzle head 601 includes a vacuum chuck 602 having opposite upper and lower surfaces 604 and 606, a vacuum hole 608 passing through the upper and lower surfaces 604 and 606 of the vacuum chuck 602, and a hollow vacuum tube 610 connected to a vacuum pump. The edge of the lower surface 606 of the vacuum chuck 602 is further surrounded by a frame 603, and a seal ring 620, such as an O-ring, is further surrounded inside the frame 603. In addition, the hollow vacuum tube 610 has a hollow pipe 612 coupled to the vacuum hole 608, and the vacuum nozzle head 601 can be controlled to rotate and be lifted relative to the platform under the control mechanism 614 coupled to the vacuum nozzle head 601. Or fall.
請參照第6B圖,先將如第1B圖所示的晶片封裝體1000以其第二表面1121放置在平台616上。接著,請參照第6C圖,操作剝離裝置6000的控制機構614,使得真空吸嘴頭601相對於平台616下降,並使真空吸盤602的下表面606抵壓住蓋層200的第四表面1222,邊框603藉由其內側的密封環620緊抵晶片封裝體1000的第一側壁250a、第二側壁250b、第三側壁250c、第四側壁250d以及平台616表面。然後,啟動真空泵對中空真空管610抽真空,以達到一預定的真空度Pi,且Pi-90Kpa,使晶片封裝體1000被真空吸盤602吸住。 Referring to FIG. 6B, the chip package 1000 shown in FIG. 1B is first placed on the platform 616 with the second surface 1121 thereof. Next, referring to FIG. 6C, the control mechanism 614 of the peeling device 6000 is operated, so that the vacuum nozzle head 601 is lowered relative to the platform 616, and the lower surface 606 of the vacuum chuck 602 is pressed against the fourth surface 1222 of the cover layer 200. The frame 603 abuts against the surfaces of the first side wall 250 a, the second side wall 250 b, the third side wall 250 c, the fourth side wall 250 d, and the platform 616 of the chip package 1000 by the inner sealing ring 620. Then, the vacuum pump is started to evacuate the hollow vacuum tube 610 to reach a predetermined vacuum degree Pi, and Pi -90Kpa, so that the chip package 1000 is sucked by the vacuum chuck 602.
然後,請參照第6D圖,操作控制機構614使真空吸嘴頭601以300~750度/秒的轉速,旋轉小於五秒鐘的時間,使真空吸嘴頭601相對晶片封裝體1000產生一扭力(torque force),之後操作控置機構614帶動真空吸嘴頭601向上舉升以產生一向上舉升力(lift force),使得蓋層200以及黏著層180在扭力以及向上舉升力的作用下,被剝離基底112的第一表面1122。 Then, referring to FIG. 6D, the operation control mechanism 614 causes the vacuum nozzle head 601 to rotate at a rotation speed of 300 to 750 degrees / second for less than five seconds, so that the vacuum nozzle head 601 generates a torque with respect to the chip package 1000. (torque force), and then the control mechanism 614 is operated to drive the vacuum nozzle head 601 upward to generate a lift force, so that the cover layer 200 and the adhesive layer 180 are affected by the torque and the upward lifting force. The first surface 1122 of the substrate 112 is peeled.
此外,當本實施例的黏著層180是選用光敏感樹脂(例如UV膠)時,晶片封裝體1000在進行蓋層200剝離製程前,可先經過照光及/或加熱預處理,使得蓋層200以及黏著層180更容易被剝離裝置6000剝離基底112。其中,照光預處理是以波長254nm的紫外光進行照射,而加入預處理則是在溫度介於25度C至60度C的環境下進行。 In addition, when the adhesive layer 180 of this embodiment is selected from a light-sensitive resin (such as UV glue), the chip package 1000 may be pre-treated with light and / or heat before the cover layer 200 is stripped, so that the cover layer 200 And the adhesive layer 180 is more easily peeled off the substrate 112 by the peeling device 6000. Among them, the light pretreatment is irradiated with ultraviolet light with a wavelength of 254nm, and the pretreatment is performed under an environment with a temperature between 25 ° C and 60 ° C.
雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可更動與組合上述各種實施例。 Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field can change and combine the above various implementations without departing from the spirit and scope of the present invention. example.
Claims (47)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW104102651A TWI662630B (en) | 2015-01-27 | 2015-01-27 | A separation apparatus and a method for separating a cap layer from a chip package by means of the separation apparatus |
CN201510127933.1A CN106158691A (en) | 2015-01-27 | 2015-03-23 | Stripping device and method for stripping surface cover layer of chip package by using same |
CN201520164678.3U CN204792711U (en) | 2015-01-27 | 2015-03-23 | stripping device |
US14/676,478 US9685354B2 (en) | 2014-04-03 | 2015-04-01 | Separation apparatus and a method for separating a cap layer from a chip package by means of the separation apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW104102651A TWI662630B (en) | 2015-01-27 | 2015-01-27 | A separation apparatus and a method for separating a cap layer from a chip package by means of the separation apparatus |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201628101A TW201628101A (en) | 2016-08-01 |
TWI662630B true TWI662630B (en) | 2019-06-11 |
Family
ID=57181851
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW104102651A TWI662630B (en) | 2014-04-03 | 2015-01-27 | A separation apparatus and a method for separating a cap layer from a chip package by means of the separation apparatus |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI662630B (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020106869A1 (en) * | 2001-02-07 | 2002-08-08 | Kazuhiro Otsu | Separating machine for thinned semiconductor substrate and separation method |
US20120216961A1 (en) * | 2009-03-09 | 2012-08-30 | Industrial Technology Research Institute | Method for de-bonding flexible device |
US20130146228A1 (en) * | 2011-12-08 | 2013-06-13 | Tokyo Electron Limited | Separation apparatus, separation system, and separation method |
-
2015
- 2015-01-27 TW TW104102651A patent/TWI662630B/en active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020106869A1 (en) * | 2001-02-07 | 2002-08-08 | Kazuhiro Otsu | Separating machine for thinned semiconductor substrate and separation method |
US20120216961A1 (en) * | 2009-03-09 | 2012-08-30 | Industrial Technology Research Institute | Method for de-bonding flexible device |
US20130146228A1 (en) * | 2011-12-08 | 2013-06-13 | Tokyo Electron Limited | Separation apparatus, separation system, and separation method |
Also Published As
Publication number | Publication date |
---|---|
TW201628101A (en) | 2016-08-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI700753B (en) | Chip package and method for forming the same | |
TWI512930B (en) | Chip package and method for forming the same | |
TWI575779B (en) | Chip package and method for forming the same | |
TWI446419B (en) | Methods of fabricating stacked device and handling device wafer | |
US9761510B2 (en) | Chip package and method for forming the same | |
TWI529821B (en) | Chip package and method for forming the same | |
TWI546913B (en) | Chip package and method for forming the same | |
US8900924B2 (en) | Chip package and method for forming the same | |
TWI493634B (en) | Chip package and method for forming the same | |
US9611143B2 (en) | Method for forming chip package | |
TW201543641A (en) | Chip package and method for forming the same | |
TW201715231A (en) | Sensing device and method for forming the same | |
TWI642149B (en) | Chip package and method for forming the same | |
TW201624683A (en) | Photosensitive module and method for forming the same | |
US9024437B2 (en) | Chip package and method for forming the same | |
JP5806534B2 (en) | Chip package build-up method | |
US9685354B2 (en) | Separation apparatus and a method for separating a cap layer from a chip package by means of the separation apparatus | |
TWM509973U (en) | A separation apparatus | |
TW201742200A (en) | Chip package and method for forming the same | |
CN204792711U (en) | stripping device | |
TWI593069B (en) | Chip package and method for forming the same | |
TWI632665B (en) | Method for forming chip package | |
TWI687986B (en) | Method for manufacturing chip package | |
TWI623069B (en) | Chip package and method for forming the same | |
TWI662630B (en) | A separation apparatus and a method for separating a cap layer from a chip package by means of the separation apparatus |