TWI652842B - Process for depositing organosilicate glass films for use as resistive random access memory - Google Patents

Abstract

The present invention relates to a method for forming a resistive random access memory device, the method comprising the steps of: depositing a first electrode on a substrate; forming a porous resistive memory material layer on the first electrode, Wherein the porous resistive memory layer is formed by (i) depositing a gaseous composition comprising a hafnium precursor and a porogen precursor and, after deposition, (ii) by subjecting the composition to UV radiation The porogen precursor is removed by exposure; and a second electrode is deposited on top of the porous resistive memory material layer.

Description

Deposition method of organic tellurite glass film used as resistive random access memory

This study is directed to a method of fabricating a resistive random access memory (RRAM) device using chemical vapor deposition techniques. More specifically, this study is concerned with the deposition of a gaseous mixture containing a hafnium precursor and a porogen precursor by a plasma enhanced chemical vapor deposition (PECVD) process followed by removal of the porogen by UV radiation. Resistive random access memory device.

Resistive random access memory (RRAM) is a type of non-volatile random access (RAM) computer memory that acts by changing the resistance across a dielectric solid material, often referred to as a memristor ( Memristor). RRAM involves the creation of defects in a thin oxide layer, commonly referred to as oxygen vacancies (oxide bond sites where oxygen has been removed), which can then be charged and offset by the action of an electric field. The movement of oxygen ions and vacancies in the oxide is approximately similar to the case where electrons and holes move in the semiconductor.

Many materials and methods have been used in the prior art to fabricate RRAM devices. For example, US Publication No. 2011/124174A provides a form A method of forming an electrode of a variable resistance memory device and a variable resistance semiconductor memory device, comprising: forming a thermal electrode; forming a layer of a variable resistance material on the thermal electrode; and forming a top electrode on the electrode On the layer of variable resistance material, wherein the thermal electrode comprises a nitride of a metal having a larger atomic radius than titanium (Ti), and is formed by a thermal chemical vapor deposition (CVD) method without using a plasma.

The title entitled "Complementary and bipolar regimes of resistive switching in TiN/HfO ₂ /TiN stacks grown by atomic-layer deposition," Egorov, KV et al., Phys. Status Solidi A, (2015) describes a combination of vacuums. The Atomic Layer Deposition (ALD) technique of XPS analysis is used to obtain a planar TiN/HfO ₂ /TiN metal-insulator-metal structure grown entirely from ALD for use in resistive random access memory devices.

The reference titled "Resistive switching phenomena in TiOx nanoparticle layers for memory applications," Goren, E. et al., Condens. Matter: 1-15 (2014) provides references by two different methods: ALD or lyogel. Electrical characteristics of Co/TiO _x /Co resistive memory devices.

The title is entitled "Self-Limited Switching in Ta ₂ O ₅ /TaO _x Memristors Exhibiting Uniform Multilevel Changes in Resistance," Kimi, KM et al., (2015), Adv. Funct. Mater. 25: 1527-1534 A method for solving the problem of unevenness at the time of connection, which is caused by the random characteristics of many wire resistance type switching mechanisms of a transition metal oxide based resistance switching memory.

The title entitled "Bipolar resistive switching and charge transport in silicon oxide memristor," Mikhaylov, AN et al., (2015), Materials Science and Engineering: B 194:48-54 describes deposition by magnetron sputtering techniques. Reproducible bipolar resistance switching of a SiO _x based thin film memristor structure on the TiN/Ti metallized SiO ₂ /Si substrate.

US Publication No. US 2013/264536A describes various specific embodiments of a memristor unit comprising: (1) a substrate; (2) an electrical switch in combination with the substrate; (3) an insulating layer; and (3) Resistive memory material. The resistive memory material is selected from the group consisting of SiO _x , SiO _x H, SiO _x N _y , SiO _x N _y H, SiO _x C _z , SiO _x C _z H, and combinations thereof, wherein x, y And z are each equal to or greater than 1 or equal to or less than 2. Other embodiments of the present invention relate to a memristor array comprising: (1) a plurality of bit lines; (2) a plurality of digital element lines orthogonal to the bit lines; and (3) being disposed in the words Most of the aforementioned memristor units between the line and the bit line. Other embodiments of the present invention provide a method of fabricating the aforementioned memristor unit and array.

The title is entitled "Nano Porous Silicon Oxide Memory," Wang, G. et al. (2014) Nano Letters 14(8): 4694-4699. The description of the material is considered to be the next generation of non-volatile memory. Basic two-terminal resistive random access memory. The RRAM memory structure utilizes a nanoporous yttrium oxide (SiOx) material that can be unipolarly switched through its internal vertical nanogap.

The title is called "Resistive switches and memories from Silicon oxide, "Yao, J. et al. (2010), Nano Lett. 10(10): 4105-4110, describes the use of yttrium oxide (SiOx) as a passive insulating component in the construction of electronic devices.

The title is entitled "Silicon Oxide: A Non-innocent Surface for Molecular Electronics and Nanoelectronics Studies," Yao, J. et al., (2010), Journal of the American Chemical Society 133(4): 941-948. The use of cerium (SiOx) as a supporting and insulating medium.

The title entitled "In situ imaging of the conducting filament in a silicon oxide resistive switch," Yao, J. et al., (2012), Sci. Rep. 2, describes the response of nanocrystals to different electrical stimuli. Growth and contraction show high-energy viable transition procedures in sputum, providing evidence of the switching mechanism. This reference also provides an insight into the electrical breakdown process of the ubiquitous yttria layer in the body of the electronic device.

The title is entitled "Role of interfacial layer on complementary resistive switching in the TiN/HfOx/TiN resistive memory device," Zhang, HZ et al. (2014), Appl. Phys. Lett's reference describes the role of the bottom interface layer (IL). It is to have a stable complementary resistance switching (CRS) in the TiN/HfO _x /IL/TiN resistive memory device. The stable CRS is obtained for the TiN/HfO _x /IL/TiN device, in which the bottom IL containing Hf and Ti suboxides is caused by oxidation of TiN during the initial stage of deposition of the HfO _x layer atomic layer. In the TiN/HfO _x /Pt device, the formation of the bottom IL was suppressed by the inert Pt metal, but no CRS was observed. It has been suggested that oxygen ion exchange between the conduction pathways of the IL and HfO _x layers results in complementary bipolar switching performance observed in the TiN/HfO _x /IL/TiN devices.

The title is entitled "Characterization of external resistance effect and performance optimization in unipolar-type SiOx-based resistive switching memory," Zhou, F. et al., (2014), Applied Physics Letters 105 (13) with metal-insulator-metal structure It is compared with a SiO _x based resistive random access memory device having a metal-insulator-semiconductor structure, and is characterized by the effect of external resistance on device performance.

However, in the above process, the deposition of the SiOx film and the creation of defects are taught as separate steps, which are not efficient and cost-effective due to the inability to easily use well-known mass production methods and certain equipment. There is therefore a need for a process that simplifies deposition and defect generation into successive steps within the same process platform. This study provides such a process.

In one aspect, the present study provides a method for forming a resistive random access memory device, the method comprising the steps of: depositing a first electrode on a substrate; forming a porous resistive memory material layer on the substrate The first electrode, wherein the porous resistive memory layer is formed by: (i) depositing a gaseous composition comprising a hafnium precursor and a porogen precursor, and, after deposition, (ii) by The composition is exposed to UV radiation to remove the porogen precursor; and a second electrode is deposited on top of the porous resistive memory material layer.

10‧‧‧Electronic devices

12‧‧‧Substrate

14‧‧‧First electrode

16‧‧‧Resistive memory material layer

18‧‧‧second electrode

1 shows a schematic diagram of a vertically oriented electronic device manufactured by the method of the present invention; FIG. 2 shows a schematic view of another vertically oriented electronic device manufactured by the research method; FIG. 3A illustrates a current versus voltage distribution of a forward voltage scan, The increased conductivity is not shown until the high potential is applied and the SiOx film exhibits a hard electrical breakdown or short circuit. However, the reverse scan shows the effect of the short circuit phenomenon as the current density is maintained during the scan back to 0 volts. Figure 3B illustrates a current-to-voltage distribution diagram in which a green forward scan shows a significantly improved conductivity at very low applied voltages, indicating that the SiOx film has too much leakage or that the conductivity is too high and is extremely low. Hard breakdown at potential; Figure 3C illustrates a current vs. voltage profile showing a hysteretic current, i.e., a voltage sweep showing activation at about 3.5 V and deactivation at about 10 V; Figure 4A An example of a current versus voltage distribution of a SiOx film deposited using a varying porogen to structure forming agent ratio, which shows the dielectric at 28V plus Hard breakdown under the position; FIG. 4B illustrates a current versus voltage distribution of the SiOx film deposited using the ratio of the porogen to the structure forming agent, which shows the hysteresis current-voltage distribution of the resistive memory switching device; FIG. An example of a current versus voltage distribution of a SiOx film deposited using a varying porogen to structure forming agent ratio, shown at very low applied potential Electrical breakdown and insufficient insulation to act as a film distribution for the memory switching device; Figure 5A illustrates a current versus voltage distribution that demonstrates the use of a 80:20 porogen to deposit a ratio of structure forming agent to the porous Hysteresis characteristic distribution of SiOx-based SiOx film; Figure 5B illustrates a current-to-voltage distribution diagram demonstrating the use of a 85:15 porogen to structure-forming agent ratio based on porous PECVD The hysteresis characteristic distribution of the SiOx film; FIG. 6A illustrates a graph of signal retention of the porous PECVD SiOx film obtained by reading the on and off states at a time of 1 V; and FIG. 6B illustrates the memory switching stability. The graph is demonstrated by testing 1000 cycles with a porous PECVD SiOx film.

Specific embodiments of the invention are discussed in detail below. In describing the specific embodiment, specific terms have been used for simplicity. However, the invention is not intended to be limited to the specific terms so selected. Although specific exemplary embodiments have been discussed, it should be understood that this is done for illustrative purposes only. Those skilled in the art will appreciate that other components and configurations can be applied without departing from the spirit and scope of the present study. All references cited herein are hereby incorporated by reference in their entirety as if individually individually.

The present invention provides a method for forming a resistive random access memory device, the method comprising the steps of: depositing a first electrode on a substrate; forming a porous resistive memory material layer on the first electrode, Wherein the porous resistive memory layer is formed by: (i) depositing inclusion a gaseous composition of a ruthenium precursor and a porogen precursor, and, after deposition, (ii) removing the porogen precursor by exposing the composition to UV radiation; and depositing a second electrode on the porous The top of the resistive memory material layer.

The device made in accordance with the present invention is preferably an RRAM device, wherein the device comprises: a semiconductor substrate; a plurality of electrodes comprising a conductive material; a resistive memory material comprising at least one porous germanium-containing material; and at least one comprising an insulating material A dielectric material, wherein at least a portion of the plurality of electrodes are proximate to the resistive memory material, and wherein the device is deposited on a surface of the semiconductor substrate.

Cerium oxides, especially cerium oxide (SiO ₂ ), have long been regarded as passive insulation components in the construction of electronic devices. However, in the specific embodiment shown herein, the display silicon oxide (e.g., SiO ₂ and SiO _x) can be used as active electronic device and an electron transporting material conversion element when the switch is converted into a conductive state. Without wishing to be bound by any theory or mechanism, it is believed that one or more appropriate levels of pulses or scans applied to the yttria-containing electronic device cause a switchable conductive path through the substantially non-conductive yttrium oxide matrix. The one or more high voltage pulses or scans are typically at or above the soft electrical breakdown potential of yttria but below the voltage at which hard breakdown occurs. An appropriate level of voltage pulse or scan is applied to form a ruthenium nanocrystal, tantalum nanowire or wire containing a switchable conductive pathway within the yttria matrix, which maintains electron transport between the electrode terminals. The switchable conductive path can be interrupted by applying a sufficient level of voltage pulse and then reformed by applying a lower level of voltage pulse. Interrupting and reforming the conductive path respectively corresponds to the closed and open states of operation in the memory device, enabling the electronic devices to operate as memory elements and memristors in different closed and open states.

In various embodiments, an electronic device prepared by the methods disclosed herein includes a first electrical contact and a second electrical contact, the two being arranged to define a gap region therebetween. A switching layer containing switchable conductive yttria is present in the interstitial region. At least the first electrical contact is deposited on the substrate. The electronic device exhibits a resistance between hysteresis current and voltage properties.

In some embodiments, the switchable conductive yttria is deficient in SiO ₂ . SiO ₂ SiO ₂ manufactured with such defects may be present in the gap region. In a preferred embodiment of the present study, the defective SiO ₂ occurs by removing the porogen from the SiO ₂ matrix, as will be discussed in more detail below.

As used herein, the phrase "switchable conductive yttria" means, for example, that after being shown to be at or above a soft electrical breakdown voltage but below a hard electrical breakdown voltage (ie, a voltage that causes a short circuit), The hysteresis current competes with the voltage properties of yttrium oxide. Due to the resistance of the hysteresis current to the nature of the voltage, the electronic device containing the switchable conductive yttria has at least one substantially conductive open state and at least one substantially non-conductive closed state. Without wishing to be bound by any theory or mechanism, it is believed that the 矽-矽 bond replaces the 矽-oxygen bond in the form of a nanocrystal to form a switchable conductive pathway in the original yttria material.

In some embodiments, the switchable conductive cerium oxide is a non-stoichiometric cerium oxide SiO _x . In some embodiments, SiO _x has a stoichiometry between cerium oxide and cerium oxide (eg, x is greater than 1 and less than 2). In a more specific embodiment, x is between 1.5 and 2. In still more specific embodiments, x is between 1.6 and 1.8 or between 1.9 and 2. In other embodiments, SiO _x with a stoichiometric lower silicon oxide (e.g., x is greater than 0 and less than 1).

The RRAM application differs from the low-k application in that the dielectric is deposited in a manner that creates defects or pores that can be chemically altered by the applied electric field to induce a switchable conductivity through the dielectric. Features such as Si-Si bonding in the film can achieve such properties. Si-Si bonding in porous low-k applications can cause the insulating properties of the film to deteriorate.

RRAM electronic devices can be constructed in a variety of different orientations. In some embodiments, the electronic devices are oriented horizontally, and the first electrical contact and the second electrical contact are spaced apart from each other on the substrate, wherein the switching layer is present in the first electrical The substrate is on the substrate between the second electrical contact. The method of the present study will now be exemplified with reference to Figure 1, which shows a schematic diagram of an exemplary horizontally oriented electronic device 10.

The first step of the method of the present invention deposits the first electrode 14 on the substrate 12. Preferably, the substrate 12 is a semiconductor substrate. The semiconductor substrate may be selected from the group consisting of ruthenium, osmium, iridium oxide, ruthenium nitride, ruthenium carbide, ruthenium carbonitride, ruthenium-doped ruthenium oxide, boron-doped ruthenium, phosphorus-doped ruthenium, boron-doped Cerium oxide, phosphorus-doped cerium oxide, boron-doped tantalum nitride, phosphorus-doped germanium, tantalum nitride, metal (such as copper, tungsten, aluminum, cobalt, nickel, niobium), metal nitride (such as titanium nitride, Cerium nitride), Group III/V metal oxides (eg, GaAs, InP, GaP, and GaN), and combinations thereof.

The electrode can be made of any suitable electrically conductive material such as, for example, Au, Pt, Cu, Al, ITO, grapheme, and twisted doped germanium or any other suitable metal or alloy.

The conductive material of the first electrode 14 can be deposited by one of the following deposition processes: physical vapor deposition, chemical vapor deposition, MOCVD, and atomic layer deposition. In a particular embodiment, the first electrode 14 is deposited using an ALD process. In this particular embodiment, the electrically conductive material can be deposited using an organometallic precursor selected from the group consisting of alkyl metal, metal decyl amines, and metal halides.

The thickness of the electrode layers can vary as desired or in the deposition process. For example, if deposited by ALD, the thickness of the electrode layers is often 10 to 20 nm.

ALD or MOCVD deposition, processes, precursors suitable for depositing the electrode material include, for example, (2,4-dimethylpentadienyl)(ethylcyclopentadienyl)anthracene, bis (2) ,4-dimethylpentadienyl)fluorene, (2,4-dimethylpentadienyl)(methylcyclopentadienyl)fluorene, bis(ethylcyclopentadienyl)fluorene; carbonyl a metal such as hexacarbonylthrum butylacetylene dicobalt (CCTBA) or dicarbonylcyclopentadienyl cobalt (CpCo(CO) ₂ ), Ru ₃ (CO) ₁₂ ; a metal decyl amine such as hydrazine (dimethylamino group) Zirconium (TDMAZ), decyl (dimethylamino) ruthenium (TDMAH), ruthenium (diethylamino) titanium (TDEAT), ruthenium (ethylmethylamino) titanium (TEMAT), tert-butyl Iminoindole (diethylamino)phosphonium (TBTDET), tert-butylimidophosphonium (dimethylamino)phosphonium (TBTDMT), tert-butylimidoguanidine (ethylmethylamine)钽)(TBTEMT), ethylimidophosphonium (diethylamino)phosphonium (EITDET), ethylimidophosphonium (dimethylamino)phosphonium (EITDMT), ethylimidopyrene Ethylmethylamino) oxime (EITEMT), third amyl imino guanidine (dimethylamino) ruthenium (TAIMAT), third amyl imino ruthenium (diethylamino) ruthenium (dimethylamino) hydrazine , a third pentylimine oxime (ethylmethylamino) ruthenium, bis (tert-butylimido) bis(dimethylamino) tungsten (BTBMW), bis (t-butylimine) Bis(diethylamino)tungsten, bis(t-butylimino)bis(ethylmethylamino)tungsten; metal halides such as antimony tetrachloride, antimony pentachloride and hexachloro Tungsten.

Next, the method of the present study comprises the step of forming a porous resistive memory material layer on the first electrode, wherein the porous resistive memory layer is formed by: (i) depositing a germanium precursor comprising The gaseous composition of the pore former and, after deposition, (ii) the porogen precursor is removed by exposing the composition to UV radiation.

Referring again to Figure 1, the method of the present study provides a porous ruthenium containing material or film that is used as the resistive memory material layer 16. Preferably, the deposited porous resistive memory material layer 16 is selected from the group consisting of cerium oxide, carbon-doped cerium oxide, cerium oxynitride, tantalum nitride, carbon-doped tantalum nitride, porous cerium oxide, porous a group of carbon-doped cerium oxides, which may utilize conventional chemical vapor deposition methods such as low pressure chemical vapor deposition (LPCVD), chemical vapor deposition (CVD), or plasma enhanced chemical vapor deposition (PECVD). Deposition by a ruthenium precursor such as tetraethoxy decane or any other ruthenium precursor.

Preferably, the (or other) porous ruthenium-containing film can be deposited by a plasma enhanced chemical vapor deposition (PECVD) or atomic layer deposition (ALD) process. It is preferably PECVD. The porous ruthenium containing films may be one or more layers. In some embodiments, the porous ruthenium-containing film is deposited by a PECVD process from a composition comprising a ruthenium precursor and a porogen precursor, wherein the amount of carbon is selected through the choice of ruthenium precursor and porogen. Control to obtain a film of the amorphous carbon with the best terminal methyl group; the best bridged carbon; and the best for the porous film. Optimizing the carbon content and type to provide the resulting post-cure of the film, which tends to provide the best The defect density of an electroforming condition (eg, the lowest applied voltage between the electrodes).

The porous ruthenium-containing PECVD deposition can be adjusted to control the pore density of the deposited film. The pore size for PECVD is inherently small or microporous compared to other deposition techniques. Optimizing the deposition to control the pore density and thus the interconnectivity length results in improved switching performance of the resulting resistive memory material, lowering the electroforming potential, and setting the device and The reset potential is reduced. In this or alternative embodiments, the pore density of the porous ruthenium containing membrane can be controlled by deposition parameters including the ruthenium precursor/porogen mixing ratio.

The porous ruthenium containing material or film (i.e., resistive memory material layer 16) is deposited using a composition comprising a gaseous mixture of a ruthenium precursor and a porogen precursor. Exemplary ruthenium precursors include, but are not limited to, tetraethoxy decane, diethoxymethyl decane, dimethoxymethyl decane, di-t-butoxymethyl decane, di-third pentoxymethyl Decane, di-tert-butoxydecane, di-p-pentyloxydecane, methyltriethoxydecane, dimethylacetoxydecane, dimethyldiethoxydecane, dimethyldi Methoxy decane, dimethyl diethoxy decane, methyl triethoxy decane, neohexyl triethoxy decane, neopentyl dimethoxy decane, diethyl methoxy methyl decane, phenyl Dimethoxydecane, phenyldiethoxydecane, phenyltriethoxydecane, phenyldimethoxydecane, phenylmethyldimethoxydecane, 1,3,5,7-tetramethyl Tetracyclic oxirane, octamethyltetracyclodecane, 1,1,3,3-tetramethyldioxane, 1-new hexyl-1,3,5,7-tetramethylcyclotetra Oxane, hexamethyldioxane, 1,3-dimethyl-1-ethyloxy-3-ethoxydioxane, 1,2-dimethyl-1,2-diethyl醯oxy-1,2- Diethoxydioxane, 1,3-dimethyl-1,3-diethoxydioxane, 1,3-dimethyl-1,3-diethoxydecyloxydioxane, 1,2-Dimethyl-1,1,2,2-tetraethoxymethoxydioxane, 1,2-dimethyl-1,1,2,2-tetraethoxydioxane, 1,3 - dimethyl-1-acetoxy-3-ethoxydioxane, 1,2-dimethyl-1-ethenyloxy-2-ethoxydioxane, methyl ethoxylated Third butoxy decane, methyl decane, dimethyl decane, trimethyl decane, tetramethyl decane, hexamethyldioxane, tetramethyldioxane, dimethyl dioxane, hexamethyldiazine Oxane (HMDSO), octamethylcyclotetraoxane (OMCTS), tetramethylcyclotetraoxane (TMCTS), bis(triethoxydecyl)methane, bis(triethoxydecyl) Ethane, bis(dimethoxydecyl)methane, bis(dimethoxydecyl)ethane, bis(diethoxymethyldecyl)methane, bis(diethoxymethyldecyl) Ethane, bis(methyldiethoxydecylalkyl)methane, (diethoxymethyldecylalkyl)(diethoxydecylalkyl)methane, and mixtures thereof.

The preferred thickness of the porous layer is between 40 and 60 nm. This range may be thinner or thicker - possibly 20 to 120 nm, depending on the desired film thickness. Far less than 20nm may leak too much. Thicker than 100 to 120 nm many can be more challenging to be penetrated by soft electric.

The ruthenium precursors suitable for use in the present study include U.S. Patent No. 6,846,515, U.S. Patent No. 7,384,471, U.S. Patent No. 7,943,195, U.S. Patent No. 8,293,001, U.S. Patent No. 9,061,317, U.S. Patent No. 8,951,342, U.S. Patent No. 7,404,990 No. 7,470,454, U.S. Patent No. 7,098,149, and U.S. Patent No. 7,468,290, the disclosure of which is incorporated herein by reference.

In a preferred embodiment, the ruthenium precursor is tetraethoxy ruthenium. An alkane, a di-t-butoxydecane or a mixture thereof.

Preferably, the porogen precursor mixed with the ruthenium precursor is selected from at least one of the group consisting of: alpha-terpinene, terpene, cyclohexane, cyclooctane, gamma- Terpinene, terpene, dimethylhexadiene, ethylbenzene, norbornadiene, cyclopentene oxide, 1,2,4-trimethylcyclohexane, 1,5- Dimethyl-1,5-cyclooctadiene, terpene, adamantane, 1,3-butadiene, substituted dienes and decalin. In a preferred embodiment, the porogen precursor is selected from the group consisting of borneol, cyclooctane, and mixtures thereof.

In another embodiment, the porous ruthenium-containing material can be deposited using a composition comprising two or more ruthenium precursors and a porogen precursor. In these embodiments, the porogen is selected from at least one of the group consisting of: alpha-terpinene, terpene, cyclohexane, cyclooctane, gamma-terpinene, anthracene Alkene, dimethylhexadiene, ethylbenzene, norbornadiene, epoxycyclopentene, 1,2,4-trimethylcyclohexane, 1,5-dimethyl-1,5-ring Octadiene, decene, adamantane, 1,3-butadiene, substituted dienes, and decahydronaphthalene; the ruthenium precursors are selected from the list of compounds listed above.

When used, the dielectric material and the resistive memory material can be deposited using the same hafnium precursor under the same process conditions or under different process conditions. In other embodiments, the dielectric material and the resistive memory material can be deposited using different germanium precursors under the same process conditions or different process conditions.

In another embodiment, the porous ruthenium-containing film can be doped by the addition of a dopant during PECVD deposition of the porous ruthenium-containing film. The dopants can be selected from the group consisting of Group II to Group VI elements including, but not limited to, Zn, Mg, B, P, As, S, Se, and Te. Such dopants may co-deposit as alkoxides (trimethyl borate, triethyl borate, trimethyl phosphate, trimethyl phosphite), hydrides (AsH ₃ , PH ₃ , H ₂ Se, H) ₂ Te), dimethyl zinc, dimethyl magnesium, dimethyl hydrazine, dimethyl selenium, trimethyl phosphine, trimethyl hydrazine or a tether containing a precursor, such as diethoxy Methyl decylphosphine.

In another embodiment, a metal or metal oxide may be applied to the porous ruthenium containing films to improve the electrical resistance properties of the porous ruthenium containing films. Although physical vapor deposition (PVD) and metal oxide chemical vapor deposition (MOCVD) can be used to deposit metals, it is preferably PVD or ALD because the pores of the oxide are typically less than 10 nm. The concentration of metal added to the porous ruthenium containing film can be controlled to maintain a resistivity difference between a low conductive state and a high conductive state in the case of operation as an RRAM device. Exemplary metal precursors that can be used include, but are not limited to, alkyl metales such as diethyl zinc, trimethyl aluminum, (2,4-dimethylpentadienyl) (ethylcyclopentadienyl) fluorene , bis(2,4-dimethylpentadienyl)anthracene, 2,4-dimethylpentadienyl)(methylcyclopentadienyl)anthracene, bis(ethylcyclopentadienyl)羰; a metal carbonyl such as hexacarbonyl tert-butyl acetylene dicobalt (CCTBA) or dicarbonyl cyclopentadienyl cobalt (CpCo(CO) ₂ ), Ru ₃ (CO) ₁₂ ; metal decyl amines such as hydrazine Zirconium (TDMAZ), cerium (diethylamino) zirconium (TDEAZ), cerium (ethylmethylamino) zirconium (TEMAZ), hydrazine (dimethylamino) hydrazine (TDMAH), hydrazine (Diethylamino) hydrazine (TDEAH) and hydrazine (ethylmethylamino) hydrazine (TEMAH), hydrazine (dimethylamino) titanium (TDMAT), bismuth (diethylamino) titanium (TDEAT) ), 肆 (ethyl methylamino) titanium (TEMAT), tert-butylimine ruthenium (diethylamino) ruthenium (TBTDET), tert-butylimine ruthenium (dimethylamino group)钽(TBTDMT), tert-butylimine fluorene (ethylmethylamino) hydrazine (TBTEMT), ethylimido ruthenium (diethylamino) fluorene (EITDET), ethyl imine叁(dimethylamino) 钽 (EITDMT), B Eminoimyl hydrazide (ethylmethylamino) hydrazine (EITEMT), third amyl imino guanidine (dimethylamino) hydrazine (TAIMAT), third amyl imino guanidine (diethyl) Amino) anthracene, dimethyl (dimethylamino) hydrazine, a third pentyl imido fluorenyl (ethylmethylamino) hydrazine, bis (t-butyl imino) bis (dimethylamino) Tungsten (BTBMW), bis(t-butylimino)bis(diethylamino)tungsten, bis(t-butylimino)bis(ethylmethylamino)tungsten; metal halide For example, antimony tetrachloride, antimony pentachloride, and tungsten hexachloride.

Still, in another embodiment, the porous ruthenium containing material or layer 16 can comprise a second ruthenium containing layer that can be incorporated or selectively adjacent to the porous ruthenium containing film . In this embodiment, the ruthenium containing layer can be deposited by cyclic chemical vapor deposition (CCVD) or atomic layer deposition. In a specific embodiment, the second ruthenium-containing layer comprises a single layer or film composed of SiH ₃ or SiH ₂ groups, that is, by introducing a second ruthenium-containing precursor to the porous ruthenium containing The pore surface inside the material reacts to convert Si-OH into Si-O-SiH ₃ or Si-O-SiH ₂ , which can be converted into nanoparticle by electroforming in a subsequent process. Examples of the second ruthenium-containing precursor for depositing the second ruthenium-containing layer include, but are not limited to, (a) chlorodecanes such as monochlorodecane and monochlorodioxane; (b) organic amine decanes such as diisopropyl Amino decane, di-tert-butylamino decane, diisopropylamino dioxane, di-second butylamino dioxane, bis(t-butylamino) decane, bis(dimethylamine) Base) decane, bis(diethylamino) decane, bis(ethylmethylamino) decane; (c) trimethyl decylamine and its derivatives; and (d) bis (dimethyl decylamino) Decane H ₂ Si((NSiH ₃ ) ₂ ) ₂ . In some embodiments, the solidified deposited dense organic tellurite glass can be used to produce a film of varying carbon content that can be achieved in several ways.

The following are exemplary methods for forming or optimizing such porous ruthenium-containing films: (a) the use of broadband UV radiation and ozone to produce pores and to remove all volatile residues, thus resulting in a porous having a very low extinction coefficient < 0.001 (b) using a broadband UV in combination with H ₂ plasma to produce pores and to remove Si-CH ₃ and exchange for hydrogen bonded to Si. Such Si-H bonds are always considered as potential defects in the electroforming process that reduces the necessary potential for activation; and/or (c) use EUV (<176 nm) to create pores and remove Si-CH ₃ to Si- H. Such Si-H bonds are always considered as potential defects in the electroforming process that reduces the necessary potential for activation.

Photocuring of the porogen is selectively removed from the organophthalate film under the following conditions.

The environment may be inert (eg, nitrogen, CO ₂ , rare gases (He, Ar, Ne, Kr, Xe), etc.), oxidizing (eg, oxygen, air, dilute oxygen, oxygen-rich environment, ozone, mono-oxidation) Nitrogen, etc.) or reducing (eg, diluting or concentrating hydrocarbons, hydrogen, etc.). The temperature is preferably from ambient to 500 °C. The power is preferably from 0 to 5000 W. The wavelength is preferably IR, visible light, UV or deep UV (wavelength < 200 nm). The total curing time is preferably from 0.01 minute to 12 hours.

The porogen in the deposited film may or may not be in the same form as the porogen introduced into the reaction chamber. Similarly, the porogen removal process can be The membrane releases the porogen or its fragments. Essentially, the porogen reagent, the porogen in the preparation membrane, and the porogen to be removed may or may not be the same species, but preferably are derived entirely from the porogen reagent (or porogen) Agent substituent). Regardless of whether the porogen remains unchanged throughout the process of the invention, the phrase "porogen" as used herein is intended to include a pore-forming reagent (or pore-forming substituent) and derivatives thereof, throughout the entire process of the invention. Any form of seeing.

The total porosity of the resistive memory material can range from 5 to 75%, depending on process conditions and the desired final film properties. Such films preferably have a density of less than 2.0 g/ml, or less than 1.5 g/ml or less than 1.25 g/ml. Preferably, the resistive memory material of the present study has at least 10% lower, more preferably at least 20% lower than a similar ruthenium containing film made without the porogen.

The method of the present study also includes the step of depositing a second electrode 18 on top of the porous resistive memory material layer 16. The same process and conductive material associated with the first electrode 14 can be used to deposit the second electrode 18.

Certain embodiments for forming the deposition methods described herein in the apparatus use one or more purge gases to wash away unconsumed reactants and/or reaction by-products. A suitable purge system will not react with the gases used to deposit the precursor of the apparatus. Exemplary purge gases include, but are not limited to, argon (Ar), nitrogen (N ₂ ), helium (He), helium, hydrogen (H ₂ ), and mixtures thereof.

Applying energy to at least one of the cerium-containing precursor, the porogen precursor, the oxygen-containing source, the nitrogen-containing source, the reducing agent, other precursors, and/or combinations thereof to initiate the reaction and form the ruthenium-containing film or A coating is applied to the substrate. This energy can be provided by, but not limited to, heat, plasma, microwave plasma, pulsed plasma, spiral plasma, high density plasma, induced coupling plasma, X-ray, Electron beam, photon, remote plasma methods and combinations thereof. In some embodiments, a secondary RF frequency source can be used to alter the plasma characteristics at the surface of the substrate. In a specific embodiment where the depositing involves plasma, the plasma generated process can include a direct plasma generation process in which the plasma is produced directly in the reactor, or plasma is produced outside the reactor and supplied to the reactor The remote plasma within the reactor produces a process.

The precursors can be delivered to the reaction chamber in a variety of ways, such as a PECVD or ALD reactor. In a specific embodiment, a liquid delivery system can be utilized. In an alternative embodiment, a processing unit incorporating liquid delivery and flashing, such as, for example, a turbine vaporizer manufactured by MSP, Inc. of Shoreville, Minn., may be utilized to provide low volatility. The material can be transported by volume, resulting in reproducible transport and deposition without thermally decomposing the precursor. In liquid delivery formulations, the precursors described herein can be delivered in pure liquid form, or can be employed in a solvent formulation or a combination thereof. Thus, in certain embodiments, the precursor formulations can include suitable components that may be desirable and solvent components that are advantageous in particular end use applications to form a film on the substrate.

In some embodiments, the gas conduit from the precursor cartridge to the reaction chamber is heated to one or more temperatures as required by the process and the at least one vessel containing the ruthenium precursor is maintained for foaming. One or more temperatures. In other embodiments, the solution comprising the at least one cerium-containing precursor is injected into a vaporizer maintained at one or more temperatures for direct liquid injection.

The reactor or deposition chamber temperature for deposition may be one of the following endpoints: ambient temperature or 25 ° C; 100 ° C; 200 ° C; 250 ° C; 300 ° C; 350 ° C; 400 ° C; 450 ° C; 500 ° C and any combination thereof. Accordingly, the reactor or deposition chamber temperature for deposition can range from ambient temperature to 1000 ° C, from about 150 ° C to about 400 ° C, from about 200 ° C to about 400 ° C, from about 300 ° C to 600 ° C, or as described herein. Any combination of temperature endpoints.

The reactor or deposition chamber pressure can range from about 0.1 Torr to about 760 Torr, preferably less than 10 Torr. Separate steps for supplying such precursors, sources of oxygen, sources of nitrogen, and/or other precursors, source gases, and/or reagents can be carried out by varying the period during which they are supplied to change the resulting ruthenium-containing chemistry Measurement composition.

An example of a configuration of a device that can be made by the method of the present study can be found in U.S. Patent No. 9,129,676, the disclosure of which is incorporated herein by reference.

The invention will be illustrated in more detail with reference to the following examples, but it should be understood that they are not intended to be limited in any way.

Example

The following examples will show the results of the device obtained corresponding to the process conditions used to deposit the film and produce the pores in the film.

All experiments were performed in a 200 mm DXZ chamber equipped with an Advance Energy 2000 RF generator, using an Applied Materials Precision 5000 system, using an undoped TEOS process kit. The method involves the following basic steps: initial setting and stabilization of the gas stream, deposition, and tank wash/vacuum before wafer removal.

Once the film is deposited, the memory test structure is as follows Built on these wafers. A gold top electrode is deposited on the porous oxide. A low resistivity ruthenium substrate is used as the bottom electrode. A total of five memory cell arrays are constructed and each contains 20 cells across the wafer.

All 100 cells or devices of each wafer were tested using a current-voltage sweep across the porous dielectric. Using current versus voltage distribution to determine whether the devices operate like a memory switching unit, remain non-conductive until the hard breakdown of the dielectric, or conductivity or leakage at low applied voltage . Two of these three conditions (hard breakdown, leakage unit) often indicate a damaged device. Hysteresis voltage-current sweeps with clear settings and reset points tend to represent effective switchable memory devices. Figure 2 illustrates a test structure for obtaining a current-voltage sweep. Figures 3A to C show the following three reactions obtained for the unit: a) insufficient conductivity before hard electrical breakdown occurs, b) conductivity or leakage is too strong at low applied voltage, or c) suitable for when Switching the hysteresis current-voltage sweep of the memory device. In particular, Figure 3A illustrates a forward voltage sweep that does not exhibit improved conductivity prior to the application of a high potential and the development of a hard electrical breakdown or short circuit in the SiOx film. Since the current density is maintained at a high value during the scan back to 0 volts, the reverse scan shows the effect of the short circuit. Figure 3B illustrates that the forward scan exhibits a significantly improved conductivity at very low applied voltages, indicating that the SiOx film is too leaky or conductive, resulting in a hard breakdown at very low potentials. Figure 3C illustrates a hysteresis current-voltage sweep showing the hysteresis current-voltage distribution of a resistive memory device.

Substrate conditioning: The substrate used for this work was a low resistivity p-type 矽 (0.005 Ω-cm). These substrates contain a table of about 8 to 10 Å at room temperature A native oxide that is a defect-free, high-quality thermal oxide. It is assumed that this native oxide prevents defects from driving the conductive pathway to the tantalum substrate. The dense thermal SiOx native oxide surface is removed for certain wafers prior to deposition of the SiOx film. The first removal method evaluated was wet etching using a dilute (5%) HF solution. The wafer was immersed in a dilute HF solution while stirring for a period of 10 minutes, followed by water washing in deionized water and drying. These wafers are then sent to the P5000 system for deposition within 5 minutes of the native oxide strip to prevent re-oxidation of the surface.

One alternative to removing native oxides with HF is to use a plasma based on in-situ plasma or remote plasma source (RPS) to produce F radicals capable of etching the native oxide. In this process, the wafer can be placed in the deposition chamber and in the NF ₃ or RPS NF ₃ plasma ignited in place to remove the native oxide. As shown in Table I below, the plasma-based method for removing native oxide has been found to achieve a significant improvement in the throughput of the switched memory device.

Example 1: The comparison of the native oxide removal process was carried out by depositing a SiOx film using the following process conditions: 850 mg/min cyclooctane flow rate; 150 mg/min DEMS flow rate; 100 sccm CO ₂ carrier gas; 20 sccm O ₂ ; 700 watts. Additional plasma power; chamber pressure of 8 Torr; sensor temperature of 300 ° C; deposition time of 90 seconds, producing a pre-UV cured film of 45 to 55 nm. Three substrate conditioning methods were evaluated: dilute HF wet etching, in situ NF ₃ plasma, and no removal of native oxide. The results of the array of two sets of 20 devices are listed in Table I: In situ NF ₃ plasma to remove native oxide provides the highest throughput from 20 devices per array.

Example 2: Film porosity comparisons made by electrical switching properties were performed on the porogen mixing ratio using three different structure forming agents. These include 70% porogen / 30% structure former; 80% porogen / 20% structure former; 90% porogen / 10% structure former. It is believed that increasing the conduction of the SiOx film necessitates sufficient defect density to allow current to pass through the film. There are two ways to achieve this goal based on pore size or pore density. The use of a mesopore having a diameter of 5 to 10 nm creates a continuous porous network structure interconnecting the electrode and the other electrode. Porous membranes deposited using PECVD typically produce mesopores or pores <2 nm in diameter. In order to establish a conductive path, it is more important to have a smaller pore size, pore density or porosity volume, which is usually expressed as a percentage of porosity. When PECVD is applied to a porous SiOx film, the pore density can be controlled by the selection of a ratio of porogen by other factors such as a structure forming agent. If there is insufficient pore density, the conductive path between the electrodes will not be established and the film will eventually undergo a hard electrical breakdown. If the porosity is too high, this will combine with other factors affecting conductivity, including the amount and type of carbon in the film, causing the SiOx-based porous film to have conductivity at low applied potential or short circuit. , or the current can leak between the electrodes in the off state (leakage current is too high). The optimum porosity will provide a hysteresis current-voltage sweep at a lower voltage setting, a higher voltage reset, and a film that can switch back and forth as the applied voltage changes. The following 3 membranes were deposited under similar conditions: a total precursor flow of 1000 mg/min was used. In the case of 70:30, this consisted of 700 mg/min cyclooctane and 300 mg/min TEOS; 80:20-800 mg/min cyclooctane and 200 mg/min TEOS; 90:10-900 mg/min cyclooctane and 100 mg/min TEOS. The TEOS and cyclooctane carriers each used a flow rate of 100 sccm CO ₂ ; an O ₂ flow rate of 20 sccm; a plasma power of 700 watts; a tank pressure of 8 Torr; and a deposition temperature of 300 ° C. Films having a thickness of 45 to 55 nm were deposited in all three conditions and then annealed with a broadband UV source for 90 seconds to remove the porogen and produce fine pores. The film pore capacities were measured by ellipsometry (EP) and the carbon content was determined by X-ray photoelectron spectroscopy (XPS) to obtain the values contained in Table II below. The highest porogen to composition forming agent ratio (90:10) is expected to have the highest porosity and carbon content. These 3 membranes were used to construct a memory device and tested in the manner described above. The current-voltage distribution obtained for each film is shown in Figures 4A to C. In particular, Figure 4A shows the hard breakdown of the dielectric at an applied potential of 28V. These films have a pore density of about 25% and a very low residual carbon content. Figure 4B shows the hysteresis current-voltage distribution of the resistive memory switching device. The film has a pore density of >25% and a carbon content of <10%. Figure 4C shows electrical breakdown at very low applied potential and insufficient insulation to act as a distribution of the film of the memory switching device. The film has a porosity of >30% and a residual carbon content of >20%. The combination of high porosity and residual carbon leads to premature electrical breakdown at low applied potentials.

The results of such devices indicate that in a film having insufficient porosity, such as shown in Figure 3A, no defect occurs to drive soft breakdown, and the hard breakdown of the film becomes an irreversible short circuit as shown by the current-voltage distribution. The results of these devices also indicate that films with high porosity and high residual carbon content will become too conductive or leaky at low applied potentials. A membrane with >25% porosity and <20% carbon content demonstrates memory switching capability. The porosity and carbon content of the film are adjusted according to the deposition and curing conditions used to deposit and cure the films.

Example 3: After the necessary substrate conditioning and sufficient pore density were found to allow the conductive pathway to traverse the entire thickness of the film, 80:20 and 85:15 porogen to structure forming agent ratios were used for deposition. And test the membranes. Curing these films for a long enough period to reduce the carbon content 20%. The deposition conditions consist of a structure former of TEOS (150 or 200 mg/min) and cyclooctane (850 or 800 mg/min) of 1000 mg/min total precursor flow, 100 sccm of CO ₂ carrier for each precursor, 20 sccm O ₂ flow, 700 watts frequency power, 8 Torr chamber pressure, 300 ° C deposition temperature. Films having a thickness of 45 to 60 nm were deposited and UV cured using a broadband UV source for 90 seconds. These films are then used to construct a memory device as shown in FIG. The scanning capabilities of the films were evaluated by the representative current-voltage sweep profiles shown in Figures 5A and 5B, which demonstrate the use of porogen pairing agents at 80:20 (5A) and 85:15 (5B). The hysteresis characteristic distribution of the porous PECVD-based SiOx film deposited by the ratio. Both films showed a soft breakdown of about 3.5 to 4.5 V and a deactivation of about 10 V.

The hysteresis switching properties exhibited by the two films all indicate potentials that can be used as resistive memory switching devices. The specific film properties porosity and carbon content are shown in Table III below.

Example 4: Successful development of a porous PECVD One of the important constituents of a SiOx-based film is the ability to maintain a predetermined conductivity or an extended on-off state for a prolonged period of time. This memory retention force was tested in Figure 5B by the device fabricated by the deposited film and is shown in Figure 6A. When the current was measured at an applied potential of 1 V, the current density difference of >10 ⁴ Acm ^-2 was maintained for a period of 10 ⁵ seconds.

Another important component of the successful development of porous PECVD SiOx-based films is the ability to switch a large number of switching cycles from conductivity to non-conductive state. The planning capability of the PECVD-based porous SiOx film was tested by repeatedly switching the current measured at 1 V from the conductive or open state to the insulating or closed state. The measured current for each state is shown in Figure 6B, where it is seen that the device provides a >10 ³ current density difference between the conductive states obtained over 10 ³ switching cycles.

The specific examples illustrated and discussed in this specification are intended to be illustrative of the embodiments of the present invention and the invention. This description is not to be taken as limiting the scope of the invention. All of the examples provided are representative and non-limiting. The above-described embodiments of the present invention may be modified or changed without departing from the invention. Although the present invention is described in connection with a wide mouth container, the function of the curvature of the panel according to the present invention should be produced by standard finished products (i.e., finished products that are not wide necked). Therefore, the invention may be practiced without departing from the scope of the invention and the scope of the invention.

Claims (14)

A method for forming a resistive random access memory device, the method comprising the steps of: depositing a first electrode on a substrate; forming a porous resistive memory material layer on the first electrode, By: (i) depositing a gaseous composition comprising a hafnium precursor and a porogen precursor and, after deposition, (ii) removing the porogen precursor by exposing the composition to UV radiation, and Iii) depositing a second germanium-containing layer; and depositing a second electrode on top of the porous resistive memory material layer. The method of claim 1, wherein the ruthenium precursor is selected from at least one of the group consisting of tetraethoxy decane, diethoxymethyl decane, dimethoxymethyl Decane, di-tert-butoxymethyl decane, di-p-pentyloxymethyl decane, di-t-butoxy decane, di-third pentoxy decane, methyl triethoxy decane, dimethyl Ethoxy decane, dimethyl diethoxy decane, dimethyl dimethoxy decane, dimethyl diethoxy decane, methyl triethoxy decane, neohexyl triethoxy decane, Neopentyl dimethoxydecane, diethoxymethoxymethyl decane, phenyl dimethoxy decane, phenyl diethoxy decane, phenyl triethoxy decane, phenyl dimethoxy decane, Phenylmethyldimethoxydecane, 1,3,5,7-tetramethyltetracyclodecane, octamethyltetracyclodecane, 1,1,3,3-tetramethyldioxine Alkane, 1-new hexyl-1,3,5,7-tetramethylcyclotetraoxane, hexamethyldioxane, 1,3-dimethyl-1-ethenyloxy-3-B Oxydioxane, 1,2-dimethyl-1,2-diethyloxy-1,2-diethoxydioxane 1,3-Dimethyl-1,3-diethoxydioxane, 1,3-dimethyl-1,3-diethoxycarbonyl Oxane, 1,2-dimethyl-1,1,2,2-tetraethoxymethoxydioxane, 1,2-dimethyl-1,1,2,2-tetraethoxydioxane , 1,3-dimethyl-1-acetoxy-3-ethoxydioxane, 1,2-dimethyl-1-acetoxy-2-ethoxydioxane, A Ethylene ethoxylated tert-butoxy decane, methyl decane, dimethyl decane, trimethyl decane, tetramethyl decane, hexamethyldioxane, tetramethyl dioxane, dimethyl dioxane, six Methyldioxane (HMDSO), octamethylcyclotetraoxane (OMCTS), tetramethylcyclotetraoxane (TMCTS), bis(triethoxydecyl)methane, bis(triethoxy) Ethylene alkyl) ethane, bis(dimethoxydecyl)methane, bis(dimethoxydecyl)ethane, bis(diethoxymethyldecyl)methane, bis(diethoxymethyl) Base alkyl) ethane, bis(methyldiethoxydecyl)methane, (diethoxymethyldecyl)(diethoxydecylalkyl)methane, and mixtures thereof. The method of claim 2, wherein the ruthenium precursor is selected from the group consisting of di-t-butoxy decane, di-third pentoxy decane, tetraethoxy decane (TEOS), tetramethoxy decane, and A group of mixtures. The method of claim 1, wherein the porogen is selected from at least one of the group consisting of: α-terpinene, terpene, cyclohexane, cyclooctane, γ-萜Terpene, terpene, dimethylhexadiene, ethylbenzene, norbornadiene, cyclopentene oxide, 1,2,4-trimethylcyclohexane, 1,5-di Methyl-1,5-cyclooctadiene, terpene, adamantane, 1,3-butadiene, substituted dienes and decalin. The method of claim 3, wherein the porogen comprises raw borneol Diene, alpha-terpinene or cyclooctane. The method of claim 1, wherein the depositing of the porous resistive memory material layer is performed by a plasma enhanced chemical vapor deposition (PECVD) or a plasma enhanced cyclic chemical vapor deposition (PECCVD) process. The method of claim 1, wherein the substrate is selected from the group consisting of cerium, lanthanum, cerium oxide, cerium nitride, cerium carbide, cerium carbonitride, carbon-doped cerium oxide. Boron-doped cerium, phosphorus-doped cerium, boron-doped cerium oxide, phosphorus-doped cerium oxide, boron-doped cerium nitride, phosphorus-doped cerium, tantalum nitride, copper, tungsten, aluminum, cobalt, nickel, lanthanum Titanium nitride, tantalum nitride, metal oxide, GaAs, InP, GaP, and GaN, and combinations thereof. The method of claim 1, wherein the first electrode is a metal deposited from a group precursor of an alkyl metal, a metal amide, a metal alkoxide, and a metal halide. The method of claim 1, further comprising adding a dopant during deposition of the layer of porous resistive memory material. The method of claim 9, wherein the dopant is selected from the group consisting of Zn, Mg, B, P, As, S, Se, and Te. The method of claim 1, further comprising the porous resistor A metal or metal oxide precursor is added during the deposition of the layer of memory material. The method of claim 11, wherein the metal or metal oxide is selected from the group consisting of diethyl zinc, trimethyl aluminum, (2,4-dimethylpentadienyl) (ethylcyclopentadienyl) fluorene, bis(2,4-dimethylpentadienyl)fluorene, (2,4-dimethylpentadienyl)(methylcyclopentadienyl)fluorene , bis(ethylcyclopentadienyl)phosphonium, hexacarbonylth-butyl acetylene dicobalt (CCTBA) or dicarbonylcyclopentadienyl cobalt (CpCo(CO) ₂ ), Ru ₃ (CO) ₁₂ ; metal Indoleamines such as yttrium (dimethylamino) zirconium (TDMAZ), yttrium (diethylamino) zirconium (TDEAZ), yttrium (ethylmethylamino) zirconium (TEMAZ), hydrazine (dimethylamine)铪(TDMAH), 肆(diethylamino) hydrazine (TDEAH) and hydrazine (ethylmethylamino) hydrazine (TEMAH), hydrazine (dimethylamino) titanium (TDMAT), bismuth (two Ethylamino)titanium (TDEAT), iridium (ethylmethylamino)titanium (TEMAT), tert-butylimidophosphonium (diethylamino) hydrazine (TBTDET), tert-butylimine Base (dimethylamino) ruthenium (TBTDMT), tert-butylimine ruthenium (ethylmethylamino) ruthenium (TBTEMT), ethyl imino ruthenium (diethylamino) ruthenium ( EITDET), ethylimidoguanidine (dimethylamine) Ethyl (钽) (EITDMT), ethyl imino ruthenium (ethylmethylamino) ruthenium (EITEMT), third amyl imino guanidine (dimethylamino) ruthenium (TAIMAT), third amyl Iminoindole (diethylamino) fluorene, dimethyl (dimethylamino) hydrazine, third amyl phosphinyl hydrazide (ethylmethylamino) hydrazine, bis (tert-butyl imino group) Bis(dimethylamino)tungsten (BTBMW), bis(t-butylimino)bis(diethylamino)tungsten, bis(t-butylimino)bis(ethylmethyl) Amino) tungsten, antimony tetrachloride, antimony pentachloride and tungsten hexachloride. The method of claim 1, wherein the second ruthenium-containing layer is formed by deposition of at least one second ruthenium-containing precursor selected from the group consisting of monochlorodecane, monochloro Dioxane, diisopropylaminodecane, di-tert-butylaminodecane, diisopropylaminodioxane, di-tert-butylaminodioxane, bis(t-butylamino)decane, Bis(dimethylamino)decane, bis(diethylamino)decane, bis(ethylmethylamino)decane, trimethyldecylamine and its derivatives, bis(dimethylmercaptoalkylamino)decane And a group consisting of H ₂ Si((NSiH ₃ ) ₂ ) ₂ . The method of claim 1, wherein the porous resistive memory material layer is selected from the group consisting of SiO _x , SiO _x H, Si, O _x N _y , SiO _x N _y H, SiO _x C _z , SiO _x C A group consisting of _z H and combinations thereof, wherein each of x, y, and z is equal to or greater than 1 or equal to or less than 2.