TWI639113B - Memory device and control unit thereof, and data storage method for memory device - Google Patents

Abstract

A storage device and a control unit thereof, and a data storage method usable for the storage device. The storage device includes a data storage medium and a control unit. The data storage medium has a spare block pool, the spare block pool has a plurality of spare blocks, and each spare block has multiple data pages. The control unit receives the data from the host and determines whether the data is continuous data. When the determination is YES, the control unit respectively writes the above data to at least two spare blocks. When the determination is no, the control unit respectively writes the above data to at least two data pages of one of the spare blocks.

Description

Storage device and control unit thereof, data storage method applicable to storage device

The present invention relates to related technologies for data storage, and more particularly to a storage device and a control unit thereof, and a data storage method that can be used for a storage device.

Generally, the storage device is mainly composed of a control unit and a data storage medium (for example, a flash memory), wherein the data storage medium has a plurality of data blocks, and each data block has a plurality of data pages. (page), and the control unit is electrically coupled to the data storage medium to perform data writing, reading or erasing operations on the data page of the data block.

However, the storage device may cause data retention problems due to frequent removal actions, defects in the process, aging due to time, and the like. Therefore, after performing the data writing operation, the control unit of the storage device uses an error correcting code (ECC) to perform error correction and correction operations on the data stored in the storage device. However, the correction capability of the error correction code has a certain limit (for example, 60 bits). When the number of error bits of the data stored in the data page exceeds 60 bits, the error correction code is exceeded and the error correction occurs. The problem of code failure, which will result in loss of validity of the data stored in the storage device.

The present invention provides a storage device that copies a copy of the same data when performing a data write operation to select to store another data that has failed the error correction code when one of the data has an error correction code failure. Or, for the data of two copies of the error correction code failure, the data page is consolidated and a data that does not have the error correction code failure is synthesized, thereby avoiding the problem of data loss.

The invention further provides a control unit of the storage device, which copies a copy of the same data when performing the data writing operation, so as to select to store the failure of the error correction code when the error correction code of one of the data fails. Another piece of information, or the data sheet for the failure of the error correction code for two copies, is combined to form a data that has not failed the error correction code, thereby avoiding the loss of data.

The present invention further provides a data storage method applicable to a storage device, which causes a control unit of the storage device to copy a copy of the same data when performing a data write operation, so that when one of the data fails the error correction code Select to store another piece of data that has not failed the error correction code, or to merge the data page for the data in which the error correction code has failed, and synthesize a piece of data that has not failed the error correction code, thereby avoiding the data. Lost question.

The invention provides a storage device comprising a data storage medium and a control unit. The data storage medium has a spare block pool, and the spare block pool is used to store a plurality of spare blocks, and each spare block has multiple data pages. The control unit is electrically coupled to the data storage medium, and the control unit receives and determines whether the data from the host is continuous data. When the determination is YES, the control unit respectively writes the above data to at least two spare blocks. When the determination is no, the control unit respectively writes the above data to at least two data pages of one of the spare blocks.

The invention further provides a control unit comprising control logic and a microprocessor. The control logic is electrically coupled to the data storage medium. The data storage medium has a spare block pool, and the spare block pool is used to store a plurality of spare blocks, and each spare block has multiple data pages. The microprocessor is electrically coupled to the control logic, and the microprocessor is configured to receive and determine whether the data from the host is continuous data. When the determination is yes, the microprocessor writes the above data to the at least two spare blocks through the control logic. When the determination is no, the microprocessor writes the above data to at least two data pages of one of the spare blocks through the control logic.

The invention further provides a data storage method applicable to a storage device, comprising the steps of: receiving data from a host; determining whether the data is continuous data; and when determining that it is, writing the data to at least two spare areas respectively a block, wherein the at least two spare blocks are selected from a plurality of spare blocks in the spare block pool and each spare block has a plurality of data pages; and when the determination is no, the data is separately written to the spare area At least two data pages of one of the spare blocks of the block pool.

The invention enables the storage device to copy a copy of the same data in the above manner when performing the data writing operation, so that when one of the data fails the error correction code, the storage device can select to store the failure of the error correction code. A piece of information, or the data sheet for the failure of the error correction code for two copies, to synthesize a data without failure of the error correction code, thereby avoiding the problem of data loss.

1 is a circuit block diagram of a storage device in accordance with an embodiment of the present invention. As shown in FIG. 1 , the storage device 100 mainly includes a control unit 110 and a data storage medium 120 . The data storage medium 120 has a data block pool 130 and a spare block pool 140. The spare block pool 140 is used to store spare blocks that are not written with any data (as indicated by the flags 141 to K, where K is a natural number). After the spare block is full, the data block will be formed (as indicated by the marks 131~M, where M is a natural number), and moved to the data block pool 130. When performing the garbage collection process, the data of several data blocks will be written to a spare block, and after the deletion operation, it will be changed back to the spare block and moved to the spare block. The pool 140; and the spare block that writes the data will form a data block and be moved to the data block pool 130. It is conceivable that the spare blocks 141~K and the data blocks 131~M are logically defined by the data blocks, and the user can increase or decrease the logical definition of the data blocks according to actual needs. As shown in FIG. 1, each data block has multiple data pages (as indicated by the labels P1 to PN, where N is also a natural number). In this example, the data storage medium 120 is implemented by non-volatile memory, such as a flash memory, a magnetoresistive random access memory (Magnetoresistive RAM), and a ferroelectric random access memory. This is realized by a memory device such as a Ferroelectric RAM that has a long-term data storage.

Please continue to refer to Figure 1. The control unit 110 is electrically coupled to the data storage medium 120 and is used to control the operation of the data storage medium 120 (for example, accessing or erasing data). In this example, control unit 110 includes interface logic 112, microprocessor 114, and control logic 116. The microprocessor 114 is electrically coupled to the interface logic 112 for receiving commands or data from the host computer (for example, an electronic device having a computing function such as a computer, a mobile phone, a digital camera, etc., not shown) through the interface logic 112, for example: Write commands, read commands, delete commands, and so on. In addition, the microprocessor 114 is electrically coupled to the data storage medium 120 through the control logic 116, and is used to access the data storage medium 120 through the control logic 116 or to erase the data.

In this example, upon receiving a write command from the host and the data to be written, the microprocessor 114 will determine if the data is continuous. The so-called continuous data means that the corresponding multiple logical block addresses (LBAs) are sequentially connected. In addition, the determination of continuous data does not need to be based on the two logical block addresses that are sequentially connected, and can be set according to the needs of the user. For example, when the set value is four, the microprocessor 114 judges that it is continuous data only if the sequential logical block address of the data to be written exceeds four, otherwise, it is not regarded as continuous data. Then, the microprocessor 114 selects different data storage methods according to the judgment result.

When the determination is no, the microprocessor 114 selects a spare block from the spare block pool 140 through the control logic 116, and selects two data pages of the spare block through the control logic 116. The above information is written in both. For example, the microprocessor 114 may select the spare block 141 from the spare block pool 140 through the control logic 116, and write the above data in the data page P1 of the spare block 141, and in the spare block. The same information is written in the data page P2 of 141. In other words, a piece of data and its backups are stored in the same spare block 141. The data page P1 and the data page P2 in the figure are two adjacent data pages, which is a preferred embodiment. However, the data page P1 and the data page P2 may also be two data pages that are not adjacent. The microprocessor 114 may determine the location of the data page according to a program or a random number generator, but is not limited thereto. In addition, the number of backups can be greater than one. For example, the microprocessor 114 writes the same data on other material pages of the spare block 141, for example, the material page P3. In this way, one piece of data and two copies are stored in the same spare block 141.

In addition, the spare block 141 may be the least number of erasures in the spare block pool 140 or the last time the actor is not executed to comply with the management of wear leveling.

On the other hand, when the determination is yes, the microprocessor 114 selects two spare blocks from the spare block pool 140 through the control logic 116, and passes through the control logic 116 in each of the selected spare blocks. Write the above information. For example, the microprocessor 114 may select the spare blocks 142 and 143 from the spare block pool 140 through the control logic 116, and write the above data from the data page P1 of the spare block 142, and provide the self-prepared data. The same data is written by the data page P1 of the block 143.

When the two spare blocks described above are full of data (ie, all data pages are written to the data), the microprocessor 114 initiates a data verification procedure, that is, using the error correction code to perform the two backups. Each data page in the block performs error correction and correction operations on the data. When any data page of any spare block has a problem that the error correction code fails, the spare block has the problem that the error correction code fails. And depending on whether there is an error correction code failure, it is decided whether to perform data consolidation on the two spare blocks. In addition, for a specific purpose, the microprocessor 114 can actively fill in the dummy data of the unwritten data of the spare block, and make the spare block full of data to enter the startup data confirming program.

When the data confirmation program is executed and the microprocessor 114 determines that none of the two spare blocks has failed the error correction code, or judges that only one spare block has a problem that the error correction code has failed, then the microprocessor 114, through the control logic 116, one of the spare blocks of the problem that the error correction code has not been invalidated is changed into a data block and stored in the data block pool 130, and the remaining spare block is recycled. That is, the data is erased and stored back into the spare block pool 140.

Taking the spare blocks 142 and 143 selected by the microprocessor 114 as an example, it is assumed that the spare blocks 142 and 143 are full of data, and only the spare block 142 has a problem that the error correction code fails. When the spare block 143 does not have the problem of the error correction code failing, the microprocessor 114 changes the spare block 143 to the data block through the control logic 116 and stores it in the data block pool 130. In addition, the microprocessor 114 also erases all of the data in the spare block 142 through the control logic 116 and stores it back into the spare block pool 140.

In addition, when the data confirmation program is executed and the microprocessor 114 determines that the two spare blocks have the problem that the error correction code has failed, the control logic 116 selects another spare from the spare block pool 140. a block (named as a third spare block), and storing the data of the data pages in the spare blocks that have been filled with data without the error correction code being invalidated into the data page of the third spare block And after the third spare block is full of data and confirmed by the data, it is changed into a data block and stored in the data block pool 130. Finally, the two spare blocks are erased after the data is erased. Stored back into the spare block pool 140.

Taking the spare blocks 142 and 143 selected by the microprocessor 114 as an example, it is assumed that the spare blocks 142 and 143 are full of data, and the error blocks of the data blocks P1 and PN of the spare block 142 are invalid. The problem that the data pages P1 and PN of the spare block 143 have no error correction code failure; the data pages P2 and PN-1 of the spare block 143 have the problem that the error correction code is invalid, and the data page of the spare block 142 P2 and PN-1 have no problem with the error correction code being invalid. Then, the microprocessor 114 selects a spare block from the spare block pool 140 through the control logic 116 as a third spare block, for example, picking up the spare block 144 to use the data of the spare block 142. The pages P2 to PN-1 and the data pages P1 and PN of the spare block 143 are stored in the spare block 144. In the data confirmation process, the microprocessor 114 can re-confirm the data page data after the data is stored in the spare block 144 to ensure that the data has been correctly stored in the spare block 144. If there is a problem that the data page also has an error correction code failure, the microprocessor 114 selects another spare block from the spare block pool 140 as the third spare block through the control logic 116, and repeats the above steps. When the accuracy of the data is confirmed, the microprocessor 114 changes the spare block 144 to the data block through the control logic 116 and stores it in the data block pool 130. In addition, the microprocessor 114 also erases the spare blocks 142 and 143 through the control logic 116 and stores them in the spare block pool 140 to complete the data confirmation process.

With the above teachings, those skilled in the art can summarize some basic operational steps of a data storage method that can be used for a storage device, as shown in FIG. 2 is a flow chart of a data storage method applicable to a storage device according to an embodiment of the invention. Referring to FIG. 2, the method includes the following steps: first, receiving data from the host (as shown in step S201); then, determining whether the data is continuous data (as shown in step S202); If yes, the foregoing data is respectively written to the at least two spare blocks, wherein the at least two spare blocks are selected from the spare block pool and each spare block has multiple data pages (as shown in step S203). Otherwise, when the determination is no, the above data is respectively written to at least two data pages of one of the spare blocks of the spare block pool (as shown in step S204).

In summary, the present invention enables the storage device to copy a copy of the same data in the above manner when performing a data write operation, so that it can be selected to store no error when one of the data fails the error correction code. Another piece of information that invalidates the calibration code, or the data sheet for the failure of the error correction code to be duplicated, and a data that has not been invalidated by the error correction code is synthesized, thereby avoiding the problem of data loss.

While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application.

100‧‧‧ storage device

110‧‧‧Control unit

112‧‧‧Interface logic

114‧‧‧Microprocessor

116‧‧‧Control logic

120‧‧‧Data storage media

130‧‧‧Data block pool

131~M‧‧‧data block

140‧‧‧Reserved block pool

141~K‧‧‧ spare block

P1 ~ PN‧‧‧Information Page

S201~S204‧‧‧Steps

1 is a circuit block diagram of a storage device in accordance with an embodiment of the present invention; and FIG. 2 is a flow chart of a data storage method applicable to a storage device in accordance with an embodiment of the present invention.

Claims (9)

A storage device comprising: a non-volatile memory having a plurality of spare blocks: and a control unit for controlling operation of the non-volatile memory, the control unit determining to write to one of the non-volatile memories Whether the data is a continuous data, when the determination is yes, the control unit selects and writes the data to at least two of the spare blocks. The storage device of claim 1, wherein the plurality of logical block addresses corresponding to the continuous data are sequentially connected. The storage device of claim 1, wherein at least two of the spare blocks are a minimum value of the number of erasures or a maximum value of a time record in the spare blocks. The storage device of claim 1, wherein each of the blocks has a plurality of data pages. The storage device of claim 1, wherein the control unit selects and writes the data to at least two of the data pages of one of the spare blocks. A storage device comprising: a non-volatile memory having a plurality of blocks; and a control unit for controlling operation of the non-volatile memory, the control unit determining data to be written to the non-volatile memory Whether it is a continuous data, when the judgment is yes, the control unit selects and writes the data to at least two of the blocks. The storage device of claim 6, wherein the plurality of logical block addresses corresponding to the continuous data are sequentially connected. The storage device of claim 6, wherein each of the blocks has a plurality of data pages. The storage device of claim 6, wherein the control unit selects and writes the data to at least two of the data pages of one of the spare blocks.