TWI541912B - Method of fabricating semiconductor package - Google Patents

Description

Semiconductor package manufacturing method

The present invention relates to a packaging process, and more particularly to a method of fabricating a semiconductor package that can improve laser damage to conductive layers and residues.

With the evolution of semiconductor packaging technology, semiconductor devices have developed different package types, and in order to improve electrical functions and save packaging space, different stereo packaging technologies have been developed, for example, fan-out package stacking. (Fan Out Package on package, referred to as FO PoP), etc., in order to match the increased number of input/outputs on various wafers, and then integrate the integrated circuits of different functions into a single package structure, which can be used as a system package ( SiP) heterogeneous integration features, which can be used to integrate various electronic components, such as memory, central processing unit, graphics processor, image application processor, etc., by stacking design, suitable for thin and light electronic products. .

1A to 1F are schematic cross-sectional views showing a method of manufacturing a semiconductor package 1 of a conventional package stacking device.

As shown in FIG. 1A, a semiconductor component 10 such as a wafer is disposed on the release layer 110 of a first carrier 11 to form a glue layer 13 thereon. The release layer 110 is overlaid to cover the semiconductor element 10.

As shown in FIG. 1B, a second carrier 12 having a copper foil 120 is disposed on the sealant layer 13.

As shown in FIG. 1C, the first carrier 11 and its release layer 110 are removed to expose the semiconductor component 10 and the encapsulation layer 13.

As shown in FIG. 1D, a plurality of openings 130 are formed in a laser manner on the encapsulation layer 13 around the periphery of the semiconductor device 10.

As shown in FIG. 1E, a conductive material is filled in the openings 130 to form a conductive pillar 14, and a plurality of redistribution layers (RDL) 15 are formed on the sealant layer 13 to make the line. The redistribution layer 15 is electrically connected to the conductive pillars 14 and the semiconductor element 10.

As shown in FIG. 1F, the second carrier 12 is removed, and the copper foil 120 is used to perform a patterned circuit process to form the wiring structure 16, and then a singulation process is performed.

However, in the manufacturing method of the conventional semiconductor package 1, the plurality of openings 130 are formed by laser, so that the copper foil 120 is not only easily damaged but affects the yield of the subsequent fabrication of the circuit structure 16, and the process of forming the opening 130 is formed. The residue generated in the sealant (such as the adhesive of the sealant layer 13 or the exfoliated copper material) is easily deposited on the bottom of the opening 130, so that the inside of the opening 130 needs to be cleaned in the subsequent process to conductive materials. Fill in the opening 130.

Moreover, the operation of cleaning the opening 130 not only increases the manufacturing cost, but also because the opening 130 has a high aspect ratio, it is often difficult to completely remove the residue in the opening 130, causing the residue to affect the conductive pillar 14 Yield of sexual transmission.

Therefore, how to overcome the various problems of the above-mentioned prior art has become a problem that is currently being solved.

In view of the above-mentioned various deficiencies of the prior art, the present invention provides a method of fabricating a semiconductor package, comprising: providing a first carrier provided with at least one semiconductor component, and the first carrier has a spacer layer bonded to the semiconductor component Forming a sealant layer having opposite first and second surfaces on the spacer layer of the first carrier, such that the sealant layer covers the semiconductor component, and the first surface is bonded to the spacer layer; At least one opening on the second surface of the sealant layer, wherein the opening communicates with the first and second surfaces; forming a second carrier on the second surface of the sealant layer; and removing the first carrier And the spacer layer exposes the semiconductor element and the first surface and the opening of the encapsulant layer.

In the above method of fabricating a semiconductor package, the sealant layer is formed by a molding process or a press-forming process, and the opening is formed by laser.

In the above method of fabricating a semiconductor package, the second carrier covers the opening, and the second carrier is bonded to the second surface of the sealant layer by a conductive layer. For example, the conductive layer is formed on the second surface of the sealant layer, and then the second carrier is formed on the conductive layer; or the conductive layer is formed on the second carrier, and then the first layer is formed. The two carriers are bonded to the second surface of the sealant layer with the conductive layer. After the removal of the first carrier and the spacer layer, the second carrier is removed, and the conductive layer is used to form a line structure.

In addition, in the foregoing semiconductor package and the method of manufacturing the same, the removal includes After the first carrier, a conductive material is formed in the opening, and a wiring structure is formed on the first surface of the sealing layer, so that the wiring structure is electrically connected to the conductive material and the semiconductor component. For example, the circuit structure includes at least one circuit redistribution layer, and the material forming the conductive material is at least copper, aluminum, titanium, or a combination of at least two thereof. In addition, after the formation of the wiring structure, the second carrier is removed.

It can be seen that, in the manufacturing method of the semiconductor package of the present invention, the second carrier is formed by first forming the opening, and then the first carrier and the spacer layer are removed, so when the opening is made, only The spacer layer of the first carrier member may be damaged without damaging the configuration of the second carrier member, and the residue generated during the formation of the first carrier member and the spacer layer thereof The opening will be dropped by itself, so that the operation of cleaning the opening is not required, so as to reduce the manufacturing cost.

1,2‧‧‧Semiconductor package

10,20‧‧‧Semiconductor components

11, 21‧‧‧ first carrier

110‧‧‧Fractal layer

12,22‧‧‧second carrier

120‧‧‧ copper foil

13,23‧‧‧ Sealing layer

130,230‧‧‧ openings

14,24‧‧‧conductive column

15,250‧‧‧Line redistribution

16,25,26‧‧‧Line structure

210‧‧‧ spacer

220‧‧‧ Conductive layer

23a‧‧‧ first surface

23b‧‧‧ second surface

251‧‧‧Conductive components

1A to 1F are schematic cross-sectional views showing a method of fabricating a conventional semiconductor package; and FIGS. 2A to 2H are schematic cross-sectional views showing a method of fabricating the semiconductor package of the present invention; wherein the 2C' is a 2Cth diagram Another way.

The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.

It should be noted that the structures, proportions, sizes, etc. shown in the drawings of the present specification are only used in conjunction with the contents disclosed in the specification to familiarize themselves with the art. The understanding and reading of the person is not intended to limit the conditions for the implementation of the present invention, and therefore does not have technical significance. Any modification of the structure, change of the proportional relationship or adjustment of the size may not be affected by the present invention. The efficacies and the achievable objectives should still fall within the scope of the technical content disclosed in the present invention. In the meantime, the terms "upper", "first", "second" and "one" are used in the description, and are not intended to limit the scope of the invention. Changes or adjustments in the relative relationship are considered to be within the scope of the present invention.

2A to 2G are schematic cross-sectional views showing the manufacturing method of the semiconductor package 2 of the present invention.

As shown in FIG. 2A, a first carrier 21 provided with at least one semiconductor component 20 is provided, and a sealing layer 23 is formed on the first carrier 21 so that the sealing layer 23 covers the semiconductor component. 20.

Then, the openings 230 are formed by laser drilling, mechanical drilling, etching or the like to form a plurality of openings 230 on the second surface 23b of the sealing layer 23, and each of the openings 230 is located in the semiconductor component 20 The peripheral region communicates with the first and second surfaces 23a, 23b.

In this embodiment, the first carrier 21 may be a metal plate, a semiconductor wafer or a glass plate.

Furthermore, the first carrier 21 has a spacer layer 210 such as a release film, an adhesive material, an insulating material or the like for bonding the semiconductor component 20 and the sealant layer 23.

Moreover, the sealant layer 23 has a first surface 23a opposite to the second surface 23b, and the first surface 23a is joined to the first carrier 21.

Further, the sealant layer 23 is formed by molding a resin processformer or a laminate film (Laminate Dry Film Type), but is not limited thereto.

As shown in FIGS. 2B to 2C, a second carrier 22 is formed on the second surface 23b of the encapsulant layer 23 and covers the openings 230.

In this embodiment, the second carrier 22 is bonded to the second surface 23b of the sealant layer 23 by a conductive layer 220. Specifically, the conductive layer 220 such as a copper foil is first pressed onto the second surface 23b of the sealant layer 23, and the second carrier 22 is formed on the conductive layer 220.

Alternatively, as shown in FIG. 2C', the conductive layer 220 may be first pressed onto the second carrier 22, and the second carrier 22 may be bonded to the sealing layer 23 by the conductive layer 220. On the second surface 23b.

As shown in FIG. 2D, the first carrier 21 and the spacer layer 210 are removed, and the semiconductor device 20 and the first surface 23a and the opening 230 of the sealing layer 23 are exposed.

As shown in FIGS. 2E to 2F, a conductive material such as copper, aluminum, titanium or a combination of at least two thereof is formed in the opening 230 to form a plurality of conductive pillars 24, and a wiring structure 25 is formed in the sealant. The first surface 23a of the layer 23 electrically connects the wiring structure 25 to the conductive pillar 24 and the semiconductor element 20.

In this embodiment, the circuit structure 25 includes at least one redistribution layer (RDL) 250 and a plurality of conductive elements 251 disposed on the outermost circuit redistribution layer 250, and the conductive element 251 includes Solder material.

As shown in FIG. 2G, the second carrier 22 is removed and the conductive layer 220 is retained.

As shown in FIG. 2H, the conductive layer 220 is used to perform an RDL process to form another line structure 26, and then a singulation process is performed.

In the subsequent process, the semiconductor package 2 can be connected to another semiconductor package (not shown) by the conductive elements 251 to form a package stacking device.

In summary, in the manufacturing method of the semiconductor package 2 of the present invention, the second carrier 22 is formed by forming the opening 230 first, and then the first carrier 21 and the spacer layer 210 thereof are removed. When the opening 230 is formed, only the spacer layer 210 is damaged without damaging the conductive layer 220, and thus the yield of the other line structure (not shown) is not affected.

Furthermore, although the residue generated during the formation of the opening 230 (such as the adhesive or the peeling spacer 210 of the sealant layer 23, etc.) is deposited at the bottom of the opening 230, when the first is removed When the carrier 21 and the spacer layer 210 thereof, the residues will fall out of the opening 230 by themselves, so that the operation of cleaning the opening 230 is not required, so that the method of the present invention can effectively reduce the manufacturing process compared with the prior art. The cost, and because there is no residue in the opening 230, the electrical transmission yield of the conductive post 24 is better.

The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as follows. Listed around.

20‧‧‧Semiconductor components

21‧‧‧First carrier

210‧‧‧ spacer

22‧‧‧Second carrier

220‧‧‧ Conductive layer

23‧‧‧ Sealing layer

23a‧‧‧ first surface

23b‧‧‧ second surface

230‧‧‧ openings

Claims (12)

A method of fabricating a semiconductor package, comprising: providing a first carrier provided with at least one semiconductor component, and the first carrier has a spacer layer bonding the semiconductor component; forming an opposite first surface and a second The sealing layer of the surface is disposed on the spacer layer of the first carrier, such that the sealing layer covers the semiconductor component, and the first surface is bonded to the spacer layer; and at least one opening is formed in the sealing layer Surfacely, the opening is communicated with the first and second surfaces; a second carrier is formed on the second surface of the sealant layer; and the first carrier and the spacer layer are removed to expose the semiconductor component a first surface and an opening of the sealant layer. The method of fabricating a semiconductor package according to claim 1, wherein the sealant layer is formed by a molding process or a press process. The method of fabricating a semiconductor package according to claim 1, wherein the opening is formed by laser. The method of fabricating a semiconductor package according to claim 1, wherein the second carrier covers the opening. The method of fabricating a semiconductor package according to claim 1, wherein the second carrier is bonded to the second surface of the sealant layer by a conductive layer. The method of manufacturing the semiconductor package of claim 5, wherein the process of forming the second carrier first forms the conductive layer on the second surface of the sealing layer, and then forms the second carrier In the guide On the electrical layer. The method of manufacturing the semiconductor package of claim 5, wherein the process of forming the second carrier first forms the conductive layer on the second carrier, and then the second carrier is electrically conductive. A layer is bonded to the second surface of the sealant layer. The method for manufacturing a semiconductor package according to claim 5, further comprising removing the first carrier and the spacer layer, removing the second carrier, and forming a line structure by using the conductive layer. The method for manufacturing a semiconductor package according to claim 1, further comprising: after removing the first carrier, forming a conductive material in the opening, and forming a wiring structure on the first surface of the sealing layer, The wiring structure is electrically connected to the conductive material and the semiconductor element. The method of fabricating a semiconductor package according to claim 9 further comprises removing the second carrier after forming the line structure. The method of fabricating a semiconductor package according to claim 9, wherein the circuit structure comprises at least one line redistribution layer. The method of fabricating a semiconductor package according to claim 9, wherein the material forming the conductive material comprises at least copper, aluminum, titanium or a combination of at least two thereof.