TWI516854B - Projection apparatus and image data accessing method thereof - Google Patents

Description

Projection device and image data access method thereof

The present invention relates to a projection technique, and more particularly to a projection apparatus and an image data access method thereof.

The projection device can project images onto a larger screen to allow more people to simultaneously view the content displayed on the screen. Therefore, it is often used in public places such as companies and schools. Furthermore, as household display products are moving toward larger sizes, projection devices are becoming more and more popular in general households, and become an everyday electronic product in modern life.

Generally, in the process of projecting a screen by the projection device, the projection device performs writing and reading of the image data in a single memory according to the clock signal. That is to say, the single memory is switched between the read state and the write state according to the control of the clock signal, that is, the memory cannot write and read the image data at the same time. Therefore, the projection device waits for the single memory to be converted into the read state, and can output a frame image frame. Moreover, the projection device outputs one frame of image After that, the single memory needs to be converted to the write state again to write the image data into the memory.

It can be seen that the projection device needs to wait for the conversion of the access state of the single memory to project the image frame. If the frequency of the clock signal is too low, the picture projected by the projection device may have a problem of picture delay. In general, in order to achieve a smooth projection effect, the frequency of the clock signal can be increased to avoid the problem of picture delay, but increasing the frequency of the clock signal causes power consumption. On the other hand, in order to provide higher resolution, the amount of data on the image screen will also increase. Therefore, the read time and the write time required for a single frame of image data are also lengthened, and the problem of picture delay is relatively easy to occur.

In view of the above, the present invention provides a memory controller and a data access method thereof, which can read and write data in two memories by controlling a single clock signal, so that the projection device can output images quickly. Improve the smoothness of the projection screen.

The present invention provides a projection apparatus including an image receiving unit, an image projection unit, a first memory, a second memory, and a memory controller. The image receiving unit is configured to receive image data, and the image projection unit is configured to project an image corresponding to the image data to the projection surface. The memory controller is coupled to the image projection unit, the image receiving unit, the first memory and the second memory, and configured to: image data transmitted by the image receiving unit in response to the first level of the clock signal Write to the first A memory, and at the same time, the image data stored in the second memory is read from the second memory.

In an embodiment of the invention, the memory controller is further configured to: read the image data of the stored first memory from the first memory in response to a second level of the clock signal, At the same time, the image data transmitted by the image receiving unit is written to the second memory.

In an embodiment of the invention, the projection apparatus further includes a clock generation unit. The clock generation unit is coupled to the memory controller and provides a clock signal to the memory controller, and the first level and the second level of the clock signal are different levels.

In an embodiment of the invention, the memory controller includes a memory interface and a memory management unit. The memory interface is coupled to the first memory and the second memory. The memory management unit is coupled to the memory interface, the memory management unit receives the clock signal, and the memory management unit performs data writing and data on the first memory and the second memory according to the clock signal and through the memory interface. Read.

In an embodiment of the invention, the memory controller further includes a data input interface. The memory controller is coupled to the image receiving unit through the data input interface to receive the image data transmitted by the image receiving unit.

In an embodiment of the invention, the memory controller further includes a data output interface. The memory controller is coupled to the image projection unit through the data output interface to output the image data read by the first and second memory to the image projection unit.

In an embodiment of the invention, the first memory and the second memory are The body is a random access memory (RAM).

From another point of view, the present invention provides an image data access method suitable for a memory controller disposed in a projection device, and the projection device includes an image receiving unit, an image projection unit, a first memory, and a second memory. Body, this data access method includes the following steps. Provide clock signal to the memory controller. Receiving image data transmitted by the image receiving unit. Transmitting the image data transmitted by the image receiving unit to the first memory in response to the first level of the clock signal, and simultaneously reading the image data stored in the second memory from the second memory . The image data read from the first memory or the second memory is output to the image projection unit.

In an embodiment of the present invention, the data access method further includes: reading the image data stored in the second memory from the first memory in response to the second level of the clock signal, and At the same time, the image data transmitted by the image receiving unit is written to the second memory.

In an embodiment of the invention, the clock signal is provided by the clock generation unit, and the first level and the second level of the clock signal are different levels.

Based on the above, in the memory controller and the data access method thereof provided by the present invention, when the pulse signal is at the first level, the memory controller writes the input image data to the first memory and reads from the first memory. The second memory reads the stored image data. When the pulse signal is at the second level, the memory controller writes the input image data to the second memory and reads the stored image data from the first memory. In this way, by the control of the single clock signal, the memory controller can read the stored image data from the first memory and the second memory in turn, and the memory controller is the same The input image data can be written in the first memory and the second memory in turn. According to this, it is possible to output an image screen without waiting for the conversion of the access state of the memory, thereby improving the smoothness of the projected image.

The above described features and advantages of the invention will be apparent from the following description.

10‧‧‧Projector

100‧‧‧ memory controller

110‧‧‧Image receiving unit

120‧‧‧Image projection unit

130‧‧‧First memory

140‧‧‧Second memory

150‧‧‧ clock generation unit

101‧‧‧Data input interface

102‧‧‧ data output interface

103‧‧‧ memory interface

104‧‧‧Memory Management Unit

130‧‧‧First memory

140‧‧‧Second memory

CLK‧‧‧ clock signal

Img_d‧‧‧Image data

S401~S405‧‧‧ steps of the image data access method according to an embodiment of the present invention

The following drawings are a part of the specification of the invention, and illustrate the embodiments of the invention

FIG. 1 is a schematic diagram of a projection apparatus according to an embodiment of the invention.

2 is a block diagram of a memory controller according to the embodiment of FIG. 1.

FIG. 3 is a schematic diagram showing an access state of a first memory and a second memory according to an embodiment of the invention.

FIG. 4 is a flow chart of a data access method according to an embodiment of the invention.

The present exemplary embodiments will now be described in detail, and examples of the exemplary embodiments are illustrated in the drawings. In addition, wherever possible, the same reference numerals in the drawings

FIG. 1 is a schematic diagram of a projection apparatus according to an embodiment of the invention. Figure. Referring to FIG. 1 , the projection device 10 includes a memory controller 100 , an image receiving unit 110 , an image projection unit 120 , a first memory 130 , a second memory 140 , and a clock generation unit 150 . In the present embodiment, the projection device 10 may be a (micro) projector or various electronic devices having a projection function. The projection device 10 receives image data from an external device (not shown), and the external device may be a smart phone, a notebook, a desktop computer, a multimedia player, or a game machine. An electronic device with video signal providing and/or playback capabilities.

In this embodiment, the image receiving unit 110 is configured to receive image data, and may include a wired interface, a wireless interface, or a combination thereof. For example, the wired interface of the image receiving unit 110 can be used to receive a video graphics array (VGA), a digital video interface (DVI), a high-definition multimedia interface (HDMI), and a display. (DisplayPort), independent video terminal (S-Video), AV terminal, color difference terminal and / or Internet (Internet) and other video transmission format video signals, but not limited to this. In addition, the wireless interface of the image receiving unit 110 can be used to receive image signals of various wireless transmission formats such as Bluetooth (BT), 3G, Wireless Fidelity (WiFi), and/or WiGig, but is not limited. herein.

The image projection unit 120 is configured to project an image corresponding to the received image data to a projection surface. Moreover, the image projection unit 120 may be an optical projection module that supports various types of projection technologies such as digital light processing (DLP), liquid crystal on silicon (LCoS), and 3LCD.

The first memory 130 and the second memory 140 are used for storing image data, and are, for example, any type of fixed or removable random access memory (RAM), flash memory (Flash memory). ), hard disk or other similar device or a combination of these devices. The random access memory may be a dynamic random access memory (DRAM) or a static random access memory (SRAM). The present invention does not specifically limit the type of random access memory. .

The clock generation unit 150 provides a clock signal to the memory controller 100 to enable the memory controller 100 to operate normally. Wherein, the clock signal has different first level and second level. Accordingly, the memory controller 100 used as the control core of the projection device 10 can perform images on the first memory 130 and the second memory 140 according to the level of the clock signal provided by the clock generating unit 150. Access to data.

The memory controller 100 is coupled between the image receiving unit 110 and the image projecting unit 120 and coupled to the first memory 130, the second memory 140, and the clock generating unit 150. The memory controller 100 receives the image data transmitted by the image receiving unit 110, and writes the image data transmitted by the image receiving unit 110 to the first memory 130 and the second memory 140 to transmit the image receiving unit 110. The image data is stored in the first memory 130 and the second memory 140. On the other hand, the memory controller 100 can read the image data stored in the first memory 130 and the second memory 140, and read the image data from the first memory 130 or the second memory 140. Output to the image projecting unit 120, so that the image projecting unit 120 generates A corresponding projection beam is used to project a picture on the projection surface.

In detail, the memory controller 100 is configured to write the image data transmitted by the image receiving unit 110 to the first memory 130 in response to the first level of the clock signal, and simultaneously from the second memory. The body 140 reads the image data that has been stored in the second memory 140. On the other hand, the memory controller 100 can read the image data stored in the first memory 130 from the first memory 130 in response to the second level of the clock signal, and at the same time, the image receiving unit The image data transmitted by 110 is written to the second memory 140.

Further, FIG. 2 is a block diagram of a memory controller according to the embodiment of FIG. 1. Referring to FIG. 1 and FIG. 2 simultaneously, the memory controller 100 includes a data input interface 101, a data output interface 102, a memory interface 103, and a memory management unit 104. In this embodiment, the memory controller 100 is coupled to the image receiving unit 110 through the data input interface 101 to receive the image data img_d transmitted by the image receiving unit 110. On the other hand, the memory controller 100 is coupled to the image projecting unit 120 via the data output interface 102 to output the image data img_d to the image projecting unit 120 for projection of the image.

The data input interface 101 and the data output interface 102 can be compatible with the Universal Serial Bus (USB) standard, the Parallel Advanced Technology Attachment (PATA) standard, and the Institute of Electrical and Electronics Engineers (Institute of Electrical and Electrical Engineers). Electronic Engineers, IEEE) 1394 standard, Peripheral Component Interconnect Express (PCI Express) standard, serial advanced accessories (Serial) The Advanced Technology Attachment (SATA) standard or other suitable data transmission standard is not limited by the present invention.

The memory interface 103 is coupled to the first memory 130 and the second memory 140. The memory management unit 104 is coupled to the data input interface 101, the data output interface 102, and the memory interface 103, and the memory management unit 104 operates the first memory 130 and the second memory through the memory interface 103 according to the clock signal CLK. 140 data writing and data reading. Further, the memory management unit 104 writes the image data to be stored to the first memory 130 and the second memory 140 through the memory interface 103. Similarly, the memory management unit 104 reads the image data stored in the first memory 130 and the second memory 140 through the memory interface 103. In this embodiment, the memory management unit 104 receives the clock signal CLK output by the clock generation unit 150, and accesses the first memory 130 and the second memory 140 according to the clock signal CLK.

In detail, when the pulse signal CLK is at the first level, the memory management unit 104 writes the image data img_d input from the data input interface 101 to the first memory 130, and at the same time, the memory management unit 104 reads The image data img_d stored in the second memory 140 is outputted through the data output interface 102 to output the image data img_d read from the second memory. On the other hand, when the pulse signal CLK changes from the first level to the second level signal, the memory management unit 104 reads the image data img_d stored in the first memory 130, and outputs the image data through the data output interface 102. The image data img_d read by the memory, and the memory management unit 104 simultaneously writes the image data img_d input from the data input interface 101 to the first Two memory 140. That is to say, by the control of the single clock signal CLK, the memory controller 100 can read from the first memory 130 and the second memory 140 in turn, and the image receiving unit 110 transmits the data through the data input interface 101. Image data img_d.

3 is a schematic diagram of an access state of a first memory and a second memory according to an embodiment of the invention. Referring to FIG. 2 and FIG. 3 simultaneously, the clock signal CLK is regularly switched between the first level and the second level according to the clock frequency thereof. It should be noted that, in this embodiment, the first level is assumed to be a high level, and the second level is a low level, but the invention is not limited thereto. In another embodiment, the first level may also be a low level, and the second level is a high level.

During the period from time t1 to t2, the memory management unit 104 receives the clock signal CLK of the high level. Then, the memory management unit 104 controls the first memory 130 to be in the write state to write the image data img_d input from the data input interface 101 to the first memory 130. At the same time, the memory management unit 104 controls the second memory 140 to be in a read state to read the image data img_d already stored in the second memory 140.

Next, during the period from time t2 to time t3, the memory management unit 104 receives the clock signal CLK that is switched from the high level to the low level. Then, the memory management unit 104 controls the first memory 130 to be in the read state, and reads the image data img_d written to the first memory 130 during the period from time t1 to t2. That is to say, during the period of time t1~t2, the image data img_d is written to the first memory 130. The period between t2 and t3 is read.

On the other hand, during the same period of time t2 to t3, the memory management unit 104 controls the second memory 140 to be in the write state, and writes the image data img_d input from the data input interface 101 to the second memory 140. That is, during the period from time t2 to t3, the memory management unit 104 not only reads the stored image data img_d from the first memory 130, but also the memory management unit 104 simultaneously inputs the input image. The data img_d is written to the second memory 140. After the memory management unit 104 reads the separately stored image data img_d in the first memory 130 and the second memory 140, the image data img_d read by the respective output is output to the image through the data output interface 102. The projection unit 120 projects a picture corresponding to the input image data img_d onto a surface.

Similarly, during the period from time t3 to time t4, the memory management unit 104 receives the clock signal CLK that is converted from the low level to the high level. Then, the memory management unit 104 controls the second memory 140 to switch back to the read state to read the image data img_d written during the period from time t2 to time t3. At the same time, the memory management unit 104 controls the first memory 130 to switch back to the write state to write the image data img_d input from the data input interface 101 to the first memory 130.

It can be seen that when the memory controller 100 reads the stored image data from the first memory 130, the input image data is simultaneously written to the second memory 140, and the memory controller 100 can take turns. The stored image data is continuously read from the first memory 130 and the second memory 140, so that the image projecting unit 120 can smoothly project the image according to the read image data. In addition to this In addition, regardless of the frequency of the clock signal CLK, the memory controller 100 can read the stored image data from the first memory 130 and the second memory 140 without interruption. Therefore, the frequency of the clock signal CLK can be reduced, so that the clock generation unit 150 can provide the clock signal CLK at a lower oscillation frequency, thereby achieving power saving effect.

It should be noted that, in the above embodiment, the input image data img_d is written to the first memory 130 during the period from time t1 to t2, and is immediately after the time t2~t3 in the first memory. The body 130 is read out. That is to say, each piece of data is read immediately after it is written to the memory. However, the present invention is not limited thereto, and the order in which the data is read may depend on the actual application. For example, in another embodiment, the input image data may be written to the first memory 130 during the period of time t1 to t2, but the stored image data may be from the time t4 to t5. A memory 130 is read. The spirit of the present invention is that the memory controller 100 can read the stored image data from the first memory 130 and the second memory 140 without interruption, but the order of writing and reading the data is not limited.

4 is a flow chart showing the steps of an image data access method according to an embodiment of the present invention. The method described is applicable to the memory controller as described in the embodiments of FIGS. 1 and 2. The methods described in FIG. 4 can be sufficiently supported and taught according to the description of the foregoing drawings, and thus similarities or repetitions are not described herein.

Referring to FIG. 4, first, the clock generation unit 150 provides the clock signal CLK to the memory controller 100 (step S401). The memory controller 100 receives the image data img_d transmitted from the image receiving unit 110 (step S402). Memory controller The image data img_d transmitted from the image receiving unit 110 is written to the first memory 130 by the first level of the clock signal CLK, and is read from the second memory 140 at the same time. The image data img_d of the second memory 140 (step S403).

Then, the memory controller 100 reads the image data img_d stored in the first memory 130 from the first memory 130 in response to the second level of the clock signal CLK, and at the same time, the image receiving unit The image data img_d transmitted from 110 is written to the second memory 140 (step S404). The memory controller 100 outputs the image data img_d read from the first memory 130 and the second memory 140 to the image projecting unit 120 through the data output interface 102 (step S405).

In summary, the memory controller and the data access method thereof of the present invention can read the stored image data from the first memory and the second memory in turn by the control of a single clock signal, and simultaneously The input image data is written in the first memory and the second memory in turn. According to this, the stored image data can be read without waiting for the level shift of the clock signal, thereby improving the smoothness of the projected picture. In addition, since the memory controller can read the stored image data without waiting for the level signal of the clock signal, the control frequency of the clock signal can be reduced in the case of normally outputting the image image, thereby achieving Power saving effect.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

100‧‧‧ memory controller

101‧‧‧Data input interface

102‧‧‧ data output interface

103‧‧‧ memory interface

104‧‧‧Memory Management Unit

130‧‧‧First memory

140‧‧‧Second memory

CLK‧‧‧ clock signal

Img_d‧‧‧Image data

Claims (10)

A projection device includes: an image receiving unit for receiving an image data; an image projection unit for projecting an image corresponding to the image data onto a projection surface; a first memory; a second And a memory controller coupled to the image projection unit, the image receiving unit, the first memory and the second memory, and configured to: react to a first criterion of a clock signal The image data transmitted from the image receiving unit is written to the first memory, and at the same time, the image data stored in the second memory is read from the second memory. The projection device of claim 1, wherein the memory controller is further configured to: read from the first memory and read from the first memory in response to a second level of the clock signal The image data of the first memory, and at the same time, the image data transmitted by the image receiving unit is written to the second memory. The projection device of claim 1, wherein the projection device further comprises a clock generation unit coupled to the memory controller and providing the clock signal to the memory controller, and The first level of the clock signal and the second level are different levels. The projection device of claim 3, wherein the memory controller comprises: a memory interface coupled to the first memory and the second memory; and a memory management unit coupled to the memory interface, the memory management unit receiving the clock signal, and the memory management unit Data writing and data reading are performed on the first memory and the second memory according to the clock signal and through the memory interface. The projection device of claim 4, wherein the memory controller further comprises a data input interface, wherein the memory controller is coupled to the image receiving unit via the data input interface to receive the image receiving unit The image data coming from. The projection device of claim 4, wherein the memory controller further comprises a data output interface, wherein the memory controller is coupled to the image projection unit through the data output interface to The image data read by the second memory is output to the image projection unit. The projection device of claim 1, wherein the first memory and the second memory are random access memory (RAM). An image data access method is applicable to a memory controller disposed in a projection device, and the projection device includes an image receiving unit, an image projection unit, a first memory, and a second memory. The data access method includes: providing a clock signal to the memory controller; receiving an image data transmitted by the image receiving unit; transmitting the image receiving unit in response to a first level of the clock signal Writing the image data to the first memory, and simultaneously reading the image data stored in the second memory from the second memory; and outputting the first memory and the second The image data read by the memory is respectively sent to the image projection unit. The image data access method of claim 8, further comprising: reading from the first memory, storing the first memory in the first memory, in response to a second level of the clock signal The image data, and at the same time, the image data transmitted by the image receiving unit is written to the second memory. The image data access method of claim 9, wherein the clock signal is provided by a clock generating unit, and the first level of the clock signal and the second level are different. Bit.