TWI501649B - Video signal processing apparatus and method - Google Patents

Description

Image signal processing device and method

The present invention relates to an image signal processing apparatus and method for processing an image signal, and more particularly to an image signal processing apparatus and method for improving interpolation processing for generating interpolated pixels based on a motion vector.

In an image display device using a liquid crystal panel, if a moving image is displayed, image sticking is likely to occur. Therefore, in order to reduce the residual image, the image frame is interpolated between the actual frames of the image signal to increase the number of frames, for example, the frame rate of the vertical frequency of 60 Hz is converted to 2 times. Image display is performed at 120 Hz or above. In the image signal processing device that performs frame rate conversion, the motion vector of the image is detected, and each interpolation pixel is generated using the motion vector, and an inner frame interpolated between the actual frames is generated. An example of the video signal processing device that performs frame rate conversion is described in Patent Document 1.

[Previous Technical Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open Publication No. 2008-141546

In an image signal processing apparatus that generates an interpolated pixel based on a motion vector and generates an inset frame, in order to increase the interpolation accuracy and obtain a high-quality frame rate conversion image, the range of the interpolation processing is increased. To be effective. That is, it is necessary to be able to generate interpolated pixels even when the motion of the portrait is large, using pixels of an appropriate actual frame. However, in order to widen the range of the interpolation processing, it is necessary to increase the number of scanning line memories for delaying the image signal in the vertical direction or the number of pixel delays for delaying the image signal in the horizontal direction. If the number of scan line memories or pixel delays is increased, the circuit scale becomes larger and the cost becomes higher. In particular, the increase in scan line memory has a large impact on the increase in circuit scale and cost. Therefore, it is desirable to be able to suppress the increase in the scanning line memory while also expanding the range of the interpolation processing.

In order to cope with such a demand, the present invention provides a method capable of suppressing an increase in scanning line memory and expanding the range of interpolation processing, even when the vertical movement of an image is large. An image signal processing apparatus and method for generating appropriate interpolated pixels based on motion vectors.

The present invention provides an image signal processing device including a first delay unit (2) for causing an input video signal to be a frame period or a plurality of numbers in order to solve the above-described problems of the prior art. The delay during the scan line and output as the first delayed video signal; and The delay unit (3) delays the first delayed video signal by one frame period and outputs the second delayed video signal as a second delayed video signal; and the first delay selecting unit (62) causes the first delayed video The pixel data of the signal is successively delayed in the horizontal and vertical directions, and the pixel data included in the first reference range used when generating the interpolated pixel data is generated, and then selected from the plurality of pixel data. And the second delay selecting unit (63) sequentially delays the pixel data of the second delayed video signal in the horizontal and vertical directions, and generates the data to be included when the interpolated pixel data is generated. Selecting one of the plurality of pixel data in the second reference range, and selecting one of the plurality of pixel data; and the frequency distribution monitoring unit (4) is a vertical of the motion vector to be used when generating the interpolated pixel data. The size of the component is divided into a plurality of levels, and it is detected that the vertical component of the motion vector occurs in each of the levels of the frequency of occurrences; and an offset control unit (5, 50, 51, 52), when the vertical component of the motion vector detected by the frequency distribution monitoring unit exceeds a certain threshold value in a predetermined level defined in advance, The first delay signal for reading the vertical read position when the first delayed video signal is read by the first delay unit is supplied to the first delay unit, and the second delay unit is generated from the second delay unit. And reading the second offset signal in the vertical direction when the second delayed video signal is read, and supplying the second offset signal to the second delay unit; and selecting the control unit (61) according to the foregoing 1 shifting the pixel data selected by the first delay selecting unit in the vertical direction and shifting the second delay according to the second offset signal The pixel data selected by the selection unit is panned in the vertical direction for control.

Furthermore, the present invention provides a video signal processing method for solving the above-described problems of the prior art, wherein the input of the input video signal by the first delay unit is delayed by one frame period or during the complex scanning line period. And outputting as the first delayed video signal; delaying the first delayed video signal by one frame period via the second delay unit, and outputting as the second delayed video signal; and making the first delayed video signal The pixel data is successively delayed in the horizontal and vertical directions, and generates pixel data included in the first reference range used when generating the interpolated pixel data; and the pixel data of the second delayed image signal is horizontal And successively delaying in the vertical direction, and generating a plurality of pixel data included in the second reference range used when generating the aforementioned interpolated pixel data; a motion vector to be used in generating the aforementioned interpolated pixel data The size of the vertical component is divided into multiple levels, and it is detected which vertical component of the motion vector is in each level. The frequency of the number of occurrences occurs; when the vertical component of the motion vector exceeds a certain threshold value in a predetermined level defined in advance, the first delay signal is read from the first delay unit. The vertical read position of the first delayed video signal is translated, and the read position in the vertical direction when the second delayed video signal is read from the second delay unit based on the second offset signal Translating the address; selecting, according to the first offset signal, the first pixel data from the plurality of pixel data in the first reference range and reading the position in the vertical direction when reading, and according to the second offset Signal And the second pixel data is selected from the plurality of pixel data in the second reference range and translated in the vertical direction at the time of reading; and the first pixel data and the slave read from the first reference range are read. The second pixel data read by the second reference range generates interpolated pixel data.

According to the video signal processing apparatus and method of the present invention, it is possible to suppress an increase in the scanning line memory and to expand the range of the interpolation processing, even when the vertical movement of the portrait is large, Motion vectors produce appropriate interpolated pixels.

Hereinafter, each embodiment of the video signal processing apparatus and method of the present invention will be described with reference to the attached drawings. The first, second, fourth, and fifth embodiments described in detail below are examples of image signal processing devices, and are used for a frame rate conversion device that converts a frame rate of a vertical frequency of 60 Hz to 120 Hz. Show. In the third embodiment, a debounce processing device that performs smoothing so-called defibrillation processing based on the motion of the image signal generated by the film image is performed as an example without performing the frame rate conversion. As the video signal processing device, it is only necessary to generate an interpolation pixel based on the motion vector. It is also possible to convert the frame rate to 4 times or more than 4 times the frame rate conversion device.

<First embodiment>

The configuration and operation of the first embodiment will be described with reference to Figs. 1 to 8 . In FIG. 1, in the motion vector detecting unit 1 and the frame memory 2, pixel data constituting the input video signal S0 is sequentially input. The vertical frequency of the input image signal S0 is 60 Hz. The frame memory 2 is delayed by the input image signal S0 as a frame period, and is output as an image signal (first delayed image signal) S1. The video signal S1 is input to the motion vector detecting unit 1, the frame memory 3, and the delay selecting unit 62 in the interpolation pixel generating unit 6. The frame memory 3 is delayed by the image signal S1 as a frame period and output as an image signal (second delayed image signal) S2. The video signal S2 is input to the delay selecting unit 63 in the interpolation pixel generating unit 6.

The motion vector detecting unit 1 compares the positions of the pixels between the search ranges formed by the plurality of pixels in the specific horizontal direction and the vertical direction of the input image signal S0 and the image signal S1, and minimizes the difference. The direction is output as a motion vector MV. The motion vector detecting unit 1 is a plurality of pixel delay devices including a plurality of scanning line memories and flip-flops. The motion vector detecting unit 1 is only required to have a well-known configuration. Therefore, the specific configuration of the motion vector detecting unit 1 will not be described here. Here, although the motion vector MV is detected using the complex pixels of the two adjacent frames, the motion vector may be detected using the complex pixels above the three frames in order to improve the detection accuracy. MV.

The motion vector MV output by the motion vector detecting unit 1 is It is input to the frequency distribution monitoring unit 4 and the selection control unit 61 in the interpolation pixel generating unit 6. In FIG. 2, the image signal S1 is the actual frame f1, and the image signal S2 is the actual frame f2. It is assumed that the inner frame f12 is interpolated between the actual frames f1 and f2. The motion vector detecting unit 1 detects the motion vector MV by using the pixel of the actual frame f2 as a reference. As shown in FIG. 2, in the actual frame f1, pixels P f1 (-2), P f1 (-1), P f1 (0), P f1 (1), P f1 (2) are arranged. ), ..., in the actual frame f2, pixels P f2 (-2), P f2 (-1), P f2 (0), P f2 (1), P f2 (2), ... are arranged. The motion vector MV when the pixel P f12(0) is inserted within the inner inset frame f12 is assumed to be a vector as shown.

In FIG. 2, in order to generate the interpolated pixel Pf12(0), it is only required to take out the average between the pixel Pf1(-2) on the actual frame f1 and the pixel Pf2(2) on the actual frame f2. can. The interpolation pixel generating unit 6, which will be described later, does not directly use the motion vector MV based on the pixel of the actual frame f2 when the interpolation pixel is generated. The interpolation pixel generating unit 6 converts the motion vector MV into a motion vector MV/2 between the actual frame f1 and the inset frame f12 with the interpolation pixel P f12(0) as a reference, and the interpolation pixel P f12 (0) The motion vector -MV/2 between the actual frame f2 and the inner frame f12 as the reference, and the motion vectors MV/2, -MV/2 are used.

The frequency distribution monitoring unit 4 monitors, for example, the frame unit for the motion vector MV, and detects what kind of distribution the vertical component of the motion vector MV is. For example, as shown in the histogram in Figure 3. Generally, the range of the vertical components of the motion vector MV is determined by a certain range, and is set to the level, and the number of occurrences of each level in the 1 frame is set to the frequency. In the example shown in FIG. 3, the vertical component of the motion vector MV is obtained in the range of 8 to -8, and the range is determined by dividing the range by 2 as the unit. The number of the level is the number of pixels (the number of scanning lines) representing the vertical component of the motion vector MV. In addition, the vertical component of the motion vector MV is set to the positive direction from the upper side in the vertical direction when the actual frame f2 of the video signal S2 is observed from the actual frame f1 of the video signal S1, and will be oriented toward the lower side. The case is set to the negative direction.

The number of occurrences of each level may be counted based on all motion vectors MV detected in one frame, or the number of occurrences may be counted by skipping the motion vector MV. Further, the motion vector MV can be extracted for all the pixels in one frame, and the motion vector MV can be extracted in a plurality of pixel units.

The frequency distribution monitoring unit 4 supplies the data Sfd representing the frequency distribution which is generally obtained as shown in FIG. 3 to the bias control unit 5. The bias control unit 5, when the frequency exceeds the threshold y at the specific level C Lsp of the frequency distribution shown in FIG. 3, generates an offset whose absolute value exceeds 0 and represents a specific offset amount. Set the signal number S os1, S os2. The bias control unit 5 outputs the offset signals S os1 and S os2 representing the offset amount 0 when the threshold value y is not exceeded. The offset amount will be described later in detail.

The delay selecting unit 62 in the interpolation pixel generating unit 6 is as will be described later. 63 is a delay of making the input pixel data 1 to 4 pixels in the horizontal direction and 1 to 4 scanning lines in the vertical direction. In other words, the delay selecting units 62 and 63 select pixel data in a range from five pixels in the horizontal direction and five pixels in the vertical direction in the video signals S1 and S2 to select specific pixel data. Preferably, the specific level C Lsp set by the offset control unit 5 is selected to be generated by the delay selecting sections 62 and 63 based on the motion vectors MV (MV/2, -MV/2). When a specific pixel data of a pixel material is interpolated, it becomes a level that cannot be selected.

In the first embodiment, the level of the range that cannot be selected is the level of 5, 6, the level of 7, 8, the level of -5, -6, and the level of -7, -8. The specific level of C Lsp is set to the level of 7, 8 and the level of -7, -8. The example of Fig. 3 is shown for the state in which the threshold y is exceeded at the level of 7,8. Also, the level of 5, 6 and the level of -5, -6 can be used as a specific level, and the level of 5, 6, the level of 7, 8, the level of -5, -6, -7, - The levels of 8 are all specific levels.

When the level of 5, 6, the level of 7, 8, the level of -5, -6, and the level of -7, -8 are taken as the specific level of C Lsp , it can also be set as: when at 5, 6 The total frequency of the frequency in the level and the frequency in the level of 7,8 exceeds the threshold y or the frequency in the level of -5, -6 and the frequency in the level of -7, -8 exceeds the total frequency. In the case of the threshold y, offset signals S os1 , S os2 representing a specific offset amount are generated.

The offset signal S os1 is input to the frame memory 2, and the offset signal The No. S os2 system is input to the frame memory 3. The offset signals S os1 and S os2 are also input to the selection control unit 61.

Here, the specific configuration and operation of the delay selecting units 62 and 63 will be described with reference to FIG. 4 . The delay selecting units 62 and 63 include scan line memories 601 to 604, flip-flops 605 to 624 which are pixel retarders, and a selection unit 625. The pixel data of the image signals S1 and S2 are successively delayed by one of the scanning line memories 601 to 604. The input pixel data is successively delayed by one period of one pixel via the flip-flops 605 to 608. The pixel data outputted by the scanning line memory 601 is successively delayed by one pixel period via the flip-flops 609 to 612. The pixel data outputted by the scan line memory 602 is successively delayed by one pixel period via the flip-flops 613 to 616. The pixel data outputted by the scanning line memory 603 is successively delayed by one pixel period via the flip-flops 617 to 620. The pixel data outputted by the scan line memory 604 is successively delayed by one pixel period via the flip-flops 621 to 624.

The input pixel data, the pixel data output by the scanning line memories 601 to 604, and the pixel data output by the flip-flops 605 to 624 are input to the selection unit 625. The pixel data input to the selection unit 625 is pixel data of a total of 25 pixels included in the range of 5 pixels in the horizontal direction and 5 pixels in the vertical direction among the image signals S1 and S2. The pixel data outputted by the flip-flop 614 is the central pixel data in the pixel data of 25 pixels, and the position of the pixel data output by the flip-flop 614 becomes the reference position.

In the first embodiment, the delay selecting units 62 and 63 are selected as the reference range when the pixel data is generated, and one pixel data is selected from the pixel data of 25 pixels. The reference range is not limited to 25 pixels. Furthermore, it is possible to further have more scan line memories and flip-flops, and select one pixel data from more pixels in each reference range than 25 pixels.

First, a case where the vertical component of the motion vector MV is, for example, four pixels (four scanning lines) will be described. As described above, the motion vector used when interpolating the pixel data by the interpolation pixel generating portion 6 is the motion vector MV/2, -MV/2, and therefore, when the vertical component of the motion vector MV is In the case of four pixels, the vertical component of the motion vector used by the interpolation pixel generating unit 6 is +2 pixels and -2 pixels. As can be seen from FIG. 4, the delay selecting sections 62 and 63 can select between +2 pixels and -2 pixels when the position of the pixel data output by the flip-flop 614 is used as the reference position. The pixel data of the position where the translation is made in the vertical direction. That is, if the vertical component of the motion vector MV is within 4 pixels, it is possible to maintain the position of the pixel data output by the flip-flop 614 as the reference position, and for the pixel data. select.

Next, a case where the vertical component of the motion vector MV is, for example, 8 pixels (8 scanning lines) will be described. When the vertical component of the motion vector MV is 8 pixels, the vertical component of the motion vector used by the interpolation pixel generating unit 6 is +4 pixels and -4 pixels. As can be seen from FIG. 4, the delay selection sections 62, 63 will be input by the flip-flop 614. When the position of the pixel data is used as the reference position, the pixel data at the position shifted by +4 pixels and -4 pixels in the vertical direction cannot be selected. Therefore, in the first embodiment, the frequency exceeds the threshold value in the level of at least one of the level of 7, 8 and the level of -7, -8 of the specific level C Lsp . In the case of y, the pixel data corresponding to the vertical component of the motion vector MV can be selected and output via the delay selecting sections 62 and 63, and is generally configured as follows.

The vertical component of the motion vector MV which is the reference of the offset amount obtained by the offset control unit 5 is assumed to be eight pixels. In order to select the pixel data of the position shifted in the vertical direction of +4 pixels by -4 pixels by the delay selecting sections 62, 63, the position of the pixel data to be output by the flip-flop 614 is used. In the case of the reference position, the selection range of the pixel data in the vertical direction is +2 pixels and -2 pixels. Therefore, the offset amount of the offset signal S os1 is set to 2, and the offset signal S os2 is set. The offset amount can be set to -2. The offset signal S os1 representing the offset amount 2 is input to the frame memory 2, and the offset signal S os2 representing the offset amount -2 is input to the frame memory 3. The frame memories 2 and 3 translate the read address in the vertical direction when the image signals S1 and S2 are read, in response to the input offset.

The selection control unit 61 generates the selection control signals S sel1 and S sel2 in response to the offset amounts of the input offset signals S os1 and S os2 , and inputs them to the delay selection units 62 and 63 . As shown in FIG. 4, the control signals S sel1 and S sel2 are selected and input to the selection unit 625. If the offset amounts of the offset signals S os1 and S os2 are 0, the control unit is selected. 61, for the selection unit 625 of the delay selection sections 62, 63, the position of the pixel data output by the flip-flop 614 is generated as a reference position and is based on the motion vectors MV/2, -MV/2. The data selection control signals S sel1, S sel2 are supplied and supplied.

On the other hand, if the offset amount of the offset signal S os1 is 2, the selection control unit 61 generates the pixel data to be output by the flip-flop 622 for the selection unit 625 of the delay selection unit 62. The position is used as the reference position and the selection control signal S sel1 is selected for the pixel data according to the motion vector MV/2. Further, if the offset amount of the offset signal S os2 is -2, the selection control unit 61 generates the pixel data output by the flip-flop 606 for the selection unit 625 of the delay selection unit 63. The position is used as the reference position and the selection control signal S sel2 is selected for the pixel data according to the motion vector -MV/2.

The selection control unit 61 shifts the position of the pixel data in the vertical direction as the reference at the delay selecting sections 62 and 63 in response to the offset amounts of the offset signals S os1 and S os2 . As a result, the pixel data selected and output by the selection unit 625 in response to the motion vectors MV/2 and -MV/2 is shifted in the vertical direction.

The selection unit 625 of the delay selection unit 62 outputs the selected pixel data P sel1 , and the selection unit 625 of the delay selection unit 63 outputs the selected pixel data P sel2 . The mixing unit 64 mixes the pixel data P sel1 and P sel2 to generate an interpolated pixel data Pi. The mixing unit 64 may mix the two of the pixel data P sel1 and P sel2 in order to extract the average of the pixel data P sel1 and P sel2 . Interpolating the pixel data Pi, which is equivalent to Figure 2 The pixel P f12(0) is interpolated.

The image signal S1 is input to the time series conversion memory 7 as an actual frame signal, and the interpolated pixel data Pi sequentially output by the mixing unit 64 is input to the time series conversion as an internal frame signal. In memory 7. The time series transforms the memory 7. The image data of the frame rate conversion is outputted by interactively reading the pixel data of the actual frame signal and the interpolated pixel data Pi of the inner frame signal at a vertical frequency of 120 Hz.

The translation of the read address in the vertical direction at the frame memory 2, 3 will be described with reference to FIGS. 5 and 6. FIG. 5 is a conceptual representation of the interpolated pixel generation for the case where the offset amounts of the offset signals S os1 and S os2 are zero. When the interpolated pixel P f12 (0) is generated as a pixel in the inset frame f12, the pixel referred to in the frame f1 of the image signal S1 is a pixel in the region A rf1 which is the reference range. The pixel referred to in the frame f2 of the image signal S2 is a pixel in the region A rf2 which is the reference range. In the first embodiment, the number of scanning lines L f1 and L f2 of the areas A rf1 and A rf2 is five scanning lines. The motion vector MV having a vertical component of 4 pixels is set to MV (v4), and the motion vector MV having a vertical component of 8 pixels is set to MV (v8).

As shown in FIG. 5, in general, if the motion vector MV detected by the motion vector detecting unit 1 is the motion vector MV (v4), the pixels in the regions A rf1 and A rf2 can be used to generate the interpolated pixel P f12 . (0). When the motion vector MV is the motion vector MV (v8), the pixels in the frames f1 and f2 used to generate the interpolated pixel P f12(0) become regions. The range of the fields A rf1 and A rf2 is outside. Therefore, the interpolation pixel generating unit 6 cannot generate the interpolation pixel P f12 (0).

Therefore, in the first embodiment, as described above, a specific offset amount of the offset signals S os1 , S os2 is supplied to the frame memory bodies 2 and 3 to translate the vertical read position. And the reference position in the vertical direction at the delay selecting sections 62, 63 is shifted. As a result, as shown in Fig. 6, in general, the area A rf1 is a position indicated by the area A rf1 ' which is translated downward in the vertical direction as compared with Fig. 5, and the area A rf2 is compared with the figure. 5, the position indicated by the area A rf2' which is translated upward in the vertical direction. The number of scanning lines L f1' and L f2' of the areas A rf1' and A rf2' are five scanning lines. As shown in FIG. 6, in general, even when the motion vector MV is the motion vector MV (v8), the pixels in the frames f1 and f2 for generating the interpolated pixel P f12 (0) are also the area A. In the range of rf1' and Arf2', the interpolation pixel generating unit 6 is capable of generating the interpolation pixel Pf12(0).

In FIG. 6, for convenience, the area Arf1 is changed to the area A rf1' which is translated downward in the vertical direction, and the area A rf2 is changed to the area A rf2' which is translated upward in the vertical direction. Show. Actually, as shown in Figs. 7(A) and (B), the reading address in the vertical direction of the pixel data from the frame memories 2, 3 is shifted. The frame f2 shown by a one-dot chain line in Fig. 7(A) is conceptually shown for a state in which the read address is not translated, and the figure shown by a little chain line in Fig. 7(B) is shown. Block f1 is a conceptual representation of the state in which the read address is not translated.

When the offset amount of the offset signals S os1 and S os2 is 0, and the read address is not translated, the pixel data from the frame memory 2, 3 is changed to a point. The timing shown by the chain line is read out. The frame f2 shown by the solid line in Fig. 7(A) is conceptually shown for the state in which the read address is translated, and the frame f1 shown by the solid line in Fig. 7(B), A conceptual representation of the state in which the read address is translated is performed. If the offset amount is a specific value exceeding 0, the pixel data from the frame memory 2, 3 is made at the timing shown in the frames f1 and f2 displayed by the solid line. read out. In addition, in FIGS. 7(A) and (B), the amount of shift is more exaggerated for easy understanding.

In the above example, since the offset amount by the offset signal S os1 is 2, the frame memory 2 has the number of scanning lines corresponding to the offset amount 2 with the read address facing upward. Translation of L s1 (that is, 2 scan lines). Moreover, since the offset amount by the offset signal S os2 is -2, the frame memory 3 has the number of scanning lines corresponding to the offset amount -2, which is the lower side of the read address. (ie, 2 scan lines) translation.

As a result, the range of the pixel referred to at the delay selecting portion 62 is shifted from the region Arf1 shown in FIG. 5 toward the region Arf1' shown in FIG. 6 to the lower side in the vertical direction, in the delay selecting portion. The range of pixels referred to at 63 is translated from the area Arf2 shown in Fig. 5 toward the area Arf2' shown in Fig. 6 to the upper side in the vertical direction. In addition, the translation of the read address below or above the vertical direction can be performed by reading the read start position and the read end position of the image signals S1 and S2. It is easy to implement by panning during the blanking period.

In FIG. 1, although the input video signal S0 is delayed by one frame period via the frame memory 2, and is used as the image signal S1, it may be set as a delay period of less than one frame. . FIG. 8 shows a configuration in which the delay unit 20 for delaying the period of the frame 1 is used instead of the frame memory 2. The delay unit 20 can be configured by a plurality of scan line memories. The delay unit 20 delays the input video signal S0 as a period of less than one frame, and outputs it as the video signal S1'. The video signal S1' is supplied to the delay selecting unit 62.

In this case, in the motion vector detecting unit 1, since it is necessary to input two frame signals that are separated from each other during one frame period, the frame memory 21 is provided. The frame memory 21 delays the input image signal S0 as a frame period and outputs it as the image signal S10. The motion vector detecting unit 1 detects the motion vector MV based on the input video signal S0 and the video signal S10. In this manner, the video signal supplied to the delay selecting unit 62 is not limited to the video signal S1 in which the input video signal S0 is delayed by one frame period.

In the above description, the case where the vertical component of the motion vector MV is an even number has been described. However, when it is an odd number, it is only necessary to process it as follows. In other words, the selection unit 625 in the delay selecting units 62 and 63 acquires the average of the pixel data adjacent to each other in the vertical direction, and uses the averaged pixel data as the pixel data P sel1, P. Sel2 can output. When the horizontal component of the motion vector MV is an odd number, the same is true, the selection unit 625 is only required to take The average of the two adjacent pixel data in the horizontal direction is obtained, and the averaged pixel data is output as the pixel data P sel1 , P sel2 .

Further, when the vertical component of the motion vector MV is an odd number, the offset control unit 5 obtains the offset amount based on the value of the even number greater than 1 in the case of the positive state, and in the case of the negative case According to the value of the even number of 1 smaller, the offset amount can be obtained. That is, in FIG. 3, when the vertical components of the motion vector MV are 1, 3, 5, and 7, the vertical components are set to 2, 4, 6, and 8, respectively, to obtain the offset amount. When the vertical component of the motion vector MV is -1, -3, -5, or -7, the vertical component is set to -2, -4, -6, and -8 to obtain the offset amount.

In this manner, when the vertical component of the motion vector MV is an odd number, the offset control unit 5 replaces the even number and obtains the offset amount, and delays the selection units 62 and 63 by the motion vector MV. When the vertical component is an odd number, the corresponding pixel data P sel1 and P sel2 are output, and even when the vertical component of the motion vector MV is odd, the vertical component of the motion vector MV can be made even. The same processing.

Further, in the first embodiment, when the value of the offset signals S os1 and S os2 whose frequency does not exceed the threshold value y at the specific level C Lsp is 0, the state is changed to a specific one. When the value of the offset signal S os1 and S os2 whose frequency exceeds the threshold value y is a specific value, or is the opposite, it is preferable that the level C Lsp is not Do not read the image signals S1, S2 from the frame memory 2, 3 The location of the address is changed in a state of translation and the state in which it is translated. Preferably, the offset control unit 5 sequentially changes the values of the offset signals S os1 and S os2 at each of 1 or a plurality of frames. For example, when the offset amount is set from 0 to 2, the offset amount is set to 1 at the frame below the frame where the detection of the threshold value y is exceeded, and then At the next frame, set the offset to 2.

<Second embodiment>

The configuration and operation of the second embodiment will be described with reference to Figs. 9 to 11 . In FIG. 9, the same portions as those in FIG. 1 are denoted by the same reference numerals, and their description will be omitted. In FIG. 9, instead of the bias control unit 5 of FIG. 1, the offset control unit 50 is provided. The offset control unit 50 includes a determination unit 501 and an offset amount determination unit 502.

In the second embodiment, as shown in FIG. 10, the bias control unit 50 is of a level of 5, 6, a level of 7, 8 , a level of -5, -6, and a level of -7, -8. Level, as a specific level of C Lsp. In the example shown in Fig. 10, the threshold y is exceeded at the level of 7, 8 which is a specific level C Lsp , and the direction of motion in the vertical direction is opposite to the level of 7, 8 The direction is not the level of the specific level C Lsp -1, and the level of -2 exceeds the state of the threshold y for display. The discriminating section 501 is to move beyond the threshold value y at the level of one of the specific levels, and to move in the vertical direction with respect to the specific level C Lsp exceeding one of the threshold values y. The level other than the specific level C Lsp in the opposite direction is also judged by the state exceeding the threshold y.

When the determination unit 501 determines the state described above, the value of the vertical component exceeding the specific level C Lsp of the threshold value y and the level exceeding the threshold value y outside the specific level C Lsp The value of the vertical component is input to the offset amount determining unit 502. In the example of FIG. 10, the offset amount determining unit 502 exceeds the threshold value y by a value "8" of a vertical component exceeding a specific level C Lsp of the threshold value y and beyond a specific level C Lsp . The value of the vertical component of the level "-2" is added, and the number of pixels in the vertical direction is calculated to be 6 pixels. Therefore, the vertical component of the motion vector used in the interpolation pixel generating unit 6 is +3 pixels and -3 pixels.

In addition, when the threshold y is exceeded at the level of 7,8 and 5,6, and the threshold y is exceeded at the level of -1, -2, the vertical component is The highest level of 7,8 is used as the benchmark. That is, in this case, 8 and -2 are also added, and the number of pixels in the vertical direction is calculated to be 6 pixels.

Then, the offset amount determining unit 502 is the same as the first embodiment, and the selection range of the pixel data in the vertical direction when the position of the pixel data output by the flip-flop 614 is used as the reference position is used. Since it is +2 pixels and -2 pixels, the offset amount of the offset signal S os10 is set to 1, and the offset amount of the offset signal S os20 is set to -1.

The effect obtained by the second embodiment will be described with reference to Fig. 11 . Fig. 11(A) shows the memory region in the vertical direction at the delay selecting portions 62, 63. The memory area corresponds to the number of scanning lines Lf1 and Lf2 of the areas A rf1 and A rf2 described in FIG. 5 . Figure 11 (B) Generally shown, the level of 7,8 is the position shown by a, the level of -1, -2, which is the position shown by b. Fig. 11(C) shows the state of the translation explained in the first embodiment.

As can be seen from Fig. 11(C), in general, if the translation described in the first embodiment is performed, it is possible to generate the interpolated pixel data Pi of the level of the vertical component of the motion vector MV of 7,8. However, since the level of -1, -2 falls outside the memory area, the interpolated pixel data Pi of the level of -1, -2 cannot be generated. Fig. 11(D) shows a state in which no translation is performed. In the case of Fig. 11(D), although the interpolation pixel data Pi of the level of -1, 2 can be generated, the interpolation pixel data Pi of the level of 7, 8 cannot be generated.

The motion of the level of -1, -2 is originally a motion in which the range of the interpolated pixel data Pi can be generated by interpolating the pixel generating portion 6, and the interpolated pixel data Pi of the level of -1, -2 is not generated. The matter is not ideal. It is desirable to generate the interpolated pixel data Pi for the motion of the range in which the interpolated pixel data Pi can be generated without being translated. Therefore, in the second embodiment, in order to be able to correspond to the motion of the level of -1, -2, and also to correspond to the motion of the portion exceeding the memory area, as shown in Fig. 11(E) Generally shown, the offset is set to 1 (and -1).

If the translation is as shown in Fig. 11(E), it is possible to generate the interpolated pixel data Pi of the level of -1, -2. Although it is impossible to generate the interpolated pixel data Pi of the level of 7,8, it is able to produce a level close to 7,8. In Fig. 11(D), the corresponding pixel data Pi of the level of 5, 6 cannot be made.

In the second embodiment, similarly, the bias control unit 50 preferably changes the values of the offset signals S os10 and S os20 one by one or each of the plurality of frames. .

<Third embodiment>

The configuration and operation of the third embodiment will be described with reference to Figs. 12 to 14 . In FIG. 12, the same portions as those in FIG. 1 are denoted by the same reference numerals, and their description will be omitted. The third embodiment shown in Fig. 12 is an example of a debounce processing device.

In Fig. 12, image signals S1 and S2 are input to the film signal detecting unit 8. The film signal detecting unit 8 detects, based on the image signals S1 and S2, whether or not the input image signal S0 is an image signal converted from a film image by 2-2 or 2-3 down to a vertical frequency of 60 Hz. If the film image is 30 grids (30 frames), it can be converted to the frame rate of 60 frames by 2-2 reduction. If the film image is 24 grids (24 frames), it can be via 2- 3 is reduced to convert to the frame rate of the 60 frame.

When the input image signal S0 is a video signal generated by the 2-3 transition, as can be understood from FIG. 13(A), it is the same image in the 2 frame, and is connected. The same picture is shown in the lower 3 frames, and is the same image in the next 2 frames. In the frames f1 to f6 shown in Fig. 13(A), the frame is in the frame. The same image Im1 at f1 and f2 is the same image Im2 at the frames f3 to f5, and is the same image Im3 at the frame f6 and the lower frame not shown. The film signal detecting unit 8 generates a detection signal S det indicating whether or not the image signal is converted by 2-2 or 2-3, and is input to the offset control unit 51.

For example, when the film signal detecting unit 8 detects that the image signal is not a down-converted image signal, it outputs a value of “0” as the detection signal S det, and detects that the system is down-converted. In the case of changing the video signal, the value "1" is output as the detection signal S det. The film signal detecting unit 8 is preferably used to distinguish and detect that it is 2-2 down or 2-3 down when it is a video signal that has been subjected to a down-conversion. In the case where the two are distinguished, for example, the film signal detecting unit 8 outputs a value of "00" as the detection signal S det when it is detected that the image signal is not subjected to the down conversion conversion. When it is detected that the 2-2 down conversion is performed, the value is "01" as the detection signal S det, and when it is detected that the system is 2-3 down conversion, The value "10" is output as the detection signal S det .

As can be seen from Fig. 13(A), the image signal converted by 2-2 or 2-3 is not smooth, and the movement of the portrait is smooth. There is a case where the debounce processing is performed as shown generally in Fig. 13(B). The frame f10 shown in Fig. 13(B) is the same as the frame f1. The image Im10 is the same as the image Im1. In the frame f20, a position Im20 is generated between the image Im1 and the image Im2 at a position spaced apart from the image Im1 and the image Im2. . The frame f30 is the same as the frame f3, and the image Im30 is the same as the image Im2.

In the frame f40, an image Im40 is generated at a position 1/3 of the distance image Im2 between the image Im2 and the image Im3. In the frame f50, an image Im50 is generated at a position 2/3 of the distance image Im2 between the image Im2 and the image Im3. The frame f60 is the same as the frame f6, and the image Im60 is the same as the image Im3. By changing the image signal of Fig. 13(A) as shown in Fig. 13(B) in general, the movement of the image can be made smooth.

Fig. 14 is a conceptual representation of the interpolation process in the case where the image Im50 of the frame f50 is generated. In a normal pixel interpolation, an interpolated pixel is generated at the center of two adjacent pixels. In contrast, in the debounce processing, as described above, it is known that There is a case where an interpolated pixel is generated at a position shifted toward one of two adjacent pixels. In Fig. 14, the interpolation is shown for the horizontal direction, but the same is true for the vertical direction. When the debounce processing is performed, the offset amount of the offset signals S os1 and S os2 described in the first embodiment may be insufficient.

Therefore, in the third embodiment, the detection signal S det outputted by the film signal detecting unit 8 is a video signal which is converted by 2-2 or 2-3. In the case of the value, the offset control unit 51 outputs the offset amount which is larger than the offset amount in the first embodiment as the offset signals S os11 and S os21. E.g, When the detection signal S det is a value of "1" or a value of "01" or a value of "10", the offset amount is increased by 50%. If the offset amount is not 2, the offset amount is 3, -3.

In the case of distinguishing between 2-2 turnaround and 2-3 turnaround, it is preferable to set the degree of increase of the offset amount in the case of 2-3 turndown to be lower than 2-2. In the case of the situation, the amount of offset increases to a greater extent. For example, in the case of 2-2 downshift, the offset amount is increased by 50%, and in the case of 2-3 turndown, the offset amount is increased by 60%. If the offset is not 2, the offset is 2, -3, and it is 2-3. The amount of offset in the case of a fall is the unconditional carry of the decimal point, which becomes 4, -4. In the case of a 2-3 turn-off, the offset can also be increased by a magnification of more than 60%.

By making the offset signals S os11 and S os21 larger than in the case of the first embodiment, the pixel data P selected and output by the delay selection sections 62 and 63 according to the selection control signals S sel1 and S sel2 is increased. The sel1 and the sel2 are also shifted to a position in the vertical direction different from the case of the first embodiment.

In addition, when the offset amount before the offset amount is increased is the upper limit value of the offset amount or the value close to the upper limit value, if the offset amount is 50% as described above or If the increase is 60%, it will be calculated to exceed the upper limit. In this case, since the offset amount is clipped, even if the image is changed by the down-conversion No. The offset will not increase. Further, in the case of calculating, when the decimal point is rounded off, there is a case where the offset amount is not increased.

In FIG. 12, the debounce processing unit 9 performs readout by interpolating the pixel data of the actual frame signal and the interpolated pixel data Pi of the inner frame signal at a vertical frequency of 60 Hz, and outputs the defibrillation processing. Image signal. The debounce processing unit 9 can be configured by a memory. In the third embodiment, the debounce processing device including the debounce processing unit 9 is taken as an example. However, the frame rate conversion may be the same as in the first and second embodiments. Device.

Similarly, in the third embodiment, the offset control unit 51 preferably changes the values of the offset signals S os11 and S os21 one by one or each of the plural frames. .

<Fourth embodiment>

The configuration and operation of the fourth embodiment will be described with reference to Fig. 15 . In FIG. 15 , the same portions as those in FIGS. 1 and 12 are denoted by the same reference numerals, and their description will be omitted. The fourth embodiment corresponds to the combination of the second embodiment and the third embodiment. In FIG. 15, the offset control unit 52 includes a determination unit 521, a restriction unit 522, and an offset amount determination unit 533. The discriminating unit 521, as explained in the discriminating unit 501 of Fig. 9, will exceed the threshold y at a specific level C Lsp and at a specific level C Lsp with respect to the threshold y. The direction in which the direction of motion in the vertical direction is a level other than the specific level C Lsp in the opposite direction is also determined by the state exceeding the threshold y.

When the determination unit 521 determines the above-described state, the restriction unit 522 sets the value of the vertical component of the specific level C Lsp exceeding the threshold value y and the specific level as in the second embodiment. The value of the vertical component of the level other than the threshold y other than C Lsp is added, and the number of pixels that limit the number of pixels in the vertical direction is calculated. The number of pixels calculated by the restriction unit 522 is input to the offset amount determination unit 533. In the offset amount determining unit 533, the detection signal S det outputted by the film signal detecting unit 8 is input.

The offset amount determining unit 533 outputs an offset signal based on the offset amount obtained by the limited number of pixels input from the limiting unit 522 when the detection signal S det is not a value representing the down-conversion value. S os12, S os22. The offset amount determining unit 533 increases the offset amount based on the number of pixels that are limited by the input from the limiting unit 522 when the detection signal S det is a value representing the value of the down-conversion. Offset signals S os12, S os22.

In addition, when the determination unit 521 does not determine the above-described state, the restriction unit 522 inputs the same number of pixels as the first embodiment to the offset amount determination unit 533 without limiting the number of pixels in the vertical direction. In the case of the middle, the offset amount determining unit 533 determines the offset amount based on the number of pixels that are not limited, and determines whether the detection signal S det represents the value of the falling, and outputs the offset signal S os12 . , S os22.

Similarly, in the fourth embodiment, the offset control unit 51 preferably changes the values of the offset signals S os12 and S os22 one by one or each of the plural frames. .

<Fifth Embodiment>

The configuration and operation of the fifth embodiment will be described with reference to Figs. 16 to 20 . In FIG. 16, the same portions as those in FIG. 1 are denoted by the same reference numerals, and the description thereof will be omitted as appropriate. In the first to fourth embodiments, the frequency distribution monitoring unit 4 detects the vertical component of the motion vector MV by monitoring, for example, the frame unit for the motion vector MV. The distribution of the species and the data Sfd representing the frequency distribution. When the portrait is moved in the same manner in the entire frame, it is detected based on the data Sfd representing the frequency distribution that the frequency system exceeds the threshold y at the specific level C Lsp . The read address in the vertical direction at the frame memories 2, 3 is translated.

For example, when a so-called two-screen display in which the image signals of different images are displayed on the left and right sides of the screen of the image display device is performed, since the motion of the images is different from each other, it is even 1 The motion vector MV is monitored for all of the frames, and the histogram is generally depicted as illustrated in Figure 3, and also occurs at a particular level C Lsp without exceeding the threshold y. In this case, the reading address in the vertical direction at the frame memories 2, 3 is not translated, and the effect of expanding the range of the interpolation processing is not obtained. This kind of state of affairs is not limited to the case of two-screen display. Even when one video signal is displayed, it is a portrait that is in a frame and is different from each other in the left and right. The same will happen in the same situation.

The fifth embodiment is based on the movement of the portrait. In the case where the domains are different from each other, the effect of expanding the range of the interpolation processing can be obtained, and the configuration of the first embodiment is further developed. Here, the configuration in which the configuration of the first embodiment is developed is described as the fifth embodiment. However, the second to fourth embodiments can also be used in the fifth embodiment. The same state of composition. In the fifth embodiment, as an example, the image signal is processed in each of the areas in which one frame is equally divided into two. It is also possible to divide and process the areas in which the areas of the respective regions are different from each other without equal division.

In FIG. 16, the motion vector MV outputted by the motion vector detecting unit 1 is input to the left region frequency distribution monitoring unit 4L and the right region frequency distribution monitoring unit 4R, and the left region interpolation pixel generating portion 6L and the right. The area is interpolated at the pixel generating portion 6R. The left-region frequency distribution monitoring unit 4L and the right-region frequency distribution monitoring unit 4R are similar to the frequency distribution monitoring unit 4, and monitor the motion vector MV by, for example, a frame unit, and detect that the vertical component of the motion vector MV is What size is used for distribution. However, the left-region interpolating pixel generating portion 6L monitors only the motion vector MV in the left region of the one frame, and the right region interpolating pixel generating portion 6R is only for the right region in the 1 frame. The motion vector MV is monitored.

17(A) is an example of a histogram showing the distribution of the motion vector MV generated by the left-region frequency distribution monitoring unit 4L, and FIG. 17(B) is generated for the right-region frequency distribution monitoring unit 4R. An example of a histogram of the distribution of motion vectors MV. Motion vector MV level The setting is the same as that of FIG. The left-region frequency distribution monitoring unit 4L supplies the data S fdL representing the frequency distribution in the left region to the left region offset control unit 5L, and the right region frequency distribution monitoring unit 4R, which represents the frequency distribution in the right region. The data S fdR is supplied to the right region bias control portion 5R. As shown in Fig. 17 (A) and (B), in general, the specific level C Lsp is also set to the level of 7, 8 and the level of -7, -8.

17(C) is a comparison with FIGS. 17(A) and (B), and is not divided into two frames, and is the same as the first embodiment. The histogram generated by monitoring the motion vector MV is displayed as a whole of the frame.

The left-region bias control unit 5L, when the frequency exceeds the threshold y1 at the specific level C Lsp of the frequency distribution shown in FIG. 17(A), generates a representative value whose absolute value exceeds 0. The offset signals of the offset amounts S os1L, S os2L. The right-region bias control unit 5R, when the frequency exceeds the threshold y1 at the specific level C Lsp of the frequency distribution shown in FIG. 17(B), generates a representative value whose absolute value exceeds 0. Offset offset signals S os1R, S os2R. In the fifth embodiment, the left area offset control unit 5L and the right area offset control unit 5R are set to have smaller values than the threshold value y shown in Figs. 3 and 17(C). The threshold y1. This is because, since one frame is divided into two sides, the number of occurrences of each level of the vertical component of the motion vector MV in each of the left and right regions is more than that for the entire frame. There are fewer occurrences during monitoring.

In the case of Fig. 17(C), the frequency system does not exceed the threshold y at a specific level C Lsp . In the case of Figs. 17(A) and (B), since the threshold value y1 is set to a value smaller than the threshold value y, the frequency system exceeds the threshold value at the specific level C Lsp . Y1.

The offset signals S os1L and S os2L are input to the frame memory 2, 3 and the left area interpolation pixel generating unit 6L, and the offset signals S os1R and S os2R are input to the frame memory 2. 3 and the right region are interpolated in the pixel generating portion 6R. The offset signals S os1L and S os2L are caused by the offset amounts, and the read addresses in the vertical direction in the frame memories 2 and 3 are shifted in opposite directions. The offset signals S os1R and S os2R are caused by the offset amounts, and the read addresses in the vertical direction in the frame memories 2 and 3 are shifted toward each other in the opposite direction.

The internal configuration of the left-region interpolating pixel generating portion 6L and the right region interpolating pixel generating portion 6R is the same as that of the interpolating pixel generating portion 6. As described above with reference to FIG. 1, the left-region interpolating pixel generating unit 6L and the right-region interpolating pixel generating unit 6R include a selection control unit 61, delay selecting units 62 and 63, and a mixing unit 64. The specific configuration of the delay selecting sections 62, 63 is as described in the description of FIG.

The frame memory 2 is supplied to the left-region interpolating pixel generating portion 6L in order to cause the left-region interpolating pixel generating portion 6L to generate an image signal S1L necessary for interpolating pixels in the left region, and to make the right The area interpolating pixel generating unit 6R generates an image signal S1R necessary for interpolating pixels in the right area, and supplies it to the right area interpolating pixel generating unit 6R. The frame memory 3 will be generated in the left area in order to cause the left area interpolation pixel generating section 6L. The video signal S2L necessary for interpolating the pixels is supplied to the left-region interpolating pixel generating unit 6L, and is supplied to the right-region interpolating pixel generating unit 6R to generate the video signal S2R necessary for the interpolating pixels in the right region. The right region is interpolated at the pixel generating portion 6R.

The image signal S1L is the pixel data in the left region of the pixel data successively outputted by the frame memory 2 as the image signal S1, and is in response to the offset amount represented by the offset signal S os1L Pixel data that translates the address in the vertical direction. The image signal S2L is the pixel data in the left region in the pixel data sequentially output by the frame memory 3, and is made in the vertical direction in response to the offset amount represented by the offset signal S os2L . The address is translated into pixel data. If the offset amount is 0, the image signals S1L, S2L are pixel data that are not translated.

The image signal S1R is the pixel data in the right region of the pixel data sequentially outputted by the frame memory 2 as the image signal S1, and is in response to the offset amount represented by the offset signal S os1R Pixel data that translates the address in the vertical direction. The image signal S2R is the pixel data in the right region in the pixel data sequentially output by the frame memory 3, and is made in the vertical direction in response to the offset amount represented by the offset signal S os2R . The address is translated into pixel data. If the offset amount is 0, the image signals S1R and S2R are pixel data that are not translated.

The selection control unit 61 in the left-region interpolating pixel generating unit 6L sets the pixel data of the vertical direction as the reference in the delay selecting sections 62 and 63 in response to the offset amounts of the offset signals S os1L and S os2L . Position for translation. The selection control unit 61 in the right region interpolation pixel generating portion 6R is in response to The offset amounts of the offset signals S os1R and S os2R are shifted by the position of the pixel data in the vertical direction as the reference at the delay selecting sections 62 and 63. The left area interpolated pixel generating unit 6L generates a left area interpolated signal by the same operation as the interpolated pixel generating unit 6 of FIG. 1, and the right area interpolated pixel generating unit 6R generates a right area interpolated signal. The combination of the left area interpolated signal and the right area interpolated signal is the internal frame signal.

In the time series conversion memory 7, the video signal S1 is input as an actual picture frame signal, and the left area interpolated signal and the right area interpolated signal are input as inner picture frame signals. The time series conversion memory 7 is an interpolated pixel data of the inner frame signal by synthesizing the left area interpolated signal and the right area interpolated signal. The time series transforms the memory 7. The image data of the frame rate conversion is output by interactively reading the pixel data of the actual frame signal and the interpolated pixel data of the inner frame signal at a vertical frequency of 120 Hz.

The effects obtained in the fifth embodiment will be described with reference to Figs. 18 to 20 . Fig. 18 shows an area Arf1'L that translates downward in the vertical direction in the left area of the frames f1, f2, and an area Arf2'L that translates upward in the vertical direction. Even in the case where the vertical component of the motion vector MV is the motion vector MV (v8) of 8 pixels, the pixels in the frames f1 and f2 for generating the interpolated pixel P f12(0)L are also the region A. In the range of rf1'L and A rf2'L, the left-region interpolating pixel generating portion 6L is capable of generating the interpolated pixel Pf12(0)L.

Figure 19 is a view of the area Arf1'R and the downward direction of the vertical direction in the right region of the frames f1 and f2. The translated area A rf2'R is shown. In Fig. 19, the vertical component of the motion vector MV is -8 pixels in the opposite direction to Fig. 18, and the motion vector MV is MV (-v8). Even in the case where the vertical component of the motion vector MV is a motion vector MV (-v8) of -8 pixels, the pixels in the frames f1 and f2 for generating the interpolated pixel P f12(0)R are also regions. In the range of A rf1 'R and A rf2'R, the right-region interpolating pixel generating portion 6R is capable of generating the interpolated pixel P f12(0)R.

20 is a comparison with FIGS. 18 and 19, and is not divided into two frames, and is the same as the first embodiment, and is the same for all the frames. The motion vector MV is monitored and the bias signals S os1 , S os2 are generated for display. As shown in Fig. 17(C), since the frequency system does not exceed the threshold y at a specific level C Lsp , the offset amount becomes 0 to generate P f12(0)L, P f12 (0) The areas of R, A rf1L, A rf1R, A rf2L, and A rf2R are not translated. Therefore, when the motion vector MV is the motion vector MV (v8) in the left region and the motion vector MV is the motion vector MV (-v8) in the right region, the interpolation pixel P f12 cannot be generated. L, P f12 (0) R.

As described above, according to the fifth embodiment, even when motions of mutually different motions are performed in a plurality of regions in the frame, it is possible to appropriately expand the interpolation for each region. The scope of processing. Therefore, it is possible to generate appropriate interpolated pixels in accordance with the motion vector even when the motion in the vertical direction of the portrait is large in each of the plurality of regions.

In the fifth embodiment, although the area of the frame is divided into two, it is also possible to divide the area by three or more, and to divide the area in the horizontal direction and the number of divisions, as long as it is suitable for setting. Just fine. The frequency distribution monitoring unit 4, the offset control unit 5, and the interpolation pixel generating unit 6 may be provided in accordance with the number of divisions.

The present invention is not limited to the first to fifth embodiments described above, and various modifications can be made without departing from the spirit and scope of the invention. In the first to fifth embodiments, the configuration including the motion vector detecting unit 1 is shown. However, the motion vector MV detected for use in other devices may be supplied to the motion vector MV. The frequency distribution monitoring unit 4 (4L, 4R) and the interpolation pixel generating unit 6 (6L, 6R). The frequency distribution monitoring unit 4 (4L, 4R) sets the number of occurrences in one frame at each level to the frequency, but the number of occurrences in the two frames may be set to a frequency. As long as it is suitable for setting.

1‧‧‧Sport Vector Detection Department

2, 3, 21‧‧‧ frame memory (delay)

4‧‧‧frequency distribution monitoring department

4L‧‧‧ Left Regional Frequency Distribution Monitoring Department

4R‧‧‧Right Area Frequency Distribution Monitoring Department

5, 50~52‧‧‧Offset Control Department

5L‧‧‧Left Area Bias Control Unit

5R‧‧‧Right Area Offset Control

6‧‧‧Interpolation Pixel Generation Department

6L‧‧‧Lead area interpolation pixel generation unit

6R‧‧‧Right area interpolation pixel generation unit

7‧‧‧ Time Series Transformation Memory

8‧‧‧Film Signal Detection Department

9‧‧‧Defibrillation Processing Department

20‧‧‧Delay Department

61‧‧‧Select Control Department

62, 63‧‧‧Delay Selection Department

64‧‧‧Mixed Department

501, 521‧‧‧Discrimination Department

502, 533‧‧‧ Offset determination unit

522‧‧‧Restrictions

Fig. 1 is a block diagram showing the first embodiment.

[Fig. 2] A diagram for explaining a motion vector.

FIG. 3 is a diagram showing an example of a histogram of the frequency distribution detected by the frequency distribution monitoring unit 4.

FIG. 4 is a block diagram showing an example of the specific configuration of the delay selecting sections 62 and 63.

[Fig. 5] for explaining the interpolation pixel generating operation in the case where the reading address in the vertical direction at the frame memory 2, 3 is not shifted. Concept map.

Fig. 6 is a conceptual diagram for explaining an interpolation pixel generating operation in the case where the reading address in the vertical direction at the frame memories 2, 3 is shifted.

[Fig. 7] A diagram for explaining translation of a read address in the vertical direction at the frame memories 2, 3.

[Fig. 8] A partial block diagram showing the configuration of Fig. 1.

Fig. 9 is a block diagram showing the second embodiment.

Fig. 10 is a view for explaining a motion vector in the second embodiment.

Fig. 11 is a view for explaining an operation in the second embodiment.

Fig. 12 is a block diagram showing the third embodiment.

[Fig. 13] A diagram for explaining an image signal for demotion of 2-3 and a defibrillation process.

[Fig. 14] A diagram for explaining pixel interpolation for defibrillation processing.

Fig. 15 is a block diagram showing the fourth embodiment.

Fig. 16 is a block diagram showing the fifth embodiment.

FIG. 17 is a view showing an example of a histogram of the frequency distribution detected by the frequency distribution monitoring units 4L and 4R in the fifth embodiment.

FIG. 18 is a conceptual diagram for explaining an interpolation pixel generating operation in the case where the reading address in the vertical direction at the frame memory 2, 3 is shifted in the left area.

[Fig. 19] Interpolated pixel generation for the case where the read address in the vertical direction at the frame memory 2, 3 is translated in the right area A conceptual diagram of the action.

[Fig. 20] A conceptual diagram for explaining an interpolation pixel generating operation in the case where the reading addresses in the vertical direction of the frame memories 2, 3 are not shifted in the left area and the right area. .

1‧‧‧Sport Vector Detection Department

2, 3‧‧‧ frame memory (delay)

4‧‧‧frequency distribution monitoring department

5‧‧‧Offset Control Department

6‧‧‧Interpolation Pixel Generation Department

7‧‧‧ Time Series Transformation Memory

61‧‧‧Select Control Department

62, 63‧‧‧Delay Selection Department

64‧‧‧Mixed Department

Claims (16)

An image signal processing device comprising: a first delay unit configured to delay a period of an input image signal during a frame period or a plurality of scanning lines, and output the first delayed image signal; and The delay unit is configured to delay the first delayed video signal by one frame period and output the second delayed video signal as a second delayed video signal, and the first delay selecting unit causes the pixel data of the first delayed video signal to be horizontal And successively delaying in the vertical direction, and generating pixel data included in the plurality of first reference ranges used when generating the interpolated pixel data, and selecting one of the plurality of pixel data; and the second The delay selecting unit sequentially delays the pixel data of the second delayed image signal in the horizontal and vertical directions, and generates a plurality of pixels included in the second reference range used when the interpolation pixel data is generated. Data, and then selecting one of the plurality of pixel data; and the frequency distribution monitoring unit is used to generate the aforementioned interpolation pixel data The size of the vertical component of the quantity is divided into a plurality of levels, and it is detected that the vertical component of the motion vector occurs in each of the levels of the frequency of occurrences; and the offset control section is used by When the vertical component of the motion vector detected by the frequency distribution monitoring unit exceeds the specific threshold value in a predetermined level defined in advance, the first delay is read from the first delay unit. Vertical reading of the image signal The address is a first offset signal for translation, and is supplied to the first delay unit, and a read address in a vertical direction when the second delayed video signal is read from the second delay unit is generated. Translating the second offset signal to the second delay unit; and the selection control unit is configured to vertically display the pixel data selected by the first delay selection unit based on the first offset signal The panning is controlled such that the pixel data selected by the second delay selecting unit is shifted in the vertical direction based on the second offset signal. The video signal processing device according to claim 1, wherein the offset control unit generates the read address in the vertical direction of the first delay unit as the first offset signal The first direction is a translational offset signal, and as the second bias signal, the read position in the vertical direction of the second delay portion is shifted toward the second direction opposite to the first direction. In the offset signal, the selection control unit shifts the pixel data selected by the first delay selection unit toward the first vertical direction, and selects the second delay selection unit based on the second offset signal. The first and second delay selecting units are controlled such that the pixel data is shifted in the second perpendicular direction opposite to the first perpendicular direction. The video signal processing device according to the first or second aspect of the invention, wherein the offset control unit sets the specific level to be independent of the first and second offset signals. Translating the read addresses at the first and second delay portions without passing through the foregoing When the control unit selects the pixel data selected by the first and second delay selecting units to shift, the pixel data corresponding to the vertical component of the motion vector may be outside the first and second reference ranges. level. The image signal processing device according to claim 3, further comprising: a determination unit that determines whether or not a vertical component of the motion vector detected by the frequency distribution monitoring unit is generated At a level of one of the aforementioned specific levels, exceeding the aforementioned specific threshold, and the direction of motion in the vertical direction is opposite to the level of one of the foregoing exceeding the aforementioned specific threshold. In the direction in which the level other than the specific level exceeds the specific threshold value, the offset control unit determines the first and second states when the determination unit determines the state. The degree of translation of the read address at the first and second delay sections due to the offset signal is limited to a value smaller than when the discriminating section does not determine the state, and the selection control is performed. The portion is controlled based on the first and second offset signals whose degree of translation is limited, such that the pixel data selected by the first and second delay selecting units are vertical Pan up. The video signal processing device according to claim 4, wherein the offset control unit is based on one of a positive or negative level that maximizes a vertical component exceeding the specific threshold value. The vertical component of the direction, and the aforementioned specificity exceeding the aforementioned specific threshold The positive component of the level other than the level or the vertical component of the other direction of the negative one, and the two of the vertical component values are added to generate the first and second offset signals. The image signal processing device according to claim 1 or 2, further comprising: a film signal detecting unit that detects whether the input image signal is based on a film image Pulling down to convert a video signal of a specific vertical frequency, the offset control unit, when the film signal detecting unit detects that the input image signal is a video signal converted by the down-conversion And shifting a degree of translation of the read address at the first and second delay portions by the first and second offset signals as a ratio of the input video signal is not detected The value of the converted image signal is larger. The image signal processing device according to claim 6, wherein the film signal detecting unit detects that the input image signal is an image signal converted by 2-2 rotation according to a film image, or When the film signal detecting unit detects that the input image signal is converted into an image signal converted by 2-3, the image signal detecting unit changes the image signal converted by 2-3. The degree of translation of the read address at the first and second delay portions due to the first and second offset signals is greater than the detection of the input video signal by the 2-2 transition Transformed video The value of the number is greater. The video signal processing device according to the first or second aspect of the invention, wherein the operation performed by the first delay selecting unit and the operation selected by the second delay selecting unit are performed. And an operation of detecting by the frequency distribution monitoring unit, an operation of supplying the first and second offset signals by the offset control unit, and a translation operation by the selection control unit. The region of the complex number after dividing the frame of the input image signal into a plurality of regions is performed separately. An image signal processing method is characterized in that the input delay signal is delayed by one frame period or a plurality of scanning line periods via the first delay unit, and is output as a first delayed video signal; and is output via the second delay unit. Delaying the first delayed video signal in a frame period and outputting it as a second delayed video signal; delaying the pixel data of the first delayed video signal in the horizontal and vertical directions, and generating the a plurality of pixel data in a first reference range used when interpolating pixel data is generated; wherein pixel data of said second delayed image signal is successively delayed in a horizontal direction and a vertical direction, and generated in the foregoing a plurality of pixel data in the second reference range used when inserting the pixel data; dividing the size of the vertical component of the motion vector used in generating the aforementioned interpolated pixel data into a plurality of levels, and detecting the vertical of the motion vector The composition is sent at each level in which frequency of occurrences When the vertical component of the motion vector exceeds a certain threshold value in a predetermined level defined in advance, the first delay is read from the first delay unit based on the first offset signal Translating, in the vertical direction, the read address of the video signal, and shifting the read address in the vertical direction when the second delayed video signal is read from the second delay unit according to the second offset signal; Selecting, according to the first offset signal, the first pixel data from the plurality of pixel data in the first reference range, and shifting the position in the vertical direction when reading, and according to the second offset signal Selecting the second pixel data in the plurality of pixel data in the second reference range and shifting the position in the vertical direction when reading the second pixel data; and reading the first pixel data read from the first reference range and from the second The second pixel data read out in the reference range is used to generate interpolated pixel data. The image signal processing method according to claim 9, wherein the vertical reading address in the first delay portion is translated toward the first direction based on the first offset signal, and Translating, in the second direction of the second delay portion, the read address in the vertical direction toward the second direction opposite to the first direction by the second offset signal, and using the first offset signal from the foregoing Reading the position of the pixel data by the plurality of pixel data in the first reference range, shifting toward the first vertical direction, and reading the first pixel data, according to the second partial offset Transmitting a signal, and reading a position of the pixel data from a plurality of pixel data in the second reference range, shifting in a second vertical direction opposite to the first perpendicular direction, and reading the second pixel data . The image signal processing method according to claim 9 or 10, wherein the specific level is set such that the read address at the first and second delay portions is not translated. In the state in which the position of the pixel data is read from the plurality of pixel data in the first and second reference ranges, the pixel data corresponding to the vertical component of the motion vector becomes the first And the level outside the second reference range. The image signal processing method according to claim 11, wherein determining whether a vertical component of the motion vector occurs is at a level of one of the specific levels and exceeds the specific The limit value, and the direction of movement in the vertical direction is opposite to the level of one of the aforementioned ones exceeding the specific threshold value, and the level other than the aforementioned specific level also exceeds the aforementioned specific threshold When the state of the value is determined, the degree of translation of the read address at the first and second delay portions due to the first and second offset signals is limited to A value smaller than the case where the state is not determined, and the plurality of pixels from the first and second reference ranges are set based on the first and second offset signals that limit the degree of translation. The first and second pixel data are selected as the data, and the position in the vertical direction at the time of reading is shifted. The image signal processing method according to claim 12, wherein the vertical component in a direction in which one of the positive or negative levels of the vertical component exceeding the specific threshold value is the largest is a vertical component that exceeds the positive or negative direction of the level other than the specific level of the specific threshold, and the two of the vertical components are added to generate the first and the first 2 offset signal. The image signal processing method of claim 9 or 10, wherein detecting whether the input image signal is converted to a specific vertical frequency by a pull down according to a film signal When detecting that the input image signal is a video signal converted by the down-conversion, the signal is read by the first and second delay portions caused by the first and second offset signals The degree of translation of the address is set to be larger than the value when the input image signal is not detected as the image signal converted by the down-conversion. The image signal processing method according to claim 14, wherein the input image signal is detected as a video signal converted by 2-2 according to the film image, or is rotated by 2-3. The transformed image signal, When it is detected that the input image signal is converted into an image signal converted by 2-3, the reading at the first and second delay portions caused by the first and second offset signals is detected. The degree of translation of the address is set to be larger than the value when the image signal of the input image signal is detected to be converted by 2-2. The image signal processing method according to claim 9 or claim 10, wherein each of the plurality of regions after dividing the frame of the input image signal into a plurality of regions is generated in the foregoing a plurality of pixel data in the first reference range, in each of the plurality of regions, generating a plurality of pixel data included in the second reference range, and detecting each of the plurality of regions In the frequency of the occurrence number, in each of the plurality of regions, the read address in the vertical direction is translated, and in each of the plurality of regions, the first and second are selected and read. The position in the vertical direction of the pixel data is translated, and in each of the aforementioned plural regions, the aforementioned inner illustrator data is generated.