TWI489772B - Close-loop class-d audio amplifier and control method thereof - Google Patents

Close-loop class-d audio amplifier and control method thereof Download PDF

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TWI489772B
TWI489772B TW097129581A TW97129581A TWI489772B TW I489772 B TWI489772 B TW I489772B TW 097129581 A TW097129581 A TW 097129581A TW 97129581 A TW97129581 A TW 97129581A TW I489772 B TWI489772 B TW I489772B
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signal
input
comparator
feedback
power amplifier
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TW201008112A (en
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Lang Yunping
Zhang Junming
Ren Frank
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Monolithic Power Systems Inc
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閉路D級音頻放大器及其控制方法Closed-circuit D-class audio amplifier and control method thereof

本發明涉及一種D類功率放大器,尤其是一種閉環固定頻率的D類功率放大器及其控制方法。The invention relates to a class D power amplifier, in particular to a closed-loop fixed frequency class D power amplifier and a control method thereof.

目前有很多不同種類的功放,如A類、B類、AB類、D類等,其中D類功放與其他功放的不同在於基本是一個開關功放或者是脈衝調變功放,在這種D類功放中,器件要麼完全導通,要麼完全關斷,大幅度減少了輸出器件的功耗,音頻信號是用來調變脈寬調變(PWM)載波信號,載波信號驅動輸出功率級得到高頻PWM方波,最後通過低通濾波器輸出音頻信號到負載。目前人們設計D類功率放大器非常重視提高其功率密度同時降低成本。從電路結構來說,D類功率放大器可以被視為傳統的逆變器,輸入直流電源,根據參考信號產生放大的音頻信號。因此,所有傳統的閉環控制方法,諸如瞬態電壓模式回饋控制或電壓電流雙回饋環控制等都可以運用在D類功率放大器當中。這種控制方法所採用的一個典型器件就是誤差放大器。通常這種電路結構不僅複雜而且成本較高。MPS公司所有的、受專利保護的“類比自適應調變(AAM)”技術是一種實現D類功率放大器閉環控制的比較簡便的方法。At present, there are many different types of power amplifiers, such as Class A, Class B, Class AB, Class D, etc. Among them, class D power amplifiers are different from other power amplifiers in that they are basically a switching power amplifier or a pulse modulation power amplifier. In this class D power amplifier The device is either fully turned on or completely turned off, greatly reducing the power consumption of the output device. The audio signal is used to modulate the pulse width modulation (PWM) carrier signal, and the carrier signal drives the output power level to obtain the high frequency PWM side. Wave, and finally output the audio signal to the load through the low-pass filter. At present, people design Class D power amplifiers to pay more attention to increasing their power density while reducing costs. In terms of circuit structure, a class D power amplifier can be regarded as a conventional inverter, which inputs a direct current power source and generates an amplified audio signal based on a reference signal. Therefore, all traditional closed-loop control methods, such as transient voltage mode feedback control or voltage-current double feedback loop control, can be used in Class D power amplifiers. A typical device used in this control method is the error amplifier. Usually such a circuit structure is not only complicated but also costly. MPS' patent-protected Analog-to-Availability Modulation (AAM) technology is a relatively simple method for implementing closed-loop control of Class D power amplifiers.

如第1圖,在“AAM”電路結構中,電阻R1和R2組成一個分壓器,通過節點A給比較器的同相輸入端Pin提供一個等於1/2Vcc的偏壓。比較器有內部滯環。比較器在節 點B的輸入信號與1/2Vcc±dV進行比較,其中dV代表比較器滯後電壓,比較器的輸出PWM波經過驅動電路控制電晶體M1和M2交替導通,電晶體M1的源極連接到輸出節點C,而電晶體M2的源極接地。電晶體M1的波極連接到電源Vcc,而電晶體M2的波極連接到輸出節點C。電晶體M1和M2起著開關的作用,它們構成D類功率放大器電路的輸出級的一部分,以便當在開關模式下使用輸出級時,在輸出節點C產生方波輸出。輸出節點C處的波形SW經電感L和電容C1組成的濾波電路,以及隔直電容C2之後恢復成被放大的音頻信號輸送到負載(如揚聲器)。同時SW信號通過電阻Rf向電容Cint充/放電,從而實現自適應控制。As shown in Fig. 1, in the "AAM" circuit configuration, resistors R1 and R2 form a voltage divider, and node A provides a bias voltage equal to 1/2 Vcc to the non-inverting input terminal Pin of the comparator. The comparator has an internal hysteresis. Comparator in section The input signal of point B is compared with 1/2Vcc±dV, where dV represents the comparator hysteresis voltage, and the output PWM wave of the comparator is alternately turned on by the driving circuit to control the transistors M1 and M2, and the source of the transistor M1 is connected to the output node. C, and the source of the transistor M2 is grounded. The wave of the transistor M1 is connected to the power source Vcc, and the wave of the transistor M2 is connected to the output node C. The transistors M1 and M2 function as switches which form part of the output stage of the class D power amplifier circuit to produce a square wave output at the output node C when the output stage is used in the switching mode. The waveform SW at the output node C is filtered by the filter L composed of the inductor L and the capacitor C1, and after the DC blocking capacitor C2 is restored, the amplified audio signal is sent to a load (such as a speaker). At the same time, the SW signal is charged/discharged to the capacitor Cint through the resistor Rf, thereby achieving adaptive control.

如第2圖所示,當輸出節點C的輸出PWM方波為高電平時,電容Cint被充電,Nin,即節點B上的電壓升高直至到達滯環的上限,從而關斷上面的電晶體M1而開通下面的電晶體M2,導致輸出PWM方波變為低電平。輸出節點C的輸出PWM方波為低時,Cint放電,Nin上的電壓下降直至達到滯環的下限,從而關斷下面的電晶體M2而開通上面的電晶體M1,導致輸出PWM方波變為高電平。如此重複產生節點C的高頻PWM方波,濾波器再對此高頻載波信號進行濾波以便得到一定增益放大的輸出音頻信號。回饋網路回饋節點C的信號到比較器的反相輸入端,從而控制輸出音頻信號跟隨輸入音頻信號,並實現一定的放大增益。“AAM”技術允許給放大器設置不同的增益,在 單端和橋式結構中都能取得較好的控制效果。然而,使用“AAM”技術的電路在工作過程中開關頻率變化很大,其頻譜容易與FM/AM等信號波段重疊,從而影響這些信號的接收品質,造成了此控制技術在汽車電子、音頻廣播等應用場合的局限性。As shown in Fig. 2, when the output PWM square wave of the output node C is at a high level, the capacitor Cint is charged, and Nin, that is, the voltage on the node B rises until reaching the upper limit of the hysteresis, thereby turning off the upper transistor. M1 opens the lower transistor M2, causing the output PWM square wave to go low. When the output PWM square wave of the output node C is low, Cint discharges, and the voltage on Nin drops until the lower limit of the hysteresis is reached, thereby turning off the lower transistor M2 and turning on the upper transistor M1, causing the output PWM square wave to become High level. The high frequency PWM square wave of node C is repeatedly generated in this way, and the filter then filters the high frequency carrier signal to obtain a certain gain amplified output audio signal. The feedback network feeds back the signal of node C to the inverting input of the comparator, thereby controlling the output audio signal to follow the input audio signal and achieve a certain amplification gain. "AAM" technology allows different gains to be set for the amplifier, Good control results can be achieved in both single-ended and bridge configurations. However, the circuit using "AAM" technology has a large change in switching frequency during operation, and its spectrum is easily overlapped with signal bands such as FM/AM, thus affecting the reception quality of these signals, resulting in this control technology in automotive electronics and audio broadcasting. The limitations of other applications.

本發明要解決的技術問題是提供一種D類功率放大器的閉環控制方法,使放大器的開關頻率保持固定不變,從而易於避開某些重要信號的波段,同時控制電路結構簡單,一些器件可以積體化。The technical problem to be solved by the present invention is to provide a closed-loop control method for a class D power amplifier, so that the switching frequency of the amplifier is kept constant, so that it is easy to avoid the band of some important signals, and the control circuit has a simple structure, and some devices can accumulate. Physicalization.

按照本發明的一個方案,提供一種閉環D類功率放大器,包括:輸入級,用以接收輸入信號,所述輸入級包括比較器和三角波發生器或矩形波發生器,所述比較器接收所述輸入信號和所述三角波發生器生成的高頻三角波或所述矩形波發生器生成的高頻矩形波,並輸出第一信號;輸出級,連接到所述輸入級,回應所述第一信號而產生第二信號;濾波器,連接到所述輸出級的輸出節點,用以對所述第二信號進行濾波以便得到輸出信號;以及回饋網路,連接在所述輸出級的輸出節點與所述輸入級的輸入節點之間,所述回饋網路對所述第二信號進行雜訊整形後得到回饋信號,並且將所述回饋信號負反饋到所述輸入級,以便從所述輸入信號減去所述回饋信號。According to an aspect of the present invention, a closed-loop class D power amplifier is provided, comprising: an input stage for receiving an input signal, the input stage comprising a comparator and a triangular wave generator or a rectangular wave generator, the comparator receiving the Inputting a high frequency triangular wave generated by the triangular wave generator or the high frequency rectangular wave generated by the rectangular wave generator, and outputting a first signal; an output stage connected to the input stage, responsive to the first signal Generating a second signal; a filter coupled to the output node of the output stage for filtering the second signal to obtain an output signal; and a feedback network coupled to the output node of the output stage and said Between the input nodes of the input stage, the feedback network performs noise shaping on the second signal to obtain a feedback signal, and negatively feeds the feedback signal to the input stage to subtract from the input signal The feedback signal.

根據上述的功率放大器,優選地,所述比較器的同相輸入端載入所述高頻三角波,反相輸入端載入所述輸入信 號和所述回饋信號,所述比較器通過將所述高頻三角波與所述輸入信號減去所述回饋信號後得到的信號進行比較得到所述第一信號。According to the above power amplifier, preferably, the non-inverting input of the comparator loads the high frequency triangular wave, and the inverting input loads the input signal And the feedback signal, the comparator obtaining the first signal by comparing the high frequency triangular wave with a signal obtained by subtracting the feedback signal from the input signal.

根據上述的功率放大器,優選地,所述比較器的同相輸入端載入直流偏置電壓,反相輸入端載入所述輸入信號、所述回饋信號和所述高頻矩形波,所述比較器通過將所述直流偏置電壓與所述輸入信號減去所述回饋信號後再疊加所述高頻矩形波後得到的信號進行比較得到所述第一信號。According to the above power amplifier, preferably, the non-inverting input of the comparator is loaded with a DC bias voltage, and the inverting input is loaded with the input signal, the feedback signal and the high frequency rectangular wave, the comparison The first signal is obtained by comparing the DC bias voltage with a signal obtained by subtracting the feedback signal from the input signal and then superimposing the high frequency rectangular wave.

根據上述的功率放大器,優選地,所述回饋網路包括電容,所述電容的第一端同時連接至所述輸入信號、所述放大器的反相輸入端以及所述第二信號,第二端接地或者接直流偏置電壓。According to the above power amplifier, preferably, the feedback network includes a capacitor, the first end of the capacitor being simultaneously connected to the input signal, the inverting input of the amplifier, and the second signal, the second end Ground or connect to DC bias voltage.

根據上述的功率放大器,優選地,所述回饋網路連接在所述電容的第一端與所述第二信號之間的回饋電阻。According to the power amplifier described above, preferably, the feedback network is connected to a feedback resistor between the first end of the capacitor and the second signal.

根據上述的功率放大器,優選地,所述高頻三角波或所述高頻矩形波比所述第二信號對所述電容的充放電能力大。According to the power amplifier described above, preferably, the high frequency triangular wave or the high frequency rectangular wave has a larger charge and discharge capability to the capacitance than the second signal.

根據上述的功率放大器,優選地,所述輸入級具有一個所述比較器;所述輸出級包括:驅動電路,連接至所述比較器;一個半橋開關電路,連接至所述驅動電路,根據驅動電路產生的驅動信號而交替導通,以對應產生一個第二信號。According to the power amplifier described above, preferably, the input stage has one of the comparators; the output stage includes: a driving circuit connected to the comparator; and a half bridge switching circuit connected to the driving circuit, according to The driving signals generated by the driving circuit are alternately turned on to correspondingly generate a second signal.

根據上述的功率放大器,優選地,所述輸入級具有一 個所述比較器;所述輸出級包括:驅動電路,連接至所述比較器;兩個半橋開關電路,連接至所述驅動電路,根據驅動電路產生的驅動信號而交替導通,以對應產生兩個第二信號,並回饋其中的一個第二信號。According to the power amplifier described above, preferably, the input stage has a The output stage includes: a driving circuit connected to the comparator; two half bridge switching circuits connected to the driving circuit, alternately conducting according to a driving signal generated by the driving circuit, to correspondingly generate Two second signals and one of the second signals is fed back.

根據上述的功率放大器,優選地,所述輸入級具有兩個所述比較器;所述輸出級包括:驅動電路,與兩個所述比較器分別連接;兩個半橋開關電路,與所述驅動電路分別連接,根據驅動電路產生的驅動信號而交替導通,以產生兩個所述第二信號,並分別回饋至對應的比較器。According to the above power amplifier, preferably, the input stage has two of the comparators; the output stage includes: a driving circuit respectively connected to the two comparators; two half bridge switching circuits, and the The driving circuits are respectively connected, and are alternately turned on according to a driving signal generated by the driving circuit to generate two of the second signals, and are respectively fed back to the corresponding comparators.

按照本發明的另一個方案,提供一種閉環D類功率放大器的控制方法,包括以下步驟:第一步驟,接收輸入信號和三角波發生器生成的高頻三角波或矩形波發生器生成的高頻矩形波,並輸出第一信號;第二步驟,響應所述第一信號而產生第二信號;第三步驟,對所述第二信號進行濾波得到輸出信號;以及第四步驟,對所述第二信號進行雜訊整形後得到回饋信號,並且將所述回饋信號負反饋到接收所述輸入信號的輸入端,以便從所述輸入信號減去所述回饋信號。According to another aspect of the present invention, a control method of a closed-loop class D power amplifier is provided, comprising the following steps: a first step of receiving an input signal and a high frequency rectangular wave generated by a high frequency triangular wave or rectangular wave generator generated by a triangular wave generator And outputting a first signal; a second step of generating a second signal in response to the first signal; a third step of filtering the second signal to obtain an output signal; and a fourth step of, the second signal A feedback signal is obtained after noise shaping, and the feedback signal is negatively fed back to an input receiving the input signal to subtract the feedback signal from the input signal.

根據上述的控制方法,優選地,在第二步驟,響應所述第一信號而產生兩個所述第二信號;在第四步驟,將兩個所述第二信號中的至少一個進行雜訊整形後負反饋到所述輸入端。According to the above control method, preferably, in the second step, two of the second signals are generated in response to the first signal; and in a fourth step, at least one of the two second signals is subjected to noise Negative feedback to the input after shaping.

本發明的D類功率放大器電路採用一個滯環足夠小以至可以忽略的比較器替代了“AAM”電路結構中的滯環比較 器。在比較器的輸入端使功率級輸出信號的低頻部分與音頻輸入信號抵消,高頻部分送入比較器,從而在輸出端得到調變的輸出音頻信號。The class D power amplifier circuit of the present invention replaces the hysteresis loop in the "AAM" circuit structure by using a comparator with a hysteresis loop small enough to be negligible. Device. At the input of the comparator, the low frequency portion of the power stage output signal is cancelled out with the audio input signal, and the high frequency portion is fed to the comparator to obtain a modulated output audio signal at the output.

可以在比較器的同相輸入端接一個固定頻率的三角波信號,在反相輸入端接從輸出級得到的回饋信號和放大器輸入信號。A fixed-frequency triangular wave signal can be connected to the non-inverting input of the comparator, and the feedback signal and the amplifier input signal obtained from the output stage are connected to the inverting input terminal.

也可以在比較器的同相輸入端接偏置電壓Vdd,在反相輸入端接一個固定頻率的方波信號、從輸出級得到的回饋信號和放大器輸入信號。The bias voltage Vdd can also be connected to the non-inverting input of the comparator, and a square wave signal of a fixed frequency, a feedback signal obtained from the output stage, and an amplifier input signal are connected to the inverting input terminal.

下面結合附圖和具體實施方式對本發明作進一步詳細的說明。其中,為了清楚和簡明,與第1圖相似的元件採用相似的附圖標記表示。The present invention will be further described in detail below in conjunction with the drawings and specific embodiments. For the sake of clarity and conciseness, elements similar to those of FIG. 1 are denoted by like reference numerals.

第3圖示出根據本發明系統的一個實施例,該系統包括D類功率放大器和負載。一個具有Vcc/2直流偏置的、頻率約幾百千赫茲的高頻三角波加到了比較器的同相輸入端Pin(A),比較器的反相輸入端Nin(B)通過一個電容Cint接地,輸入音頻信號經過電容Cin和電阻Ri向電容Cint充/放電。比較器的輸出PWM波經過驅動電路控制電晶體M1和M2交替導通,電晶體M1的源級連接到輸出節點C,而電晶體M2的源極接地。電晶體M1的波極連接到電源Vcc,而電晶體M2的波極連接到輸出節點C。電晶體M1和M2起著開關的作用,它們構成D類功率放大器電路的輸出級的一部分,以便當在開關模式下使用輸出級時,在 輸出節點C產生方波輸出。輸出節點C處的波形SW經電感L和電容C1組成的濾波電路,以及隔直電容C2之後恢復成被放大的音頻信號輸送到負載(如揚聲器)。同時SW信號通過電阻Rf向電容Cint充/放電。理想情況下,音頻信號對電容Cint的充/放電效應與輸出節點C處的SW信號的低頻分量Vsw_low對Cint的充/放電效應能恰好抵消,也就是說,比較器反相輸入端Nin在Vsw_low和音頻輸入的共同作用下會保持跟隨比較器同相輸入端的電壓。即,當比較器輸出高電平時,電晶體M1導通,電晶體M2關斷,比較器反相輸入端電壓VNin 與比較器同相輸入端Pin電壓與滯環電壓之和VPin +dV比較(其中dV代表比較器滯後電壓),此時SW信號呈高電平,回饋後導致Nin端電壓上升直至大於電壓VPin +dV,比較器輸出跳變為低電平,電晶體M1關斷,電晶體M2導通,此時反相輸入端電壓VNin 與VPin -dV比較,SW低電平信號回饋導致Nin端電壓下降直至小於電壓VPin -dV,比較器輸出跳變為高電平,導致SW信號呈高電平,如此迴圈,如第5圖所示。所以,為了實現此定頻回饋控制並保證系統穩定工作,Nin端電壓上升下降速度都應小於Pin端給定三角波的變化斜率。所以設計Cint電容、Rf回饋電阻時要考慮Pin端給定三角波的變化速度。SW信號的高頻分量就會在同相輸入端Pin的高頻三角載波的調變下得到電晶體M1和M2的閘極驅動信號。放大器的增益由電阻Rf和Ri的比值確定。Figure 3 shows an embodiment of a system according to the invention comprising a class D power amplifier and a load. A high frequency triangular wave with a Vcc/2 DC offset and a frequency of several hundred kilohertz is applied to the noninverting input Pin(A) of the comparator. The inverting input terminal Nin(B) of the comparator is grounded through a capacitor Cint. The input audio signal is charged/discharged to the capacitor Cint through the capacitor Cin and the resistor Ri. The output PWM wave of the comparator is alternately turned on by the driving circuit control transistors M1 and M2, the source of the transistor M1 is connected to the output node C, and the source of the transistor M2 is grounded. The wave of the transistor M1 is connected to the power source Vcc, and the wave of the transistor M2 is connected to the output node C. The transistors M1 and M2 function as switches which form part of the output stage of the class D power amplifier circuit to produce a square wave output at the output node C when the output stage is used in the switching mode. The waveform SW at the output node C is filtered by the filter L composed of the inductor L and the capacitor C1, and after the DC blocking capacitor C2 is restored, the amplified audio signal is sent to a load (such as a speaker). At the same time, the SW signal is charged/discharged to the capacitor Cint through the resistor Rf. Ideally, the charge/discharge effect of the audio signal on the capacitor Cint and the low-frequency component Vsw_low of the SW signal at the output node C can exactly cancel the charge/discharge effect of Cint, that is, the comparator inverting input Nin is at Vsw_low. In conjunction with the audio input, the voltage following the non-inverting input of the comparator is maintained. That is, when the comparator outputs a high level, the transistor M1 is turned on, the transistor M2 is turned off, and the comparator inverting input terminal voltage V Nin is compared with the sum of the comparator noninverting input terminal Pin voltage and the hysteresis voltage V Pin +dV ( Where dV represents the comparator hysteresis voltage), at this time, the SW signal is at a high level. After the feedback, the Nin terminal voltage rises until it is greater than the voltage V Pin +dV, the comparator output jumps to a low level, and the transistor M1 turns off. When the crystal M2 is turned on, the voltage of the inverting input terminal V Nin is compared with V Pin -dV, and the feedback of the low level signal of the SW causes the voltage of the Nin terminal to drop until it is less than the voltage V Pin -dV, and the output of the comparator jumps to a high level, resulting in a jump. The SW signal is high, so loop back, as shown in Figure 5. Therefore, in order to achieve this fixed-frequency feedback control and ensure stable operation of the system, the Nin terminal voltage rise and fall speed should be smaller than the change slope of the given triangle wave at the Pin terminal. Therefore, when designing Cint capacitors and Rf feedback resistors, consider the rate of change of the triangular wave given by the Pin terminal. The high frequency component of the SW signal is obtained by the modulation of the high frequency triangular carrier of the noninverting input pin Pin to obtain the gate drive signals of the transistors M1 and M2. The gain of the amplifier is determined by the ratio of the resistors Rf and Ri.

第4圖、第5圖給出了第3圖電路的主要工作波形。 從第5圖中可以清楚地看到本發明採用的開關控制方法。所以通過回饋調變,當輸入音頻信號改變時,此系統會自適應調變SW信號,使得反相輸入端Nin端電壓始終跟隨同相輸入端Pin,從而達到控制輸出的目的。當然開關頻率並非保持絕對恒定,而是在幾百赫茲的範圍內做微小的變化。導致這種微小變化的原因是比較器反相輸入端出現的小的音頻正弦信號,這個信號也會對Cint進行充/放電,導致Nin電壓的變化。但由於這種變化相對於開關頻率來說非常小,所以這種控制方法仍然可以被視為定頻控制。Fig. 4 and Fig. 5 show the main operational waveforms of the circuit of Fig. 3. The switch control method employed by the present invention can be clearly seen from Fig. 5. Therefore, by feedback modulation, when the input audio signal changes, the system will adaptively modulate the SW signal, so that the Nin terminal voltage of the inverting input terminal always follows the non-inverting input terminal Pin, thereby achieving the purpose of controlling the output. Of course, the switching frequency does not remain absolutely constant, but makes small changes in the range of a few hundred hertz. The cause of this small change is the small audio sinusoidal signal present at the inverting input of the comparator, which also charges/discharges Cint, causing a change in the Nin voltage. However, since this change is very small relative to the switching frequency, this control method can still be regarded as fixed frequency control.

第6圖為根據本發明的另一實施例,控制電路的基本結構與第1圖相似,只是第1圖中加在Pin上的三角波被一個通過電阻Rs加在反相輸入端Nin上的、具有1/2Vcc直流偏置的方波所取代。該方波對電容Cint的充/放電效果與直接在比較器的同相輸入端Pin上接三角波相似。而同相輸入端Pin上則直接接1/2Vcc直流偏置。上一實施例中,要求給定三角波的斜率要始終大於反相輸入端Nin端電壓即積分電容Cint上高頻充放電紋波的斜率,三角波對電容Cint的充放電效果也要強於回饋信號SW信號對電容Cint的充放電效果。同樣,要求此實施例中的給定方波對電容Cint的充放電效果也要強於回饋信號SW信號對電容Cint的充放電效果。Figure 6 is a view showing the basic structure of the control circuit similar to that of Figure 1 according to another embodiment of the present invention, except that the triangular wave applied to Pin in Figure 1 is applied to the inverting input terminal Nin via a resistor Rs. Replaced by a square wave with a 1/2Vcc DC offset. The square wave's charge/discharge effect on the capacitor Cint is similar to the triangular wave directly connected to the non-inverting input pin of the comparator. The non-inverting input pin is directly connected to the 1/2Vcc DC offset. In the previous embodiment, the slope of the given triangular wave is always greater than the slope of the Nin terminal of the inverting input terminal, that is, the slope of the high-frequency charging and discharging ripple on the integrating capacitor Cint, and the charging and discharging effect of the triangular wave on the capacitor Cint is stronger than the feedback signal. The charge and discharge effect of the SW signal on the capacitor Cint. Similarly, it is required that the charge and discharge effect of the given square wave on the capacitor Cint in this embodiment is also stronger than the charge and discharge effect of the feedback signal SW signal on the capacitor Cint.

第7圖、第8圖給出了第6圖電路的主要工作波形。請參見第8圖,可以將一個工作週期分為5個階段:第一階段(t0-t1):在t0時刻,方波由高變低,SW 信號和方波信號同時對電容Cint進行放電,Cint上的電壓Vcint持續下降;第二階段(t1-t2):在t1時刻,Vcint<1/2Vcc,比較器輸出翻轉,SW信號由低變高。SW信號對Cint進行充電同時方波繼續對Cint進行放電。由於放電的效果更為強烈,所以Vcint以一個較小的速率下降;第三階段(t2-t3):在t2時刻,方波由低變高,SW信號和方波同時對Cint進行充電,Vcint上升;第四階段(t3-t4):在t3時刻,Vcint>1/2Vcc,比較器輸出再次翻轉,SW信號由高變低,SW信號對Cint進行放電同時方波繼續對Cint進行充電,由於充電的效果更為強烈,所以Vcint以一個較小的速率上升;第五階段(t4-t5):在t4時刻,方波由高變低,SW信號和方波同時對Cint進行放電,Vcint下降。Fig. 7 and Fig. 8 show the main operational waveforms of the circuit of Fig. 6. Referring to Figure 8, a work cycle can be divided into five phases: the first phase (t0-t1): at time t0, the square wave changes from high to low, SW The signal and the square wave signal simultaneously discharge the capacitor Cint, and the voltage Vcint on Cint continues to decrease; the second phase (t1-t2): at time t1, Vcint<1/2Vcc, the comparator output is inverted, and the SW signal is changed from low to high. . The SW signal charges Cint while the square wave continues to discharge Cint. Since the effect of the discharge is more intense, Vcint drops at a smaller rate; the third stage (t2-t3): at time t2, the square wave changes from low to high, and the SW signal and the square wave simultaneously charge Cint, Vcint Rising; fourth stage (t3-t4): At time t3, Vcint>1/2Vcc, the comparator output flips again, the SW signal goes from high to low, the SW signal discharges Cint and the square wave continues to charge Cint, due to The effect of charging is more intense, so Vcint rises at a small rate; the fifth stage (t4-t5): at time t4, the square wave changes from high to low, and the SW signal and the square wave simultaneously discharge Cint, and Vcint drops. .

如上所述,要實現此實例的定頻回饋控制,要求Nin端電壓在第二階段SW信號由低變高時持續下降,在第四階段持續上升。即要求設計回饋電阻Rf、具有1/2Vcc直流偏置的方波電壓V方波 、SW信號Vsw 和電阻Rs時滿足下式: As described above, to achieve the constant frequency feedback control of this example, it is required that the Nin terminal voltage continues to decrease when the second stage SW signal changes from low to high, and continues to rise in the fourth stage. That is, it is required to design the feedback resistor Rf, the square wave voltage V square wave with 1/2Vcc DC offset, the SW signal V sw and the resistance Rs to satisfy the following formula:

也就是,要求此實施例中的給定方波對電容Cint的充放電效果強於回饋信號SW信號對電容Cint的充放電效果。由於方波對電容的充/放電效果要大大強於回饋的SW 信號的充/放電效果,所以雖然有幾百赫茲的變化,總體上SW信號的頻率還是固定的,由方波的頻率決定。That is, it is required that the charge and discharge effect of the given square wave on the capacitor Cint in this embodiment is stronger than the charge and discharge effect of the feedback signal SW signal on the capacitor Cint. Because the square wave has a better charge/discharge effect on the capacitor than the feedback SW The charging/discharging effect of the signal, so although there are several hundred hertz changes, the frequency of the SW signal is generally fixed, determined by the frequency of the square wave.

與上文提到的單端(SE)D類功率放大器相類似的,本發明也可以應用在橋接負載(BTL)的功率放大器中。橋式拓撲的固有差分輸出結構可以消除諧波失真和直流偏置。第9圖是根據本發明的另一實施例,H橋具有兩個半橋開關電路,通常由單電源Vcc供電,對於給定的Vcc,H橋電路的差分方式提供的最大輸出信號幅值是單端方式的兩倍,並且輸出功率是其四倍。這裏只使用一個比較器,其輸出經過驅動電路控制電晶體S1、S2、S3和S4,使S1、S4和S2、S3交替導通,從而得到相位相反的SW1和SW2信號。SW1和SW2又分別經過L1、C1和L2、C2整流濾波送到負載的兩端。在SW1和SW2兩者之間只需回饋其中一個用於回饋控制環即可,第9圖中採用SW2作為回饋控制信號。第10(a)圖給出了第9圖電路的音頻輸入和音頻輸出波形,第10(a)圖是工作波形的局部放大,可以看到將SW2信號反相後就可以得到SW1信號。Similar to the single-ended (SE) class D power amplifier mentioned above, the invention can also be applied to a bridged load (BTL) power amplifier. The inherent differential output structure of the bridge topology eliminates harmonic distortion and DC offset. Figure 9 is a diagram showing another embodiment of the present invention. The H-bridge has two half-bridge switching circuits, typically powered by a single power supply Vcc. For a given Vcc, the differential output mode of the H-bridge circuit provides a maximum output signal amplitude. Double in single-ended mode and four times the output power. Only one comparator is used here, the output of which controls the transistors S1, S2, S3 and S4 via the drive circuit, so that S1, S4 and S2, S3 are alternately turned on, thereby obtaining SW1 and SW2 signals of opposite phases. SW1 and SW2 are respectively sent to the two ends of the load through L1, C1, L2, and C2 rectification filters. It is only necessary to feed back one of the SW1 and SW2 for the feedback control loop. In Fig. 9, SW2 is used as the feedback control signal. Figure 10(a) shows the audio input and audio output waveforms of the circuit of Figure 9. Section 10(a) shows the partial amplification of the operating waveform. It can be seen that the SW1 signal can be obtained by inverting the SW2 signal.

另一種本發明在橋式放大器系統中的實施例如第11圖所示,該實施例中每個半橋都有自己專用的比較器,從而可以獨立控制兩個驅動電路。每個橋臂的開關頻率都由加在節點A的同一個外部三角波設定,所以它們的頻率是一樣的。除了沒有隔直電容(參見第3圖、第6圖中的電容C2)之外,每一個橋臂的控制電路結構和單端放大器一致,增益也可以用Rf/Ri計算得到。輸入的音頻信號是差分信 號,相位相反,分別加在兩個比較器的反相輸入端B1和B2,同時和三角波進行比較。第12(a)圖給出了第11圖電路的音頻輸入和音頻輸出波形,第12(b)圖是工作波形的局部放大。Another embodiment of the present invention in a bridge amplifier system is shown in Fig. 11, in which each half bridge has its own dedicated comparator so that the two drive circuits can be independently controlled. The switching frequency of each bridge arm is set by the same external triangular wave applied to node A, so their frequencies are the same. Except that there is no DC blocking capacitor (see capacitor C2 in Figure 3 and Figure 6), the control circuit structure of each bridge arm is the same as that of the single-ended amplifier, and the gain can also be calculated by Rf/Ri. The input audio signal is a differential signal The numbers are opposite in phase and are applied to the inverting input terminals B1 and B2 of the two comparators, respectively, and compared with the triangular wave. Figure 12(a) shows the audio input and audio output waveforms for the circuit in Figure 11, and Figure 12(b) shows a partial enlargement of the operating waveform.

本領域普通技術人員應知第3圖、第6圖、第9圖以及第11圖中所示的驅動電路可以由閘極驅動電路或其他能夠完成同樣功能的電路來實現。另外,第3圖、第6圖、第9圖以及第11圖中所示的驅動電路的個數僅為示意性的,表示只要驅動電路的數量使得其可以受上述圖中各自的比較器控制,並驅動相應的電晶體即可,並不意圖將驅動電路的個數限制為與上述圖中代表驅動電路的方框的個數相等。Those skilled in the art will appreciate that the drive circuits shown in Figures 3, 6, 9, and 11 can be implemented by a gate drive circuit or other circuit capable of performing the same function. In addition, the number of driving circuits shown in FIGS. 3, 6, 9 and 11 is merely illustrative, indicating that the number of driving circuits is such that they can be controlled by the respective comparators in the above figures. And driving the corresponding transistor, it is not intended to limit the number of driving circuits to be equal to the number of blocks representing the driving circuit in the above figure.

請參見第第13圖,根據本發明的閉環D類功率放大器的控制方法包括以下步驟:第一步驟,接收輸入信號和三角波發生器生成的高頻三角波或矩形波發生器生成的高頻矩形波,並輸出第一信號;第二步驟,響應第一信號而產生第二信號,即SW信號;第三步驟,對SW信號進行濾波得到輸出信號;以及第四步驟,對SW信號進行雜訊整形後得到回饋信號,並且將所述回饋信號負反饋到接收所述輸入信號的輸入端,以便從所述輸入信號減去所述回饋信號。與公知的“AAM”驅動相比,本發明只需要增加一個1/2Vcc的直流偏 置電源和一個合適的三角波或方波。在將這些部分都積體化之後,就能相當簡便地實現對D類功率放大器的閉環定頻控制。Referring to FIG. 13, a control method of a closed-loop class D power amplifier according to the present invention includes the following steps: a first step of receiving an input signal and a high frequency rectangular wave generated by a high frequency triangular wave or rectangular wave generator generated by a triangular wave generator And outputting the first signal; the second step, generating the second signal, that is, the SW signal, in response to the first signal; the third step of filtering the SW signal to obtain an output signal; and the fourth step of performing noise shaping on the SW signal A feedback signal is then obtained and the feedback signal is negatively fed back to the input receiving the input signal to subtract the feedback signal from the input signal. Compared with the well-known "AAM" drive, the present invention only needs to increase a DC bias of 1/2 Vcc. Set the power supply and a suitable triangle or square wave. After these parts are integrated, the closed-loop fixed-frequency control of the class D power amplifier can be realized quite simply.

Ri、Rf‧‧‧電阻Ri, Rf‧‧‧ resistance

Pin‧‧‧同相輸入端Pin‧‧‧ non-inverting input

CINT、CIN、C1‧‧‧電容CINT, CIN, C1‧‧‧ capacitor

Nin‧‧‧反相輸入端Nin‧‧‧ Inverting input

M1、M2‧‧‧電晶體M1, M2‧‧‧ transistor

SW‧‧‧波形SW‧‧‧ waveform

L‧‧‧電感L‧‧‧Inductance

C2‧‧‧隔直電容C2‧‧‧ DC blocking capacitor

Vcc、VDD‧‧‧偏置電壓Vcc, VDD‧‧‧ bias voltage

S1、S2、S3、S4‧‧‧電晶體S1, S2, S3, S4‧‧‧ transistors

第1圖示出公知的“AAM”D類功率放大器驅動電路示意圖。Figure 1 shows a schematic diagram of a known "AAM" Class D power amplifier drive circuit.

第2圖示出公知的“AAM”D類功率放大器的工作波形圖。Figure 2 shows the operating waveforms of a known "AAM" Class D power amplifier.

第3圖示出根據本發明的第一種實施例的運用于單端D類功率放大器的電路示意圖。Figure 3 is a circuit diagram showing the operation of a single-ended class D power amplifier in accordance with a first embodiment of the present invention.

第4圖示出第3圖電路的音頻輸入信號和音頻輸出信號的波形。Fig. 4 is a view showing the waveforms of the audio input signal and the audio output signal of the circuit of Fig. 3.

第5圖示出第3圖電路的SW信號、同相輸入端Pin的信號和反相輸入端Nin的信號的波形。Fig. 5 is a view showing the waveforms of the SW signal of the circuit of Fig. 3, the signal of the non-inverting input terminal Pin, and the signal of the inverting input terminal Nin.

第6圖示出根據本發明的第二種實施例的運用于單端D類功率放大器的電路示意圖。Figure 6 is a circuit diagram showing the operation of a single-ended class D power amplifier in accordance with a second embodiment of the present invention.

第7圖示出第6圖電路的音頻輸入信號和音頻輸出信號的波形。Fig. 7 shows the waveforms of the audio input signal and the audio output signal of the circuit of Fig. 6.

第8圖示出第6圖電路的方波、SW信號、同相輸入端Pin的信號和反相輸入端Nin的信號的波形。Fig. 8 is a view showing the waveforms of the square wave, the SW signal, the signal of the non-inverting input terminal Pin, and the signal of the inverting input terminal Nin of the circuit of Fig. 6.

第9圖示出根據本發明的第三種實施例的運用於橋式D類功率放大器的電路示意圖。Figure 9 is a circuit diagram showing the application of a bridge type D power amplifier in accordance with a third embodiment of the present invention.

第10A圖和第10B圖示出第9圖電路的部分波形。Fig. 10A and Fig. 10B show partial waveforms of the circuit of Fig. 9.

第11圖示出根據本發明的第四種實施例的運用於橋式D類功率放大器的電路示意圖。Figure 11 is a circuit diagram showing the application of a bridge type D power amplifier in accordance with a fourth embodiment of the present invention.

第12A圖和第12B圖示出第11圖電路的部分波形。Fig. 12A and Fig. 12B show partial waveforms of the circuit of Fig. 11.

第13圖為根據本發明的閉環D類功率放大器的控制 方法的流程圖。Figure 13 is a diagram showing the control of a closed-loop Class D power amplifier according to the present invention. Flow chart of the method.

Ri、Rf‧‧‧電阻Ri, Rf‧‧‧ resistance

Pin‧‧‧同相輸入端Pin‧‧‧ non-inverting input

CINT、CIN、C1‧‧‧電容CINT, CIN, C1‧‧‧ capacitor

Nin‧‧‧反相輸入端Nin‧‧‧ Inverting input

M1、M2‧‧‧電晶體M1, M2‧‧‧ transistor

SW‧‧‧波形SW‧‧‧ waveform

L‧‧‧電感L‧‧‧Inductance

C2‧‧‧隔直電容C2‧‧‧ DC blocking capacitor

Vcc、VDD‧‧‧偏置電壓Vcc, VDD‧‧‧ bias voltage

Claims (9)

一種閉環D類功率放大器,包括:輸入級,用以接收輸入信號,所述輸入級包括比較器和三角波發生器或矩形波發生器,所述比較器接收所述輸入信號和所述三角波發生器生成的高頻三角波或所述矩形波發生器生成的高頻矩形波,並輸出第一信號;輸出級,連接到所述輸入級,回應所述第一信號而產生第二信號;濾波器,連接到所述輸出級的輸出節點,用以對所述第二信號進行濾波以便得到輸出信號;以及回饋網路,連接在所述輸出級的輸出節點與所述輸入級的輸入節點之間,所述回饋網路對所述第二信號進行雜訊整形後得到回饋信號,並且將所述回饋信號負反饋到所述輸入級,以便從所述輸入信號減去所述回饋信號;其中所述回饋網路包括一電容,所述電容的第一端同時連接至所述輸入信號、所述比較器的反相輸入端以及所述第二信號,第二端接地或者接直流偏置電壓。 A closed-loop class D power amplifier comprising: an input stage for receiving an input signal, the input stage comprising a comparator and a triangular wave generator or a rectangular wave generator, the comparator receiving the input signal and the triangular wave generator Generating a high frequency triangular wave or a high frequency rectangular wave generated by the rectangular wave generator and outputting a first signal; an output stage connected to the input stage, generating a second signal in response to the first signal; a filter, An output node coupled to the output stage for filtering the second signal to obtain an output signal; and a feedback network coupled between the output node of the output stage and the input node of the input stage, The feedback network performs noise shaping on the second signal to obtain a feedback signal, and negatively feeds the feedback signal to the input stage to subtract the feedback signal from the input signal; The feedback network includes a capacitor, the first end of the capacitor being simultaneously connected to the input signal, the inverting input of the comparator, and the second signal, and the second end Ground or DC bias voltage. 如申請專利範圍第1項所述的功率放大器,其中所述比較器的同相輸入端載入所述高頻三角波,反相輸入端載入所述輸入信號和所述回饋信號,所述比較器通過將所述高頻三角波與所述輸入信號減去所述回饋信號後得到的信號進行比較得到所述第一信號。 The power amplifier of claim 1, wherein the non-inverting input of the comparator loads the high frequency triangular wave, and the inverting input loads the input signal and the feedback signal, the comparator The first signal is obtained by comparing the high frequency triangular wave with a signal obtained by subtracting the feedback signal from the input signal. 如申請專利範圍第1項所述的功率放大器,其中所述比較器的同相輸入端載入直流偏置電壓,反相輸入端載 入所述輸入信號、所述回饋信號和所述高頻矩形波,所述比較器通過將所述直流偏置電壓與所述輸入信號減去所述回饋信號後再疊加所述高頻矩形波後得到的信號進行比較得到所述第一信號。 The power amplifier of claim 1, wherein the non-inverting input of the comparator is loaded with a DC bias voltage, and the inverting input terminal is loaded. Inputting the input signal, the feedback signal, and the high frequency rectangular wave, the comparator superposing the high frequency rectangular wave by subtracting the feedback signal from the DC bias voltage and the input signal The resulting signals are compared to obtain the first signal. 如申請專利範圍第1項所述的功率放大器,其中所述回饋網路還包括連接在所述電容的第一端與所述第二信號之間的回饋電阻。 The power amplifier of claim 1, wherein the feedback network further comprises a feedback resistor coupled between the first end of the capacitor and the second signal. 如申請專利範圍第1項所述的功率放大器,其中所述高頻三角波或所述高頻矩形波比所述第二信號對所述電容的充放電能力大。 The power amplifier according to claim 1, wherein the high frequency triangular wave or the high frequency rectangular wave has a larger charge and discharge capability than the second signal to the capacitor. 如申請專利範圍第1項所述的功率放大器,其中:所述輸入級具有一個所述比較器;所述輸出級包括:驅動電路,連接至所述比較器;一個半橋開關電路,連接至所述驅動電路,根據所述驅動電路產生的驅動信號而交替導通,以對應產生一個所述第二信號。 The power amplifier of claim 1, wherein: the input stage has one of the comparators; the output stage comprises: a driving circuit connected to the comparator; and a half bridge switching circuit connected to The driving circuit is alternately turned on according to a driving signal generated by the driving circuit to correspondingly generate one of the second signals. 如申請專利範圍第1項所述的功率放大器,其中:所述輸入級具有一個所述比較器;所述輸出級包括:驅動電路,連接至所述比較器;兩個半橋開關電路,連接至所述驅動電路,根據所述驅動電路產生的驅動信號而交替導通,以對應產生兩個所述第二信號,並回饋其中的一個第二信號。 The power amplifier of claim 1, wherein: the input stage has one of the comparators; the output stage comprises: a driving circuit connected to the comparator; and two half bridge switching circuits connected To the driving circuit, alternately conducting according to a driving signal generated by the driving circuit to correspondingly generate two of the second signals and feeding back one of the second signals. 如申請專利範圍第1項所述的功率放大器,其中:所述輸入級具有兩個所述比較器;所述輸出級包括:驅動電路,與兩個所述比較器分別連接;兩個半橋開關電路,與所述驅動電路分別連接,根據所述驅動電路產生的驅動信號而交替導通,以產生兩個所述第二信號,並分別回饋至對應的比較器。 The power amplifier of claim 1, wherein: the input stage has two of the comparators; the output stage comprises: a driving circuit, respectively connected to the two comparators; and two half bridges The switching circuit is respectively connected to the driving circuit, and is alternately turned on according to a driving signal generated by the driving circuit to generate two of the second signals, and respectively fed back to the corresponding comparators. 一種閉環D類功率放大器的控制方法,包括以下步驟:第一步驟,接收輸入信號和三角波發生器生成的高頻三角波或矩形波發生器生成的高頻矩形波,並輸出第一信號;第二步驟,響應所述第一信號而產生第二信號;第三步驟,對所述第二信號進行濾波得到輸出信號;以及第四步驟,對所述第二信號進行雜訊整形後得到回饋信號,並且將所述回饋信號負反饋到接收所述輸入信號的輸入端,以便從所述輸入信號減去所述回饋信號,其中所述回饋網路包括一電容,所述電容的第一端同時連接至所述輸入信號、所述比較器的反相輸入端以及所述第二信號,第二端接地或者接直流偏置電壓。 A control method of a closed-loop class D power amplifier includes the following steps: a first step of receiving an input signal and a high-frequency triangular wave generated by a triangular wave generator or a high-frequency rectangular wave generated by a rectangular wave generator, and outputting a first signal; Step: generating a second signal in response to the first signal; a third step of filtering the second signal to obtain an output signal; and a fourth step of performing noise shaping on the second signal to obtain a feedback signal, And negatively feeding back the feedback signal to an input end of the input signal to subtract the feedback signal from the input signal, wherein the feedback network includes a capacitor, and the first end of the capacitor is simultaneously connected To the input signal, the inverting input of the comparator, and the second signal, the second terminal is grounded or connected to a DC bias voltage.
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Citations (4)

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Publication number Priority date Publication date Assignee Title
US6078214A (en) * 1999-03-22 2000-06-20 Texas Instruments Incorporated High efficiency class DB power amplifier
TW557625B (en) * 2001-09-21 2003-10-11 Yamaha Corp Class D amplifier
TW200705798A (en) * 2005-06-10 2007-02-01 Rohm Co Ltd Audio signal amplifying circuit and electronic device using the same
US7332962B2 (en) * 2005-12-27 2008-02-19 Amazion Electronics, Inc. Filterless class D power amplifier

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6078214A (en) * 1999-03-22 2000-06-20 Texas Instruments Incorporated High efficiency class DB power amplifier
TW557625B (en) * 2001-09-21 2003-10-11 Yamaha Corp Class D amplifier
TW200705798A (en) * 2005-06-10 2007-02-01 Rohm Co Ltd Audio signal amplifying circuit and electronic device using the same
US7332962B2 (en) * 2005-12-27 2008-02-19 Amazion Electronics, Inc. Filterless class D power amplifier

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