TWI473438B - Automatic sensing of the drive circuit - Google Patents

Description

Automatic sensing drive circuit

The present invention relates to a driving circuit, and more particularly to a driving circuit for automatic detection.

According to the type of driving method, the liquid crystal display is divided into an active matrix (active matrix) and a passive matrix (passive matrix). The principle of active matrix driving is that each sub-pixel (Pixel) in the liquid crystal display has its own thin film transistor as a control switch, while the passive matrix driving principle uses two columns (Row) and (Column) to produce two kinds of electrodes. To do scan control to change the grayscale value of each sub-pixel. Because the scanning action will affect the pixels in the same row or the same column, the impact quality of this driving method will be poor, and the contrast is relatively poor. Therefore, the passive matrix driving method is not suitable for high-resolution liquid crystal panels. In addition, if it is to be used in high-resolution liquid crystal panels, the active matrix driving method is effective to accurately control the grayscale value of each pixel. .

Active matrix driven liquid crystal displays have been widely used in high resolution applications such as LCD TVs, personal computers or mobile products. An active matrix driven liquid crystal display is composed of an electrode in which a source driver and a gate driver are interleaved. Each of the interlaced points corresponds to one pixel, wherein the interleaved electrodes comprise a lateral electrode and a longitudinal direction. electrode. The lateral electrode is connected to the gate driver and the longitudinal electrode is connected to the source driver. Active matrix The driving method of the driving IC (integrated circuit) of the driven liquid crystal display generally has two methods of a resistive digital analog conversion circuit (R-DAC) and a capacitive digital analog conversion circuit (C-DAC), if a resistive digital analog conversion is used. The circuit approach to achieve high-resolution drive wafers will face the dilemma of excessive ohms and inconsistent head-to-tail gamma voltages. If the driving method of the capacitive digital analog conversion circuit is used, the charging speed is too slow and the random offset of the output stage is affected, so that the output voltage cannot achieve uniform accuracy and the panel chromaticity is uneven. . Based on the above disadvantages, a conventional solution is to add an output stage buffer. However, this architecture has a serious drawback, that is, the output buffer may cause an inconsistent output voltage due to the drift of the complementary metal-oxide semiconductor (Complementary Metal-Oxide Semiconductor) process, thereby causing the disadvantage that the panel chromaticity is not uniform.

Therefore, the present invention proposes a driving circuit capable of achieving a low power consumption, fast driving and output accurate capacitive digital analog conversion circuit architecture to overcome the conventional problems and meet the requirements of today's high resolution panels. The driving circuit of the capacitive digital analog conversion circuit architecture of the present invention comprises four driving sections, the first driving section is a catching offset and a pre-driving, and the second driving section is equal Equalize, the third drive segment is bit switching, and the fourth drive segment is output valid data. Thus, through the four sections designed by the present invention, the output voltage inconsistency and the panel chromaticity unevenness can be solved.

One of the objects of the present invention is to provide a drive circuit for automatic detection. It provides fast charging and high output accuracy drive architecture to achieve high resolution panels demand.

One of the objects of the present invention is to provide a drive circuit for automatic detection. It provides a structure in which the capacitance of the capacitive digital analog conversion circuit can be shared to reduce the area used by the circuit and reduce the cost of the driving circuit.

In order to achieve the above-mentioned fast charging and high output precision driving architecture, the automatic detecting driving circuit of the present invention comprises a conversion circuit, a switching circuit, a compensation circuit and a capacitor. The conversion circuit receives an input signal and converts the input signal to generate a conversion signal. The compensation circuit receives the conversion signal and compensates the conversion signal to generate an output signal. The capacitor is located between the conversion circuit and the compensation circuit, and the switching circuit is coupled to the capacitor. The control capacitor is coupled to the conversion circuit to convert the input signal to generate a conversion signal, or to control the capacitance coupling compensation circuit to compensate for the conversion signal to generate an output signal. The switching circuit couples the capacitor to the conversion circuit, so that the conversion circuit first generates a conversion signal to the capacitor, and then the compensation circuit compensates the conversion signal to generate an output signal according to the signal required by the display. In this way, the present invention firstly generates and transmits the conversion signal to the capacitor to achieve the function of fast charging, and the output signal output by the driving circuit is a high-precision stable signal due to the fast charging function of the driving circuit, that is, the display conforms to the display. High resolution requirements.

Furthermore, in order to reduce the cost of the driving circuit by reducing the area used by the circuit, the switching circuit of the present invention couples the capacitor to the conversion circuit to cause the conversion circuit to generate a switching signal to the capacitor; and then the switching circuit couples the capacitor The compensation circuit generates an output signal by compensating for the conversion signal. In this way, the driving circuit of the present invention is a component shared by the conversion circuit and the compensation circuit via the capacitor, and the same capacitance is used, so that the area used by the circuit can be reduced and the cost of the driving circuit can be reduced.

10‧‧‧Transition circuit

11‧‧‧Transition module

110‧‧‧Switching capacitor

111‧‧‧Switching capacitor

12‧‧‧Switch Module

20‧‧‧ Equalization circuit

21‧‧‧ Equalization buffer

30‧‧‧ Capacitance

40‧‧‧Switching circuit

50‧‧‧Compensation circuit

51‧‧‧Compensation amplifier

A ₁ ‧‧ ‧ switch

‧‧‧switch

A ₂ ‧‧‧ switch

‧‧‧switch

A _n ‧‧‧ switch

‧‧‧switch

EQ‧‧‧ Equalization switch

OUT‧‧‧ output signal

Reset‧‧‧Reset switch

SW ₁ ‧‧‧first switch

SW ₂ ‧‧‧Second switch

SW ₃ ‧‧‧third switch

T ₁ ‧‧‧First Drive Section

T ₂ ‧‧‧second drive section

T ₃ ‧‧‧third drive section

T ₄ ‧‧‧fourth drive section

T ₅ ‧‧‧ fifth drive section

V ₀ ‧‧‧Signal generated by the conversion circuit

V ₁ ‧‧‧Charging signal

V ₂ ‧‧‧ conversion signal

V _H ‧‧‧ input signal

V _L ‧‧‧ input signal

The first figure is a circuit diagram of an embodiment of an automatic detection driving circuit of the present invention; the second figure is a circuit diagram of another embodiment of the automatic detection driving circuit of the present invention; A circuit diagram of a first driving section of a driving circuit for automatically detecting another embodiment; a fourth diagram of a circuit diagram of a first driving section of the present invention; and a fifth diagram of another embodiment of the present invention A circuit diagram of a second driving section of a driving circuit for automatically detecting; a sixth diagram is a timing diagram of a circuit diagram of a second driving section of the present invention; and a seventh diagram of an automatic detection method according to another embodiment of the present invention The circuit diagram of the third driving section of the driving circuit; the eighth diagram is a timing diagram of the circuit diagram of the third driving section of the present invention; and the ninth figure is the fourth of the driving circuit of the automatic detection according to another embodiment of the present invention. A circuit diagram of a driving section; and a tenth diagram is a timing diagram of a fourth driving section circuit diagram of the present invention.

For a better understanding and understanding of the technical features of the present invention and the efficacies achieved, please refer to the preferred embodiment and the detailed description, as explained below: please refer to the first figure, which is A circuit diagram of a drive circuit for automatically detecting the present invention. The present invention is a disadvantage of improving the chromaticity unevenness and resolution of the capacitive digital analog conversion circuit applied to the source driving chip IC of the display.

As shown in the first figure, the circuit architecture of the present invention includes a conversion circuit 10, an equalization circuit 20, a switching circuit 40, a compensation circuit 50, and a capacitor 30. The conversion circuit 10 receives an input signal V _H , V _L and converts the input signals V _H , V _L to generate a conversion signal V ₂ . The compensation circuit 50 receives the conversion signal V ₂ and compensates the conversion signal V ₂ to generate an output signal. OUT, the capacitor 30 is located between the conversion circuit 10 and the compensation circuit 50, the switching circuit 40 is coupled to the capacitor 30, the switching circuit 40 is used to switch the control capacitor 30 coupled to the conversion circuit 10 to convert the input signal to generate the conversion signal V ₂ , or The switching control capacitor 30 is coupled to the compensation circuit 50 to compensate for the switching signal V ₂ to generate the output signal OUT. As described above, the present invention uses the capacitor 30 as the common component between the conversion circuit 10 and the compensation circuit 50 by switching the circuit 40 and the capacitor 30 to reduce the area of the circuit and reduce the cost of the driving circuit.

As described above, the conversion circuit 10 includes at least one conversion module 11, a switch module 12, and a reset switch Reset. One end of the conversion module 11 is coupled to the switch module 12, and the other end of the conversion module 11 is coupled to the reset switch Reset. One end of the reset switch Reset is coupled to the conversion module 11, and the conversion module 11 includes a plurality of conversion capacitors 110. 111, the other end of reset reset switch coupled to the switch module 12 and the input signal V _H; end of the switch module 12 is coupled to the input signal V _H and V _L. In this manner, the conversion circuit 10 can be reset via the switching of the reset switch Reset, and the conversion circuit 10 receives the input signal V _H or V _L via the switch module 12 , and then converts the input signal V _H or V _L with the conversion module 11 . And the output. Therefore, the conversion circuit 10 is configured to receive the input signal V _H or V _L and convert the input signal V _H or V _L to generate a conversion signal V ₂ to conform to the signal required by the display.

The compensation circuit 50 includes a compensation amplifier 51. The compensation amplifier 51 includes a positive input terminal, a negative input terminal and an output terminal. One positive input terminal of the compensation amplifier 51 is coupled to a reference signal V _REF , and one of the negative input terminals of the compensation amplifier 51 is coupled to the capacitor 30 and the third switch. SW ₃ , the output end of the compensation amplifier 51 is coupled to the second switch SW ₂ and the third switch SW ₃ . In this manner, the compensation circuit 50 receives the conversion signal V ₂ according to the switching of the switching circuit 40 and compensates the conversion signal V ₂ , or generates the output signal OUT according to the compensated conversion signal V ₂ and the reference signal V _REF to provide a high-precision display. The voltage makes the panel of the display evenly chromatic.

The capacitor 30 is disposed between the conversion circuit 10 and the compensation circuit 50, and one end of the capacitor 30 is coupled to the output end of the equalization circuit 20 through the switching circuit 40, and the other end of the capacitor 30 is coupled to the input end of the compensation circuit 50 through the switching circuit 40. . In this manner, the capacitor 30 can receive the charging signal V ₁ of the equalizing circuit 20 or the coupling compensation circuit 50 through the switching of the switching circuit 40 to generate the switching signal V ₂ and the output signal OUT, respectively. Therefore, the switching of the capacitor 30 through the switching circuit 40 allows the conversion circuit 10 or the compensation circuit 50 to use the capacitor 30 to reduce the area of the components on the board and thereby reduce the cost of the source driving circuit of the display.

The switching circuit 40 is configured to control the capacitor 30 to be coupled to the conversion circuit 10 to convert the input signal V _H or V _L to generate the conversion signal V ₂ , or the control capacitor 30 is coupled to the compensation circuit 50 to compensate the conversion signal V ₂ to generate an output. Signal OUT. The switching circuit 40 includes a first switch SW ₁ , a second switch SW _{2 ,} and a third switch SW ₃ . One end of the first switch SW ₁ is coupled to the output end of the equalization circuit 20 , the other end of the first switch SW ₁ is coupled to the second switch SW ₂ and the capacitor 30 , and one end of the second switch SW ₂ is coupled to the first switch SW _{1 .} The other end of the second switch SW ₂ is coupled to one end of the third switch SW ₃ and the output end of the compensation circuit 50 , and the other end of the third switch SW ₃ is coupled to the input of the compensation circuit 50 . In this manner, the conduction of the first switch SW ₁ and the third switch SW ₃ of the switching circuit 40 causes the capacitor 30 to be coupled to the output of the conversion circuit 10 to receive the charging signal V ₁ to generate the conversion signal V ₂ ; three switch SW ₃ is turned on so that the output capacitor 30 is coupled to the compensating circuit 50 to generate an output signal OUT; a second switching circuit 40 of the switch SW ₂ is turned out switch SW ₁ and the first and the third switch SW ₃ is turned off, so that The conversion signal V ₂ generated by the capacitor 30 is output to the input terminal of the compensation circuit 50 to generate an output signal OUT. Therefore, the switching circuit 40 is used to reduce the amount of capacitance used to achieve the benefit of saving circuit area and cost.

In addition, the equalization circuit 20 of the present invention is coupled between the conversion circuit 10 and the capacitor 30, and the equalization circuit 20 is used to equalize the signal between the conversion circuit and the capacitor to generate the output signal. The equalization circuit 20 includes an equalization switch EQ and an equalization buffer 21. One end of the equalization switch EQ is coupled to a positive input terminal of the equalization buffer 21 and the conversion module 11 of the conversion circuit 10. The other end of the equalization switch EQ is coupled to the output end of the equalization buffer 21, and the equalization buffer The output of 21 is coupled to a negative input of equalization buffer 21. Thus, the equalization buffer 21 of the equalization circuit 20 generates a charging signal V ₁ as a pre-charge signal according to the output of the conversion circuit 10, and the equalization switch EQ of the equalization circuit 20 equalizes the input of the equalization circuit 20. Signal with the output endpoint. Therefore, the equalization circuit 20 is used as a pre-charge and equalization signal to achieve fast driving and high output voltage accuracy.

Please refer to the second figure, which is a circuit diagram of another embodiment of an automatic detection driving circuit of the present invention. As shown in the figure, the embodiment is different from the embodiment of the first embodiment in that the driving circuit for automatically detecting in this embodiment does not use the equalizing circuit 20. The driving circuit of the embodiment is only used by the switching circuit 40. The switching control capacitor 30 is coupled to the conversion circuit 10 to convert the input signal to generate the conversion signal V ₂ , or the switching control capacitor 30 is coupled to the compensation circuit 50 to compensate the conversion signal V ₂ to generate the output signal OUT, so that the conversion circuit 10 and The compensation circuit 50 can share the capacitor 30 to reduce the area used by the circuit and reduce the cost of the drive circuit. Therefore, the driving circuit of the present invention does not necessarily need to use the equalizing circuit 20 to achieve the above-mentioned effects. If the equalizing circuit 20 is added, it can be used as a pre-charging and equalizing signal to achieve fast driving and high output voltage precision. The effect.

Referring to the first figure, first, the conversion circuit 10 turns on the reset switch Reset to reset the conversion circuit 10, and the switching circuit 40 turns on the first switch SW ₁ and the third switch SW _{3 to} allow the capacitor 30 to be coupled first. The conversion circuit 10 is connected such that the capacitor 30 disposed between the conversion circuit 10 and the compensation circuit 50 receives the signal of the conversion circuit 10 first. After that, the conversion circuit 10 turns off the reset switch Reset and switches the switch of the switch module 12 according to the signal required by the display. In this embodiment, the input signal V _{H of the} high level is received, so the conversion circuit 10 turns on the switch A respectively. ₁ , A ₂ or to A _N to receive the high level input signal V _H . Then, the conversion circuit 10 cooperates with the conversion module 11 to convert and output the high-level input signal V _H to the capacitor 30 to generate the conversion signal V ₂ .

Then, the switching circuit 40 turns off the first switch SW ₁ and the third switch SW _{3 to} make the capacitor 30 coupled to the compensation circuit 50, and turns on the second switch SW ₂ to couple one end of the capacitor 30 to the negative input of the compensation circuit 50. The other end of the capacitor 30 is coupled to the output of the compensation circuit 50. Thus, the compensation circuit 50 is compared with the reference signal V _REF according to the conversion signal V ₂ received by the negative input terminal and the reference signal V _REF fed back by the output of the compensation circuit 50. If the negative terminal of the compensation circuit 50 converts the received signal together with the reference signal V ₂ V _REF when compared to the reference signal V _REF generated extra offset compensation circuit 50 will be compensated for converting the signal V _2, to obtain The output signal OUT required by the display panel. Thus, the present invention can provide a high-accuracy voltage to make the display panel chromaticity uniform. As shown in the second figure, the capacitor 30 is disposed between the conversion circuit 10 and the compensation circuit 50, and can provide the conversion circuit 10 or compensate. The circuit 50 is used to reduce the number of parts of the drive circuit and reduce the cost of the drive circuit. Therefore, the present invention is designed to include a driver circuit with uniform panel chromaticity and reduced cost, and is applied to a source driver circuit of a display panel.

Referring to FIG. 3 to FIG. 8 together, the driving action of the automatic sensing driving circuit is divided into four driving sections, and the four driving sections are respectively capturing frequency (catching offset). And a pre-driving first driving section T ₁ , an equalized second driving section T ₂ , a bit switching third driving section T ₃ , and outputting valid data ( Output valid data) The fifth drive segment T ₅ . A detailed description of the operation of the drive circuit of the four drive sections will be described as follows: Please refer to the third figure and the fourth diagram of the timing chart of the third figure. In the first driving section T ₁ , the first switch SW ₁ , the third switch SW _{3 of the} switching circuit 40 and the reset switch Reset of the switching circuit 10 are in an on state. The conversion circuit 10 is reset and the conversion circuit 10 generates a signal V ₀ to the equalization circuit 20 for the buffer 21 of the equalization circuit 20 to generate the charging signal V ₁ to precharge the capacitor 30. That is, the reset switch Reset of the conversion circuit 10 is turned on to cause the conversion signal V ₁ generated by the conversion circuit 10 to be: V ₁ = V ₀ + Δ V _{OFFSET 1} = V _H + Δ V _{OFFSET 1} ........( 1)

V ₂ = V _REF + Δ V _{OFFSET 2} . . . (2) wherein the conversion signal V ₁ is the signal V ₀ of the conversion circuit 10 plus the compensation value V _{OFFSET1 of the} equalization buffer 21 , and the conversion signal is V ₂ is the reference signal V _REF plus the compensation value V _{OFFSET2 of the} compensation circuit 50. Thus, the buffer 21 of the equalization circuit 20 can obtain the compensation value V _OFFSET1 and generate the charging signal V ₁ by using the compensation value V _OFFSET1 to pre-set the capacitor 30. Charging.

Please refer to the fifth figure and the sixth figure which is the timing chart of the fifth figure. In the second driving section T ₂ , the conversion circuit 10 controls the switch A ₁ , A ₂ or A _{N of the} switch module 12 according to the signal required by the display panel to generate a signal, and the equalization switch EQ of the equalization circuit 20 It is in the conduction state. Thus, the equalizing switch EQ equalizes the signal V ₀ generated by the conversion circuit 10 and the charging signal V ₁ of the capacitor 30. However, since the capacitor 30 is pre-charged in the first driving section T ₁ , in the second driving section isochronous T ₂ of the switch 10 generates a signal conversion circuit EQ equalization charging signal V ₀ and V ₁ of the capacitor 30 will be very fast, therefore, the drive circuit section driving the first drive section T ₁ and T ₂ of the second The action can achieve the effect of fast driving.

Furthermore, please refer to the seventh figure and the eighth figure of the timing chart of the seventh figure. In the third driving section T ₃ , the reset switch Reset and the second switch SW ₂ of the switch module 12 are in an off state, and the first switch SW ₁ and the third switch SW _{3 of the} switch module 12 are turned on, and are converted. The circuit 10 switches the switch module 12 according to the voltage (Vgamma) to receive the input signal V _H or V _L , causes the conversion circuit 10 to convert the input signal V _H or V _L , and the equalized charging signal V ₁ passes through the capacitor. 30 is converted into a conversion signal V ₂ for compensation by the compensation circuit 50, that is, the signal V _{0 of the} conversion circuit 10 is equal to the conversion signal V ₁ equal to the weight voltage (Vgamma).

Also, refer back to FIG Eighth, in order to be able to complete charging signal V ₁ is transmitted to the compensation circuit 50, in order to meet the desired output of the display panel with high accuracy and efficacy of low power voltage output signal OUT, the present invention is designed more The fourth driving section T ₄ causes the second switch SW ₃ to be completely turned off before the second switch SW ₂ turns on the buffer section. As such, when the third switch SW _{3 is} not completely turned off, the second switch SW ₂ is not in an on state, that is, the fourth driving section T ₄ of the present invention can prevent the second switch SW ₂ and the third switch SW _{3 from being} simultaneously Turning on, causing the charging signal V ₁ stored in the capacitor 30 to attenuate or leak.

Please refer to the ninth diagram and the tenth diagram of the timing diagram of the ninth diagram. In the fifth driving section T ₅ , the first switch SW ₁ , the third switch SW _{3 ,} and the equalizing switch EQ of the switching circuit 40 are in an off state, and the second switch SW ₂ is in an on state. Thus, the capacitor 30 is coupled to the compensation circuit 50 and outputs the conversion signal V ₂ to the negative input terminal of the compensation circuit 50 for the compensation circuit 50 to generate the compensated output signal OUT, that is, the signal V ₀ of the conversion circuit 10 is equal to the conversion. The signal V ₁ is equal to the output voltage OUT (Vgamma) equal to the output signal OUT, and meets the high precision voltage and low power consumption required by the display panel. Therefore, when the driving circuit of the present invention is in the first driving section T ₁ and the fifth driving section T ₅ , the switching of the switch of the switching circuit 40 can change the coupling of the capacitor 30 to the conversion circuit 10 or the compensation circuit 50 to reduce The amount of capacitive components and the area consumed by the circuit, which in turn reduces the cost of the drive circuit. In addition, the capacitor 30 can be pre-charged and equalized between the conversion circuit 10 and the capacitor 30 by the operation of the conversion circuit 10, the equalization switch EQ, the buffer 21, and the switching circuit 40, so as to achieve the effect of fast driving. Reduce the power consumption of the drive circuit. Furthermore, the above-described embodiments are illustrative of the invention and are not intended to limit the type of circuit architecture or electronic component to which the present invention is applied.

In summary, the automatic detection driving circuit of the present invention includes a conversion circuit 10, an equalization circuit 20, a capacitor 30, a switching circuit 40, and a compensation circuit 50. The conversion circuit 10 is configured to generate a conversion signal according to a signal required by the panel of the display to output to the panel of the display; the equalization circuit 20 is used to pre-charge the capacitor 30 and the signal between the equalization capacitor 30 and the conversion circuit 10, In order to achieve fast driving and reduce the effect of power consumption; the capacitor 30 is used for the conversion circuit 10 to generate the conversion signal V ₂ and the compensation circuit 50 to compensate the conversion signal V ₂ to reduce the area used by the circuit and reduce the cost of the driving circuit; The 50 series is used to compensate the capacitance conversion signal V ₂ according to the reference signal V _REF to generate a highly accurate output signal OUT to maintain the uniformity of the panel chromaticity. Therefore, the automatic detection driving circuit of the present invention is a driving architecture capable of providing fast charging and high precision output to meet the requirements of today's high resolution panels.

Therefore, the present invention is a novelty, progressive and available for industrial use. It should be in accordance with the patent application requirements of the patent law of China. Undoubtedly, the invention patent application is filed according to law, and the prayer bureau will grant the patent as soon as possible.

However, the above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, so that the shapes, structures, features, and spirits described in the claims of the present invention are equally changed. Modifications are intended to be included in the scope of the patent application of the present invention.

10‧‧‧Transition circuit

11‧‧‧Transition module

110‧‧‧Switching capacitor

111‧‧‧Switching capacitor

12‧‧‧Switch Module

20‧‧‧ Equalization circuit

21‧‧‧ Equalization buffer

30‧‧‧ Capacitance

40‧‧‧Switching circuit

50‧‧‧Compensation circuit

51‧‧‧Compensation amplifier

A ₁ ‧‧ ‧ switch

‧‧‧switch

A ₂ ‧‧‧ switch

‧‧‧switch

A _n ‧‧‧ switch

‧‧‧switch

EQ‧‧‧ Equalization switch

OUT‧‧‧ output signal

Reset‧‧‧Reset switch

SW ₁ ‧‧‧first switch

SW ₂ ‧‧‧Second switch

SW ₃ ‧‧‧third switch

V ₀ ‧‧‧Signal generated by the conversion circuit

V ₁ ‧‧‧Charging signal

V ₂ ‧‧‧ conversion signal

V _H ‧‧‧ input signal

V _L ‧‧‧ input signal

Claims (6)

An automatic sensing driving circuit includes: a conversion circuit that receives an input signal and converts the input signal to generate a conversion signal; a compensation circuit that receives the conversion signal and compensates the conversion signal to generate an output signal a capacitor is disposed between the conversion circuit and the compensation circuit; an equalization circuit is coupled between the conversion circuit and the capacitor, and equalizes a signal between the conversion circuit and the capacitor to generate the output And a switching circuit coupled to the capacitor and controlling the capacitor to be coupled to the converter circuit for converting the input signal to generate the conversion signal, or controlling the capacitor to be coupled to the compensation circuit to compensate for the conversion signal The output signal includes: a buffer coupled between the conversion circuit and the capacitor, and generating a charging signal to the capacitor to pre-charge the capacitor; and a equalization switch, coupling Connected between the conversion circuit and the switching circuit, and connected in parallel to the buffer, when the equalization switch is turned on, equalize the signal between the conversion circuit and the capacitor, When the equalizing switch is turned off, the capacitor precharge the buffer. The driving circuit of the automatic sensing method of claim 1, wherein the converting circuit further comprises: at least one switching capacitor coupled to the switching circuit to generate the switching signal; The at least one switch module is coupled to the conversion capacitor and transmits the input signal of different levels to the conversion capacitor to generate the conversion signal. The automatic sensing driving circuit of claim 1, wherein the conversion circuit comprises: a reset switch coupled to the switching circuit and the conversion capacitor, and resetting the conversion circuit. The automatic sensing driving circuit of claim 1, wherein the compensation circuit comprises: a compensation amplifier coupled to the capacitor and the switching circuit, and generating the output signal according to the conversion signal and a reference signal. The driving circuit of the automatic sensing method of claim 1, wherein the switching circuit comprises: a first switch coupled between the capacitor and the conversion circuit; and a second switch coupled to the one end a first switch is coupled to the capacitor, and the other end of the second switch is coupled to the compensation circuit; and a third switch is coupled to the capacitor at one end thereof, and the other end of the third switch is coupled to the compensation circuit and the second switch . The driving circuit of the automatic sensing method of claim 5, wherein when the first switch and the third switch are turned on, the converting circuit converts the input signal to the switching signal; when the second switch is turned on, the The compensation circuit compensates the conversion signal to generate the output signal.