TWI456725B - Semiconductor device with a plurality of mark through substrate vias - Google Patents

Claims (10)

A semiconductor device having a labeled via, comprising: a semiconductor substrate having a front side and a back side; a plurality of original conducting pillars located in the semiconductor substrate, wherein the original conducting pillars comprise a plurality of first original conducting pillars and a plurality a second original conducting pillar, the first original conducting pillars are arranged in a first array, the second original conducting pillars are arranged in a second array, and the distance between two adjacent first original conducting pillars is defined as a a first pitch, a distance between two adjacent second conductive vias is defined as a second pitch; and a plurality of mark vias are located in the semiconductor substrate and are exposed on the back surface, wherein the mark conductive pillars comprise a plurality of a first labeled conductive column and a plurality of second labeled conductive posts, the first labeled conductive pillars are arranged in a first group, and the second labeled conductive pillars are arranged in a second group, the first group is Located at a position close to the first array, the second group is located near the second array, and the distance between two adjacent first labeled conductive columns is defined as a third spacing The distance between the first original conducting pillar and the first marking conducting pillar closest to the first marking conducting pillars is defined as a fourth spacing, and the distance between two adjacent second marking conducting pillars is defined as a first The fifth spacing, the distance between the second original conducting post and the second marking conducting post closest to the second marking conducting posts is defined as a sixth spacing, wherein the third spacing is not equal to the fourth spacing, The third pitch and the fourth pitch are not divisible by the first pitch, and the fifth pitch is not equal to the sixth pitch, and the fifth pitch and the sixth pitch are not divisible by the second pitch. The semiconductor device of claim 1, wherein the semiconductor device is a semiconductor wafer or a semiconductor wafer. The semiconductor device of claim 1, wherein the original conductive pillars are electrically conductive, and the labeled conductive pillars are non-functional. The semiconductor device of claim 1, wherein the original conductive pillars and the labeled conductive pillars are electrically conductive. The semiconductor device of claim 1, wherein the first group is located near a corner of the first array. The semiconductor device of claim 1, wherein the first mark conductive pillars are arranged in at least one first mark row, the first original conductive pillars are arranged in at least one first original column, and the first mark column and The first original column is in the same column. The semiconductor device of claim 1, wherein the first mark conducting pillars are arranged in at least one first marking row, the first original conducting pillars are arranged in at least one first original row, and the first marking row and The first original line is on the same line. A semiconductor device having a labeled via, comprising: a semiconductor substrate having a front side and a back side; a plurality of original conducting pillars located in the semiconductor substrate, wherein the original conducting pillars are arranged in a plurality of original arrays, each The original array has an original pattern; and a plurality of mark conductive pillars are disposed in the semiconductor substrate and exposed on the back surface, wherein the mark conductive pillars comprise a plurality of first mark conductive pillars and a plurality of second mark conductive pillars, The first labeled conductive pillars are arranged in a first pattern to form a first group, and the second labeled conductive pillars are arranged in a second pattern to form a second group, the first group is located in the first group a first corner of the back surface, the second group is located at a second corner of the back surface, the first corner is opposite to the second corner, and the first pattern and the second pattern are different from the original pattern . The semiconductor device of claim 8, wherein the original conductive pillars are electrically conductive, and the labeled conductive pillars are non-functional. The semiconductor device of claim 8, wherein the first pattern is a cross-shaped pattern or an L-shaped pattern.