TWI439702B - Current sensing circuit - Google Patents

Description

Current sensing circuit

This invention relates to a sensing circuit and, more particularly, to a current sensing circuit.

In order to save power consumption of the display or to present better image quality, ambient light sensors are widely used in electronic devices such as mobile phones, handheld devices, and image displays. The vast majority of ambient light sensors use a photodiode architecture that requires a voltage source action. The light sensor generates different currents according to different sensing light intensities, and then provides a digital reading result by its internal current sensing circuit.

The range of sensing for ambient light sensor applications is quite large, from several lux to tens of thousands of Lux. In general, the current sensing circuit of the ambient light sensor requires an analog digital converter of more than 16 bits to meet its needs. However, in practical applications, although the ambient light sensor has a wide sensing range, the precision required for the current sensing circuit varies depending on the intensity of the sensed light source. For example, when the light source is dark (below 1000 lux), the ambient light sensor requires an accuracy of about 1 Lux, which corresponds to a higher accuracy of the current sensing circuit; when the light source is brighter (10000 Lux Above), the accuracy required for the ambient light sensor is about 20~30 Lux, and the accuracy of the corresponding current sensing circuit is low.

Therefore, it is necessary to provide a current sensing circuit with different accuracy depending on different current sensing ranges.

The present invention provides a current sensing circuit that provides different accuracy depending on different current sensing ranges.

The invention provides a current sensing circuit comprising a current sensing unit, a feedback control unit and a digital output unit. The current sensing unit senses a current and generates a pulse signal according to the at least one reference signal and the at least one feedback signal. The current sensing unit includes a first capacitor group and a second capacitor group. The current sensing unit selects at least one capacitor in the first capacitor group and at least one capacitor in the second capacitor group according to the magnitude of the current to adjust the accuracy of the current sensing circuit. The feedback control unit is coupled to the current sensing unit and generates at least one feedback signal according to a clock signal and a pulse signal. The digital output unit is coupled to the current sensing unit and outputs a digital signal according to the pulse signal.

In an embodiment of the invention, the current sensing unit includes a sensing unit and a comparing unit. The sensing unit senses the current, and generates a sensing voltage according to a first reference signal and at least one feedback signal. The sensing unit includes a first capacitor group and a second capacitor group. The comparison unit is coupled to the sensing unit and compares the sensing voltage with a level of a second reference signal to output a pulse signal.

In an embodiment of the invention, the sensing unit further includes an operational amplifier. The operational amplifier includes a first end, a second end, and an output. The current flows out of the first end according to a first feedback signal, the second end is coupled to the first reference signal, and the output end outputs the sensing voltage.

In an embodiment of the invention, the first capacitor group includes a first end and a second end. The first end of the first capacitor group is coupled to the output end of the operational amplifier, and the second end of the first capacitor group is coupled to the first end of the operational amplifier.

In an embodiment of the invention, the first capacitor group includes a plurality of capacitors. The capacitor is coupled in parallel between the first end of the first capacitor group and the second end of the first capacitor group.

In an embodiment of the invention, the second capacitor group includes a first end and a second end. The first end of the second capacitor group is coupled to the first reference signal or a first voltage according to a second feedback signal and a third feedback signal. The second end of the second capacitor group is coupled to the first end of the operational amplifier or a second voltage according to the second feedback signal and the third feedback signal.

In an embodiment of the invention, the second capacitor group includes a plurality of capacitors. The capacitor is coupled in parallel between the first end of the second capacitor group and the second end of the second capacitor group.

In an embodiment of the invention, the current sensing unit selects one of the first capacitor group and the second capacitor of the second capacitor group. One end of the first capacitor is coupled to the output of the operational amplifier. The other end of the first capacitor is coupled to the first end of the operational amplifier. One end of the second capacitor is coupled to the first reference signal or a first voltage according to a second feedback signal and a third feedback signal. The other end of the second capacitor is coupled to the first end of the operational amplifier or a second voltage according to the second feedback signal and the third feedback signal.

In an embodiment of the invention, the comparing unit comprises a comparator. The comparator includes a first end, a second end, and an output. The first end of the comparator is coupled to a second reference signal, and the second end of the comparator is coupled to the output of the operational amplifier to receive the sensing voltage. The comparator compares the sense voltage with the second reference signal to output a pulse signal at the output of the comparator.

In an embodiment of the invention, the feedback control unit includes a first inverter, a gate, and a second inverter. The first inverter is coupled to the current sensing unit and inverts the pulse signal to generate a first feedback signal. The gate includes a first end, a second end, and an output end. The first end of the gate is coupled to the current sensing unit to receive the pulse signal, and the second end of the gate receives the clock signal. The gate outputs a second feedback signal at the output of the gate according to the pulse signal and the clock signal. The second inverter is coupled to the gate and inverts the second feedback signal to generate a third feedback signal.

In an embodiment of the invention, the digital output unit includes an N-bit counter. The N-bit counter is coupled to the current sensing unit. The N-bit counter counts the number of pulses of the pulse signal for a predetermined time interval to output a digital signal, wherein the number of pulses is positively correlated with the magnitude of the current.

In an embodiment of the invention, the current sensing circuit further includes a controller. The controller is coupled to the digital output unit, and selects at least one capacitor in the first capacitor group and at least one capacitor in the second capacitor group according to the digital signal to adjust the accuracy of the current sensing circuit.

In an embodiment of the invention, the controller adjusts the magnitude of the second voltage according to the digital signal to adjust the accuracy of the current sensing circuit.

In an embodiment of the invention, the current sensing circuit further includes a photodiode. The photodiode is coupled to the current sensing unit and is adapted to sense a light source to generate a current.

The above described features and advantages of the present invention will be more apparent from the following description.

In an exemplary embodiment of the present invention, the current sensing circuit is adapted to an ambient light sensor that provides different degrees of accuracy depending on different current sensing ranges, but the invention is not limited thereto. In addition, the current sensing circuit can provide a photodiode voltage power supply, and can directly output the sensed current value in digital form, without using a conventional analog analog digital converter. Therefore, the electronic device using the ambient light sensor can read its digital value to understand the condition of the ambient light, thereby controlling its system to achieve a low power consumption, high performance green energy display.

1 is a schematic diagram of a current sensing circuit in accordance with an embodiment of the present invention. 2 is a partial schematic view of a current sensing circuit in accordance with an embodiment of the present invention. Referring to FIG. 1 and FIG. 2 , in the embodiment, the current sensing circuit 100 includes a current sensing unit 110 , a feedback control unit 120 , a digital output unit 130 , and a photodiode PD .

The current sensing unit 110 senses the current Is generated by the photodiode PD due to ambient light, and generates a pulse signal Sp according to the reference signals Vref, Vr1 and the feedback signals Sp_B, Sw1, Sw2. In this embodiment, the current sensing unit 110 includes a first capacitor group Ci and a second capacitor group Cc. Here, the first capacitor group Ci includes a plurality of capacitors Ci1, Ci2, . . . , Cin coupled in parallel, and the second capacitor group Cc includes a plurality of capacitors Cc1, Cc2, . . . , Ccn coupled in parallel. as shown in picture 2. The current sensing unit 110 selects at least one of the first capacitor group Ci and at least one of the second capacitor group Cc according to the magnitude of the current Is to adjust the accuracy of the current sensing circuit. In other words, in the present embodiment, the current sensing circuit 100 can provide different accuracy depending on different current sensing ranges.

The feedback control unit 120 is coupled to the current sensing unit 110 and generates feedback signals Sp_B, Sw1, and Sw2 according to a clock signal CLK and a pulse signal Sp. The digital output unit 130 is coupled to the current sensing unit 110 and outputs a digital signal Sd according to the pulse signal Sp. In other words, in the present embodiment, the current sensing circuit 100 can directly convert the current Is into the digital signal Sd without using a conventional analog analog digital converter.

Specifically, the current sensing unit 110 includes a sensing unit 112 and a comparing unit 114. The sensing unit 112 senses the current Is, and generates a sensing voltage Vx according to the first reference signal Vref and the feedback signals Sp_B, Sw1, Sw2. The comparison unit 114 is coupled to the sensing unit 112 and compares the levels of the sensing voltage Vx and the second reference signal Vr1 to output the pulse signal Sp.

In this embodiment, the sensing unit 112 includes an operational amplifier OP, a first capacitor group Ci, and a second capacitor group Cc. The current Is flows from the node A to the photodiode PD according to the first feedback signal Sp_B, wherein the node A is coupled to the opposite end (ie, the first end) of the operational amplifier OP. The non-inverting terminal (ie, the second end) of the operational amplifier OP is coupled to the first reference signal Vref. The output terminal of the operational amplifier OP outputs a sensing voltage Vx. Here, a switch T1 is disposed on the path through which the current Is flows, and the conduction state of the switch T1 is controlled by the first feedback signal Sp_B. The cathode of the photodiode PD is coupled to the node A, and the anode of the photodiode PD is coupled to a first voltage VSSA. When the switch T1 is turned on, the voltage of the node A is equal to the first reference signal Vref by the virtual short circuit principle of the operational amplifier, so the first reference signal Vref is used as the voltage source of the photodiode PD.

The first capacitor group Ci includes a first end and a second end. The first end of the first capacitor group Ci is coupled to the output end of the operational amplifier OP, and the second end of the first capacitor group Ci is coupled to the opposite end of the operational amplifier OP (ie, node A). The second capacitor group Cc includes a first end and a second end. The first end of the second capacitor group Cc is coupled to the first reference signal Vref or the first voltage VSSA according to the second feedback signal Sw1 and the third feedback signal Sw2. The second end of the second capacitor group Cc is coupled to the inverting terminal of the operational amplifier OP or a second voltage Vx1 according to the second feedback signal Sw1 and the third feedback signal Sw2. Here, the circuits of the second capacitor group Cc, the switches T2a, T2b, T3a, T3b and their corresponding feedback signals Sw1, Sw2 are configured as a standard type switching capacitor, which forms an equivalent positive resistance. Therefore, the sensing unit 112 functions as an integrator.

In the present embodiment, the comparison unit 114 includes a comparator comp. The opposite end (ie, the first end) of the comparator comp is coupled to the second reference signal Vr1. The non-inverting terminal (ie, the second terminal) of the comparator comp is coupled to the output of the operational amplifier OP to receive the sensing voltage Vx. The comparator comp compares the sensing voltage Vx and the second reference signal Vr1 to output a pulse signal Sp at its output.

In this embodiment, the feedback control unit 120 includes a first inverter 122, a gate 124, and a second inverter 126. The first inverter 122 is coupled to the current sensing unit 110 to invert the pulse signal Sp to generate a first feedback signal Sp_B. The input terminal (ie, the first end) of one of the gates 124 is coupled to the current sensing unit 110 to receive the pulse signal Sp. The other input (ie, the second end) of the AND gate 124 receives the clock signal CLK. The gate 124 outputs a second feedback signal Sw1 at its output according to the pulse signal Sp and the clock signal CLK. The second inverter 126 is coupled to the gate 124 to invert the second feedback signal Sw1 to generate a third feedback signal Sw2.

In the present embodiment, the digital output unit 130 includes an N-bit counter 132. The N-bit counter 132 is coupled to the current sensing unit 110. The N-bit counter counts the number of pulses of the pulse signal Sp for a predetermined time interval to output the digital signal Sd. Here, the number of pulses of the pulse signal Sp is positively correlated with the magnitude of the current Is. In other words, the more the number of pulses of the N-bit counter counting the pulse signal Sp in the predetermined time interval, that is, the greater the current value Is sensed by the current sensing unit 110.

In detail, FIG. 3 is a schematic diagram of the current sensing circuit of FIG. 1. FIG. 4 is a diagram showing signal waveforms of the sensing voltage and the pulse signal, respectively. Referring to FIG. 3 and FIG. 4 , in the embodiment, the current sensing unit 110 selects, for example, the capacitance Cij (ie, the first capacitance) in the first capacitor group Ci and the second capacitor group Cc according to the magnitude of the current Is. The capacitor Ccj (ie, the second capacitor) is used to adjust the accuracy of the current sensing circuit 100. The one end of the capacitor Cij is coupled to the output end of the operational amplifier OP, and the other end of the capacitor Cij is coupled to the opposite end of the operational amplifier. One end of the capacitor Ccj is coupled to the first reference signal Vref or the first voltage VSSA according to the feedback signals Sw1 and Sw2. The other end of the capacitor Ccj is coupled to the inverting terminal of the operational amplifier OP or the second voltage Vx1 according to the feedback signals Sw1 and Sw2.

Using the virtual short circuit principle of the operational amplifier, the voltage of node A is equal to the first reference signal Vref. When the switch T1 is turned on, the first reference signal Vref can be used as the voltage source of the photodiode PD, so that the photodiode PD can sense the ambient light source to generate a current Is, wherein the magnitude of the current Is is proportional to the intensity of the light source, that is, The stronger the intensity of the light source, the larger the current Is.

In the present embodiment, the current Is is provided by the sensing voltage Vx output from the operational amplifier OP. According to the charge principle, the current Is=dQ/dt, and the voltage difference V=Q×Cij across the capacitor Cij, it can be inferred that the rising slope of the sensing voltage Vx is dVx/dt=Is/Ci. When the sensing voltage Vx is greater than the second reference signal Vr1, the comparator comp outputs the pulse signal Sp of the high level Hi. Therefore, the N-bit counter 132 is incremented by one.

On the other hand, since the pulse signal Sp output by the comparator comp is at the high level Hi, the first feedback signal Sp_B turns off the switch T1, and cuts off the voltage source supplied to the photodiode PD, that is, the first reference signal. Vref. At the same time, the charging and discharging mechanism of the capacitor Ccj is also activated to enter the charging state. That is, when the pulse signal CLK is at a high level and the pulse signal Sp is at a high level, the feedback signals Sw1 and Sw2 are respectively at a high level and a low level, thereby making the switches T2a and T2b conductive, and the switch T3a, T3b is in a closed state, so the capacitor Ccj is charged, and its charging voltage is the second voltage Vx1.

Further, first, the switches T2a and T2b are driven by the clock signal CLK being at the high level Hi, and are turned on, so the second voltage Vx1 is stored in the capacitor Ccj. Thereafter, when the switches T3a, T3b are turned on, the switches T2a, T2b are turned off, and the charge stored in the capacitor Ccj is released, causing the sensing voltage Vx to drop, and the voltage difference before and after the falling is Vdif = Vx1 × Ccj / Cij . Then, after the sense voltage Vx falls, the comparator comp resumes the pulse signal Sp outputting the low level Lo, and the first reference signal Vref is restored to be supplied to the photodiode PD as a voltage source. Therefore, the current Is will continue to increase the sensing voltage Vx until the sensing voltage Vx is greater than the second reference signal Vr1, again starting the charging and discharging mechanism of the capacitor Ccj. At this time, the N-bit counter 132 is incremented by one.

Therefore, after operating for a predetermined time interval, the N-bit counter 132 outputs the value it counts, which represents the magnitude of the current Is. Since the rising slope dVx/dt of the sensing voltage Vx is Is/Ci, when the voltage difference Vdif is fixed, the larger the slope, the more the comparator comp starts, the larger the digital output of the N-bit counter 132 is. This represents the magnitude of the current Is.

FIG. 5 is a block diagram showing the current sensing circuit of FIG. 1. Referring to FIG. 5, in the embodiment, the current sensing circuit 100 further includes a controller 140. The controller 140 is coupled to the digital output unit 130, and selects at least one capacitor (first capacitor) of the first capacitor group Ci and at least one capacitor (second capacitor) of the second capacitor group Cc according to the digital signal Sd, and adjusts the second The voltage Vx1 is sized to adjust the accuracy of the current sensing circuit 100.

In general, if the first capacitor, the second capacitor, and the second voltage of the current sensing circuit cannot be adjusted, the analog circuit of FIG. 1 is used to achieve high resolution, and the analog digital conversion time is long. For example, if a 10-bit resolution digital signal is required, the clock signal of the current sensing circuit needs to be at least 1024 clocks (1024 CLK). As such, the use of current sensing circuits will be limited in applications where current speed changes.

On the other hand, if the conversion time is fixed, that is, the resolution is fixed, the maximum detectable current of the current sensing circuit can be determined by the first capacitor, the second capacitor, and the second voltage. That is, under the circuit architecture of FIG. 1, the maximum sensible current Is of the current sensing circuit 100 is proportional to the first capacitance Cij, the second capacitance Ccj, and the second voltage Vx1.

Therefore, in order to improve the analog-to-digital conversion speed and achieve a wider sensing range, the current sensing circuit of the embodiment selects different first capacitors Cij, second capacitors Ccj, and second voltages Vx1 according to different currents. The range partition block sensing of the required measurement is as shown in FIG. 6. FIG. 6 is a schematic diagram showing the range partition block sensing of the required measurement by the current sensing circuit. In FIG. 6, the current sensing circuit 100 divides the range of the required measurement into 2 ⁿ ranges, that is, 0~Ismax, 0~2×Ismax, 0~4×Ismax, ..., 0~2 ^{n- 2} × Ismax, 0~2 ^n-1 × Ismax, and the maximum sensed value of each range is doubled, that is, 2 × Ismax is twice that of Ismax, and 4 × Ismax is twice that of 2 × Ismax. . 2 ^n-1 × Ismax is twice the value of 2 ^n-2 × Ismax. In this embodiment, the resolution of each sensing range is N bits, so the sensing range of the current sensing circuit as a whole can reach (n+N) bits.

On the other hand, since the resolution of each sensing range is N bits, the larger the sensing range, the lower the accuracy. For example, when the sensing range is 0~Ismax, the accuracy is Ismax/2 ^N ; when the sensing range is 0~2×Ismax, the accuracy is Ismax/2 ^N-1 ; the sensing range is 0~ When 4×Ismax, the accuracy is Ismax/2 ^N-2 ; when the sensing range is 0~2 ^n-2 ×Ismax, the accuracy is Ismax/2 ^N-n+2 ; the sensing range is 0~2 ^{When n-1} × Ismax, the accuracy is Ismax/2 ^N-n+1 . In other words, the larger the sensing range of the current sensing circuit, the lower the accuracy. Conversely, accuracy is highest in the smallest range. Therefore, the accuracy of the current sensing circuit is inversely proportional to the larger the sensing range. For best accuracy, the minimum sensing range is required for measurement and its measurement must be less than the maximum of this sensing range.

In the following exemplary embodiment, an operation mode of the current sensing circuit will be exemplified, and a suitable sensing range can be quickly selected to obtain better accuracy.

7 is a flow chart of a method of operating a circuit in accordance with an embodiment of the present invention. FIG. 8 is a schematic diagram showing the current to be measured Im and the digital output of the current sensing circuit according to the circuit operation method of FIG. 7. Referring to FIG. 5, FIG. 7 and FIG. 8, in the embodiment, in step S700, the current sensing circuit 100 is initially set to a maximum first sensing range R1 to sense the current to be measured Im. And then obtain the digital output OutputA of the signal Sd. Next, the digital output OutputB is converted from the digital output OutputA to a closest second range R2, as by step S701.

Thereafter, in step S702, it is determined that the digital output OutputB is larger or smaller than half of the digital value of the second range R2. If the digital output OutputB is greater than half of the digital value, the current sensing circuit 100 is set to a third range R3 that is greater than the second range R2, and the corresponding digital output OutputC is obtained, as by step S703. On the other hand, if the digital output OutputB is less than half of the digital value, the current sensing circuit 100 is set to a fourth range R4 (not shown) that is smaller than the second range R2, as by step S704. Thereby, the current sensing circuit 100 can obtain a digital output OutputC. As shown in FIG. 8, the coefficient bit output OutputB is larger than half of the digital value of the second range R2.

Next, in step S705, it is judged that the digital output OutputC is larger or smaller than half of the digital value of the third range R3 or the fourth range R4. If the digital output OutputC is greater than half of the digital value, the current sensing circuit 100 is set to a fifth range R5 (not shown) that is greater than the third range R3 or the fourth range R4, as by step S706. On the contrary, if the digital output OutputC is less than half of the digital value, the current sensing circuit 100 is set to a sixth range R6 that is smaller than the third range R3 or the fourth range R4, and the corresponding digital output OutputD is obtained, as steps S707. Thereby, the current sensing circuit 100 can obtain a digital output OutputD. As shown in FIG. 8, the coefficient bit output OutputC is smaller than half of the digital value of the third range R3.

Finally, in step S708, it is determined whether the digital output OutputB and OutputD are within a certain error range. If yes, the digital output OutputD is output, as in step S709; if not, the process returns to step S700.

According to the above manner, the current sensing circuit 100 can obtain the digital output of the signal Sd at the fastest after four data conversion times. It is assumed that a 16-bit resolution current digital converter requires at least 65535 clocks (65535 CLK) in a manner that does not distinguish the current sensing range to obtain the same digital output as in this embodiment. Conversely, if the current sensing circuit 100 of the embodiment is implemented by using 10-bit resolution and distinguishing 64 current sensing ranges, the current sensing circuit 100 can be at 1024×4=4096 clocks (4096CLK). The data conversion is completed, and the conversion time is greatly reduced, and the current conversion with faster frequency change can be applied.

In summary, in an exemplary embodiment of the present invention, the current sensing circuit can provide different precision according to different current sensing ranges, thereby controlling the system to achieve low power consumption and high performance green energy display.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

100. . . Current sensing circuit

110. . . Current sensing unit

112. . . Sensing unit

114. . . Comparison unit

120. . . Feedback control unit

122. . . First inverter

124. . . Gate

126. . . Second inverter

130. . . Digital output unit

132. . . N-bit counter

140. . . Controller

Ci. . . First capacitor group

Cc. . . Second capacitor group

Cij. . . First capacitor

Ccj. . . Second capacitor

Ci1, Ci2, Cin, Cc1, Cc2, Ccn. . . capacitance

PD. . . Photosensitive diode

A. . . node

CLK. . . Clock signal

Vref. . . First reference signal

Vr1. . . Second reference signal

Sp_B. . . First feedback signal

Sw1. . . Second feedback signal

Sw2. . . Third feedback signal

Vx. . . Sense voltage

Sp. . . Pulse signal

Sd. . . Digital signal

T1, T2a, T2b, T3a, T3b‧‧‧ switch

Is‧‧‧ Current

Im‧‧‧current to be measured

OP‧‧‧Operational Amplifier

Comp‧‧‧ comparator

VSSA‧‧‧First voltage

Vx1‧‧‧second voltage

Vdif‧‧‧voltage difference

Lo‧‧‧low level

Hi‧‧‧ high level

OutputA, OutputB, OutputC, OutputD‧‧‧ digital output

R1~R6‧‧‧Sensing range

S700~S709‧‧‧ steps of circuit operation method

1 is a schematic diagram of a current sensing circuit in accordance with an embodiment of the present invention.

2 is a partial schematic view of a current sensing circuit in accordance with an embodiment of the present invention.

3 is a schematic diagram of the current sensing circuit of FIG. 1.

FIG. 4 is a diagram showing signal waveforms of the sensing voltage and the pulse signal, respectively.

FIG. 5 is a block diagram showing the current sensing circuit of FIG. 1.

FIG. 6 is a schematic diagram showing the range partition block sensing of the required measurement by the current sensing circuit.

7 is a flow chart of a method of operating a circuit in accordance with an embodiment of the present invention.

FIG. 8 is a schematic diagram showing the current to be measured and the digital output of the current sensing circuit according to the circuit operation method of FIG. 7.

100. . . Current sensing circuit

110. . . Current sensing unit

112. . . Sensing unit

114. . . Comparison unit

120. . . Feedback control unit

122. . . First inverter

124. . . Gate

126. . . Second inverter

130. . . Digital output unit

132. . . N-bit counter

Ci. . . First capacitor group

Cc. . . Second capacitor group

PD. . . Photosensitive diode

A. . . node

CLK. . . Clock signal

Vref. . . First reference signal

Vr1. . . Second reference signal

Sp_B. . . First feedback signal

Sw1. . . Second feedback signal

Sw2. . . Third feedback signal

Vx. . . Sense voltage

Sp. . . Pulse signal

Sd. . . Digital signal

T1, T2a, T2b, T3a, T3b. . . switch

Is. . . Current

OP. . . Operational Amplifier

Comp. . . Comparators

VSSA. . . First voltage

Vx1. . . Second voltage

Claims (14)

A current sensing circuit includes: a current sensing unit that senses a current, generates a pulse signal according to at least one reference signal and at least one feedback signal, wherein the current sensing unit includes a first capacitor group and a a second capacitor group, the current sensing unit selects at least one capacitor in the first capacitor group and at least one capacitor in the second capacitor group according to the magnitude of the current; a feedback control unit coupled to the current sensing unit The at least one feedback signal is generated according to the one pulse signal and the pulse signal; and the digital output unit is coupled to the current sensing unit, and outputs a digital signal according to the pulse signal, wherein the current sensing unit is configured according to the first The first reference signal and the at least one feedback signal generate a sensing voltage, and compare the sensing voltage with a second reference signal to output the pulse signal. The current sensing circuit of claim 1, wherein the current sensing unit comprises: a sensing unit that senses the current, and generates the sense according to the first reference signal and the at least one feedback signal Measuring the voltage, wherein the sensing unit includes the first capacitor group and the second capacitor group; and a comparing unit coupled to the sensing unit, comparing the sensing voltage with a level of the second reference signal, and outputting the Pulse signal. The current sensing circuit of claim 2, wherein the sensing unit further comprises: an operational amplifier comprising a first end, a second end, and an output The current is discharged from the first end according to a first feedback signal, and the second end is coupled to the first reference signal, and the output end outputs the sensing voltage. The current sensing circuit of claim 3, wherein the first capacitor group includes a first end and a second end, the first end of the first capacitor group is coupled to the output of the operational amplifier The second end of the first capacitor group is coupled to the first end of the operational amplifier. The current sensing circuit of claim 4, wherein the first capacitor group comprises a plurality of capacitors, the capacitors being at the first end of the first capacitor group and the second portion of the first capacitor group The ends are coupled in parallel. The current sensing circuit of claim 4, wherein the second capacitor group includes a first end and a second end, and the first end of the second capacitor group is based on a second feedback signal and The second feedback signal is coupled to the first reference signal or a first voltage, and the second end of the second capacitor group is coupled to the operational amplifier according to the second feedback signal and the third feedback signal. The first end or a second voltage. The current sensing circuit of claim 6, wherein the second capacitor group comprises a plurality of capacitors, the capacitors being at the first end of the second capacitor group and the second portion of the second capacitor group The ends are coupled in parallel. The current sensing circuit of claim 7, wherein the current sensing unit selects a first capacitor of the first capacitor group and a second capacitor of the second capacitor group, the first capacitor The other end of the first capacitor is coupled to the first end of the operational amplifier, and the second end of the second capacitor is coupled to the second feedback signal and the third feedback The signal is coupled to the first reference signal or the first The second end of the second capacitor is coupled to the first end or the second voltage of the operational amplifier according to the second feedback signal and the third feedback signal. The current sensing circuit of claim 4, wherein the comparing unit comprises: a comparator comprising a first end, a second end, and an output, the first end of the comparator being coupled a second reference signal, the second end of the comparator is coupled to the output end of the operational amplifier to receive the sensing voltage, and the comparator compares the sensing voltage and the second reference signal for the comparison The output of the device outputs the pulse signal. The current sensing circuit of claim 1, wherein the feedback control unit comprises: a first inverter coupled to the current sensing unit, inverting the pulse signal to generate a first back And a first end, a second end, and an output end, the first end of the gate is coupled to the current sensing unit to receive the pulse signal, and the gate The second end receives the clock signal, and the gate outputs a second feedback signal at the output end of the gate according to the pulse signal and the clock signal; and a second inverter coupled to the gate And inverting the second feedback signal to generate a third feedback signal. The current sensing circuit of claim 1, wherein the digital output unit comprises: an N-bit counter coupled to the current sensing unit to count the number of pulses of the pulse signal in a predetermined time interval. To output the digital signal Number, where the number of pulses is positively correlated with the magnitude of the current. The current sensing circuit of claim 1, further comprising: a controller coupled to the digital output unit, and selecting the at least one capacitor and the second capacitor in the first capacitor group according to the digital signal The at least one capacitor in the group. The current sensing circuit of claim 12, wherein the controller adjusts a second voltage according to the digital signal, wherein the second voltage is coupled to the second capacitor according to the at least one feedback signal One end of the group. The current sensing circuit of claim 1, further comprising: a photodiode coupled to the current sensing unit for sensing a light source to generate the current.