TWI360241B - Chip with thermoelectric function - Google Patents

Chip with thermoelectric function Download PDF

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Publication number
TWI360241B
TWI360241B TW97106904A TW97106904A TWI360241B TW I360241 B TWI360241 B TW I360241B TW 97106904 A TW97106904 A TW 97106904A TW 97106904 A TW97106904 A TW 97106904A TW I360241 B TWI360241 B TW I360241B
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thermoelectric material
heat
type thermoelectric
integrated wafer
heat dissipating
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TW97106904A
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Chinese (zh)
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TW200937689A (en
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Chung Cheng Chou
Wai Wang
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Raydium Semiconductor Corp
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1360241 > « < *1360241 > « < *

TW4203PA 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種整合型晶片,且特別是有關於一 種具熱電致冷散熱功能之整合型晶片。 【先前技術】 隨著各項電子裝置之效能提高,電子裝置内部的產熱 量亦相對增加,尤其是對於具有高速運算晶片的裝置而 • 言,散熱機制更為重要。 以中央處理器(CPU)為例,當處理器之速度與效能 提升時,較高的工作頻率與工作電壓將使得處理器之溫度 急速升高。目前,多是在處理器上增加散熱器(heat sink) . 之散熱面積去提升傳熱效果,以維持處理器之正常運作。 然而,散熱器多佔有一定的體積,且多需以扣件或螺絲固 定,此外,亦必須在散熱器與處理器之間塗佈散熱膏以使 二者緊密接觸。 • 對於如何有效將晶片散熱機制達到最佳化狀態實乃 一值得探討之問題。 【發明内容】 本發明係有關於一種具熱電致冷散熱功能之整合型 晶片,其本身具有主動散熱功能,因而可廣泛地製作為各 種不同功能晶片。 6 1360241 • i ·TW4203PA IX. Description of the Invention: [Technical Field] The present invention relates to an integrated wafer, and more particularly to an integrated wafer having a thermoelectric cooling and heat dissipation function. [Prior Art] As the performance of various electronic devices increases, the amount of heat generated inside the electronic device also relatively increases, especially for devices having high-speed arithmetic wafers, and the heat dissipation mechanism is more important. Taking a central processing unit (CPU) as an example, when the speed and performance of the processor increase, the higher operating frequency and operating voltage will cause the temperature of the processor to rise rapidly. At present, most of the heat sink is added to the processor to reduce the heat transfer effect to maintain the normal operation of the processor. However, the heat sink has a certain volume and needs to be fixed by fasteners or screws. In addition, a heat sink paste must be applied between the heat sink and the processor to make the two in close contact. • It is worth exploring how to effectively optimize the heat dissipation mechanism of the wafer. SUMMARY OF THE INVENTION The present invention relates to an integrated wafer having a thermoelectric cooling and heat dissipating function, which itself has an active heat dissipating function, and thus can be widely fabricated into various functional wafers. 6 1360241 • i ·

• TW4203PA 本發明提出一種熱電致冷散熱功能之整合型晶片,其 包括一基材、多個微電子元件以及多個散熱單元。基材之 表面設有一功能運算區與至少一散熱區,其中散熱區係相 鄰於功能運算區。這些微電子元件係設置於功能運算區 中,而這些散熱單元是沿著功能運算區之至少一邊緣設置 於散熱區中。各散熱單元包括相連接之一 P型熱電材料區 塊與一 N型熱電材料區塊,且一散熱單元之N型熱電材料 區塊是連接至相鄰的散熱單元之P型熱電材料區塊。當一 φ 電流依序通過這些散熱單元時,散熱單元於接近功能運算 區之一側是形成多個吸熱端,而於遠離功能運算區之另一 側是形成多個放熱端,藉此以降低這些微電子元件之溫 度。 本發明更提出另一種熱電致冷散熱功能之整合型晶 片,其包括一基材、多個微電子元件以及多個熱電材料區 ' 塊。基材之表面設有一功能運算區與至少一散熱區,其中 散熱區係相鄰於功能運算區。這些微電子元件係設置於功 • 能運算區中。熱電材料區塊是沿著功能運算區之至少一邊 緣設置於散熱區中。當供給電流至這些熱電材料區塊時, 熱電材料區塊於接近功能運算區之一側形成多個吸熱 端,且於遠離功能運算區之另一側形成多個放熱端,藉此 以降低微電子元件之溫度。 為讓本發明之上述内容能更明顯易懂,下文特舉較佳 實施例,並配合所附圖式,作詳細說明如下: 7 1360241 « 、·• TW4203PA The present invention provides an integrated wafer of thermoelectric cooling and heat dissipation functions, comprising a substrate, a plurality of microelectronic components, and a plurality of heat dissipating units. The surface of the substrate is provided with a functional operation area and at least one heat dissipation area, wherein the heat dissipation area is adjacent to the functional operation area. The microelectronic components are disposed in the functional computing area, and the heat dissipating units are disposed in the heat dissipating region along at least one edge of the functional computing area. Each of the heat dissipating units includes a P-type thermoelectric material block and an N-type thermoelectric material block, and the N-type thermoelectric material block of a heat dissipating unit is a P-type thermoelectric material block connected to the adjacent heat dissipating unit. When a φ current sequentially passes through the heat dissipating units, the heat dissipating unit forms a plurality of heat absorbing ends on one side of the function computing area, and forms a plurality of heat releasing ends on the other side of the function computing area, thereby reducing The temperature of these microelectronic components. The present invention further provides an integrated wafer for thermoelectric cooling and heat dissipation, comprising a substrate, a plurality of microelectronic components, and a plurality of thermoelectric material regions. The surface of the substrate is provided with a functional operation area and at least one heat dissipation area, wherein the heat dissipation area is adjacent to the functional operation area. These microelectronic components are placed in the power calculation area. The thermoelectric material block is disposed in the heat dissipating area along at least one edge of the functional operation area. When a current is supplied to the thermoelectric material blocks, the thermoelectric material block forms a plurality of heat absorption ends on one side of the functional operation area, and forms a plurality of heat release ends on the other side away from the functional operation area, thereby reducing microelectronics. The temperature of the component. In order to make the above description of the present invention more comprehensible, the preferred embodiments are described below, and in conjunction with the accompanying drawings, the detailed description is as follows: 7 1360241 « , ·

• TW4203PA 【實施方式】 實施例一 請參照第1A至1C圖,第1A圖繪示依照本發明實施 例一之具熱電致冷散熱功能的整合型晶片之示意圖,第1B 圖繪示第1A圖的整合型晶片沿著B-B’切線之剖面圖,第 1C圖繪示第1A圖的散熱區局部之示意圖。如第ΙΑ、1B 圖所示,本實施例之整合型晶片100包括一基材110、多 個微電子元件120以及多個散熱單元130。基材110之表 φ 面設有一功能運算區112與至少一散熱區,其中散熱區係 相鄰於功能運算區112。本實施例是以二個對稱且相鄰於 功能運算區112之散熱區114、116作說明。微電子元件 120係設置於功能運算區112中。微電子元件120例如包 括半導體元件,其可以是電晶體、電阻元件、電容元件、 二極體等之其中之一或任意組合。散熱單元130是沿著功 • 能運算區112之邊緣設置於散熱區114、116中。如第1C 圖所示,各散熱單元130包括相連接之P型熱電材料區塊 • 與N型熱電材料區塊,且一散熱單元130之N型熱電材料 區塊是連接至相鄰的散熱單元130之P型熱電材料區塊。 散熱單元130例如是成一橫列地設置於散熱區114 (或散 熱區116)中。 各散熱單元130之P型熱電材料區塊與N型熱電材 料區塊之材質例如是具有高熱電優值之半導體材料、半金 屬元素或化合物。在二種不同熱電材料區塊接合成的線路 上通以電流時,若其中一接點放熱,另一接點會產生吸熱 8 1360241 # » · ·TW4203PA Embodiments Please refer to FIGS. 1A to 1C for the first embodiment. FIG. 1A is a schematic diagram of an integrated wafer with thermoelectric cooling and heat dissipation function according to the embodiment of the present invention, and FIG. 1B is a first diagram. A cross-sectional view of the integrated wafer along the B-B' tangent line, and a first schematic view of the heat dissipating region of FIG. 1A. As shown in FIG. 1B, the integrated wafer 100 of the present embodiment includes a substrate 110, a plurality of microelectronic components 120, and a plurality of heat dissipation units 130. The surface φ of the substrate 110 is provided with a functional operation area 112 and at least one heat dissipation area, wherein the heat dissipation area is adjacent to the functional operation area 112. This embodiment is illustrated by two heat dissipation regions 114, 116 that are symmetric and adjacent to the functional operation region 112. Microelectronic component 120 is disposed in functional computing area 112. The microelectronic component 120 includes, for example, a semiconductor component, which may be one or any combination of a transistor, a resistive component, a capacitive component, a diode, and the like. The heat dissipation unit 130 is disposed in the heat dissipation regions 114, 116 along the edge of the power operation region 112. As shown in FIG. 1C, each heat dissipating unit 130 includes a P-type thermoelectric material block and an N-type thermoelectric material block, and an N-type thermoelectric material block of a heat dissipating unit 130 is connected to an adjacent heat dissipating unit. 130 P-type thermoelectric material block. The heat dissipation unit 130 is disposed, for example, in a horizontal row in the heat dissipation region 114 (or the heat dissipation region 116). The material of the P-type thermoelectric material block and the N-type thermoelectric material block of each heat dissipation unit 130 is, for example, a semiconductor material, a semi-metal element or a compound having a high thermoelectric figure of merit. When a current is applied to a line formed by two different thermoelectric material blocks, if one of the contacts is exothermic, the other contact will generate an endotherm. 8 1360241 # » · ·

* TW4203PA 的情形。是以,當一電流依序通過這些散熱單元130時, 散熱單元130於接近功能運算區112之一側會形成多個吸 熱端130A,而於遠離功能運算區112之另一側會形成多個 放熱端130B。如此一來,如第1B圖中的箭頭所示,功能 運算區112中的微電子元件120所產生的熱度將會從二個 散熱區114、116的方向被帶走,藉此以降低功能運算區 112中微電子元件120之溫度。 如第1C圖所示,整合型晶片100包括多個第一導電 φ 元件141與多個第二導電元件142,其中,第一導電元件 141是用以連接各散熱單元130之P型熱電材料區塊與N 型熱電材料區塊,而第二導電元件142是用以連接各散熱 單元130之N型熱電材料區塊與相鄰的散熱單元130之P 型熱電材料區塊。此外,第一導電元件141係位於放熱端 130B,而第二導電元件142係位於吸熱端130A。由於第 一導電元件H1係位於放熱端130B,較佳地,可使第一導 電元件141具有較大的體積,以加快整合型晶片100其自 • 行散熱的速度。第一導電元件141與第二導電元件142之 材質例如是金、銅等具導電性材料。 另外,除了如第1C圖所示僅設置單列的P型熱電材 料區塊與N型熱電材料區塊,亦可使熱電材料區塊具有更 大的分佈範圍以及其他的排列方式。請參照第2圖,其繪 示實施例一的散熱單元以陣列形式設置於散熱區之示意 圖。如第2圖所示,散熱單元130是以陣列的形式排列於 散熱區中,其中,一列散熱單元130之放熱端130B係鄰 9 1360241 I * ** The case of TW4203PA. Therefore, when a current flows through the heat dissipating units 130 in sequence, the heat dissipating unit 130 forms a plurality of heat absorbing ends 130A on one side of the function computing area 112, and forms a plurality of heat sinking ends 130A on the other side of the function computing area 112. Exothermic end 130B. As a result, as indicated by the arrows in FIG. 1B, the heat generated by the microelectronic component 120 in the functional operation area 112 will be taken away from the two heat dissipation regions 114, 116, thereby reducing the functional operation. The temperature of the microelectronic element 120 in region 112. As shown in FIG. 1C, the integrated wafer 100 includes a plurality of first conductive φ elements 141 and a plurality of second conductive elements 142, wherein the first conductive elements 141 are P-type thermoelectric material regions for connecting the heat dissipation units 130. The block and the N-type thermoelectric material block, and the second conductive element 142 is a P-type thermoelectric material block for connecting the N-type thermoelectric material block of each heat dissipation unit 130 and the adjacent heat dissipation unit 130. Further, the first conductive member 141 is located at the heat releasing end 130B, and the second conductive member 142 is located at the heat absorbing end 130A. Since the first conductive element H1 is located at the heat releasing end 130B, it is preferable that the first conductive element 141 has a large volume to speed up the self-discharge of the integrated type wafer 100. The material of the first conductive member 141 and the second conductive member 142 is, for example, a conductive material such as gold or copper. Further, in addition to the single-column P-type thermoelectric material block and the N-type thermoelectric material block as shown in Fig. 1C, the thermoelectric material block can have a larger distribution range and other arrangement. Referring to Fig. 2, there is shown a schematic view of the heat dissipating unit of the first embodiment disposed in an array in a heat dissipating area. As shown in FIG. 2, the heat dissipating units 130 are arranged in an array in the heat dissipating area, wherein the heat releasing end 130B of one row of the heat dissipating units 130 is adjacent to 9 1360241 I * *

TW4203PA 近於相鄰列散熱單元130之吸熱端130A,亦即列與列之 間的放熱端130B上的第二導電元件142是對應於吸熱端 130A上的第一導電元件141設置。如此,功能運算區112 的熱度除了被導引至散熱區114、116,且將由散熱區114、 116被導引到基材110外,以有效地將晶片100的溫度降 低。 請參照第3A、3B圖,其繪示一列散熱單元的放熱端 延伸至相鄰列散熱單元的吸熱端之示意圖。較佳地,位於 • 列與列之間的放熱端之第一導電元件係具有一延伸部係 延伸至相鄰之吸熱端。如第3A圖所示,位於二列散熱單 元130間的第一導電元件141’係一 T形結構,其具有一延 伸部141A’是延伸至相鄰的第二導電元件142處,然而二 者並不接觸。另外,如第3B圖所示,第一導電元件14Γ 之延伸部141A”也可為三角形。 請參照第4A圖,其繪示第一導電元件延伸至絕緣層 外之剖面圖。較佳地,基材110於製程中會覆蓋一絕緣層 ® 150以保護基材110上的微電子元件120以及散熱單元130 之P型熱電材料區塊與N型熱電材料區塊,是以,可將放 熱端130B (見第1C圖)之第一導電元件141延伸至絕緣 層150外以形成一凸出端141C,此凸出端141C用以與外 界大氣接觸以將熱逸散至晶片100外。 另外,請參照第4B圖,其繪示第一導電元件具有鰭 狀結構之剖面圖。第一導電元件141於延伸至絕緣層150 外之凸出端141C’係較佳為一鰭狀結構。鰭狀結構之設計 1360241 I · ·The TW4203PA is adjacent to the heat absorbing end 130A of the adjacent column heat dissipating unit 130, that is, the second conductive member 142 on the heat releasing end 130B between the columns and columns is disposed corresponding to the first conductive member 141 on the heat absorbing end 130A. As such, the heat of the functional computing region 112 is directed to the heat sink regions 114, 116 and will be directed out of the substrate 110 by the heat sink regions 114, 116 to effectively reduce the temperature of the wafer 100. Please refer to FIG. 3A and FIG. 3B, which are schematic diagrams showing the heat dissipation end of one row of heat dissipation units extending to the heat absorption end of the adjacent column heat dissipation unit. Preferably, the first electrically conductive element at the exothermic end between the columns and columns has an extension extending to the adjacent endothermic end. As shown in FIG. 3A, the first conductive member 141' located between the two rows of heat dissipating units 130 is a T-shaped structure having an extending portion 141A' extending to the adjacent second conductive member 142. Not in contact. In addition, as shown in FIG. 3B, the extending portion 141A" of the first conductive member 14A may also be triangular. Referring to FIG. 4A, a cross-sectional view of the first conductive member extending outside the insulating layer is illustrated. Preferably, The substrate 110 is covered with an insulating layer 150 in the process to protect the microelectronic component 120 on the substrate 110 and the P-type thermoelectric material block and the N-type thermoelectric material block of the heat dissipation unit 130, so that the heat release end can be The first conductive member 141 of 130B (see FIG. 1C) extends outside the insulating layer 150 to form a protruding end 141C for contacting the outside atmosphere to dissipate heat to the outside of the wafer 100. Referring to FIG. 4B, a cross-sectional view of the first conductive member having a fin structure is illustrated. The protruding end 141C' of the first conductive member 141 extending outside the insulating layer 150 is preferably a fin structure. Structural design 1360241 I · ·

TW4203PA 加大了凸出端141C’與外界接觸的面積,如此可更為快速 地將溫度降低。 由於微電子元件120係包括半導體元件,且各散熱單 元130之P型熱電材料區塊與N型熱電材料區塊是可藉由 半導體材料製作,此外,散熱單元130與微電子元件120 是同樣設置於基材110之表面,是以,整合型晶片100上 之各個散熱單元130與導電元件141、142之製程係可整 合於微電子元件120之製程(半導體製程)中。且僅需要 • 根據微電子元件120的種類,以及適當安排P/N型熱電材 料區塊與導電元件141、142之製作次序,便可於微電子 元件120的製程中一併將散熱單元130與導電元件141、 142製作完成。如此一來,製作完成的整合型晶片即具有 . 自身散熱之效果,且不會增加額外的製程費用。 實施例二 實施例二與實施例一的不同之處在於,實施例二之整 ® 合型晶片係可調整其本身散熱區的大小,是以對於相同的 元件部分將不再贅述。請參照第5圖,其繪示依照本發明 實施例二之具熱電致冷散熱功能的整合型晶片其散熱區 局部之示意圖。本實施例二之整合型晶片於散熱區214中 更包括多個開關元件260 (為簡化圖示,僅繪示出開關元 件260(1)至260(15)),這些開關元件260是連接任二個相 鄰的P型熱電材料區塊與N型熱電材料區塊*用以選擇性 地導通或切斷不同散熱單元230(僅繪示出散熱單元230(1) 1360241 I · ·The TW4203PA increases the area in which the projecting end 141C' contacts the outside world, so that the temperature can be lowered more quickly. Since the microelectronic component 120 includes a semiconductor component, and the P-type thermoelectric material block and the N-type thermoelectric material block of each heat dissipation unit 130 are made of a semiconductor material, the heat dissipation unit 130 and the microelectronic component 120 are disposed in the same manner. On the surface of the substrate 110, the process of each of the heat dissipation units 130 and the conductive elements 141, 142 on the integrated wafer 100 can be integrated into the process (semiconductor process) of the microelectronic device 120. And only need to be made according to the kind of the microelectronic component 120, and the arrangement order of the P/N type thermoelectric material block and the conductive elements 141, 142 can be arranged in the process of the microelectronic component 120 and the heat dissipation unit 130 and The conductive elements 141, 142 are completed. In this way, the finished integrated wafer has the effect of self-heating without adding additional process costs. Embodiment 2 The difference between the second embodiment and the first embodiment is that the whole wafer of the second embodiment can adjust the size of the heat dissipation area of the second embodiment, so that the same component parts will not be described again. Referring to FIG. 5, a schematic view of a heat dissipating region of an integrated wafer having a thermoelectric cooling and dissipating function according to a second embodiment of the present invention is shown. The integrated wafer of the second embodiment further includes a plurality of switching elements 260 in the heat dissipation region 214 (only the switching elements 260(1) to 260(15) are shown for simplicity of illustration), and the switching elements 260 are connected. Two adjacent P-type thermoelectric material blocks and N-type thermoelectric material blocks* are used to selectively turn on or cut off different heat dissipation units 230 (only heat dissipation unit 230(1) 1360241 I ·

TW4203PA 至230(4))之間的連接,藉此以調整散熱區214的散熱範 圍。於此,部分的開關元件260是連接於一散熱單元230 之P型熱電材料區塊與N型熱電材料區塊,部分的開關元 件260是連接於一散熱單元230之N型熱電材料區塊與相 鄰散熱單元230之P型熱電材料區塊。開關元件260可為 半導體元件,其例如是具有1/0開關特性的電晶體,可於 施以適當電壓條件下可產生導通的情形。 另外,各個散熱單元230之P型熱電材料區塊是連接 • 至一第一電力驅動線271,而N型熱電材料區塊是連接至 一第二電力驅動線272。部分的開關元件260係連接於P 型熱電材料區塊與第一電力驅動線271之間,而部分的開 關元件260係連接於N型熱電材料區塊與第二電力驅動線 - 272之間。於本實施例中,電流方向例如是由第一電力驅 動線271流至各散熱單元,並由第二電力驅動線272流出。 於散熱端之第一導電元件241 (僅繪示出第一導電元 件241(1)至241(4))各具有一第一導電體2411與一第二導 • 電體2412,其中,第一導電體2411係連接至P型熱電材 料區塊,第二導電體2412是連接至N型熱電材料區塊, 且第一導電體2411與第二導電體2412之間具有一間隙。 請參照第6圖,其繪示第5圖部分的散熱單元被導通 之示意圖。當開關元件 260(5)、260(6)、260(8)、260(10) 及260(11)導通時,第一電力驅動線27卜散熱單元230(2)、 230(3)與第二電力驅動線272會形成一個迴路。此時,迴 路各接點之間會產生吸熱與放熱的情形。由於僅有散熱單 12 1360241 • ·,A connection between TW4203PA and 230(4)) to adjust the heat dissipation range of the heat sink region 214. Herein, part of the switching element 260 is a P-type thermoelectric material block and an N-type thermoelectric material block connected to a heat dissipation unit 230, and a part of the switching element 260 is an N-type thermoelectric material block connected to a heat dissipation unit 230. P-type thermoelectric material block adjacent to the heat dissipation unit 230. The switching element 260 may be a semiconductor element, for example, a transistor having a 1/0 switching characteristic, which can be turned on under appropriate voltage conditions. In addition, the P-type thermoelectric material block of each of the heat dissipation units 230 is connected to a first electric drive line 271, and the N-type thermoelectric material block is connected to a second electric drive line 272. A portion of the switching element 260 is coupled between the P-type thermoelectric material block and the first power drive line 271, and a portion of the switching element 260 is coupled between the N-type thermoelectric material block and the second power drive line -272. In the present embodiment, the current direction flows, for example, from the first electric drive line 271 to the respective heat dissipating units, and flows out of the second electric drive line 272. a first conductive member 241 (1) to 241 (4) having a first conductive member 241 (1) to 241 (4), each having a first conductive member 2411 and a second conductive member 2412, wherein The electrical conductor 2411 is connected to the P-type thermoelectric material block, the second electrical conductor 2412 is connected to the N-type thermoelectric material block, and the first electrical conductor 2411 and the second electrical conductor 2412 have a gap therebetween. Please refer to FIG. 6 , which is a schematic diagram showing the heat dissipation unit of the portion of FIG. 5 being turned on. When the switching elements 260(5), 260(6), 260(8), 260(10), and 260(11) are turned on, the first power driving line 27 is provided with heat dissipation units 230(2), 230(3) and The two electric drive lines 272 form a loop. At this time, heat and heat are generated between the contacts of the circuit. Since there is only a heat sink 12 1360241 • ·,

TW4203PA 元230(2)、230(3)被導通,熱將由放熱端之第一導電元件 241(2)、241 (3)排除,是以散熱區214係局部地具有散熱功 能。如此,藉由開關元件260之設置是可以依需求去調整 散熱區214範圍。 請參照第7圖,其繪示實施例二的散熱單元以陣列形 式設置於散熱區之示意圖。散熱單元230以陣列形式排列 成第1列散熱單元230R1至第N列散熱單元230RN。開 關元件260是設置於任二個相鄰的P型熱電材料區塊與N 鲁 型熱電材料區塊之間、P型熱電材料區塊與弟一電力驅動 線271之間、N型熱電材料區塊與弟—電力驅動線272之 間等位置。藉由適當地導通所選定位置的開關元件260, 便可決定散熱區214之散熱範圍。 於列與列之間的第一導電元件,例如第1列散熱單元 230R1之放熱端的第一導電元件241’係可設計為具有延伸 至第2列散熱單元230R2其吸熱端之延伸部241A’。至於 第N列散熱單元230R1 (位於最外列)之第一導電元件 • 241,其可具有較大的體積以增加與外界接觸之面積。 較佳地,本實施例之整合型晶片可搭配一控制單元 (或稱為驅動電路)與一感測單元以更為彈性地調控散熱 區214之散熱機制。控制單元與感測單元係可製作於整合 型晶片之基材上,其中,感測單元是用以感測散熱區214 之溫度,控制單元則連接至感測單元以及前述所有的開關 元件260。是以,當感測單元偵測到散熱區214的溫度變 化時,控制單元可以選擇性地致動開關元件260,以調控 13 1360241 • . *The TW4203PA elements 230(2), 230(3) are turned on, and the heat is removed by the first conductive elements 241(2), 241(3) of the heat releasing end, and the heat radiating area 214 partially has a heat dissipating function. Thus, by the setting of the switching element 260, the range of the heat dissipation region 214 can be adjusted as needed. Please refer to FIG. 7 , which is a schematic diagram showing the heat dissipating unit of the second embodiment disposed in an array in a heat dissipation area. The heat dissipation units 230 are arranged in an array form in the first column heat dissipation unit 230R1 to the Nth column heat dissipation unit 230RN. The switching element 260 is disposed between any two adjacent P-type thermoelectric material blocks and the N-type thermoelectric material block, between the P-type thermoelectric material block and the first-electric power driving line 271, and the N-type thermoelectric material region. The position between the block and the younger-electric drive line 272. The heat dissipation range of the heat sink region 214 can be determined by appropriately turning on the switching element 260 at the selected position. The first conductive member between the columns and the columns, for example, the first conductive member 241' of the heat releasing end of the first row heat radiating unit 230R1, may be designed to have an extending portion 241A' extending to the heat absorbing end of the second column heat radiating unit 230R2. As for the first conductive element 241 of the Nth column heat radiating unit 230R1 (located in the outermost row), it may have a large volume to increase the area in contact with the outside. Preferably, the integrated wafer of the present embodiment can be combined with a control unit (or a driving circuit) and a sensing unit to more flexibly adjust the heat dissipation mechanism of the heat dissipation region 214. The control unit and the sensing unit can be fabricated on a substrate of the integrated wafer, wherein the sensing unit is for sensing the temperature of the heat sink 214, and the control unit is coupled to the sensing unit and all of the aforementioned switching elements 260. Therefore, when the sensing unit detects the temperature change of the heat dissipation region 214, the control unit can selectively actuate the switching element 260 to regulate 13 1360241 • .

TW4203PA 散熱區214的散熱範圍。舉例來說,當感測單元偵測到功 能運算區局部產生高溫時,控制單元可藉由控制開關元件 去開啟對應該高溫區域的散熱單元執行散熱功能。 值付一提的是*由於熱電材料自身即具有溫差與電5扎 號之互相可逆反應,是以可於散熱區214中最靠近功能運 算區之至少一散熱單元中多安置二組開斷路開關,再將這 二組開斷路開關與一感測電路連接。當該散熱單元與原先 的控制單元、週邊的散熱單元互為斷路時,且與感測電路 • 形成通路時,則該散熱單元即轉變為一感測單元而可提供 溫度感測之功能。 實施例三 實施例三之整合型晶片與實施例一的不同之處在於 , 功能運算區之輪廓與散熱區之設置,是以相同的部分將不 再贅述。請參照第8圖,其繪示依照本發明實施例三之具 熱電致冷散熱功能的整合型晶片之示意圖。整合型晶片 ® 300之基材310上的功能運算區312係具有弧形邊緣,是 以位於散熱區314中的散熱單元330是沿著此弧形邊緣配 置。散熱單元330於接近功能運算區312之一端係為吸熱 端(冷端),於遠離功能運算區312之另一端則為放熱端 (熱端),藉此以將熱從基材310内朝基材310外之方向 逸散。 於其他實施例中,功能運算區是可按照晶片性能或結 構條件等限制而具有其他不同的邊緣形狀設計,只要是將 14 1360241 • · ·The heat dissipation range of the TW4203PA heat sink area 214. For example, when the sensing unit detects that the function computing area locally generates a high temperature, the control unit can perform a heat dissipation function by controlling the switching element to turn on the heat dissipation unit corresponding to the high temperature region. It is worth mentioning that * because the thermoelectric material itself has a reversible reaction with the temperature difference and the electric 5, it is possible to place two sets of open circuit switches in at least one heat dissipating unit closest to the functional operation area in the heat dissipation area 214. Then, the two sets of open circuit switches are connected to a sensing circuit. When the heat dissipating unit is disconnected from the original control unit and the surrounding heat dissipating unit, and the path is formed with the sensing circuit, the heat dissipating unit is converted into a sensing unit to provide a temperature sensing function. Embodiment 3 The integrated wafer of the third embodiment is different from the first embodiment in that the outline of the functional operation area and the setting of the heat dissipation area are the same parts, and will not be described again. Please refer to FIG. 8 , which is a schematic diagram of an integrated wafer with thermoelectric cooling and heat dissipation function according to Embodiment 3 of the present invention. The functional computing area 312 on the substrate 310 of the integrated wafer ® 300 has curved edges along which the heat dissipating unit 330 located in the heat sinking zone 314 is disposed. The heat dissipating unit 330 is a heat absorbing end (cold end) at one end of the function computing area 312, and a heat releasing end (hot end) at the other end of the function computing area 312, thereby transferring heat from the substrate 310 toward the base. The direction outside the material 310 is dissipated. In other embodiments, the functional computing area may have other different edge shape designs depending on wafer performance or structural conditions, etc., as long as it is 14 1360241 • ·

TW4203PA 散熱單元設置於功能運算區之週邊,皆屬於本發明之範 缚。 實施例四 請參照第9圖,其繪示依照本發明實施例四之具熱電 致冷散熱功能的整合型晶片之示意圖。整合型晶片400包 括一基材410、多個微電子元件420以及多個熱電材料區 塊。基材410之表面設有一功能運算區412與至少一散熱 • 區414,其中散熱區414係相鄰於功能運算區412。熱電 材料區塊是沿著功能運算區412之至少一邊緣設置於散熱 區414中。當供給電流至這些熱電材料區塊時’熱電材料 區塊於接近功能運算區412之一側形成多個吸熱端,且於 遠離功能運算區412之另一側形成多個放熱端,藉此以降 . 低微電子元件420之温度。 如弟9圖所不*這些熱電材料區塊係為N型熱電材 料區塊。此外,N型熱電材料區塊之間是以並聯之方式電 ® 性連接起來。當電流通入時,於N型熱電材料區塊下方會 產生吸熱效果而形成冷端,於上方會產成散熱效果而形成 熱端,讓熱由功能運算區412向散熱區414 (或向外)之 方向逸散,是以整合型晶片400本身即具有熱電致冷之散 熱功能。 這些N型熱電材料區塊之間亦可以藉由串聯之方式 結合起來,請參照第10圖。此外,雖然本實施例是以N 型熱電材料區塊為例做說明,然於其他實施例中,亦可以 15 1360241 * · ·The TW4203PA heat sink unit is placed around the functional computing area and is subject to the scope of the present invention. Embodiment 4 Referring to Figure 9, there is shown a schematic diagram of an integrated wafer having a thermoelectric cooling and heat dissipation function according to a fourth embodiment of the present invention. The integrated wafer 400 includes a substrate 410, a plurality of microelectronic components 420, and a plurality of thermoelectric material blocks. The surface of the substrate 410 is provided with a functional operation area 412 and at least one heat dissipation area 414, wherein the heat dissipation area 414 is adjacent to the functional operation area 412. The thermoelectric material block is disposed in the heat dissipation region 414 along at least one edge of the functional operation region 412. When a current is supplied to the thermoelectric material blocks, the thermoelectric material block forms a plurality of heat absorption ends on one side of the functional operation area 412, and forms a plurality of heat release ends on the other side away from the functional operation area 412. The temperature of the low microelectronic component 420. As shown in Figure 9, these thermoelectric material blocks are N-type thermoelectric materials blocks. In addition, the N-type thermoelectric material blocks are electrically connected in parallel. When the current is passed, an endothermic effect is generated under the N-type thermoelectric material block to form a cold end, and a heat dissipation effect is formed on the upper side to form a hot end, so that heat is transferred from the functional operation area 412 to the heat dissipation area 414 (or outward) The direction of the escape is that the integrated wafer 400 itself has a heat-dissipating heat-dissipating function. These N-type thermoelectric material blocks can also be connected in series by means of a series connection. Please refer to Fig. 10. In addition, although the embodiment is described by taking an N-type thermoelectric material block as an example, in other embodiments, it may also be 15 1360241 * · ·

TW4203PA 使用P型熱電材料區塊。P型熱電材料區塊之間同樣可透 過並聯或串聯之方式電性連接。 本發明上述實施例所揭露之具熱電致冷散熱功能的 整合型晶片,係可為各種不同功能晶片,特別是可提供高 速運算或是高功率運作之晶片,如計算機之中央處理器 (CPU)或液晶顯示器之源驅動晶片(Source Driver 1C ) 等,並可搭配例如打線(wire bonding)、銲球(BGA)或 • 覆晶(COF)等封裝技術。本發明之整合型晶片係將散熱 單元直接整合於晶片之基材上,使晶片本身即具有主動散 熱之功能。散熱單元係沿著晶片的功能運算區週邊設置, 以將晶片上產生的熱導引至晶片外。由於散熱單元之P/N 型熱電材料區塊係可於晶片上微電子元件的製程中製作 . 出來,並不會額外增加製程成本。另外,更可將散熱單元 以陣列的形式排列,得以提供一維或二維之晶片散熱效 果,亦可更為彈性地調控散熱區的散熱範圍。此外,本發 * 明所揭露之具有電致散熱功能的整合型晶片,其内部散熱 單元之設計除前述之P/N組合實施外,亦可選用單一 N或 P型之熱電材料以提供晶片散熱目的。此種方式主要是將 多個同為P型或N型之熱電材料並聯或串聯起來,並施以 電流,同樣可使熱電材料一端為熱端而另一端為冷端,藉 此以產生吸熱放熱之現象。 綜上所述,雖然本發明已以較佳實施例揭露如上,然 其並非用以限定本發明。本發明所屬技術領域中具有通常 16 1360241 • · ·The TW4203PA uses a P-type thermoelectric material block. The P-type thermoelectric material blocks can also be electrically connected in parallel or in series. The integrated wafer with thermoelectric cooling and heat dissipating function disclosed in the above embodiments of the present invention can be a variety of different functional chips, in particular, a chip capable of providing high-speed operation or high-power operation, such as a central processing unit (CPU) of a computer. Or the source driver 1C of the liquid crystal display, and can be combined with packaging technologies such as wire bonding, solder ball (BGA) or flip chip (COF). The integrated wafer of the present invention integrates the heat dissipating unit directly onto the substrate of the wafer, so that the wafer itself has the function of active heat dissipation. The heat dissipating unit is disposed along the periphery of the functional operation area of the wafer to guide heat generated on the wafer to the outside of the wafer. Since the P/N type thermoelectric material block of the heat dissipating unit can be fabricated in the process of microelectronic components on the wafer, it does not increase the process cost. In addition, the heat dissipating units can be arranged in an array to provide a one-dimensional or two-dimensional heat dissipation effect of the wafer, and can more flexibly adjust the heat dissipation range of the heat dissipation area. In addition, the integrated heat-dissipating unit disclosed in the present invention has an internal heat-dissipating unit designed in addition to the P/N combination described above, and a single N- or P-type thermoelectric material may be used to provide heat dissipation for the wafer. purpose. In this way, a plurality of P-type or N-type thermoelectric materials are connected in parallel or in series, and an electric current is applied, so that one end of the thermoelectric material is a hot end and the other end is a cold end, thereby generating an endothermic heat release. The phenomenon. In the above, the present invention has been disclosed in the above preferred embodiments, but it is not intended to limit the present invention. The invention has the usual 16 1360241 • ·

TW4203PA 知識者,在不脫離本發明之精神和範圍内,當可作各種之 更動與潤飾。因此,本發明之保護範圍當視後附之申請專 利範圍所界定者為準。 17 1360241TW4203PA Knowledge-holders can make various changes and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of the invention is defined by the scope of the appended claims. 17 1360241

TW4203PA 【圖式簡單說明】 第1A圖繪示依照本發明實施例一之具熱電致冷散熱 功能的整合型晶片之示意圖。 第1B圖繪示第1A圖的整合型晶片沿著B-B’切線之 剖面圖。 弟1C圖繪不弟1A圖的散熱區局部之不意圖。 第2圖繪示實施例一的散熱單元以陣列形式設置於 散熱區之示意圖。 • 第3A、3B圖繪示一列散熱單元的放熱端延伸至相鄰 列散熱單元的吸熱端之示意圖。 第4A圖繪示第一導電元件延伸至絕緣層外之剖面 圖。 - 第4B圖繪示第一導電元件具有鰭狀結構之剖面圖。 . 第5圖繪示依照本發明實施例二之具熱電致冷散熱 功能的整合型晶片其散熱區局部之示意圖。 第6圖繪示第5圖部分的散熱單元被導通之示意圖。 ® 第7圖繪示實施例二的散熱單元以陣列形式設置於 散熱區之示意圖。 第8圖繪示依照本發明實施例三之具熱電致冷散熱 功能的整合型晶片之示意圖。 第9圖繪示依照本發明實施例四之具熱電致冷散熱 功能的整合型晶片之示意圖。 第10圖繪示N型熱電材料區塊之間以串聯之方式結 合之示意圖。 1360241TW4203PA [Simple Description of the Drawings] Fig. 1A is a schematic view showing an integrated wafer having a thermoelectric cooling and heat dissipating function according to an embodiment of the present invention. Fig. 1B is a cross-sectional view showing the integrated wafer of Fig. 1A taken along the line B-B'. Brother 1C picture is not intended to be part of the heat dissipation area of Figure 1A. FIG. 2 is a schematic view showing the heat dissipating unit of the first embodiment disposed in an array in a heat dissipating area. • Figures 3A and 3B show a schematic diagram of the heat dissipation end of a row of heat dissipating units extending to the heat absorbing end of the adjacent column heat dissipating unit. Fig. 4A is a cross-sectional view showing the first conductive member extending outside the insulating layer. - Figure 4B is a cross-sectional view showing the first conductive member having a fin structure. Fig. 5 is a view showing a part of a heat dissipating area of an integrated type wafer having a thermoelectric cooling and dissipating function according to a second embodiment of the present invention. FIG. 6 is a schematic view showing that the heat dissipating unit in the portion of FIG. 5 is turned on. ® Fig. 7 is a schematic view showing the heat dissipating unit of the second embodiment disposed in an array in a heat dissipating area. Figure 8 is a schematic view showing an integrated wafer having a thermoelectric cooling and heat dissipating function according to a third embodiment of the present invention. Figure 9 is a schematic view showing an integrated wafer having a thermoelectric cooling and heat dissipating function according to a fourth embodiment of the present invention. Figure 10 is a schematic view showing the combination of N-type thermoelectric material blocks in series. 1360241

TW4203PA 【主要元件符號說明】 100、300、400 :整合型晶片 110、310、410 :基材 112、312、412 :功能運算區 114、116、214、314、414 :散熱區 120、420 :微電子元件 130、230、330 :散熱單元 130A :吸熱端 • 130B :放熱端 141、141’、241、241’ :第一導電元件 141A’、141A”、241A” :延伸部 141C、141C’ :凸出端 142 :第二導電元件 . 150 :絕緣層 230R1、230R2、230RN :第 1、2、N 列散熱單元 260 :開關元件 * 271 :第-電力驅動線 272 :第二電力驅動線 2411 :第一導電體 2412 :第二導電體 P: P型熱電材料區塊 N:N型熱電材料區塊TW4203PA [Description of main component symbols] 100, 300, 400: integrated wafer 110, 310, 410: substrate 112, 312, 412: functional operation area 114, 116, 214, 314, 414: heat dissipation area 120, 420: micro Electronic components 130, 230, 330: heat dissipation unit 130A: heat absorption end 130B: heat release ends 141, 141', 241, 241': first conductive elements 141A', 141A", 241A": extensions 141C, 141C': convex Outer end 142: second conductive element. 150: insulating layer 230R1, 230R2, 230RN: 1, 2, N column heat dissipating unit 260: switching element * 271: first electric drive line 272: second electric drive line 2411: An electric conductor 2412: a second electric conductor P: a P-type thermoelectric material block N: an N-type thermoelectric material block

Claims (1)

1360241 TW4203PA 十、申請專利範圍: 1. 一種具熱電致冷散熱功能之整合型晶片,包括: 一基材,該基材之一表面設有一功能運算區與至少一 散熱區,該散熱區相鄰於該功能運算區; 複數個微電子元件,設置於該功能運算區中;以及 複數個散熱單元,沿著該功能運算區之至少一邊緣設 置於該散熱區中,各該些散熱單元包括相連接之一 P型熱 電材料區塊與一 N型熱電材料區塊,且各該些散熱單元之 ® N型熱電材料區塊連接至相鄰的散熱單元之P型熱電材料 區塊; 其中,當一電流依序通過該些散熱單元時,該些散熱 單元於接近該功能運算區之一側形成複數個吸熱端,且於 遠離該功能運算區之另一側形成複數個放熱端,藉此以降 . 低該些微電子元件之溫度。 2. 如申請專利範圍第1項所述之整合型晶片,更包 括: ^ 複數個第一導電元件,各別用以連接各該些散熱單元 之P型熱電材料區塊與N型熱電材料區塊,以及 複數個第二導電元件,各別用以連接各該些散熱單元 之N型熱電材料區塊與相鄰的散熱早元之P型熱電材料區 塊。 3. 如申請專利範圍第2項所述之整合型晶片,其中 該些第一導電元件係位於該些放熱端,該些第二導電元件 係位於該些吸熱端。 ^60.241 TW4203PA ^ 4.如申請專利範圍第3項所述之整合型晶片,其 該些散熱單元係以陣列之形式設置於該散熱區中,且二 的散熱單元之該些放熱端之該些第—導電元件係鄰近於 相鄰列的散熱單元之該些吸熱端之該些第二導電元件。 5. 如申請專利範圍第4項所述之整合型晶片,其中 位於列與列之間的該些放熱端之該些第—導電元件係各 具有一延伸部係延伸至相鄰之一吸熱端。 6. 如申凊專利範圍第5項所述之整合型晶片,並 該些第一導電元件係各為一 τ形結構。 7·如申請專利範圍第3項所述之整合型晶片,其中 该些第-導電元件於未連接該些p型熱電材料區塊與該些 N型熱電材料區塊之一側係各具有一鰭狀結構。 — 8. 如申請專利範圍第3項所述之整合型晶片,更 括: 一絕緣層,覆蓋於該些p型熱電材料區塊與該些N #型熱電材料區塊,並使該些p型熱電材料區塊與該些_ 熱電材料區塊隔離開來,且該些第一導電元件係暴露於該 絕緣層外。 9. 如申請專利範圍第1項所述之整合型晶片,更包 括: 複數個開關元件,係各別連接任二個相鄰的p型熱電 材料區塊與N型熱電材料區塊,該些開關元件用以選擇性 地導通或切斷該些散熱單元,藉此以調整該散熱區之散熱 範圍。 21 4^0.241 TW4203PA 0.如申睛專利範圍第9項所述之整合型晶片,更包 —第—電力驅動線; 第二電力驅動線;以及 其2,該些開關元件更用以連接該些P型熱電材料區 土至5玄第—電力驅動線,以及用以連接該些N型熱電材料 區塊至該第二電力驅動線。 11.如申晴專利範圍第9項所述之整合型晶片,更包 括: 複數個第一導電元件,各別用以連接各該些散熱單元 之p型熱電材料區塊與N型熱電材料區塊;以及 f數個第二導電元件,各糊以連接各該些散熱單元 之N型熱電材料區塊與相鄰的散熱單元之P型熱電材料區 塊。 12. 如申請專利範圍第丨丨項所述之整合型晶片其 籲中°亥些第—導電元件係位於該些放熱端,該些第二導電元 件係位於該些吸熱端。 13. 如申請專利範圍第12項所述之整合型晶片其 中該些第一導電元件係各包括一第一導電體與一第二導 電體,該第一導電體係對應於所處放熱端之該P型熱電材 料區塊,β亥第二導電體係對應於所處放熱端之該N型熱電 材料區塊,且該第一導電體與該第二導電體係具有一 隙。 14. 如申請專利範圍第13項所述之整合型晶片其 22 1360241 TW4203PA 中該些散熱單元係以陣列之形式設置於該散熱區中,該些 開關元件係用以連接任二個相鄰列的散熱單元,或是同一 行中相鄰的二個散熱單元。 15. 如申請專利範圍第9項所述之整合型晶片,更包 括: 至少一感測單元,係設置於該基材上,用以感測該散 熱區之溫度,以及 一控制單元,係連接至該至少一感測單元以及該些開 • 關元件,該控制單元用以於當該感測單元偵測到該散熱區 之溫度變化時,選擇性地致動該些開關元件。 16. 如申請專利範圍第9項所述之整合型晶片,其中 該些開關元件係各為一半導體元件。 17. 如申請專利範圍第1項所述之整合型晶片,其中 . 該功能運算區具有至少一弧形邊緣,該些散熱單元係沿著 該弧形邊緣設置於該散熱區中。 18. 如申請專利範圍第1項所述之整合型晶片,其中 ® 該些微電子元件係包括至少一半導體元件。 19. 一種具熱電致冷散熱功能之整合型晶片,包括: 一基材,該基材之一表面設有一功能運算區與至少一 散熱區,該散熱區相鄰於該功能運算區; 複數個微電子元件,設置於該功能運算區中;以及 複數個熱電材料區塊,沿著該功能運算區之至少一邊 緣設置於該散熱區中; 其中,當供給電流至該些熱電材料區塊時,該些熱電 23 1360241 • » TW4203PA 材料區塊於接近該功能運算區之一側形成複數個吸熱 端,且於遠離該功能運算區之另一側形成複數個放熱端, 藉此以降低該些微電子元件之溫度。 20. 如申請專利範圍第19項所述之整合型晶片,其 中遠些熱電材料區塊係為P型熱電材料區塊。 21. 如申請專利範圍第19項所述之整合型晶片,其 中έ亥些熱電材料區塊係為N型熱電材料區塊。 22. 如申請專利範圍第19項所述之整合型晶片,其 • 中該些熱電材料區塊係以並聯之方式電性連接。 23. 如申請專利範圍第19項所述之整合型晶片,其 中該些熱電材料區塊係以串聯之方式電性連接。1360241 TW4203PA X. Patent Application Range: 1. An integrated wafer with thermoelectric cooling and heat dissipation function, comprising: a substrate having a functional operation area and at least one heat dissipation area on one surface of the substrate, the heat dissipation area being adjacent to the heat dissipation area In the functional computing area; a plurality of microelectronic components disposed in the functional computing area; and a plurality of heat dissipating units disposed in the heat dissipating region along at least one edge of the functional computing area, each of the heat dissipating units including a phase Connecting a P-type thermoelectric material block and an N-type thermoelectric material block, and the N-type thermoelectric material blocks of each of the heat dissipating units are connected to the P-type thermoelectric material block of the adjacent heat dissipating unit; When a current is sequentially passed through the heat dissipating units, the heat dissipating units form a plurality of heat absorbing ends on one side of the functional computing area, and a plurality of heat releasing ends are formed on the other side away from the functional computing area, thereby Low the temperature of these microelectronic components. 2. The integrated wafer of claim 1, further comprising: ^ a plurality of first conductive elements, each of which is used to connect the P-type thermoelectric material block and the N-type thermoelectric material area of each of the heat dissipating units And a plurality of second conductive elements, each of which is used to connect the N-type thermoelectric material block of each of the heat dissipating units and the adjacent heat-dissipating P-type thermoelectric material block. 3. The integrated wafer of claim 2, wherein the first conductive elements are located at the heat releasing ends, and the second conductive elements are located at the heat absorbing ends. 4. The integrated wafer of claim 3, wherein the heat dissipating units are disposed in the heat dissipating area in the form of an array, and the heat dissipating ends of the two heat dissipating units are The first conductive element is adjacent to the second conductive elements of the heat absorbing ends of the heat dissipating units of the adjacent columns. 5. The integrated wafer of claim 4, wherein the plurality of first conductive members of the heat releasing ends between the columns and columns each have an extension extending to an adjacent one of the heat absorbing ends . 6. The integrated wafer of claim 5, wherein the first conductive elements are each a τ-shaped structure. The integrated wafer of claim 3, wherein the first conductive members have one side of each of the p-type thermoelectric material blocks and one of the N-type thermoelectric material blocks. Fin structure. 8. The integrated wafer of claim 3, further comprising: an insulating layer covering the p-type thermoelectric material blocks and the N# type thermoelectric material blocks, and making the p The thermoelectric material block is isolated from the plurality of thermoelectric material blocks, and the first conductive elements are exposed outside the insulating layer. 9. The integrated wafer of claim 1, further comprising: a plurality of switching elements, each of which is connected to two adjacent p-type thermoelectric material blocks and N-type thermoelectric material blocks, The switching element is configured to selectively turn on or off the heat dissipation units, thereby adjusting a heat dissipation range of the heat dissipation region. 21 4^0.241 TW4203PA 0. The integrated wafer according to claim 9 of the claim, further comprising a first electric drive line; a second electric drive line; and 2, the switch elements are further connected to the The P-type thermoelectric material region is connected to the 5th-first power-electric drive line, and the N-type thermoelectric material block is connected to the second electric drive line. 11. The integrated wafer of claim 9, wherein the integrated wafer further comprises: a plurality of first conductive elements, each of which is used to connect the p-type thermoelectric material block and the N-type thermoelectric material area of each of the heat dissipating units And a plurality of second conductive elements, each paste connecting the N-type thermoelectric material block of each of the heat dissipating units and the P-type thermoelectric material block of the adjacent heat dissipating unit. 12. The integrated wafer of claim 2, wherein the first conductive elements are located at the heat releasing ends, and the second conductive elements are located at the heat absorbing ends. 13. The integrated wafer of claim 12, wherein the first conductive elements each comprise a first electrical conductor and a second electrical conductor, the first conductive system corresponding to the heat release end The P-type thermoelectric material block, the β-Second conductive system corresponds to the N-type thermoelectric material block at the heat-dissipating end, and the first conductive body and the second conductive system have a gap. 14. The integrated wafer of claim 12, wherein the heat dissipating units are disposed in the heat dissipating region in an array, wherein the switching elements are used to connect any two adjacent columns. The heat sink unit, or two adjacent heat sink units in the same row. 15. The integrated wafer of claim 9, further comprising: at least one sensing unit disposed on the substrate for sensing a temperature of the heat dissipation zone, and a control unit The control unit is configured to selectively actuate the switching elements when the sensing unit detects a temperature change of the heat dissipating area to the at least one sensing unit and the opening and closing elements. 16. The integrated wafer of claim 9, wherein the switching elements are each a semiconductor element. 17. The integrated wafer of claim 1, wherein the functional computing area has at least one curved edge, and the heat dissipating units are disposed in the heat dissipating region along the curved edge. 18. The integrated wafer of claim 1, wherein the microelectronic components comprise at least one semiconductor component. 19. An integrated wafer having a thermoelectric cooling and heat dissipating function, comprising: a substrate having a functional operation area and at least one heat dissipation area on a surface thereof, the heat dissipation area being adjacent to the functional operation area; a microelectronic component disposed in the functional computing area; and a plurality of thermoelectric material blocks disposed in the heat dissipating region along at least one edge of the functional computing region; wherein, when current is supplied to the thermoelectric material blocks The thermoelectric 23 1360241 • » TW4203PA material block forms a plurality of heat absorption ends on one side of the functional operation area, and forms a plurality of heat release ends on the other side away from the functional operation area, thereby reducing the micro The temperature of the electronic components. 20. The integrated wafer of claim 19, wherein the farther thermoelectric material block is a P-type thermoelectric material block. 21. The integrated wafer of claim 19, wherein the thermoelectric material blocks are N-type thermoelectric material blocks. 22. The integrated wafer of claim 19, wherein the thermoelectric material blocks are electrically connected in parallel. 23. The integrated wafer of claim 19, wherein the thermoelectric material blocks are electrically connected in series. 24twenty four
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Publication number Priority date Publication date Assignee Title
US10648708B2 (en) 2016-12-15 2020-05-12 Industrial Technology Research Institute Thermoelectric module

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CN110729339B (en) * 2019-11-29 2022-12-06 京东方科技集团股份有限公司 Organic light emitting diode display device and manufacturing method thereof

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10648708B2 (en) 2016-12-15 2020-05-12 Industrial Technology Research Institute Thermoelectric module
US10955174B2 (en) 2016-12-15 2021-03-23 Industrial Technology Research Institute Thermoelectric module

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