TWI329918B - Semiconductor multi-package module having wire bond interconnection between stacked packages - Google Patents

Description

。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 This application also claims the priority of the following US applications, each of which was filed on August 2, 2003: US application number 1〇/63 2,549, entitled “Semiconductor Multiples with Wire Junction Interconnects in Stacked Packages "Semiconductor multi-package module having wire bond interconnection between stacked packages"; US Application No. 10/632,568, entitled "Package with Stacked on Ball Grid Array Package, Between Packaged Packages" "11S emi c〇nductor multi-package module having package stacked over ball grid array package and having wire bond interconnection between stacked packages"; US application number 10/632,551, named "Semiconductor multi-package module having wire bond interconnect between stacked packages and having electrical shield"; US Application No. 10/632,552, Named "Stacking wafers with wafers facing up "Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire Bond interconnect between stacked packages"); US application number 1 0/63 2,5 5 3 'named "packages with stacked wafer flip-chip arrays stacked on the die-down 88127 -6- 1329918, and in "Semiconduct® multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages" US Application No. 1 0/632,550, titled "Semiconductor Multi-Package Modules with Stacked Die-Chip Packages and Threaded Interconnects Between Stacked Packages" ("Semic〇nduct()r mufti- Package module including stacked-die packages and having wire bond interconnect between stacked packages") This reference is used as reference. TECHNICAL FIELD OF THE INVENTION The present invention relates to semiconductor packages. [Prior Art] Portable electronic products such as mobile phones, mobile computing devices, and a variety of consumer products all require high semiconductor function and performance, minimum thickness and weight in a limited trajectory, and have the lowest cost. This will drive the industry to increase integration on individual semiconductor wafers. Recently, the industry has begun to implement integration on the “z-axis”, that is, by stacking wafers and using up to five wafers in a single package. This provides a dense wafer structure with a single wafer package track's thickness of 5 x 5 mm to 40 X 40 mm' and its thickness has been continuously reduced from 2 · 3 mm to 〇 5 mm. The cost of a stacked die package is only incrementally at the cost of a single die package, and the assembly yield is relatively high, as compared to packaging the die in individual packages to ensure a competitive The final cost of force 88127 1329918. In fact, the number of wafers that can be stacked in a stacked-die die package is limited to the low final test yield of the stacked die package. Inevitably, some of the grains in the package have certain drawbacks, so the softest package test yield will be the product of individual die test yields, each of which is less than (10)%. This in particular poses a problem 'even in the package - only the stack: two dies" but one of them - has a low (four) due to design complexity or technology. · Another limitation is the low power dissipation of the package. Heat is transferred from one die to another: there is no obvious heat path φ fe except for the ball to the motherboard. Another limitation is the electromagnetic interference between the grains of the stack, especially between the RF and the digital die' since each die does not have electrical shadowing. - Another way is to integrate the "Z-axis" to stack the die package to form a multi-package module. Stacked packages offer advantages over stacked die packages. ^Example, g, each package with RF die can be electrically tested, and in the package such as 隹 β β, then it is rejected 'unless it shows satisfactory performance, therefore, the multi-package module of the final stack is good. The rate can be maximized. More efficient cooling can be provided in a stacked package by inserting a heat sink between the package in the stack and the top of the module. The package stack allows electromagnetic shielding of the RF die and avoids interference with its die in the module. Each day, or more than one die, can be packaged in a different package in the stack of the most efficient first-order interconnects 88127 -8 - 1329918 for the die type and configuration. • For example, wire contacts or flip chip, which maximizes efficiency and minimizes cost. The z-interconnection between packages in a stacked multi-package module is a key technology in terms of manufacturability, billing, and cost. The proposed Z interconnect includes a peripheral ball connection, and the use of a peripheral solder ball of the ic substrate on top of the bottom package in the multi-package module of the bottom package limits the number of connections that can be made. , i limits design flexibility and results in thicker and higher cost packages. Although the use of a flexible curved substrate in principle provides design flexibility, there is no established manufacturing mechanism for the bending process. Furthermore, the use of a flexible curved substrate requires one or two metal layer flexible substrates, which are not mussels. In addition, the curved flexible substrate method is limited by the low pin count application due to the limitation of the winding circuit in the two metal layer substrates. Please refer to Figures 1-4 for further details of the different z interconnect structures. 717 of Figure 1 is a cross-sectional view of a structure of a standard ball grid array ("BGA") that has been well established in the industry. It can be used as a bottom package in a stacked multi-package module ("MpM"). As shown at 10, the BGA includes a die 14 attached to a substrate 12 having at least one vestibular layer. It can use a variety of substrate types including, for example, a plywood having a 2-6 metal layer, or an enlarged substrate having a 4-8 metal layer, or a flexible polyimide having a 丨_2 metal layer, or a Π Porcelain layer substrate. The substrate 12, shown, for example, by Figure 1, has two metal layers 121, 123, each of which is patterned to provide a suitable circuit and connected by vias 122. The die is conventionally attached to the surface of the substrate using an adhesive, which is basically referred to as a die attach epoxide, as shown in FIG. 13 and in the configuration of the figure, the crystal The surface of the substrate to which the particles are attached may be referred to as 88127 • 9-1329918 as the "upper" facing surface, and the metal layer on the surface may be referred to as "the upper j metal layer, although the die attaching surface is not in use. It is necessary to have any specific direction. In the BGA of Figure 1, the die line contacts to the line contact side on the metal layer above the substrate to establish an electrical connection. The die 14 and the line contacts The 6 is coated with a molding compound 17, which provides protection against ambient and mechanical stresses to facilitate handling procedures and provides a surface for identification. The solder balls 18 are reflowed to the substrate. Above the contact pads on the lower metal layer to provide a motherboard (not shown) interconnected to a final product, such as a computer. The solder masks 125, 127 are patterned into the metal layers 12ι, ι23 Above, the violent road is used as an electrical connection under the joint, for example The line contact and the contact point 接合 are joined to the green contact 16 and the ball 18. The cross-sectional view of an exemplary structure of a 2-stack MPM is shown in FIG. 2, labeled 20, wherein the package is packaged in the stack. The z-interconnection is made by solder balls. In this MPM, a first-package (which can be called a "bottom" package) is similar to a standard BGA, as shown in Figure ( (and similar Reference numerals refer to the features of the bottom package similar to those in FIGS. 1 and 2. A second package (which may be referred to as a top package) is stacked on the bottom package, which is similar in structure to the child department. The package, except that the solder ball system in the top package is disposed at the periphery of the top package substrate, it affects the z interconnect without interfering with the cladding of the bottom BGA. In particular, the top package of Figure 2 A die 24 is attached to the substrate 22 of the octa V metal layer. The top package substrate 22 has two metal layers M1, cut, for example, as shown in FIG. 2, each of which is patterned to provide a suitable circuit, and Connected by a through hole 222. The die used 88127 10- 1329918 uses an adhesive agent A surface attached to the substrate (the "upper" surface) is substantially referred to as the die attach epoxide, as shown in Figure 2 of Figure 2. In the top package of the MPM of Figure 2, In the bottom package, the die bond contacts are electrically connected to the wire contacts of the metal 35i above the die. The top package die 24 and the wire contacts 26 utilize a top package molding compound 27 The solder balls 28 are reflowed onto the contact pads on the peripheral voids of the metal layer below the top package substrate to provide interconnection to the bottom package. The solder masks 225, 227 are patterned to Above the metal layers 221, 223, the underlying metal is exposed as an electrical connection, for example, at the line contact and the contact 塾' to bond the wire contact 26 and the solder ball 28. The z interconnect in the MPM of FIG. 2 can be soldered to the peripheral contact pad on the metal layer above the bottom BGA by reflow soldering the solder ball 28 attached to the peripheral pad on the metal layer under the top package substrate In this configuration, the distance h between the top and bottom packages must be at least as large as the cladding height of the bottom package, which may be 0.3 mm or more, and substantially less than mm and 1.5 mm. Between the ranges. The solder balls 28 must therefore have a sufficiently large diameter when reflowed, and have good contact with the contact 塾 of the bottom BGA; that is, the solder ball 28 must have a diameter larger than the package. Cover height. A larger ball diameter defines a larger ball pitch, which thus limits the number of balls that can be placed in the available space. In addition, the perimeter of the solder balls is configured such that the bottom BGA is significantly larger than the mold cover of a standard BGA. In a small BGA, which is commonly referred to as a wafer level package ("CSP"), the wafer body is 7 mm larger than the die. In standard BG A, the body size is approximately 2 mm larger than the mold cover. In this configuration, the top package substrate must have up to 88127 -11 -

I32991R Patent Application No. 92丨25625 Patent Application Replacement Page (September 95) Two metal layers are provided to facilitate the electrical connection. The TF of Figure 3 is a cross-section of the exemplary structure of a known 2-stack flip chip MPM®' which is typically not 3 Å. In this set, the bottom flip chip package includes a substrate 32 having a patterned metal layer 31, the more original content <r> on which the germanium die 34 is bonded by the flip chip Block 36 is connected, such as a solder bump, a gold button bump, or an anisotropic conductive film or paste. The flip chip bumps are attached to an array of patterned bump pads on the active surface of the die, and because the active surface of the die faces down the patterned metal layer on one side of the substrate This configuration can be referred to as a "down" flip chip package. Filling the polymer side between the die and the substrate 33 provides protection for the surrounding and adds mechanical integration to the structure. The flip chip package, wherein the substrate has a metal layer only on the upper surface, which is connected to the lower layer circuit (for example, a motherboard by solder balls 38 connected to the metal layer through the solder vias 35) It is not shown in the figure). The top BGA in this configuration is similar to the bottom bga except that the top-slung BGA has a metal layer such as <z interconnect solder ball 338 attached to the periphery of the child's top substrate (via the top substrate) Solder vias 335) ^ solder balls 338 are soldered back to the metal layer 331 of the bottom substrate to provide the z interconnect. In particular, in this configuration, the top BGA includes a substrate having the patterned metal layer 331 on which the top BGA die 334 system = flip chip bumps 336 are connected. The polymer side is filled 333 between the top pass die and the substrate. The structure of Figure 3 is more suitable for high power efficiency applications' but it has similar limitations to the configuration of the type shown in Figure 2. Ratio map

2 configuration has been improved 88127-950915.DOC where the bottom BGA is not molded, allowing the use of smaller diameter (h) solder balls around the top 12 - 12 / / 1329918 BGA Between the packages. Figure 4 is a cross-sectional view of an exemplary structure of a known 2_stacked curved flexible substrate MpMi, as shown at 40. The bottom package in the configuration of Figure 4 has a 2-metal layer flexible substrate upon which the die is bonded through the posts to the first metal layer of the substrate. The second metal layer of the bottom package substrate carries a remote solder ball for connection to the underlying circuitry, such as a motherboard (not shown). The substrate is sufficiently large to be bent over the top of the package, thereby being brought up into the electrical interconnect, wherein they can be connected to the top package by an array of solder balls on the top package (as described below) example). The space around the die and the space between the die and the bent substrate is covered to provide protection and strength. Referring to FIG. 4, the 2-metal layer bottom package substrate 42 includes a first metal layer 141 and a second metal layer 143, each of which is patterned to provide a suitable circuit, which is connected by a via 142. The first metal layer is processed over a portion of the bottom substrate (eg, using a punch array) - an array of arm beams or sheets 46 configured to correspond to the bottom package crystal An array of interconnected pads on the active surface of the pellet. On this portion of the substrate 42, which may be referred to as the "die attach portion", the first metal layer 141 is oriented upward. The die is aligned on the die attach portion of the substrate with the active surface down and joined to the cantilever beam and corresponding interconnects, typically exemplified by a combination of pressure, heat and The thermal sonic process of ultrasonic energy to complete the electrical connection. The die 44 is fixed to the die attaching portion of the flexible substrate 42 using an adhesive 43. The second metal layer 143 of the bottom package substrate 42 faces downward into the die attach portion of the substrate. Soldering 88127 • 13· 1329918 Balls 4 8 are reflowed into contacts on an array of lower facing portions of the second metal layer 14 3 to provide the interconnection of the VIPM to the underlying circuitry (not shown) ). A solder mask 147 is patterned over the second metal layer 143 to expose the underlying metal as a junction for electrical connection. 'It includes a contact 塾' connected to the underlying circuit by solder balls 48. And the contacts 塾' connected to the top package by solder balls are as follows. The other portion of the bottom package substrate 42 extends adjacent to the die attach portion. The portion is bent upwardly and positioned above the bottom package die 44. Above the portion of the flexible substrate 42 that is bent over, the first metal layer is facing upward. In the configuration of FIG. 4, the top package is generally similar to FIG. 1 (8) where the die tie contacts are in place at the line contacts above the metal layer above the substrate to In particular, the top package die 4 is attached to a substrate 12 having two metal layers 121, 123 (in this example), each of which is patterned to provide a suitable circuit. The die 122 is connected. The die is conventionally attached to the upper surface of the top package substrate by an adhesive 13, which is typically a die attach epoxide. The die 14 and the kelly contact 16 are It is coated with a molding compound 17 which provides protection against the surrounding and mechanical stresses for processing and provides a surface for marking for identification. The solder balls 18 are reflowed to the The contact pad 143 is bent over the upper metal layer of the upper bottom package substrate to interconnect the z between the top and bottom packages. The structure of FIG. 4 has the advantage that the substrate bent on the substrate can be Providing a fill area over the upwardly facing surface of the bottom package substrate that is bent over, To accommodate a stack of solder balls in the top package and accommodate more complex interconnects 88127 • 14-1329918 between the two packages. It also provides a small package trace. A major drawback of this configuration The cost of the substrate is high and the bending techniques and equipment are not available. A common feature of all of these stacked package configurations is that they protect each package and provide a production MPM with a higher final test yield. The present invention relates to a multi-package module having a stacked package. According to the present invention, the z-interconnection between the stacked packages in the MPM is based on a line contact. In general, the present invention It is characterized by a configuration having a plurality of different stacked packages, and a method of stacking and interconnecting different packages by a z-connector based on a wire contact. In the multiple package module according to the present invention, the package is stacked A variety of BGA packages and/or any platform grid array ("LGA") package may be included: the package stack may include wire bonds and/or flip chip packages; the package stack may be included in the stack or a thermal enhancement feature generated thereon; the package stack can include one or more packages of wire bumps to a flip chip die at the top or bottom of the BGA or LGA; the package stack can be included in the stack One or more BGA and/or LGA packages having more than one die in a package-inserted package; the stack may include one or more packages of electromagnetic, shadowing; and the stack may comprise any substrate, plywood or assembly Or ceramic, which provides for the formation of a z-interconnect pad by bonding around the packages. In a general aspect, the invention features a multi-package module having stacked lower and upper packages, each package including a die attached to a substrate in which the upper and lower substrates are interconnected by wire contacts. The present invention provides excellent manufacturability, high design flexibility, and low cost 88127 -15 - 1329918 for manufacturing - Stacking package & low rim and small track. The line contact Z interconnection technology has been established in the industry; it is the lowest cost interconnection technology, and can be directly applied, and does not require significant modification, and can be used in the multi-package module of the present invention. It provides design flexibility for the relative dimensions of the BGA to LGA, which can be bridged by the length of the wire. # From the available technology and equipment, the wire in the first line contact can be as short as 0 5 mm, or as long as mm. The configuration of the 琢Z interconnect pads can be implemented by a BGa&lga substrate design or one of them. In addition, using the wire contacts in accordance with the present invention, the z-interconnects can be formed between pads that are not precisely aligned with each other, by so-called "out of sequence bondlng", which is currently It has been used in the industry. The line-to-point spacing is the finest technology in the industry currently at 50 microns and is expected to reach 25 microns. This can result in a large number of z interconnects. Both manufacturability and design flexibility can contribute. The low cost of the MPM. The minimum trajectory of a typical BGA or LGA is 丨7 mm larger than the grain size. Adding the z-interconnect dot pad according to the present invention will increase the BGA by at least mm8 mm. A typical BGA thickness is 1.0. Mm 'and LGA thickness is 0.8 mm. A typical adhesive thickness ranges from 0.025 mm to 0.100 mm. The footprint and thickness of the stacked package MPM according to the present invention can be acceptable for most applications. In some embodiments, the multiple package module includes three or more packages that are sequentially fixed to form a stack. In another aspect, the present invention features a first stack ("bottom" ") and second ( "Top" packaged multi-package modules, each package comprising a die attached to a / substrate and connected to the substrate by wire contacts, wherein the 88127 -16 - top package substrate and the bottom &&#lower package substrates are interconnected by wire contacts. In each of the two embodiments, each package is completely coated with a mold material; in other embodiments, at least - The package is only coated to some extent during the post-processing, and during the test to protect the line contact between the die and the substrate. In some cases, in the case of electricity, Α, 丨丄-, & Λ palladium The second package is a b (}A package in two k specific embodiments, the lga package substrate is a single-metal layer substrate. "Wan-face" is characterized by - stacked with - (" Bottom") ΒΓ = (top ^") packaged multi-package module, the bottom package is - GA package 'each package # ^ Α, 耆; a substrate die, wherein the top package substrate and the BGA The package substrate is interconnected by wire contacts. The invention is characterized by having a multi-package module of a stacked package In the configuration of the group 'at least one of them, the xenon d0 package has an electrical mask. In some such embodiments, the <=> RF die: it is used to limit the daily grain in the babies repackaging module < between the electromagnetic drying. ..., 匕 has - electric cover f, in the case of the other side of the 'the invention' and the second ("top is folded with the first "bottom") on the αt α"' ' Package H The bottom package is in the in-day solar configuration - the top substrate is a wide-area, chip/flip-chip BGA package in which the 4th package is interconnected by wire contacts. In some cases, and in the case of mussels, the top package is - θ ^ in the example, in the case of the 田 田 丘 阳 阳 , , , , , , , , , , , , , , , , , , , , , , , , , , 88127 -17- 1329918 to separate. In this case, and in the ', ..., μ embodiment, the flip-chip on the package is ::曰:, -electrically shielded. In some embodiments, the bottom seal == - an embedded ground plane that is also configured for use as an electrical shield. : In addition, "the aspect of the invention is characterized in that - the stack has a - ("bottom") 曰 = packaged multi-package module; the bottom package is - 曰 9 ^, 'and resent' - flip chip The flip chip BGA package, and the middle sub-substrate and the bottom package are interconnected by wire contacts. In some embodiments, the flip chip die on the bottom package has an electrical mask = on the other side, and the present invention is characterized by stacking the _ (bottom) and second d) packages. a module, each of which includes a die attached to the substrate and connected by a wire contact, wherein the top package substrate and the bottom package substrate are interconnected by wire contacts, and wherein the bottom package At least one of the top-span packages is a stacked die package. In some embodiments, the top package and the bottom package are both stacked die packages. In another general aspect, the invention features a multi-package module that includes at least one die-turn package on a first (bottom) package substrate. Above the first package, and a second (top) package comprising at least one die on a second (top) package substrate and forming a line connection between the first and the top and bottom substrates Point z interconnect. Preferably, the packages can be tested prior to assembly, which can discard packages that do not meet performance or reliability, so it is preferred that the first package and the second package tested as "good" are used for the group. Installed in the module. In the present invention, the present invention features a method of fabricating a multi-package module 88127 • 18-1329918 comprising an LGA package stacked on a BGA package, wherein the top and bottom packages are electrically connected by wire contacts interconnection. In accordance with this aspect, a BGA package is provided, which is typically an undivided strip of a molded BGA package; preferably, the BGA package in the strip performs a performance and reliability test and is identified as "good" The package is subjected to subsequent processing; the adhesive is dispensed onto the upper surface of the molded "good" BGA package; a simulated molded platform grid array package is provided; preferably, the LGA package is tested and identified "good"; these "good" LGA packages are the adhesive placed over the molding of the "good" BGA package and cure the adhesive; as needed and preferably, on the stack A plasma cleaning operation is performed after the top LGA is formed with the bottom BGA package to form a wire contact z interconnection; an additional plasma cleaning can be performed as needed and preferably, followed by molding the MPM. Further steps include attaching a second layer of interconnected ball to the underside of the module; testing and separating the completed module from the strip, for example by sawing or by punching; and for other uses Package. In some embodiments, the LGA (top) package is fully molded, having a generally planar upper surface of the LGA package; in other embodiments, the line contacts, but not the LGA The entire upper die surface of the package is molded, and the LGA is molded by dispensing the molding compound only around the die and near the gap of the LGA package substrate. In another aspect, the invention features a method of stacking a multi-package module on a LG A package stacked on a BGA package, wherein the top and bottom packages are interconnected by wire contacts, and Wherein the bottom package has an electromagnetic shielding. In accordance with this aspect, a ball grid array package is provided, the 88127-19-1329918 typically being unseparated strips of a BGA package; the BGA packages having a shield secured over the die; preferably, The BGA package in the strip is tested for performance and reliability and identified as "good" for subsequent processing; the adhesive is dispensed over the upper surface of the shield on the "good" BGA package; a separate molded platform grid array package; preferably, the LGA package is tested and identified as "good"; the "good" LGA package is placed on the adhesive over the mask and the adhesive is cured Performing a plasma cleaning operation as needed and preferably after forming a wire contact z interconnection between the top LGA of the stack and the bottom BGA package; an additional may be performed as needed and preferably The plasma is cleaned and then molded to form the MPM. Further steps include attaching a second layer of interconnected solder balls to the underside of the module; testing and separating the completed module from the strip, such as by sawing apart or by punching; and for other uses Package. In some embodiments, the method includes the steps of providing a heat sink for the multiple package module. In this aspect of the invention, a similar process is performed with additional steps to insert a "drop-in" molding operation into the mounted heat sink, or to insert a "drop-in" molding operation to install a simple a planar heat sink; or by applying an adhesive to the upper surface of the top package molding, or to the upper surface of a spacer on the top package, and fixing the planar heat sink to the adhesive. In another aspect, the invention features a method of fabricating a multi-package module comprising a top package stacked on a bottom die of a lower die wafer BGA, wherein the top and bottom packages are by wire Contact 88127 -20 - 1329918 is interconnected. In accordance with this aspect, a bottom die package bga bottom package i is provided as needed to be molded 'typically in a lower die flip chip ball grid array bottom beta package, preferably a bga package in the strip. Performing performance and reliability tests, and the package identified as "good" accepts subsequent processing. The adhesive is dispensed on the upper surface (back side) of the die on a "good" BGA package. The top (eg, the platform grid array) is packaged and molded as needed; preferably 'tested for the LGa package and identified as "good"; the "good" (10) package is placed in the shadow 'On the adhesive on the 'and curing the adhesive; as needed and preferably, after the wire contacts are formed between the top LGA and the bottom BGA package of the stack, a plasma cleaning operation is performed; as needed and Preferably, an additional plasma cleaning can be performed followed by molding to form the MpM. Further steps include attaching a second Zen solder ball to the underside of the module; testing and dividing the module into a strip, such as by taper splitting or by punching; and for other uses To package. In another aspect, the present invention features a method of including a multi-capacitor module on a top-substrate package stacked on a lower-die wafer flip-chip bottom package, wherein the top and bottom packages are The wire contacts are interconnected, and wherein the bottom package has an electrical shield. In accordance with this aspect, a process similar to that described above for the unmasked bottom flip chip bottom package is performed with an additional step of inserting the shield to the bottom package flip chip die. Provide a bottom-wafer flip-chip bga bottom package, if necessary, usually in the bottom die of the lower die wafer wafer grid array; preferably the BGA package in the strip is efficient and reliable Test 88127 -21 - 10 test, and know the other 丨 JA "White is assigned in the "good::: ready to accept the subsequent treatment; adhesive agent Du Fu good" BGA seal on the grain; provide separation The top part (for example, the flat AU side) is molded on the foot; preferably, the ^ grid array package is 'good for visual needs'. · Dream, etc., "tested in DGA package" and identified as "good ^ ^ package system The adhesive center placed on the shadow is 'solidified (four) adhesive; as needed and better: the top LGA and the bottom BGA are sealed in the width of the joint #^ 61 > Gp operation; as needed and preferably, may be performed to form the MPM molding. Further steps include attaching a layer of interconnected solder joints, forming a mold and the strip, for example Raise:: "Lower side: test and separate" 'hunting by sawing or dividing by punching; and for It is used for packaging. In another aspect, the invention is characterized by a method comprising a top package stacked on a bottom package of an upper flip chip BGA, and an I, a portion, and a portion The package is electrically interconnected by wire contacts. According to this aspect, there is provided an upper die flip chip ball grid array package, which is typically unmolded and passed through an upper die flip chip ball grid array package. Preferably, the BGA package in the strip is tested for performance and reliability and the package identified as "good" is subjected to subsequent processing; the adhesive is assigned to "good" a top surface of the substrate on the BGA package; providing a second package, which in some embodiments may be a stacked die package, which may be optionally and typically molded; preferably, the test LGa package, and identified as "good"; these "good" LG A packages are placed on the adhesive on the BGA substrate and cure the adhesive; it is preferred for S8127 -22- 1329918 Ground is formed between the top LGA of the stack and the bottom bga package, The cleaning operation is performed after the contacts Z are interconnected; it is carried out as needed and preferably --additional power cleaning, followed by formation of the molding. The step of step-by-step includes attaching a second layer of interconnected ping balls to the underside of the module; testing and separating the completed module from the strip, for example by splitting or by punching; and for other Use for packaging. In another aspect, the invention features a method of fabricating a multi-package module comprising a top package 4 stacked on top of a stacked bottom package, the top and bottom packages being electrically connected by wire contacts interconnection. In accordance with this aspect, a stacked die BGA package is provided that is typically molded and is typically provided as an unseparated long end of a stacked grain ball grid array package; preferably in the long BGA The package that is identified as "good" by the (4) performance and ^^^^ is subjected to subsequent processing; the adhesive is the knife attached to the upper surface of the die BGA package of the good J stack 4. Usually it is On the often planar upper surface of the package molding, a second separate package is provided, which is often molded, which can be optionally used as a stacked die package; preferably the second package is tested and Identify 4 "good" 'child' good J second package is placed on the adhesive on the upper surface of the BGA' i cure the adhesive; it is preferably packaged on top and bottom of the stack as needed After forming a wire contact z interconnection, an electric 2 cleaning operation is performed, preferably as needed - (4) plasma cleaning, followed by formation of the MPM molding. Further steps include attaching a second layer of interconnect bonding The ball is on the lower side of the module; the test and separation of the completed mold And the strip 'is separated, for example, by silver slitting or by punching; and for other uses, 88127 • 23 · 1329918. In some embodiments of the method, provided in an undivided strip Two or more first molded packages, and assembly of two or more modules on the strip, and separation of the two or more modules after the assembly is completed. In the method of fabricating a multi-package module in accordance with the present invention, the electrical connections between the stacked packages use conventional wire contacts to form 2 interconnections between the upper and lower package substrates in the stack. Benefits include the use of established manufacturing architectures, low production costs, design flexibility, and a thin package. The Z interconnect contacts can be implemented in a variety of package and module configurations, a bump formed by a conductive pad on the two package substrate pulls the wire to a conductive pad on the first package substrate; or is pulled out by a bump formed on a conductive pad on the first package substrate Wire to the second package base A conductive raft on the present invention. The present invention provides an assembly of more than one semiconductor in a thin and minimum trace package at the lowest cost and highest final test yield. Moreover, some stack configurations in accordance with the present invention allow for height Thermal performance, high electrical performance, or electrical isolation of a digital component from an RF component. Other stacked configurations provide very thin structures for handheld or consumer products. All methods provided for assembly allow for this stacking The individual tests of the package can maximize the final yield of the module. The additional % steps will be used to complete the multiple package module in accordance with the present invention. For example, it is preferably the lowest package in the stack. The solder balls for the connection will not adhere to the motherboard, but until the final step of the separation of the MpM 88127 -24-1329918. Any point, such as electric fine can be used in many places in the process Six turns, for example, after the adhesive has cured, and before the coating, and like before and/or after the 'interconnect line junction. Individual packages, such as connectors, can be provided as strips of several packages, which are processed during manufacturing, and are separated after the multi-package module process. In the method according to the present invention, the child-filled package stack can be formed by a 疋-encapsulated 疋-package of a non-single av ^ ^ αλ ' ^ . Until the completion of the formation of these quite, 'and the process of the process, the cough will continue to go to r Α ” Ding Feng 3, the junction of the spring junction 2, and then separate the temple module. The MPM according to the present invention can be used The present invention will now be described in further detail with reference to the drawings, which illustrate other specific embodiments of the invention. The relationship between the features of the present invention and other features and structures is illustrated and not to scale. In order to improve the clarity of the presentation, in the drawings illustrating the specific embodiments of the present invention, corresponding to others The elements 2 of the elements shown in the drawing are not all specifically renumbered, although they are clearly identifiable in all of the drawings. Referring now to Figure 5A', in accordance with one aspect of the present invention: a core-packaging module specific A cross-sectional view at 5 实施 of the embodiment, and a 勹 士 ', including a stacked first ("bottom") and a second ("top") package, wherein the stacked packages are connected by wire contacts interconnection. In the embodiment shown in FIG. 5A, the bottom package 400 is a conventional BGA package, such as 8S127-25· 1329918 in FIG. 1 . In the specific embodiment, the bottom package 4 includes a crystal. The particles 4丨4 are attached to a bottom package substrate 412 having a soil y-metal layer. It can use any of a variety of substrate types, for example, including: a plywood having a 2-6 metal layer, or a construction substrate having a 4-8 metal layer, or a flexible polyimide ribbon having a 2 metal layer. Or a ceramic multiple layer substrate. The bottom package substrate 412, shown by the example of Fig. 5A, has two metal layers 42A, 423, each of which is patterned to provide a suitable circuit and connected through vias 422. The die is conventionally attached to a surface of the substrate using an adhesive, substantially referred to as a die attach epoxide, as shown at 413 in Figure 5A, and in the configuration of Figure 5A. The surface of the substrate to which the die is attached may be referred to as an "upper" surface, and the metal layer on the surface may be referred to as an "upper" metal layer, although the germanium die attach surface does not need to have any use in use. Specific directionality. In the bottom BGA package of Figure 5A, the die line contacts are connected to the line contacts of the metal layer above the substrate to establish an electrical connection. The die 414 and the wire contact 416 are coated with a molding compound 417, which provides protection against ambient and mechanical stresses for processing operations, and provides a bottom package upper surface 41 9 to a stackable The second ("top") package. The solder balls 4] 8 are reflowed onto the contacts of the metal layer below the remote substrate to provide a sub-layer circuit, such as a computer or the like, interconnected to a motherboard (not shown) such as a final product. Solder caps 415, 427 are patterned over the metal layers 421, 423 to expose the underlying metal at the contacts for electrical connection, such as at the wire contacts, and for bonding the wire bonds 416 and solder balls 41 8 contact 塾. In the embodiment shown in FIG. 5A, the top package 5A is a platform grid 88127 • 26 · 1329918 outline array (LGA) package, which can be similar to a BGA package, such as in FIG. F has;!: The dry ball is mounted to the joint of the lower surface of the substrate. Particularly in this example, the top package 5A includes a die 514 attached to a top package substrate 512 having at least one metal layer. It can use any of a variety of substrate types; the top package substrate 512 shown by the example of FIG. 5 has two metal layers 521, 523, each of which is patterned to provide appropriate circuitry and through the via 522 connection. The die is conventionally attached to the surface of the substrate using an adhesive, which is basically referred to as a die attach epoxide, as shown by 513 in Figure 5A, and in the configuration of the figure. The surface of the substrate to which the germanium grains are attached may be referred to as an "upper" surface and the metal layer on the surface may be referred to as a "top" metal layer, although the die attach surface does not need to have any use in use. Specific directionality. In the top LGA package of the embodiment of Figure 5A, the die tie contacts to the line contacts of the metal layer above the substrate to establish an electrical connection. The die 5 14 and the wire contact 5 16 are coated with a molding compound 5丨7, which provides protection against ambient and mechanical stress for processing work, and has a top package upper surface 519 . The top package 5 is stacked on top of the bottom package 400 and attached using an adhesive 5〇3. A solder mask us is patterned over the metal layers 521, 523 to expose the underlying metal at the contacts for electrical connection, such as at the line contacts, to bond the line contacts 5 16 . The z-interconnection between the top package 500 and the bottom package 4A of the child stack is made by connecting the wire contacts 5 1 8 of the top metal layer of the individual package substrate, the parent wire contact 5 1 8 Electrically connected to the top surface of the top surface of the top package substrate 5 ^ 2 88127 -27 - 1329918 on the metal layer 521 and on the other hand 'each line contact is connected to the metal layer 421 above the bottom package substrate 412 The upper surface of the pad.垓 接 接 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 The package-to-package 2 interconnect line contacts are illustrated by the example in FIG. 5A by forming a bump or bump on the top surface of the top metal layer of the top substrate, and then pulling down The lead wires are oriented and fused to a stack of metal layers above the substrate. As described below, the wire contact can be twisted in the opposite direction, that is, by forming a bump or bump on the upper surface of a pad of the metal layer above the base substrate, and then pulling the wire downward A pad that faces and fuses onto the metal layer above the top substrate. As described below, the selection of the wire contact strategy for the package z interconnect will be based on the stacked substrates. < The geometric configuration of the gap is determined by the joint surface on it. In the stacked package embodiment of Figure 5A, the z interconnect pads on the individual package substrates are disposed over the upper metal layer near the gaps of the package substrate. The location and sequence of the 互连z interconnect pads are typically configured such that the z interconnect pads on the top package substrate substantially cover the corresponding z interconnect pads on the bottom package when the packages are stacked. Conventionally, the top package 5 has a smaller substrate track than the bottom package 400 to allow the gaps of the line contacts to not short the edges of the metal layer of the substrate. Once the z interconnect contacts have been formed, a module wrap is formed to cover and protect the z interconnect contacts and provide mechanical integration of the completed modules. The arrangement of the z-interconnect pads on the top and bottom package substrates of the crucible is shown by the example of the plan views in Figures 5B and 5C, which are at 5 〇〇 and 4 〇〇 88127 - 2S - 1329918, respectively. Referring to FIG. 5B, the top package z interconnect pad 524 is formed by patterning a region of the upper metal layer at the void 501 on the upper surface 525 of the top package substrate 512. The void 501 extends beyond the edge 526 of the top package cladding material and has an upper surface 519. Referring now to Figure 5c, the bottom package z interconnect pad 424 is formed by patterning the area of the upper metal layer at the void 401 on the surface 425 above the top package substrate 4''. The gap 4〇1 extends beyond the track 5 11 of the stack and overlies the top package substrate 5 1 2 and further beyond the edge 426 of the bottom package cladding material, having an upper surface 419. As shown in Figures 5A, 5B, and 5C, the Z interconnect between the top and bottom packages in accordance with the present invention is the top package interconnect pad 524 and the bottom SHAO package substrate in the gap 5 〇丨 of the top package substrate. The line contacts of the bottom package interconnects 424 (upper or lower contacts) in the gaps 4〇1 are made. The multi-package module structure is protected by forming a module cover 5〇7, and the ball 418 is reflowed to the solder ball bump exposed on the gold under the bottom package substrate to be connected to the lower layer circuit. For example, a motherboard (not shown). As previously mentioned, the structure according to the present invention allows the BGA and LGA' to be pre-tested prior to assembly into the multi-package mold: to allow for the exclusion of the unfilled package prior to assembly, thereby ensuring a higher final Module test yield. To improve heat dissipation from the multiple package modules, a heat sink can be provided on the top package. The top heat sink is formed by a heat-conducting material section having more central regions in its upper surface to expose the upper surface to the surrounding environment to more efficiently perform hot-forking for the crucible. For example, the top heat sink may be a metal sheet (such as a feeding sheet), and the heat sink may be on the top package and a surrounding support portion during the curing process of the molding material 88127 -29-1329918. Or a support member on the upper surface. Fixed to the MPM wrap. Alternatively, having a generally planar portion to be placed adjacent to or adjacent to the bottom package substrate, by way of example, FIG. 5E is a cross-sectional view of a stacked BW 54 in accordance with another aspect of the present invention, wherein A "top-shoring" heat sink is provided on the upper surface of the MpM. The structure of the package stacked in the MPM 54 is generally similar to the MPM 5 图 in Figure 5A, and similar structures can be identified by similar reference numerals in the figures. The top heat sink in this example is formed from a thermally conductive material having a generally planar central portion 544 over the top package and surrounding support members extending to the upper surface of the bottom package structure 4u. 546. The upper surface of the face portion 544 is attached to the surface of the MpM to be exposed to the surroundings to efficiently discharge the MpM from the tropics. For example, the top heat sink can be formed by a sheet of metal, such as copper, such as by stamping. The support member 546 can be fixed to the upper surface of the bottom package substrate t by an adhesive as needed (not shown in the figure); the multiple package module structure can be protected by forming a module package 507, and The heat sink support member is embedded in the MPM cladding 5〇7 during the molding material curing process. In the specific embodiment of FIG. 5E, 'providing around the planar upper portion 544 of the heat sink There is a stepped recessed feature 5 4 5 ' to allow for better mechanical integration of the structure without being separated from the molding compound. In this embodiment, the lower surface of the heat sink 544 is The space between the upper surface 5 19 of the LGA molding 517 is filled into the thin layer of the MPM molding. In addition, a top heat sink can be fixed on the upper surface of the LGA molding, such as 88127 -30· 1329918 in Figure 5D. The cross-sectional view is shown in the MPM 52. The structure of the stacked package is generally similar to the MPM 50 in Figure 5A, and similar structures can be identified on the drawing by similar reference numbers. The top heatsink 5〇4 in the example is a generally planar heat transfer A panel having at least a more central region of its upper surface to be exposed to the surrounding environment to more efficiently vent heat out of the MPM, as shown in the example of Figure 5E. For example, the top heat sink can be a A metal plate (e.g., copper). However, here the top heat sink 5〇4 is secured to the upper surface 519 of the upper package wrap 517 using an adhesive 506. The adhesive 506 can be a thermally conductive adhesive. To provide an improved heat dissipation effect. After the top package molding has been at least partially cured, the top heat sink is fixed to the top package molding, but the molding material is injected into the MPM package 507. Previously, the top surface of the top heat sink may be coated with the MPM molding material. In the specific implementation of FIG. 5D, a stepped concave feature 5〇5 is provided around the heat sink 5〇4 to allow for better. The mechanical integration of the structure is less separated from the molding compound. In another option, as shown in Figure 5A, "MPM, which may have a simple planar heat sink, without a support portion #, And P pays for the top package molding Upper surface. In these embodiments, as in the specific embodiment of Figure 5; the top surface heat sink can be - typically a + surface conductive material sheet, such as, for example, a metal sheet (e.g., copper). And at least a more central region of the upper surface of the planar heat sink is exposed to the surroundings to more effectively move the tropics away from the MPM. Here, the surface of the simple planar heat sink is molded with the l(}a The space between the upper surface 51 9 of 5 17 is filled with a thin layer of MpM molding and this simple planar heat sink can be fixed during the curing process of the molding material 88127 -31 · 1329918. The cover 507 «the unattached simple flat top heat sink may be covered with the MPM molding material, like the planar heat sink attached in FIG. 5D, and may provide a stepped recess on the circumference. Features to allow for better mechanical integration with the structure and less separation from the molding compound. MpM with a heat sink as shown in Figures 5 D, 5 E, which provides improved thermal performance . Referring now to FIG. 6A, there is shown a cross-sectional view of a packaged multi-package module in accordance with an aspect of the present invention having an LGA top package over a BGA bottom package, wherein the top package LGA is partially Covered with ground. That is, the molding material of the top-slung LGA package is applied to a limited area and is of a limited amount sufficient to protect the line contacts during subsequent processing, particularly during subsequent performance testing. In other respects, the configuration of Fig. 68 is substantially shown in Fig. 5A. Thus, in this embodiment, the structure of the bottom package 400 is as described in Figure 5A, and the structure of the top package 6A is substantially as shown in Figure 5A, except for differences in the overlying package. In particular, the top package 600 includes a die 614 attached to a top package substrate 612 having at least one metal layer. It can use any of a variety of substrate types; the top package substrate 512 shown by the example of FIG. 6A has two metal layers 621, 623, each of which is patterned to provide a suitable turn and through the via 6 2 2 connection. The die is conventionally attached to a surface of the substrate using an adhesive, substantially referred to as a die attach epoxide, as shown at 613 in Figure 6A, and in the group of Figure 6-8. In the state, the surface of the substrate to which the crystal grains are attached may be referred to as a "top" surface, and the metal layer on the top of the table 88127 - 32 - 1329918, although the metal layer on the surface may be referred to as "upper" or the crystal The particle attachment surface does not need to have any particular directionality in use. In the top LGA package of the embodiment of Figure 6A, the die tie contacts to a line select point of the metal layer above the substrate to establish an electrical connection. The crystal 614 and the wire contact 616 are coated with a molding compound 617, which can be: used in the surrounding area and difficult to stress, and the money is processed. The formation of the cladding 617 in the embodiment is only used to cover the wire contact and its individual connection to the top (four) substrate and the (four) package die, so the die and the upper surface are large. & has not been covered by this coating. The top package 6 (10) is stacked on top of the bottom package and secured there using an adhesive. A solder mask, 627, is patterned over the metal layers 621, (3) to expose the underlying metal at the contacts for electrical connection, such as at the wire contacts. - The z-interconnection between the top package of the child stack and the bottom package 400 is made by connecting the wire contacts 61 8 of the top metal layer of the individual package substrate and the less repackaged module structure is formed by a module The cover (4) is protected, and the ball 418 is connected to the lower layer circuit, for example, a motherboard (not shown), on the metal layer exposed under the bottom package substrate of the county. The benefit of this is to reduce the cost. The part of the coating is implemented in conjunction with the treatment. (for example, by passing through a fine nozzle, as if it were from the U-needle.) And therefore provide a higher flow rate' and use a more sturdy packaging material. After this part is covered, the top LGA package can be tested without having to be rearranged into special treatments to avoid damage. The top package line contacts. 88127 -33- 1329918 In order to improve the heat dissipation of the multiple package modules as shown in the example in Figure 6A, a heat sink can be provided on the top package. The top heat sink is made of a heat conductive material. Formed with a more central area of its upper surface

Expose the upper surface of the MPM to the surrounding environment to more efficiently remove heat from the MpM. For example, the top heat sink can be a metal plate (e.g., copper) and it can be secured to the MpM cover during the molding material curing process. Alternatively, the heat sink can have a generally planar portion over the top package, and a surrounding S portion, or a support member on or near the upper surface of the bottom package substrate. By way of example, Figure 6B is a cross-sectional view of a stacked BGA + LGAMPM 62 in accordance with another aspect of the present invention, wherein a "top" heat sink is provided at the upper surface of the MpM. The structure of the package stacked in the MPM 62 is generally similar to the MPM 60 of Figure 6At, and similar structures may be identified by similar reference numerals in the figures. The top heat sink in this example is formed from a thermally conductive material having a generally planar central portion 644 positioned over the top package and surrounding support members extending to the upper surface of the bottom package structure 412 6 4 · 6. The upper surface of the planar portion 649 is attached to the surface of the M p m to be exposed to the surroundings to efficiently discharge the MpM from the tropics. For example, the top heat sink can be formed by a sheet of metal (e.g., copper), e.g., by stamping. The support members 646 can be secured to the upper surface of the bottom package substrate (not shown) using an adhesive as needed. The multi-package module structure can be protected by forming a module cover 607, and the heat sink support member is embedded in the MPM cover 607 during the molding material curing process. In the embodiment of Figure 6B, a stepped recessed feature 64 5 ' is provided around the planar upper portion 644 of the heat sink to allow for a better mechanical integration of the structure. It is less separated from the molding compound. In this embodiment, the space between the lower surface of the heat sink 644 and the upper surface of the die 614 can be molded by a layer of MPM, which is sufficiently thick that the heat sink 644 does not interfere with the The surrounding LGA is molded 6 17 . Additionally, the MpM in this particular embodiment of Figure 6A can have a simple planar heat sink that does not have support members and does not adhere to the top surface of the top package molding. In these embodiments, as in the embodiment of FIG. 5A, the top heat sink can be a generally planar sheet of thermally conductive material such as, for example, a metal sheet (eg, copper), and at least the planar heat sink. The more central area of the upper surface is exposed to Shaw to more effectively remove the tropics from the MPM. Here, as in the embodiment of FIG. 6B, the space between the lower surface of the planar heat sink and the upper surface of the die 614 is filled by a layer of mpm molding, which is sufficiently thick to cause the heat dissipation. The device will not dry (d) the surrounding LGA molding 617. Here, in the specific embodiment of FIG. 6β, such a simple planar heat sink can be used to fix the MPM wrap during the curing process of the molding material, such as an unattached simple flat top heat sink. Covered with the MPM molding material, such as a flat heat sink attached to Figure 5D, and can be provided with a stepped concave feature to allow for better mechanical integrity of the structure. The read does not separate from the molding compound. It allows for a spacer to be provided between the heat sinks at the top of the simple flat surface. The other single-plane heat sink as in the embodiment of FIG. 6A is to the top package 6 〇〇, and the lower surface and the 38127 -35· 1329918 spacer on the upper surface of the die 614 can be provided with an adhesive. Fixed to the die and the heat sink; or, the spacer can be formed as a whole part, and a spacer portion of the heat sink, and in these embodiments, the heat spreader spacer A portion of the lower surface may be secured to the upper surface of the die using an adhesive. The spacer is preferably made of a thermally conductive material and the adhesive can be a thermally conductive adhesive to provide improved heat dissipation. In these embodiments, the top heat sink can be secured to the top package after the top package molding has been at least partially cured, but prior to the molding material exiting the MPM cover 607. The top of the top heat sink may be covered with the MPM molding material. As in the particular embodiment of Figure 5D, a stepped recessed feature is provided around the simple planar heat sink to allow for better mechanical integration of the structure without being separated from the molding compound. For example, the MPM structure with a heat sink shown in Figure 6B provides improved thermal performance. 7 is a cross-sectional view of a stacked multi-package module in accordance with another aspect of the present invention having a top LGA package stacked over a BGA bottom package with a single metal layer substrate for the top LGA package. In other respects, the configuration of Figure 7 is substantially shown in Figure 5A. Therefore, in this embodiment, the structure of the bottom package 400 is as shown in FIG. 5A, and the structure of the top package 700 is substantially as shown in FIG. 5A except that the structure of the top package substrate is difference. In particular, the top package 700 includes a die 714 attached to a top package substrate 712 having a metal layer 721 that is patterned to provide suitable circuitry. The die is conventionally attached to the surface of the substrate using an adhesive, which is basically referred to as die attach epoxy 88127 -36 - 1329918, as shown at 713 in Figure 7, and in Figure 7 In the configuration, the surface of the substrate to which the die is attached may be referred to as an "upper surface", so the metal layer on the substrate may be referred to as an "upper" or "top" metal layer, although the die attach surface is There is no need to have any special orientation on the use. In the top LGA package of the embodiment of Figure 7, the die line contacts are connected to the line contacts of the metal layer above the substrate to establish an electrical connection. The die 7 14 and the wire contact 7 16 are coated with a molding compound 7 7 which provides protection against ambient and mechanical stress for handling operations. The cladding 707 in the specific embodiment shown in FIG. 7 is disposed as in the specific embodiment of FIG. 5A, so the cladding 707 covers the die and the wire contacts and their connections, and the child The cladding has a surface 7 1 9 over the entire die and interconnect. As described below, the cladding herein may be formed as in the embodiment of FIG. 68, that is, it is formed to cover only the wire contacts and their individual connections to the top package substrate and the top package. The grain, so most of the upper surface of the die is not covered by the cladding. The top package 7 is stacked on top of the bottom package 400 and secured there using an adhesive as shown in Chuan 3. A solder mask 715 is patterned over the metal layer 721 to expose the underlying layer 16 at the junction, for example, to bond the line contacts 7^6. A Z-interconnect between the top package 7 〇〇 and the bottom package 4 该 of the stack is formed by connecting the line contacts 718 of the top metal layer of the individual package substrates to form a three-dimensional package wedge structure. Forming a module covering 7〇7 for protection, and the Ό41 8 is returned to the soldering ball on the metal layer under the 'j:T to the money package substrate to connect to the lower layer circuit, for example, ~ motherboard (not Shown in the picture). Thus, and the benefit of K is that the cost can be reduced compared to the configuration of the substrate using two 88127 - 37 · 1329918 metal layers in the top lg eight package because the cost of the single metal layer substrate is lower. This configuration can additionally provide a lower package profile because the single metal layer substrate is thinner than a substrate having two or more metal layers. Figure 8A is a cross-sectional view of a stacked BGA+Lga MPM 80 in accordance with another aspect of the present invention. A heat sink and electrical shield are provided to the bottom seal. The embodiment illustrated by the example in FIG. 8A has a top platform, grid array ("LGA") package 800 stacked on top of a bottom ball grid array "BGA" package 402, wherein the top The lga package is usually built into the top LGA package from Tulu 5 A. As described below, a single metal layer, as described with reference to Figure 6A, can also be used as the top LGA in the embodiment of Figure 8A. Referring to Figure 8-8, the top LGA package 8 can be similar to the -bgA package, such as shown in Figure 1, but without solder balls for mounting on the pad pads on the underside of the substrate. Particularly in this example, the top package 8A includes a die 814 attached to a top package substrate 812 having at least one metal layer. It can use any of a variety of substrate types; the top package substrate 812 of the example of FIG. 8a has two metal layers 821, 823, each of which is patterned to provide appropriate circuitry and through The through holes 822 are connected. The die is conventionally attached to a surface of the substrate using an adhesive, substantially referred to as a die attach epoxide, as shown at 813 in Figure 8A, and in Figure 8A. In the configuration, the surface of the substrate to which the die is attached may be referred to as a "ten thousand" surface, and the metal layer on the surface may be referred to as an "upper" or "top" metal layer, although the die attach surface There is no need to have any specific directionality in use. 88127 - 38- In the top lga package of the embodiment of Figure 8A, the die tie contacts to the line contacts of the metal layer above the substrate to establish an electrical connection. The granules 8 14 and the line contacts 816 are coated with a molding compound 817 which provides protection against ambient and mechanical stresses for handling operations and has a top package upper surface 819. Solder caps 815, 827 are patterned over the metal layers 821, 823 to expose the underlying metal at the contacts for electrical connection, such as wire contacts for bonding the wire contacts 816 At the office. The bottom bGa package 402 of the embodiment of Figure 8A is a conventional BGA package, as shown, for example, in the figure, except that the bottom BGA package of Figure 8a is unwrapped with a molding compound; There is a heat sink that can additionally be used as an electrical shield, as described below. Thus, in this embodiment, the bottom package 402 includes a die 414 attached to a bottom package substrate 412 having at least one metal layer. It can use any of a variety of substrate types, including, for example, a plywood having a 2-6 metal layer, or a construction substrate having a 4-8 metal layer, or a flexible polyimide layer having a 1_2 metal layer, or a ceramic multiple layer. Substrate. The bottom package substrate 412, shown by the example of Fig. 8A, has two metal layers 42A, 423, each of which is patterned to provide suitable circuitry and connected through vias 422. The die is attached to a surface of the substrate using an adhesive, substantially referred to as a die, and the attached epoxy is shown as 413 in Figure 8A, and in Figure 8A. In the configuration, the surface of the substrate to which the die is attached may be referred to as an "upper" surface, and the metal layer on the surface may be referred to as an "upper" metal layer, although the die attach surface is in use. There is no need to have any specific directionality. In the bottom B G A package of Figure 8A, the die line contacts are connected to the line contacts of the metal layer above the substrate 88127 - 39-1329918 to establish an electrical connection. The solder balls 4丨8 are reflowed over the contact pads on the metal layer below the substrate to provide circuitry to the bottom, such as a motherboard for the final product (not shown), such as a computer. Solder caps 415, 427 are patterned over the metal layers 42i, 423 to expose the underlying metal at the contacts for electrical connection, such as bonding the wire bonds 416 and soldering at the wire contacts Ball 41 8. The bottom BGA package 402 of the multi-package module 80 has a metallized (e.g., copper) heat sink that can additionally serve as an electrical shield to electrically include any electromagnetic radiation from the die in the lower BGA. This prevents interference with the grains in the upper package. The "top" planar portion of the heat sink 4〇6 is supported over the substrate 412 and is positioned over the die 414 by the foot or sidewall 407. A dot or line 408 on the adhesive is used to secure the heat sink support 407 to the upper surface of the base substrate. The adhesive can be a conductive adhesive' and can be electrically connected to the top metal layer 421 of the substrate 412, particularly to a ground plane of the circuit, and thereby establishing the heat sink as an electrical shield. Alternatively, the adhesive may be non-conductive, and in this configuration, the heat sink is only used as a heat sink. The support portion and the top portion of the heat sink 406 enclose the die 414 and the wire contact 416 and can be used to protect those structures for ambient and mechanical stresses to facilitate handling operations, particularly prior to assembly of the MPM. Follow-up testing.

The top package 800 of the multi-package module 80 is stacked on top of the bottom package 402 on the flat surface of the heat sink/mask 406 and secured thereto using an adhesive 803. The adhesive 803 can be thermally conductive to improve heat dissipation; and the adhesive 803 can be electrically conductive to establish electrical connection between the heat sink 406 and the underlying metal layer of the LGA 88127 - 40 - 1329918 package substrate, or It is electrically insulated, thereby preventing electrical connections. The z-interconnect between the top package 800 and the bottom package 4〇2 in accordance with the present invention consists of a top package interconnect pad in the gap between the top package substrate 812 and a bottom package interconnect pad in the gap between the bottom package substrate 402. The line junction between the two is formed. The line contacts can be formed by means of a contact or a lower contact. The multi-package structure of the child is protected by forming a module covering 8〇7. An opening may be provided in the support portion 4G7 of the heat sink to allow the MpM molding material to be filled in the enclosed space during the coating. Solder balls 418 are reflowed onto the exposed solder ball pads on the metal layer below the bottom package substrate 412 for connection to a lower layer circuit, such as a motherboard (not shown). As previously mentioned, the structure according to the present invention allows the BGA and LGA to be pre-tested prior to assembly into the multi-package module to allow for the exclusion of packages that do not conform to s prior to assembly, thereby ensuring a good final module test. rate. To improve heat dissipation from the multi-package module, a heat sink can be provided on the top package. The top heat sink is formed of a conductive material that exposes its upper surface to at least a more central region at the upper surface of the MPM to the surrounding environment to more effectively move the tropics away from the MPM. For example, the crucible top heat sink can be a sheet of metal (e.g., copper) and it can be secured to the MpM cladding during the molding material curing process. Alternatively, the heat sink can have a generally planar portion over the top package and a support member that is damaged by a surrounding portion or on or near the upper surface of the bottom package substrate. 88127 -41 · 1329918 A cross-sectional view of a stack of 30 VIII^8]^?1^82 according to another aspect of the present invention by way of example 'BB', wherein in the ^^]\/1 A "top" heat sink is provided on the upper surface. The structure of the package stacked in the MPM 8 2 is generally similar to the MPM 80' in Figure 8A and a similar structure can be identified by similar reference numerals in the figures. The top heat sink in this example is formed of a thermally conductive material having a generally planar central portion 804 positioned over the top package and surrounding support extending to the upper surface of the bottom package substrate 41 2 Shao 806. The upper surface of the planar portion 804 is attached to the surface of the surface 804 to expose the surrounding portion to efficiently discharge the MPM. For example, the top heat sink can be formed by a sheet of metal, such as copper, such as by stamping. The support members 806 can be secured to the upper surface of the bottom package substrate (not shown) using an adhesive as needed. The multi-package module structure can be protected by forming a module cover 807, and the heat sink support member is embedded in the MPM cladding 8〇7 during the molding material curing process. In the embodiment of Figure 8B, a stepped recessed feature 805 is provided around the upper portion 8〇4 of the planar surface of the heat sink to allow for better mechanical integration of the structure, rather than Will separate from the child's molding compound. In this embodiment, the space between the lower surface of the heat sink 804 and the upper surface 819 of the LGA molded 817 is filled into the MPM molded thin layer. Alternatively, the top heat sink can be a thermally conductive material, typically a flat sheet, such as, for example, a sheet of metal (e.g., copper) that does not require a support member. At least a more central region of the upper surface of the planar heat sink is exposed to the surrounding environment, and the U is more efficiently removed from the elbow by U. This simple planar heat sink is shown in Figure 8C, where the heat sink is molded onto the top surface of the top package 88127 - 42 · 1329918. However, in Figure 8B, the heat sink is not attached to the top surface of the top package molding. Rather, the space between the lower surface of the simple planar heat sink and the upper surface 81 9 of the LGA molding 81 7 is filled with a thin layer of MPM molding, and such a simple planar heat sink can be The MPM cladding 807 is fixed during the molding material curing process. A simple planar top heat sink is surrounded by, for example, the embodiment of Figure 8B, which may be coated with the MpM. molding material and may have a stepped recessed feature around the perimeter (in Figure 8c, The simple planar heat sink 844 is referred to as a recessed feature 845) to allow for better mechanical integration of the structure without detachment from the molding compound. Alternatively, a top heat sink can be attached to the upper surface of the LGA molding as shown in the cross-sectional view of Figure 8C. The structure of the package stacked in the MPM 84 is generally similar to the MPM 80' in Figure 8A and a similar structure can be identified in the figure by similar reference numerals. The top heatsink 844 in the example of Figure 8 is a generally planar plate of thermally conductive material that exposes at least a more central region of the upper surface to the surrounding to more effectively remove the tropics as if An example of Figure SB. For example, the top heat sink can be a metal sheet (such as spring copper). However, here the top heat sink 804 is secured to the upper package cover 817 using an adhesive 846. Surface 819. The adhesive 846 can be a thermally conductive adhesive to provide improved heat dissipation. Typically, after the top package molding has been at least partially cured, the top heat sink is secured to the /. Mold gas, but it is attached to the Mpm coating of the molding material. The MpM molding material may be coated around the top of the heat sink. In the embodiment of Fig. 8C, the heat sink is A circumscribed recessed feature 845' is provided around the 844 to allow for better mechanical integration of the structure without being detached from the molding compound. In Figures 8A, 8B, 8C The benefits of the structure shown are obvious Performance, and if necessary, electrical shielding at the bottom package, such as the more critical key in MPMs combining RF and digital chips. For all applications, it is not necessary to have a bottom package heatsink and A top heat sink. In addition, depending on the needs of the end product, one of several is appropriate. Figure 9A is a cross-sectional view of a multi-package module according to another aspect of the present invention. Stacked in -lga. In the lower BGA, the die is a flip chip connected to the substrate, and the space between the die and the substrate is filled side. This BGA can be assembled into the MpM The back side of the die can be used to attach the top LGA with an adhesive. The top LGA interconnects with the module substrate through the wire contacts, and the MPM is molded. A major benefit of this configuration is The flip chip connection on the BGA provides high electrical efficiency. Referring to Figure 9A, the bottom BGA flip chip package includes a substrate 312' having the die 3 14 by flip chip bumps 3 1 6 a picture attached to it The metal layer 32 1 is, for example, a solder bump, a gold bump bump, or an anisotropic conductive film or paste. Any substrate type can be used; the bottom package substrate 312 shown by the example of FIG. 9A has two Metal layers 321, 323, each patterned to provide appropriate circuitry, are connected through vias 32. The flip chip bumps are attached to a patterned bump on the active surface of the die. The pad array 'and as the active surface of the die, facing downward facing the patterned metal layer of the substrate, this configuration can be referred to as a "lower 88127 -44 - 1329918 die" flip-chip Wafer encapsulation. Filling a polymer side between the die and the substrate provides protection against the surrounding and incorporating mechanical integration into the structure. The top LGA package 900 of the multi-package module 90 is typically constructed as a top LGA package 700 similar to the multi-package module 70 of FIG. In particular, the top package 900 includes a die 914 attached to a top package substrate 91 having a metal layer 92, which is patterned to provide suitable circuitry. The die is conventionally attached to the surface of the substrate using an adhesive, which is basically

It is referred to as a grain-attachment epoxide, as shown in 913 of FIG. 9a, and in the configuration of FIG. 9A, the surface of the substrate to which the die is attached may be referred to as an "upper" surface, and thus the substrate is The upper metal layer may be referred to as an "upper" or "top" metal layer, although the die attach surface does not need to have any particular orientation in use. In the top LGA package of the embodiment of Figure 9A, the die tie contacts to the line contacts of the metal layer above the substrate to establish an electrical connection. The crystal 914 and the wire contact 916 are coated with a molding compound 917 which provides protection of the Z and surrounding mechanical stresses to facilitate handling operations. The cladding 9〇7 in the embodiment shown in Fig. 9A covers the die and the wire contacts and their connections' and the cladding has a surface 919 over the entire die and interconnect. As described below, the cladding herein can be formed into the same embodiment as Figure 6A. The image may be formed to cover only the wire contacts, and may be connected to the top package substrate and the top package die, so that the upper surface of the die is not large. Covered by the cover. The top seal (4) is stacked on top of the sloping seal 300 and secured with an adhesive <at that summer, as indicated at 903. A solder mask 91 5 is patterned over the metal layer 921 1 to expose a layer of 88127 - 45 - 1329918 at the junction to an incoming call connection, such as a line contact for bonding the line contact 91 6 . The z-interconnect between the top package 9 〇〇 and the bottom package 300 of the stack is formed by a line contact 9 i 8 connecting the top metal layers of the individual package substrates. A module is covered with 9〇7 for protection, and the 188 is soldered to the solder ball pad exposed on the metal layer under the bottom package substrate to connect to the underlying circuit, for example, the motherboard of the final product. (Not shown in the picture), like a computer. A solder mask 315 and a milk system are patterned on the metal layers 321, 323 to expose the underlying metal at the contacts for electrically connecting, for example, the line contacts to bond the line contacts 91 8 and solder Ball 3 1 8. The configuration of the LGA on a flip chip BGA having a lower die, such as shown in Fig. 9A, can be combined with a heat sink and electrical shield as shown in Fig. B or Fig. 8C. Thus, FIG. 9B is a cross-sectional view of a multiple package module in accordance with another aspect of the present invention, wherein the lower die flip chip BGA system JU LGA, as in the specific embodiment of FIG. 9A, and wherein the lower BGA has A radiator / shade. In particular, referring to FIG. 9B, the bottom BGA package 300 of the multi-package module 92 has a metallized (eg, copper) heat sink that additionally serves as an electrical shield to include any of the BGAs in the lower BGA. The electromagnetic radiation of the grains is hunted to prevent interference with the grains in the upper package. The "top" planar portion of the heat sink 9〇6 is supported on the substrate 312 and supported on the die 3M by the foot or sidewall 909. An adhesive dot or line 9〇8 is used to secure the actuator to the surface of the far bottom substrate. The adhesive may be an electrically conductive adhesive and may be electrically connected to the top metal layer 321 of the substrate 312. The special 88127-46· 1329918 is connected to one of the ground planes of the circuit, and the heat sink is constructed

Stress to protect those structures to

It is a heat sink. The support of the heat sink 906, the day pellets 3 14 ' can be used for peripheral and mechanical work to facilitate handling operations, particularly for subsequent testing prior to assembly of the MPM. The top package 900 of the multi-package module 92 is stacked on top of the bottom package 3 on the flat surface of the heat sink/mask 906 and secured there using an adhesive 903. The adhesive 9〇3 may be thermally conductive to improve heat dissipation, and the adhesive 903 may be electrically conductive to establish an electrical connection between the heat sink 9〇6 and a metal layer under the lga package substrate, or it may be electrically Insulate, thereby preventing electrical connections. The z-interconnect between the top package 9 〇〇 and the bottom package 3 根据 according to the present invention is formed by the top package interconnection pad in the space between the top package substrate 9 丨 2 and the package substrate 3 at the bottom of the package. A line contact 918 between the bottom package interconnect pads in the gap is formed. The line contacts can be formed by means of a contact or a lower contact. The multi-package module structure is protected by forming a module covering 9〇7

. An opening is provided in the support portion 907 of the heat sink to allow the MPM molding material to be filled in the enclosed space during cladding. The Ryukyu 3 18 is reflowed onto the exposed solder ball pads on the metal layer below the bottom package substrate for connection to a lower layer circuit, such as a motherboard (not shown). As previously described, the structure according to the present invention allows the Bg A and LG A to be pre-tested prior to assembly into the multi-package module to allow for the exclusion of packages not covered by 88127 - 47 - 1329918 prior to assembly, thereby ensuring High final module test yield. The processor wafer in the flip chip bottom package in accordance with this aspect of the invention can be, for example, an ASIC, GPU or CPU, typically an ASIC; and the top package can be a memory package or an ASIC package. Wherein the top package is a memory package, it can be a stacked die memory package. A concealed flip-chip under-wafer bottom package is particularly suitable for higher speed applications, especially RF processing, such as in mobile communications applications. % The MPM (e.g., as shown in Figure 9A or Figure 9B) having a flip-chip bottom package in a lower die configuration may have a heat sink, as desired. In order to improve the heat dissipation of the multiple package modules as shown in the example of FIG. 9A or 9B, a heat sink may be provided on the top package. The top heat sink is formed of a conductive material that exposes its upper surface to at least a more central region at the upper surface of the MpM to the surrounding environment to more effectively displace the tropic from the MPM. For example, the top heat sink can be a sheet metal (e.g., copper) and it can be secured to the MpM cladding during the molding material curing process. Alternatively, the heat sink can have a generally planar portion &/or a peripheral portion of the top package or a support member disposed on or near the upper surface of the bottom package substrate. A cross-sectional view of a stacked BGA + LGAMPM 94 in accordance with another aspect of the present invention is shown by way of example 'Fig. 9C, wherein a "top" heat sink is provided at the upper surface of the MpM. The structure of the package stacked in the MPM 94 is generally similar to the MPM 92 in Figure 9B, and similar structures may be identified by similar reference numerals in the figures. The top diffuser in this example is formed of a dispersive material having a generally planar surface over the top package: 88127 • 48 - !329918 central portion 944, and extending to the bottom package substrate The surrounding support member 946 of the upper surface of the 3丨2. The upper surface of the planar portion 944 is attached to the upper surface to be exposed to the surroundings to efficiently discharge the MpM from the tropics. For example, the top heat dissipation can be formed by a metal sheet such as copper, for example by stamping. The support members 946 can be secured to the upper surface of the bottom package substrate (not shown) using an adhesive as needed. The multi-package module structure is protected by the formation of a module cover 907, and the heat sink support member is embedded in the MPM cover 907 during the molding material curing process. In the embodiment of Figure 9C, a stepped recessed feature 945 is provided around the planar upper portion 944 of the heat sink to allow for better mechanical integration of the structure and less The molding compound is detached. In this embodiment, the space between the lower surface of the heat sink 944 and the upper surface of the die 914 is filled with a layer of MPM molded, which is thick enough that the heat sink 944 does not interfere with the surrounding. LGA molded 917. Additionally, the MPM in a particular embodiment like 9A or 9B can have a simple planar heater that does not have a support member. This simple planar heat sink can be attached to the upper surface 5 of the top package module 5丨7 using an adhesive. Alternatively, the MPM of the particular embodiment of Figure 9A or Figure 9B can have a simple planar heat sink that does not adhere to the top surface of the top package molding. In these embodiments, as in the embodiment of FIG. 5A, the top heat sink can be a generally planar sheet of thermally conductive material, such as, for example, a sheet of metal (eg, steel) and at least the planar heat sink. The more central region of the upper surface is exposed to the surroundings to more effectively remove the tropics from the MPM. Here, in the embodiment of Fig. 9C, the space between the lower surface of the planar heat sink and the top 88127 - 49 · 1329918 package 900 may be filled with a layer of mpm. And such a simple planar heat sink as in the embodiment of Figure 9C, which can be secured to the MPM cladding 907 during the molding material curing process. The unattached, simple planar top heatsink can be wrapped around the MPM molding material, as in the planar heatsink attached in Figure 5D, and can provide a stepped recessed feature on the perimeter to Better mechanical integration with the structure is allowed and less separated from the molding compound. For example, the mpm with a heat sink shown in Figure 9C provides improved thermal performance. The bottom package of the MPM according to the present invention may be a flip chip package in an upper die configuration, wherein the bottom package die is carried on the lower surface of the bottom package I substrate. Typically the bottom package die attach S-domain is in the center of the substrate region in such a configuration, and the second-order interconnect ball can be disposed on the perimeter close to two or more of the substrate edge. The β-upper wafer flip-chip and its flip-chip interconnect structure are within the landing height of the second-order interconnect structure' and thus the bottom package die in this configuration is for the overall thickness of the germanium No contribution. Moreover, the upper die configuration avoids a net column reversal effect, which is essentially the result of the lower die configuration. . In particular, by way of example, FIG. 10A is a cross-sectional view of a multiple package module 101 in accordance with another aspect of the present invention, wherein a stacked die platform grid array package 1000 is in an upper die configuration 302. Stacked on a flip chip bGa, and the stacked packages are interconnected by wire contacts. In the bottom B g a package 302, the die 344 is attached to the lower side of the BGA substrate 342. S8127 -50- 1329918 As shown in Figure 7F, this structure provides a thinner MPM because the bottom package is in the region between the solder ball and the bottom of the m bottom package. State can have a higher electrical efficiency, not only because it uses a flip chip connection, but also because it provides a more direct electrical connection of the die to the ball, for the die and the solder balls The connection between them has a shorter metal trace and does not require a via (as required in the configuration of Figure 9A or in). In addition, the upper die configuration allows the package to be compatible with wire contacts on the grid as is required in some applications. The mesh is the sum of all connections (4) between the die and the solder balls. # When the grain faces up "lower grain", it has a connected pattern, which is a mirror image of the same type in the same grain when the grain faces down "upper grain". In the configuration of Figure 1 〇 A, the top LG package is attached to the upper side of the BGA with an adhesive, then the wire contacts and molded. In the specific embodiment shown in the example of Figures i〇a to i〇e, more than one die (two or more) are stacked in the top package. Stacked die packages have been well established in the industry, and these versions can achieve up to five stacked dies in the package. The crystal grains have the same size and the grains in a stacked die package may have the same or different relative sizes. The grains are substantially square or rectangular, and rectangular and square grains of different sizes can be stacked in a stacked die package. When the crystal grains are rectangular or have different sizes, the crystal grains can be stacked, so that in the stack, the voids of the lower crystal grains protrude beyond the gap of the upper crystal grains stacked thereon. Figure 1A shows an example in which the two grains are the same size in the stack. In these embodiments, or in the embodiment where the ± square grains are larger than the lower crystal grains in the field and the heap, 88127 - 51 - 1329918 - spacers are assembled between the grains to form all the grains. Wire contacts to the LGA substrate. Fig. 10B shows an example in which the upper crystal grains in the stack are smaller than the lower crystal grains; or alternatively, the crystal grains are stacked in the upper stacked space: a void exceeding the lower crystal grains is cried. In the specific paste embodiment as shown in Fig. 1B, there is no need for a spacer because at the line contact of the lower die, the wire contact can be allowed to not interfere with the die stacked thereon. . Referring to FIG. 10A, the bottom flip chip BGA package 3〇2 includes a substrate 342 having a patterned metal layer 353, which is a portion of the die 344 connected by flip chip bumps 346, such as solder bumps. A block, a gold dot bump or an anisotropic conductive film or paste. It can be used in any of a variety of substrate types; the bottom package substrate 342 shown in the example of Figure 10A has two metal layers ^, 353, each of which is patterned to provide a suitable circuit. The bottom package substrate 342 additionally has a metal layer 355 sandwiched between the dielectric layers 354, 356. The metal layer 355 has voids at selected locations to allow the metal layers 351, 353 to pass through the via connections, such that selected portions of the patterned metal layer 35 are connected by vias. The substrate layers 354, 356, and the voids in the metal layer 355 sandwiched therein. The selected portion of the patterned metal layer 353 is connected through the via layer 356 to the sandwiched metal layer 355 via vias. Flip-chip bumps 346 are attached to a patterned bump pad on the active surface of the die, and because the active surface of the die faces upward with respect to a patterned metal layer of a far-down substrate, This configuration can be referred to as an upper wafer "flip-chip package. A polymer side fill 343 between the die and the die attach region of the substrate provides protection against the surrounding and adds 88127 - 52 - 1329918 into the mechanical integration to the structure. As described above, the metal layers 351, 353 are patterned to provide a suitable circuit ' and the sandwiched metal layer 355 has voids at selected locations to allow over the upper and lower metal layers 35, 353. Interconnection is allowed between the selected traces (not touching the sandwiched metal layer 355). In particular, for example, the tens of thousands of metal layers are patterned in the die attach regions to provide adhesion of the flip chip interconnect bumps 343; and for example, the lower metal layer is patterned closer to the bottom package substrate 342 The gaps provide the attachment of the second-order interconnect solder balls 348, whereby the completed MpM is reflow soldered to the underlying circuitry (not shown). For example, in particular, the upper metal layer is patterned adjacent to the void of the bottom package substrate 342 to provide attachment of the wire contacts to the bottom package to the bottom package. A ground line in the circuit of the metal layer 353 is connected to the sandwiched metal layer 355 through a via hole; some of the solder balls 348 are selected as ground balls, which are attached to the lower layer circuit when the MPM is mounted. Ground wire. Therefore, the sandwiched metal layer 355 serves as the ground plane of the river 15]. The input/output balls or power balls are selected in the solder balls 348. Therefore, these are attached to the solder balls of the input/output or power lines in the circuits of the metal layer 353, respectively. Still referring to FIG. 10A', the top package 1000 is a stacked die platform grid array package in which the dies 1014, 1024 are separated by a spacer 1015 and stacked on a top package substrate. The top package substrate includes a dielectric layer 112 having a metal layer on the surface of the upper substrate and patterned to provide traces, such as 1031, having an attachment for the top package substrate, A dot is interconnected to the stacked die, and line contacts 88127-53 - 1329918 for the top package are interconnected to the bottom package substrate. The lower die 1014 is attached to a die attach region of the top package substrate using an adhesive HH3, such as a grain adhesion epoxide. The die 1014 is electrically connected to the top substrate by wire bonds 1 〇 16 at the line contacts on the active surface of the die and at the line contacts on the selected trace 1011. A spacer 1015 is attached to the upper surface of the lower die 1014 using an adhesive (not shown), and the upper crystal, the 1024 is fixed to the spacer using an adhesive (not shown). Υου · The upper surface. The spacer is selected to have a sufficient thickness to provide voids* so that the protruding voids of the upper die 1024 do not invade the wire contacts 1016. The die 1024 is connected to the top substrate by wire contacts 1026 which are connected at the line contacts on the active surface of the child die to the line contacts on the selected trace. The stacked die and the wire contact assembly on the top package substrate are wrapped in a molding material 1 〇 17 to provide a top package upper surface 1019 and leave the exposed mutual Connect the gap of the trace 1〇u. The top package 1 can be tested at this time, and then stacked to the die attach area of the upper surface of the bottom package substrate, and is fixed at the place using the adhesive 1003. The electrical interconnections of the top and bottom packages are subject to line contacts on the traces 351 of the metal layer above the bottom package substrate at the line contacts exposed on the traces 1〇11 of the top package substrate. The line is connected to point 1018. The MPM assembly is then wrapped in a molded 1〇〇7 to enclose the wire contacts of the package and provide mechanical integration in the completed MpM]. As noted above, stacked die top packages stacked on top of the upper die-wafer BGA package in these embodiments can have a variety of configurations, such as 88127 - 54 - 1329918, depending on, for example, the die in the stack The number is exemplified by the size of the crystal grain. In the cross-sectional view, FIG. 3 shows another (10) Μ configuration (10), where the LGA has two stacked dies, and wherein the upper dies are purchased in a smaller size than the lower dies 1 () 34, At least in the plane of the cross-sectional view. In this configuration, the name of the line 接 Γ n n 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下 下The bottom package 3〇2 in the MPM 103 of FIG. 10 is substantially similar to the bottom of the MPM 101 of FIG. 10A, and the corresponding part is similar to the figure _ The top package in the MPM 1G3 is a _stacked die platform grid array package having a die 1 〇 34, 1 〇 44 stacked on top of a top package substrate. The top package substrate includes - dielectric a layer (8) 2 having a metal layer on the surface of the tens of thousands of substrates and patterned to provide traces, for example, having an attachment for the top-loading substrate line contacts interconnecting the stacked die, And used for the top package of the wire contact interconnection (4) bottom SHA package substrate. The lower die 1034 is attached to the die attach region of the shoal package substrate using an adhesive, such as a die attach epoxide. The die 1034 is electrically connected to the top substrate by wire contacts 1036 which are connected at the line contacts on the active surface of the crystal (4) to the line contacts on the selected trace. The upper die 1〇44 Use an adhesive to fix the surface of the child below the surface of the child. Crystal (four) 44 borrow * line contact ι 46 electrically connected to the top substrate, which is connected at a line junction on the active surface of the die to a line contact on the selected trace 1 〇 31. The stack of dies on the top of the package substrate The assembly with the wire contacts is wrapped in a molding material that provides a portion of the package upper surface 1039, leaving the exposed interconnect traces 88127 - 55 - 1329918 lines 1 〇 31 < void portion. The package 1030 can be tested at this point and then stacked on the die attach area on the top surface of the bottom package substrate and secured thereto using an adhesive 1003. The electrical interconnections of the top and bottom packages are At the line junction exposed on the trace 丨〇3丨 of the top package substrate and the line contact on the trace 35 1 of the upper metal layer of the bottom package substrate, <line contact 1 〇1 8 The MpM assembly is then wrapped in a tantalum 1007 to protect the package-to-package wire contacts and provide mechanical integration in the finished MPM 103. Flip-chip in accordance with this aspect of the invention The processor chip in the bottom package can be, for example, an ASIC, a GPU, or a CPU, and The top package can be a memory package, in particular one of the stacked die memory packages shown in, for example, Figure A and Figure B. The bottom package of the flip chip on the die configuration provides a very Thin module, and is particularly suitable for higher speed applications, such as mobile communication. As described below, in a specific embodiment such as MPM 101 or 1〇3, the ground plane 355 in the bottom-sealed t-substrate additionally As electromagnetic shielding, the interference between the BGA die and the covered LGA die is significantly reduced, and the MPM, such as MPM, can be particularly useful in applications where the bottom package die is a high frequency die (e.g., radio frequency). In some applications, it is also intended to obscure the bga die in the bottom package and the underlying circuitry to which the MPM is attached. Figure 1 〇c shows a multi-package module 105 selection. One of the stacked die platform grid array packages 1000 is stacked on top of a flip-chip bga in an upper die configuration 302. Where the stacked packages are interconnected by wire contacts, wherein - electromagnetic shielding is provided at the flip chip 88127 - 56 - 1329918 BGA to limit the radiation downwardly toward the lower layer). In the job 105 of Figure H)C, the top package and the bottom package 302 are substantially constructed as in Figure 1() < ΜρΜ(8), and the corresponding features can be correspondingly identified in the figure. The bottom package of the MPM 105 has, for example, a metallized (e.g., copper) electrical shield that electrically includes electromagnetic light from the die in the lower BGA, and thereby prevents interference under the installed beak Circuit. The lower planar portion of the mask is supported by the foot or side wall 305... the point or line 3 of the adhesive is used to secure the heat sink support 3〇5 to the lower surface of the base substrate. The adhesive can be a conductive adhesive and can be electrically connected to traces in the metal layer beneath the substrate, particularly to the ground traces of the circuit. The support portion and the lower planar portion of the shield enclose the die 344, and in addition to shielding the underlying die in the finished device, it can be used to protect the underlying die for ambient and mechanical stresses. 'Processing jobs' and especially during subsequent testing prior to assembly of the MPM, or prior to installation. Additionally, as described below, the masking described with reference to Figures 1〇c can be used to mask an upper die-flip wafer bottom package 3〇2 in the MPM with other stacked stack top package configurations. For example, the stacked die top package does not have a spacer between adjacent dies, as shown in 1030 of Figure 10B. And additionally, the masking as described with reference to Figures 〇C can be used to mask the n-grain flip-chip bottom package 3〇2 above the mpm, which is in addition to the top package of the stacked die top package. For example, the top package can be a platform grid array package such as the bGA top package shown at 500 in Figure 5A. 88127 -57- 1329918 Furthermore, in order to improve the heat dissipation of a multi-package module generally provided in Fig. 10A, a heat sink can be provided on the top package. The top heat sink is formed of a conductive material that exposes its upper surface to at least a more central region at the upper surface of the MPM to the surrounding environment to more effectively move the tropics away from the MPM. For example, the top heat sink can be a metal sheet (e.g., copper) and it can be secured to the MPM cladding during the molding material curing process. Alternatively, the heat sink can have a generally planar portion & a surrounding support portion or a support member disposed on or near the upper surface of the bottom package substrate over the top package. By way of example, FIG. 10E is a cross-sectional view of a stacked die top package MpM! (10) stacked on top of an upper die-flip wafer bottom BGA, where the upper surface of the MPM is provided - "Top" radiator. The structure of the top and bottom packages in MpM is generally similar to MPM 1G5' in Figure i〇c and a similar structure can be identified in the drawing by similar reference numbers. The top heat sink in this example is formed from a thermally conductive material having a generally planar central portion 1004' overlying the top package 1000 and extending around the upper surface of the bottom package substrate 342. Support member 1046. The upper surface of the planar portion 1004 is attached to the upper surface of the MpM to violently surround the surface, so as to continually release the tropics out of the Mpm. For example, the top heat sink can be formed from sheet metal (e.g., copper), such as by stamping. The support members 1046 can be secured to the upper surface of the bottom package substrate (not shown) using an adhesive as needed. The multi-package module structure can be protected by forming a module package 1007, and the heat sink support member is embedded in the MPM cladding 1〇07 during the molding material curing process. In the example of the replacement of the Chinese version of the patent application 88127 • 58- I32991 & 92122625, in the example of the replacement of the Chinese version of the specification (September 95), the portion above the plane of the heat sink is 1044^^-^ The stepped recess (1) 045 allows the mechanical integrity of the preferred structure to be less detached from the molding compound. In this embodiment, the space between the lower surface of the heat sink 1044 and the upper surface 1〇丨9 of the LGA molded 1〇17 is filled into the MPM molded thin layer. Alternatively, the top heat sink can be a generally planar sheet of thermally conductive material such as, for example, a sheet of metal (e.g., copper) that does not require a support member. At least a more central region of the upper surface of the planar heat sink is exposed to the surrounding environment for more efficient removal of the tropics from the MPM. This simple planar heat sink is shown at 1004 in Figure U) D, wherein the heat sink is secured to the top surface of the top package molding. The structure of the package stacked in the MPM 107 is generally similar to the MPM1G9 in Fig. 10E, and similar structures can be identified by similar reference numerals in the drawings. The top heat sink 1〇〇4 in the example of Fig. 10D is a generally planar sheet of thermally conductive material having at least a more central region of its upper surface exposed to the surrounding environment to more efficiently tropic. The MPM is shown in the example of Figure i〇E. For example, the top heat sink can be a metal sheet (e.g., copper. However, the top heat sink 1〇〇4 is attached to the upper surface 1〇19 of the upper package cover 1017 by an adhesive 1〇〇6. The adhesive 1006 can provide a thermally conductive adhesive to provide improved heat dissipation. Typically, after the top package molding has been at least partially cured, the top heat sink is secured to the top package, but it is The molding material is coated with the MPM molding material around the top heat sink before the MPM cladding 1 〇 07. In the specific embodiment of the figure, the heat sink is allowed to allow a better junction.

The surrounding is provided with a stepped concave feature 1〇〇5 88127-950915.DOC cQ 1329918 constituting <mechanical integration without being separated from the molding compound by a simple planar heat sink, as shown in Fig. 10D 1004, which does not need to be attached to the top surface of the top package molding. Rather, the space between the surface of the simple planar heat sink and the surface of the upper surface of the LGA molding 1017 is filled with a thin layer of MPM molding, and the simple planar heat sink can be used. The MPM coating 1〇〇7 is fixed during the molding material curing process. - the periphery of a simple planar top heat sink in this embodiment, which may be coated with the MPM molding material 'and may have a stepped recessed feature in the perimeter (two simple planar heat dissipation in Figure 10D) The recessed features 1〇〇5) are referred to in the device 1〇〇4 to allow the structure to have better mechanical integration without being detached from the molding compound. An advantage of the structure as in Figures 10D, 10E is that thermal performance can be improved. For all applications, it does not need to have both a bottom package mask and a top heat sink. In addition, depending on the needs of the end product, one of several is appropriate. 11 is a cross-sectional view of another embodiment of an MPM (ie, 110) in accordance with the present invention, wherein a stacked die LGA top package 1 is stacked on top of a stacked die BGA bottom package 408 And the top and bottom packages are interconnected by wire contacts. In the particular embodiment illustrated in Figure 11, the bottom bga package 408 has two dies in the stack, and the top lig package has two dies in the stack. For example, a structure with this configuration is particularly suitable for applications requiring high memory density in a fixed track. The stacked dies may be of the same or different hexon type, including flash, SRAM, PSRAM, and the like. 88127 -60- 1329918 Referring to Figure η, the top package 丨_实f is constructed similar to the top package 1_ in Figure i〇a, and similar features are identified by similar reference numbers. In particular, the top package i is a stacked die plate tear-off array package in which the dies 1 〇 14, 1 〇 24 are separated by a spacer (8) $ and stacked on a top package substrate. The top package substrate includes a dielectric layer 1012 having a metal layer on the surface of the upper substrate and patterned to provide traces, such as 1011, having attachments for the upper package substrate line contact interconnection The stacked die and the line for the upper package are connected to the bottom package substrate. The lower die 1〇14 uses an adhesive 丨Ο. A die attach region attached to the shoal package substrate, such as a die attaching an epoxide. The die 1 〇 14 is electrically connected to the top substrate by wire contacts 1 〇 16 connected at the line contacts on the active surface of the die to the line contacts on the selected trace 1011. A spacer 1〇15 is attached to the upper surface of the lower die 1014 using an adhesive (not shown), and the upper die 1024 is attached to the spacer using an adhesive (not shown). The top surface of ι〇ι5. The spacer is selected to have a sufficient thickness to provide a void so that the protruding voids of 10,000 grains 1024 do not invade the wire contacts ι6. The die 1024 is connected to the top substrate by wire bonds 1026 which are connected at line contacts on the active surface of the die to the line contacts on the selected trace 1〇1]. The stacked die and the wire bond assembly on the top package substrate are wrapped in a molding material 1017 to provide a top package upper surface 1019 and leave the interconnected traces exposed The gap between the lines 1〇u. The top package 1 is tested at this point and then stacked over the bottom package 4〇8 as detailed below. 88127 -61· 1329918 The bottom package of the MPM no package 4〇8 is similar in structure to the top package. The 'substrate' is a completely-stacked platform grid array package' which separates the dies 444, 454 from the spacer and is stacked on top of a bottom package substrate. The bottom package substrate serves as the interconnect substrate for the completed MPM, and it can be constructed, for example, in a manner similar to the bottom substrate 412 of the bottom package 4A of Figure 5A. In particular, in this embodiment, the primer package includes a bottom package substrate 442 having at least a metal layer. It can be used in any of a variety of substrate types, including, for example, a plywood having a 2-6 metal layer, or a structured substrate having a 4,8 metal layer or a flexible polyimine having a 2 metal layer. Tape, or - ceramic multiple layer substrate. The bottom package substrate 442 shown by the example of Fig. 11 has two metal layers 451, 453, each of which is patterned to provide appropriate circuitry and connected by vias 452. The lower die 444 is conventionally attached to the "upper" surface of the substrate using an adhesive 443, which is substantially referred to as the die attach epoxide, as shown at 443 in FIG. The lower die is electrically coupled to the base substrate by wire bonds 446 that are connected at line contacts in the active surface of the die 444 to line contacts on the selected trace 451. A spacer is secured to the upper surface ′ of the lower die 444 using an adhesive (not shown) and the upper die 454 is stacked thereon and secured thereto using an adhesive (not shown) The upper surface of the spacer. The spacer is selected to be sufficiently thick to provide a gap' so that the protruding gap of the upper die 454 does not conflict with the child contact 446. The upper die 454 is connected by wire bonds 456 to the bottom substrate ' which is connected to the line contacts in the active surface of the die 454 and to the line contacts on the selected trace 45 1 . The bottom package has a lower die 444 and an upper 88127-62-1329918 square die 454, and the wire contacts 446, 456 are coated with a molding compound 447. The length is: for protection against ambient and mechanical stress, for processing Working, and providing an upper surface of the bottom package on which the top stacked die package 1000 can be stacked. Solder balls 418 are reflowed onto the pad pads on the metal layer below the substrate to provide circuitry for interconnection to the bottom, such as a host board of the final product (not shown). Solder caps 455, 457 are patterned over the metal layers 451, 453 to expose the underlying metal at the contacts for electrical connection, such as bonding the wire contacts and solder balls at the wire contacts 41 8. The top package 1000 can be tested and then stacked onto the die attach area of the upper surface of the bottom package substrate and secured thereto using an adhesive. The electrical interconnections of the top and bottom packages are routed at line contacts on the traces exposed on traces 1011 of the top package substrate and traces on traces 451 of the metal layer above the bottom package substrate. The contact 1118 is then affected. The MPM assembly is then wrapped in a molded H07 to protect the wire contacts of the package and provide mechanical integration in the completed MpM ug. The use of the top 4 package and the bottom package, or both in the top and bottom packages, is particularly well suited for high memory small trace applications. For example, in Figure 11, the multi-package module can be packaged on the (4) part package: a stacked ^ die memory top package; or the top and bottom package can be packaged in a die memory package. - High density memory modules. Other stacked die package configurations may be applied to the bottom or top stacked die package in accordance with this aspect of the invention, depending on, for example, the number of positives in the k' and according to the grains in the stack size. Examples 88127 - 63 - 1329918 The upper die in the 'in-bottom package stack' may have a smaller size than the die. In this configuration, the voids of the upper die are not protruded above the attachment point of the lands in the gap of the lower die, so that it is not necessary to include a spacer between adjacent dies in the stack. «This aspect of the invention" other top package configurations can be stacked on top of a stacked die bottom package. For example, as shown in the specific embodiment of the drawings, the suspension material can be stacked on top of the die bottom package of the stack #. In order to improve the multiple (four) (four) heat dissipation from the bottom package of the stacked die, as shown in the example of Figure n, a heat sink can be provided over the top package. The top heat sink is formed of a thermally conductive material having at least more central regions in its upper surface to expose the upper surface of the 到ρΜ to the surrounding environment to more effectively deviate the tropic from the μμμ. For example, the top heat sink can be a sheet of metal (e.g., a copper sheet) that can be secured to the crucible during the curing process of the molding material. Alternatively, the heat sink can have a generally planar portion over the upper package, and a surrounding support portion or a support member placed on or near the upper surface of the bottom package substrate. The top heat sink shown by the examples of Figures 5D and 5B can also be applied to a top turn heat sink in a stack of germanium die bottom packages. (or having a stacked die bottom and top package). For example, referring to the structure of FIG. 11 and the heat sink of FIG. 5A, the top heat sink is formed of a thermally conductive material that has a common location on the top package. It is a planar central portion 544 and a surrounding support member 546 that extends to the upper surface of the bottom package substrate 442. The upper surface 88127 - 64 - 1329918 of the planar portion 544 is attached to the upper surface of the MPM to be exposed to the surroundings to efficiently discharge the tropical MPM. For example, the top heat sink can be formed from a sheet of metal, such as copper, for example by stamping. The support members 546 can be secured to the upper surface of the bottom package substrate using an adhesive as needed. The multi-package module structure can be protected by forming a module cover 11〇7, and the heat sink support member is embedded in the MPM cover 1107 during the molding material curing process. A stepped recessed feature 545 is provided around the planar upper portion 544 of the heat sink to allow for better mechanical integration of the structure without being detached from the molding compound. In this embodiment, the space between the lower surface of the heat sink 544 and the upper surface 1〇19 of the top package molding 1〇17 is filled into the MPM molded thin layer. Additionally, a top heat sink can be attached to the top surface of the top package molding. Referring to the MPM structure of FIG. U, and referring to the heat sink of FIG. 5D, for example, the child top heat sink 504 can be a generally planar plate of a thermally conductive material, which at least has a more central region on the upper surface thereof. 5|丨# ,.=,

The periphery of the heat sink 504 is provided with - allowing for a mechanical integration of the preferred structure, [covering the MPM molding material. The stepped recessed feature 505 is less detached from the molded compound 88127 - 65 - 1329918. Alternatively, the MPM as in the figure may have a simple planar heat sink that does not have a support member that does not adhere to the top surface of the top package molding. In these embodiments, the top heat sink can be a generally planar plate of thermally conductive material, such as, for example, a sheet of metal (eg, copper) and at least a more central region of the upper surface of the planar heat sink. Exposure to the surrounding area to more effectively remove the tropics from the MPM. Here, the space between the lower surface of the simple planar heat sink and the upper surface 1〇19 of the LGA molding 1017 is filled with a thin layer of MPM molding, and the simple planar heat sink can be The MPM cladding 11 〇 7 is fixed during the molding material curing process. The unattached, simple planar top heat sink can be wrapped around the MPM molding material, as in the planar heat sink attached in Figure 5D, and can provide a stepped recessed feature on the periphery. 5 to allow for better mechanical integration with the structure and less separation from the molding compound. As is understood from the foregoing, in all of the various aspects, the invention features a line contact as a z-interconnect method between stacked packages. In summary, all LGAs stacked on a lower BGA must be smaller than the BGA (at least one dimension on the χ-y plane) for the line contacts to allow space around. The wire diameter is typically at a level of 〇 25 mm (range of 0.050 to 0.01 〇 mni). The wire distance to the edge of the LGA substrate is different in many embodiments, but not less than a wire diameter. The relative size of the BGA and LGA is primarily determined by the maximum grain size of each of them. The thickness of the die and the thickness of the mold cover primarily determine how many grains can be stacked in one package. The fabrication of the BGA package and the LGA package used in the present invention has been well established in the industry for both the wire contact and the flip chip type package. BGA testing has been well established in the industry and is basically accomplished by accessing such solder balls. The LGAs can be tested in two ways, (iv) by a palpitations on the lower surface of the LGA accessed to the substrate, similar to the soldering in the -BGA; or by being close to the substrate The z interconnect on the surface. These completed MpM assemblies can be tested in the same way as the BGA. The Μ P armor assembly treatment is similar for different (four) configurations in accordance with the present invention. In summary, the process includes the steps of: providing a first package substrate and at least one die attaching to the first package of the first package substrate, dispensing an adhesive to an upper surface of the first molded package And placing a second molded package including the second package substrate and the at least one die such that the lower surface of the second substrate can contact the adhesive on the upper surface of the first package during adhesion And forming a germanium interconnect between the first and second substrates. Preferably, the packages can be tested prior to assembly, and the package that does not meet the performance or reliability requirements can be discarded, so the first package and the second package that are tested as "good" are the modules used for the assembly. in. Fig. 12 is a flow chart showing the assembly process of the multi-package module shown in Fig. 5 or Fig. 7, for example. In step 12A2, it provides an undivided strip of ball grid array package. The die and wire contacts on the ball grid array package are protected by -molding. The BGA package in the strip is preferably tested for performance and reliability prior to the last % of steps in the IU King (as shown in Figure *). Only packages identified as "good" will be processed. 88127 - 67· 1329918 In step 1204, the adhesive is dispensed over the molded upper surface of the "good" BGA package. In step 1206, a separate platform grid array package is provided. The separate LGA package is protected by a mold and is preferably tested (=〇 and identified as "good". In step 12〇8, a selection and placement operation is performed to place "good" The LGA is packaged on the adhesive over the molding of the good BGA package. In step ΐ2, the adhesive is cured. In step 1212, a plasma cleaning operation is performed at preliminary step 1214. Wherein a line junction z interconnection is formed between the top LGA of the stack and the bottom BGA package. In step 1216, an additional plasma cleaning can be performed, followed by forming the MPM molding in step 1218. The middle and first-order interconnecting solder balls are attached to the bottom side of the module. In the step, the completed module is tested (*) and separated by the strip, for example by sawing. Or by punching separation, and being packaged for further use. Figure 13 is a flow chart showing, for example, the assembly process of the multi-package module shown in Figure 6A. In step 13〇2, provide - An undivided strip of ball grid array package on the ball grid array package The die and wire contact structure is protected by the system. The BGA seal (4) in the strip is preferably tested before the next step in the process and can be tested (as shown in the figure TF) Only the package identified as "good" will be accepted in the subsequent step in step 1304, where the binder is dispensed onto the upper surface of the molded "good" package. In step W, The separate platform grid array package is separated from the LGA package by a peripheral molding to protect the line contacts, and is preferably tested (7) and identified as "good". In step 1308, ' - Select and place the work to place the LG A scraper of "88127 -68 - 1329918" on the adhesive on the molding of the "jj-t- ό a u. 」" BGA package. In step 1310, the adhesive is cured. In the step, at the preliminary step 1314, a plasma cleaning operation is performed in which a line junction z interconnection is formed between the top LGA of the stack and the bottom BGA package. In step 1316, an additional plasma cleaning can be performed, followed by forming the MPM in step 1318. In step 132, the second-order interconnect solder ball is attached to the bottom side of the module. In step 1322, the completed (four) group is tested ("' and separated by the child strip, for example by The sawing is separated or separated by punching and packaged for further use. Figure HA shows a flow chart of an assembly process such as the one of the multiple package modules shown in Figure 8-8. Providing an undivided strip of a ball grid array package. The BGA packages have a shield fixed on the die. The material shield protects the ball grid array from 6 scoops of die and wire contacts The structure, therefore, does not require package molding. The bga package in the strip is preferably tested for performance and reliability before the subsequent steps in the process (as indicated by * in the figure). Only packages identified as "good" will be processed. In the first step, the adhesive is dispensed over the masked upper surface of the "good" 曰 BGA package. A separate platform grid array package is provided in the step. The separate LGA package is molded by: 谩, and is preferably tested (*) and identified as "good". In step 4(10), a selection and placement operation is performed to place the "good" MGA package on the adhesive over the molding of the "good" BGA package. In step 14A, the adhesive is cured in step 丨 412, in a preliminary step "进行 - plasma cleaning operation" where the top L of the stack (m and bottom 88127 - 69 - 1329918 BGA package A line junction z interconnection is formed between them. At step i4i, an additional plasma cleaning is performed, followed by formation of the MpM molding in step 1418. In step 1420, 'into the de-lighting operation to decompose and remove Unwanted organic matter. The light removal system is cleaned by a chemical transfer or plasma by a laser transfer rod, a cymbal, or a fine. In step 1422, a second-order interconnected solder ball can be attached to the mold. The bottom side of the set. In step 1424, the completed module is tested (7) and separated by the strip', for example by separation or by punching, and packaged for further use. Figure 14B Shown is a flow chart of an assembly process of a multiple package module, such as shown in Figure 。. This process is similar to that shown in Figure 14 and has additional steps to insert before installing the heat sink. Carry out _ "drop mold operation. Similar steps in the process are shown in the figure Identified by reference numerals. In step M02, 'provide' the undivided strips of the ball grid array package. The BGA packages have a shadow fixed on the die. The masks protect the cells. The die and wire contact structure on the gate array package, therefore, does not require package molding. The bga package in the strip is preferably tested for performance and reliability before it takes the next step in the process ( As indicated in the figure, only the package identified as "good" will undergo subsequent processing. In step 404, the adhesive is dispensed on the "good" 8 (} eight package above the upper surface of the mask) In step 〇4〇6, a separate platform grid array package is provided. The separate LGA package is protected by -mold, and is preferably tested (*) and identified as "good ^ in step just To perform a selection and placement operation to place a "good" lga package on the adhesive over the shadow of the "good" BGA package. In step 141〇88127 -70· 1329918: the adhesive That is, it is solidified. In step 1412, in the preliminary step The i4i4 亍$h washing operation is in which a line contact z is interconnected between the top lga of the stack and the bottom GA package. In the step "Μ, a plasma cleaning can be performed. In step 1415, - The heat sink is dropped into each of the cavities in a cavity molding apparatus. In step 1417, the cleaning package stack # from step (4) 6 falls into the cavity above the heat sink. In step 1419 '-The cladding material is injected into the cavity and solidified to form the die. In step 1421, a light removal operation can be performed to decompose and remove unwanted organic matter. The laser is performed by a laser, or may be washed by a chemical or private name β in step 422, and the second-order interconnected ball may be attached to the bottom side of the stack. In step 424, the completed module is tested ("' and separated by the child strip'", for example by sawing apart or by punching, and being packaged for further use. Figure c A flow chart showing, for example, an assembly process of a multi-package module shown in FIG. 8C. This process is similar to that shown in FIG. 14A, which is inserted into the top package before the installation plane is hot. Additional steps. Similar steps in this process are identified by similar reference numerals in the drawing, in step 1402, to provide an undivided strip of a ball grid array. The BGA packages are fixed to Shielding over the die. The masking protects the die and wire contact structure on the ball grid array package, thus eliminating the need for package trimming. The BGA package in the strip is preferably The performance and reliability tests are performed before the subsequent steps in the weighting process (as shown in the figure). Only those packages identified as "good" will be subject to subsequent processing. In step 1404, the adhesive is assigned. On the "Rehabilitation" bga package on the shaded 88127 71 1329918 ^ In step 1406, a separate platform lattice array package is provided. The separate LGA package is protected by a mold, and is preferably tested () and identified as "good". In 14〇8, carry out the “selection and placement operation” to place the “good” (10) package on the “good” canister=installed on the adhesive. In step 14, the adhesive is cured. In step 1412, a plasma cleaning operation is performed before the preliminary step 1414, and a --contact z-interconnection is formed between the stacked top LGA and the bottom BGA package, and then an additional electro-polymer cleaning is performed. In (4) 1, the adhesive is dispensed onto the upper surface of the top LGA package molding, and in step 143, the rod __ grid 4 is firmly φ retracted and placed to place a flat radiator Adhesive is applied over the top package. The adhesive is cured in step 435. Additional power cleaning is performed in step 1416', and in step 1418, the mold is formed. _2〇 can perform a light removal operation to decompose and remove Desirable organic material. The de-lighting can be performed by laser or chemical and plasma cleaning. In step 1422, a second-order interconnect solder ball can be attached to the bottom side of the module. In step 1424, the completion is completed. The mold is ready for the test (*) and is separated by the strip 'for separation, for example, by separation or by punching, and is packaged for further use. Figure 15 is not shown, for example, in Figure 9 A flow chart showing the assembly process of one of the multiple package modules. In step 15〇2, an undivided strip of the bottom package of the lower die wafer wafer grid array is provided. The BGA package can have Molded, or not, and may not have a second-order interconnected solder ball. The BGA package in the strip is preferably tested for performance and reliability before the subsequent steps in the process. * shown in the figure). Only packages identified as 88127 • 72-1329918 Good are subject to subsequent processing. In step 1504, the adhesive is placed over the upper surface (back side) of the die on a good BGA package. In step 1506, a separate platform grid array package is provided. The separate LG continuation is protected by -molding, and is preferably tested (7) and identified as "good". In step 1508, a selection and placement operation is performed to place a "good" LGA package on the adhesive over the grains on the "good" BGa package. In step 151, the adhesive is cured. In v 驭 1 5 12, a plasma cleaning operation is performed at a preliminary step 丨5 _4, wherein a wire contact z interconnection is formed between the top LGA of the stack # and the bottom BGA package. In step 1516, an additional battery cleaning can be performed, followed by forming the MPM molding in step 1518. At the step (5), the second-order interconnected ball is attached to the bottom side of the fish. In step 22, the completed module is tested (7) and separated by the strip, for example by recording separation or by punching, and is packaged for further use. The figure (10) is shown as, for example, A flow chart of the assembly process of the multi-package module shown in FIG. This process is similar to that shown in Figure 15 which has an additional step of inserting the mask over the bottom package flip chip die. Similar steps in the process are identified by similar reference numerals in the figures. In step 1602, the undivided strips of the bottom package of the die-flip wafer ball grid array are provided. The BGA package may or may not have, and does not have, a first-order interconnect solder ball. The A package in the strip is preferably tested for performance and reliability prior to its subsequent steps in the process (shown as * in the figure). Only packages identified as "good" will be processed later. In the step, the electrical shield is attached to the die on the "good" bottom 88127 - 73 - 1329918 BGA package. In step 丨6〇4 the adhesive is dispensed over the upper surface of the shield on a good BGA package. In the steps, a separate platform grid array package is provided. The separate LGA package is protected by -mold and is preferably tested (7) and identified as "reverse". In step 1608, a selection and placement operation is performed to place a "good" 々GA packaged on the adhesive over the mask on the (good) BGA package. In step 1610, the adhesive is cured. In step "^, at preparatory step 1614, an electro-convex cleaning operation is performed in which a line junction z interconnection is formed between the top LGA and the bottom-shortage BGA package of the stack. In step 1616, '彳-- The plasma cleaning is followed by the stencil molding in step 1618. In step 1620, the second-order interconnect solder balls are attached to the bottom side of the module. In step 1622, the completed module is performed. η is tested and separated by a child strip, for example by separation or by punching and is packaged for further use. Figure 17 is shown, for example, in Figure 1 or Figure 1 a flow chart of the assembly process of the multi-package module. In step 17〇2, an undivided strip of the bottom package of the flip-chip wafer grid array is provided. The wafer interconnect is composed of the crystal Grain-attachment surface of the grain and the bottom substrate: heart-side filled or molded to protect Therefore, it is necessary to cover the system. The 黯 package in the length 4 is preferably tested in the process of the material process and reliability (as shown in the figure * Τ 』 No. Only the package identified as "ί J will undergo subsequent processing. In step 1704, the adhesive is assigned to the "1 good" BGA package on the upper surface of the substrate. In the 170, a separate second package is provided, the basin can be a five-field, and a chip package for the stack $, as shown in Fig. _0B. The second package is separated by a Molded to keep it thin, preferably tested (7) and identified as "free". In step 17〇8, perform a -selection and placement operation to place a "good" package in the "good" BGA The adhesive is applied on the upper substrate. In step (4) = ^ the adhesive is cured. In step 1712, the package name is washed in the preliminary step (10), at the top of the stack (stacked grains) A wire-bonded & interconnect is formed between the BGA packages on the bottom of the die bottom wafer. In the cattle (7) 6 'can be carried out - additional electricity Cleaning, then forming the dies in step (7). In step (10), the second-order interconnected ping balls are attached to the bottom side of the module. In step 1722, the completed module is tested () ' And separated by a child strip, such as by sawing apart or by punching, and being packaged for further use. Figure 18 shows the assembly process of the multi-package module shown in Figure U, for example. In step 1802, 'a strip of undivided strips of stacked die grid arrays is provided. The stacked die package is molded, the upper package surface. The package is better in the strip. The ground is a test of performance and reliability before the subsequent steps in the process of Figure V! 7(). Only the package that identifies "good" will accept that the adhesive in the 'wind 1804' is dispensed on the upper surface of the "good" stacked die carrier. In the step, a separate music package is provided, which may be a stacked die package, such as shown in Figure 。. The separated -, ", can be protected by a molding" and preferably tested 1 "reversely good". In step 1808, a check and a dish are prepared for placing the "self-defective" brother 2 on the adhesive on the substrate of the good BGA seal 88127 • 75 · 1329918. . In step 181, the adhesive is cured. In step 1812, at the preliminary step 1814, an electro-agglomeration process is performed in which a wire contact 2 interconnection is formed between the top of the stack (stacked die) and the bottom die-chip wafer package. An additional plasma cleaning can be performed in the step coffee, followed by the formation molding in step 1818. In the step of deleting, the second-order interconnected ping pong is attached to the bottom side of the module. In step 1822, the completed module is tested (7) and separated by the strip, for example by sawing apart or by punching, and packaged for further use. The individual steps of the various steps of the process towel according to the present invention can be carried out as follows, using a substantially conventional technique in accordance with the methods described herein, but using a directly modified conventional manufacturing facility as described herein. . Variations in these conventional techniques, as well as modifications to conventional manufacturing equipment, can be accomplished using the methods described herein without further experimentation. Other specific embodiments are set forth in the following patent claims. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a cross-sectional view through a conventional ball grid array semiconductor package. Figure 2 is a cross-sectional view of a conventional multi-package module with solder ball z interconnections between stacked ball grid array semiconductor packages. Figure 3 is a cross-sectional view of a flip chip multi-package module with a ball z-interconnect between stacked flip-chip semiconductor packages. Figure 4 is a cross-sectional view of a conventional multi-package mode red by interconnecting a flexible substrate and solder balls between the stacked half (four) packages. Figure 5A is a cross-sectional view showing a specific embodiment of a multi-package module having a wire contact Z interconnection between a stacked bga and a Β 88127 - 76 - 1329918 semiconductor package in accordance with the present invention. Figure 5B is a plan view of a bottom BGA substrate having z-interconnect dot pads in a configuration suitable for use in the embodiment of the invention illustrated in Figure 5A. Figure 5C is a plan view of a top LGA substrate having a z-interconnect point 适用 in a configuration suitable for use in the embodiment of the invention illustrated in Figure 5A. 5D is a cross-sectional view of a particular embodiment of a multi-package module having wire bonds z interconnects between stacked BGA and LGA semiconductor packages in accordance with an aspect of the present invention, having a top to be attached to the top A heat sink on the upper surface of the package. Figure 5E shows a cross-sectional view of a particular embodiment of a multi-package module having a wire j interconnect between stacked BGA and LGA semiconductor packages and having a heat sink in accordance with another aspect of the present invention. 6A is a cross-sectional view of another embodiment of a multi-package module having a wire bond z interconnect between stacked BGA and LGA semiconductor packages in accordance with an aspect of the present invention, wherein the top package It has a molding around. 6B is a cross-sectional view of another embodiment of a multi-package module having a wire bond z interconnect between stacked BGA and LGA semiconductor packages in accordance with an aspect of the present invention, wherein the top package has Molded around, and the module has a heat sink. 7 is a cross-sectional view of another embodiment of a multi-package module having a wire bond z interconnect between stacked BGA and LGA semiconductor packages in accordance with an aspect of the present invention, wherein the top package substrate There is a metal layer substrate. 88127 • ΊΊ - 1329918 FIG. 8A is a cross-sectional view of one embodiment of a multi-package module having a wire bond z interconnection between stacked BGA and LGA semiconductor packages in accordance with another aspect of the present invention. Where an electrical shield is provided on the bottom package. 8B is a cross-sectional view of another embodiment of a multi-package module having a wire bond z interconnect between stacked BGA and LGA semiconductor packages in accordance with an aspect of the present invention, wherein the bottom package is An electrical shield is provided thereon, and the module has a heat sink. Figure 8C is a cross-sectional view showing another embodiment of a multi-package module having a wire bond z interconnection between stacked BGA and LGA semiconductor packages in accordance with an aspect of the present invention, wherein at the bottom An electrical shield is provided over the package, and the module has a heat sink secured to an upper surface of the top package. Figure 9A is a cross-sectional view of a multi-package module having interconnects with wire bonds z between stacked flip-chip BGA (lower die) and LGA semiconductor packages in accordance with another aspect of the present invention. 9B is a cross-sectional view of a multi-package module having a wire bond z interconnect between a stacked flip chip BGA (lower die) and an LGA semiconductor package in accordance with another aspect of the present invention, wherein An electrical shield is provided on the bottom package. 9C is a cross-sectional view of a multi-package module having interconnects between the stacked flip chip BGA (lower die) and the LGA semiconductor package in accordance with another aspect of the present invention, wherein An electrical shield is provided on the bottom package, and the module has a heat sink. 88127 - 78- Ϊ 329918 FIG. 10A shows a multi-package with a wire contact z interconnection between a stacked flip chip BGA (upper die) and a stacked die LGA semiconductor package in accordance with another aspect of the present invention. A cross-sectional view of a module in which adjacent stacked crystal grains are separated by a spacer in the second package. Figure 10B shows a multi-package mode with interconnects z between the stacked flip chip BGA (upper die) and the stacked die LGA semiconductor package on the one hand in accordance with the present invention. A cross-sectional view of a group in which adjacent stacked grains in the second package have different sizes. Figure 10C is a cross-sectional view of a multi-package module interconnected by a stacked wire bond z between a stacked flip chip BGA (upper die) and a stacked die LG eight semiconductor package in accordance with another aspect of the present invention. _, and wherein an electrical shield is provided on the bottom package. The figure is shown as a cross-sectional view of a multi-package module having a wire contact z interconnection between a stacked flip chip BGA (upper die) and a stacked @ die LGA semiconductor package in accordance with another aspect of the present invention. And wherein the bottom package is provided with electrical shielding and has a heat sink secured to the upper surface of the top package. 10E is a cross-sectional view of a multi-package module having a wire contact z interconnect between die LGA semiconductor packages of stacked flip chip BGAU die according to another aspect of the present invention, wherein An electrical shield is provided on the bottom package and has a heat sink in accordance with another aspect of the invention.

Figure 11 is a multi-package module having a wire contact 2 mutual 88127 • 79-1329918 between a stacked (10) die) and an LGA (stacked die) semiconductor package in accordance with another aspect of the present invention. Sectional view. Figure 12 is a flow chart showing an assembly process of a multi-package module such as that shown in Figure 5A or Figure 7. Figure 13 is a flow chart showing a packaging process of a multi-package module such as that shown in Figure 68. Figure 14A is a flow chart showing an assembly process of a multi-package module such as that shown in Figure 8-8. Figure 14B is a flow chart showing an assembly process of a multi-package module such as that shown in Figure 8B. - Figure 14C is a flow chart showing, for example, an assembly process of a multi-package module shown in Figure 8; Figure 15 is a multi-package module such as shown in Figure 9 Flowchart of the assembly process. Fig. 16 is a flow chart showing an assembly process of a multi-package module, for example, shown in Fig. 17. Fig. 17 is a diagram showing, for example, Fig. 1 or Fig. A flow chart of an assembly process of a multi-package module in b. Figure 18 is a flow chart showing an assembly process of a multi-package module, for example, shown in Figure 1. [Illustration of symbolic representation] 10 MPM Bottom package 12 ' 22 substrate 13 23 die attach epoxide 88127 -80 - 1329918 14, 24 ' 34 '44 die 16' 26 wire contact 17 > 27 > 47 molding compound 18 ' 28, 38 , 48 solder balls 20 stacked MPM 30 2-stack flip chip MPM 33 polymer side filled 35 pass L 36 bump 40 2-stack curved flexible substrate MPM 42 metal layer bottom package substrate 43 adhesive 46 cantilever beam 50 ' 52, 60 > 70 > 84 Multiple Package Modules 54, 62 ' 82 '94 BGA+LGA Multi-Package Module 90' 92, 101, 103 Multiple Package Module 105, 107 N 109, 110 Multi-Package Module 121, 123 Metal Layer 122, 142 Through L 125 ' 127 , 147 Solder Cover 141 First metal layer 143 second metal layer 88127 -81 - 1329918 221 ' 223 metal layer 222 via 225 , 227 solder mask 300 bottom package 302 bottom BGA package 304 shield 305 sidewall 306 line 312 bottom package substrate 314 die 315 ' 327 Solder Mask 316 Flip Chip Bump 318 Solder Ball 321 , 323 Metal Layer 322 Through Hole 331 Metal Layer 332 Substrate 333 Polymer Side Filled 334 Die 335 Through Hole 336 Bump 338 z Interconnect Solder Ball -82 - 88127 1329918 342 BGA Substrate 343 Interconnect Bump 344 Die 346 Flip Chip Bump 348 Second Order Interconnect Ball 351 Metal Layer 353 Patterned Metal Layer 354 ' 356 Dielectric Layer 355 Metal Layer 400 Bottom Package 401 Void 402 Bottom Ball Grid Array (BGA) Package 406 Heat Sink/Mask 407 Sidewall 408 Line 412 Bottom Package Substrate 413 Grain Attachment Epoxide 414 Grain 415 '427 Solder 416 wire contact 417 molding compound 418 solder ball 88127 -83 - 1329918 419 bottom package upper surface 421, 423 metal layer 422 through hole 424 bottom package z interconnection pad 425 upper surface 426 upper surface 442 bottom package substrate 443 adhesive 444 454 die 446, 456 wire contact 447 molding compound 448 solder ball 451, 453 metal layer 452 through hole 455 '457 烊 cover 500 top package 501 void 503 > 506 adhesive 505, 545 concave feature 507 module Wrap 511 Trace 512 Top Package Substrate -84- 88127 1329918 513 Die Attachment Epoxide 514 Die 515 Solder Cover 516 Line Contact 517 Molding Compound 518 Line Contact 519 Upper Surface 521 Metal Layer 522 Through Hole 523 Metal Layer 524 Top Package z Interconnect Pad 525 Upper Surface 526 Edge 527 Solder Mask 544, 504. Heat Sink 546 Support Component 600 Top Package 607 Module Cover 612 Top Package Substrate 613 Die Attachment Epoxide 614 Die 615 Solder Mask - 85 - 88127 1329918 616 Line contact 617 Molding compound 618 Line contact 621 Metal layer 622 Through hole 623 Substructure layer 627 solder mask 644 heat sink 645 recessed feature 646 support member 700 top package 707 module package 712 top package substrate 713 die attach epoxide 714 die 715 solder mask 716 wire contact 717 molding compound 718 wire Contact 719 Surface 721 Metal Layer 800 Top Platform Grid Array (LGA) Package 88127 -86- 1329918 803 Adhesive 804 Heat Sink 805 Recessed Feature 806 Support Member 807 Module Wrap 812 Top Package Substrate 813 Die Attachment Epoxy 814 die 815, 827 8 8 817 molding compound 818, 816 wire contact 819 upper surface 821 metal layer 822 through hole 823 metal layer 844 heat sink 845 concave feature 846 adhesive 847 cladding 900 top LGA package 903 adhesive 907 Module Wrap-87- 88127 1329918 908 Wire 909 Sidewall 912 Top Package Substrate 913 Grain Attachment Epoxide 914 Die 915 Solder Mask 917 Molding Compound 918 ' 916 Line Contact 919 Surface 921 Metal Layer 944 Heat Sink 945 Recessed feature 946 support member 1000 die platform grid array package 1003, 1006. Adhesive 1004 Heatsink 1005 Recessed Features 1007 Module Cover 1011 Trace 1012 Dielectric Layer 1013 Adhesive 1014 Grain 88127 -88- 1329918 1015 Spacer 1017 Molding Material 1018, 1016, 1026 Line Contact 1019 Upper Surface 1024 Crystal 1030 Top Package 1031 Trace 1033 Adhesive 1034 Die 1035 Adhesive 1036 Wire Contact 1037 Molding Material 1039 Upper Surface 1044 Die 1045 Recessed Feature 1046 Wire Contact 1103 Adhesive 1107 Molded 1118 Wire Contact 88127 - 89-

Claims (1)

1329918 Patent Application No. 092125625 (Replacement of Patent Application Scope (March 99) Pickup, Patent Application Range: 1. A multi-package module comprising a package below and above the stack, the upper package including an attached and electrically interconnected An upper package die on a coarse-grained side of an upper package substrate, and the lower package includes an underlying package die attached and electrically interconnected to a die attach side of a lower package substrate, each package substrate including at least a metal layer and at least one dielectric layer, and each package substrate is configured to provide electrical contact with the metal layer at an opposite side of the substrate on the die attach side, the module further comprising a lower package substrate a second-order interconnect ball pad at a lower side, wherein the electrical interconnection between each of the die and the substrate is protected, and wherein the upper and lower substrates are interconnected by wire bonding. [2] The multiple package module of claim 1, wherein at least one of the package has a wire bond interconnected to the substrate, and wherein the wire bond is interconnected by encapsulation. 1 3. The multiple package module of claim 2, wherein the package is completely encapsulated. 4. If applying for a multi-package module of the second item of the hometown, wherein the package is only encapsulated in a range sufficient to protect the wires from bonding between the die and the substrate. 1 . The multiple package module of claim 1 , wherein at least one of the packages is a ball grid array package. 6. At least one of the multi-package modules of the scope of claim i is a platform grid array package. The multi-package module of claim 1 wherein at least one of the 88127-9903l7.doc packages has a flip chip interconnect of the die to the substrate, and wherein the flip chip interconnect is protected by a bottom fill. - 8. If the multi-package module of the scope of the patent application is further included, the heat sink is further included. 9. If you apply for a patent scope! The multi-package module of the item further includes electromagnetic shielding for at least one of the packages. 1. A multi-package module as claimed in claim i, which includes a third stacked package. - 11 - A method of fabricating a multi-package module, comprising: providing a first package comprising a first and second surface and attached to the first surface of the first package substrate At least one a-grain-package substrate, the first package substrate includes an interconnection portion for accessing the module at the second surface, the first package includes a An encapsulating agent on the surface of the encapsulant, the second package is disposed on the first package, the second package includes at least one crystal having the first and second surfaces and the first surface attached to the mth plate a second package substrate, wherein the package is disposed on the first package, including an application-adhesive to the surface of the tamper-evident agent and the second package is placed to the adhesive 7, and A wire bond z-interconnect is formed between the first and second substrates. 12. The method of claim </RTI> wherein the first package provides an undivided strip. A package 13. The method of claim 11, wherein the adhesive is a solid. 2. 1329918 14. 15. 16. 17. An adhesive, and further comprising curing the adhesive. For example, the method of claim (10), wherein the first-to-performance and reliability requirements are provided to test the package, and the second package is selected to meet the demand. X. The method of claim 11, wherein placing the second package on the first package includes testing the package for a performance and reliability requirement, and selecting the second package satisfies the requirement. The method of claim 11, further comprising attaching a second-order interconnecting ball to the first package substrate. The method of claim 11, further comprising encapsulating the stacked packages in a multi-package module molding.