TWI231675B - Universal asynchronous receiver/transmitter adaptor having status display - Google Patents

Abstract

The present invention relates to a universal asynchronous receiver/transmitter (UART) adaptor having status display, comprising a capture unit, a drive unit and a display unit. By using the adaptor to capture the asynchronous input and output signals and activating the display unit, users can know the current input and output status of the UART; therefore, when problems occur, it would be more convenient for users to debug and solve the problems.

Description

1231675 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a non-synchronous serial transmission adapter, particularly an Ethernet network RJ-4 5 with a status display and a serial transmission system. 9 PIN-pin adapter. [Previous technology] When two information processing devices transmit data to each other, a transmission method of a communication protocol is used, and the asynchronous serial transmission of UART is more commonly used. If the two information processing devices are used, When having different serial transmission communication interfaces, it is necessary to use the interface conversion function of the interface adapter to enable the two information processing devices to connect and transfer materials. This kind of adapter produces different combinations of adapters according to different interfaces. Among them, Ethernet RJ-45 pairs of serial transmission RS-232 2 2 are more commonly used. At present Said that this adapter does not have a status display function. When an error occurs, the user cannot know whether the asynchronous serial transmission UART is working normally, so it is necessary to check the failure. It takes more time and pays more attention to time. Efficiency is not worth it today. [Summary of the Invention] In view of the above problems, the main object of the present invention is to provide an asynchronous serial transmission adapter with a status display function, which is completed by an electronic logic circuit to display the transmission status of asynchronous serial transmission. To let users know the current data transfer status. Therefore, in order to achieve the above object, the present invention has a state

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Display Function = Synchronous Serial Transmission Adapter, Wu, a drive unit, and a question-and-reserve -y dagger has a capture early # # ^ RXD, RTS, CTS; DTR, = display unit, allowing users to use Examples of the characteristic disc paste of the present invention are described in detail as follows. [Implementation method] Work: Purpose: Whether the asynchronous serial transfer wheel works normally. When an error occurs or early capture, you can quickly complete the wrong time and relatively improve the quality of data transmission. That is, W Zhenzi cooperates with the icon to make the best reality> = Cang Zhi "the first picture", which is a functional block diagram of the present invention. The data processing is set to 6 0 '8 0 through asynchronous serial transmission and status display The transfer 50 and the information processing device 70 ′ having an Ethernet port 90 (for example, RJ_45) perform data transmission and reception operations. The present invention uses an asynchronous string on the status display adapter 50 to capture the signal of pin 80 on the transmission wheel, and achieves the status display function through an electronic logic switch circuit, including an acquisition unit. 1 0, a driving unit 20 and a display module 3 0, $ first non-identical = serial transmission 8 0 transfer interface specifications through the interface transfer, and then use the operating unit 1 〇 capture asynchronous serial transmission 8 〇 The input and output signals ^ 'and output the signal to the drive unit 2 0, the drive unit 2 Q touches the switch according to its input signal to push the display unit 3 0 to display the current working status of the asynchronous serial transmission 80. Please refer to "Figure 2", which is the serial transmission of UART in the present invention.

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V. Description of the invention (3) Input interface RS-2 3 2 as an example to explain the pin description of 2 3 2: The following is the serial transmission interface pin 1 DCD (Data Carrier Detect), and the carrier pin J pin 2 RXD (Received Data), data input. Pin 3 TXD (Transmit Data), data output. Pin 4 DTR (Data Terminal Ready), the receiving end is good 0 pin 5 GND (Ground), ground wire. Pin 6 DSR (Data Set Ready), the transmitting end is ready. Pin 7 RTS (Request to Send) requests the other party to send data. ,, Pin 8 CTS (Clear to Send), clear to send data. Pin 9 RI (Ring Indicator), sound detection. In the serial transmission interface RS-23 2 pin is transferred to the corresponding Ethernet port interface rj — 4 5 line, the acquisition unit is used to capture the asynchronous serial transmission signal, and the drive unit The display unit displays the current working status of asynchronous serial transmission to the user. Among them, because the serial transmission interface RS-2 3 2 has 9P IN pins, and the Ethernet interface R j-4 5 only has 8 PIN pins, the serial transmission interface RS-23 of the present invention is Is 2 Transfer Ethernet interface rj — 4 5 The last pin of RI is not connected (empty connection). Please refer to "Figure 3", which is a circuit diagram of the present invention. The present invention uses R X D, R T S, C T S, D T R, and D S R pins to indicate data reception and connection status.

Page 7 1231675 V. Description of the invention (4) The capturing unit 10 is composed of a buffer switch ^ 3, an OR gate switch 11 and an OR gate switch 12, and the driving unit 2 0 It is composed of metal emulsion semiconductor switch 21 and metal oxide semiconductor switch 2 2, and display unit 30 is composed of light emitting diode 3 丨 and light emitting diode 32. · Firstly, a buffer (buf fer) switch 13 is connected between the RXD pin of the asynchronous serial transmitter 80 and a light emitting diode (LED) 31, and the RXD signal is connected to the buffer (buf fer). The input terminal of the switch 1 3, and the N terminal of the light emitting diode 3 1 is connected to the output terminal of the buffer (buf fer) switch 13. When the captured RXD generates a low voltage level signal, the buffer switch is used. 1 3 Output its input signal to produce a low-voltage level signal output to form a loop to let the ® power flow through the light-emitting diode 3 1 to make it conductive and bright, indicating that ART is currently receiving data. In the following situations, the light-emitting diode 32, which represents the connection, will be turned on and light up. When capturing the RTS output and CTS input as a low voltage level signal, an OR gate (0 RG ate) switch 1 1 is used to perform an OR logic operation based on the input signal. As a result, a low voltage level signal is output. When the gate of the metal oxide semiconductor switch 21 receives a trigger signal, the metal oxide semiconductor switch 21 is turned on, and the power is passed through the metal oxide semiconductor switch 21, and the light emitting diode 3 2 representing the connection state is turned on and illuminated. To indicate that the connection was established. 0 When capturing the R T S input and C T S output at any high voltage level, pass an OR Gate switch 1 1 according to its input

1231675 V. Description of the invention (5) The signal is OR-operated, and the result outputs a high-voltage level signal. Compared to the gate of the metal oxide semiconductor switch 21, there is no trigger signal, so the metal oxide semiconductor switch 21 does not conduct, so the power supply The circuit cannot be passed, and the light-emitting diode 32, which represents the connection status, will not light up to indicate that the connection is not established. The D T R and D S R signals that are being considered are also the same way. Under the following conditions, the light-emitting diode 32, which represents the connection, will be turned on and light up. When the DTR output and the DSR input are operated at a low voltage level signal, an OR logic operation is performed according to the input signal, and a low voltage level signal is output as a result. At this time, the gate of the metal oxide semiconductor switch 2 2 is triggered. Signal, so the metal oxide semiconductor switch 2 2 is turned on, the power passes through the metal oxide semiconductor switch 22 circuit, and the light-emitting diode 32 that is connected to the connection state is turned on and lighted to indicate that the connection is established. When the captured DTR input and DSR output are at any high voltage level, an OR gate switch 12 will be used to perform an OR logic operation according to its input signal and the result will output a high voltage level. Junxun /, No., compared to the gate of metal emulsion semiconductor switch 22, there is no trigger penetration, so the metal oxide semiconductor switch 22 is not conductive, so ^ source ^ method ^ metal oxide semiconductor = off 22 circuit, so it represents the connection The state of the diode 2 will not send the party 'to indicate that the connection is not established. By using such a UART adapter with status display, one can clearly understand the working status of Muli UART. When a "failed input signal failure or error occurs", the present invention has a status display connector, which can make debt errors faster. And troubleshooting to maintain data transfer

1231675 V. Description of the invention (6) Quality and correctness. Although the present invention is disclosed in the foregoing preferred embodiment as above, it is not intended to limit the present invention. Any person skilled in the art of similarity can make some modifications and retouching without departing from the spirit and scope of the present invention. The patent protection scope of the invention shall be determined by the scope of the patent application scope attached to this specification.

Page 10 1231675 Brief Description of Drawings Figure 1 is a functional block diagram of the present invention; Figure 2 is an explanatory pin diagram of an embodiment of the present invention; and Figure 3 is a circuit diagram of the present invention. [Illustration of symbols] 1 pin 2 pin 3 pin 4 pin 5 pin 6 pin 7 pin 8 pin 9 pin 10 Retrieving unit 11 or gate switch 12 or gate switch 13 Buffer switch 2 0 Drive unit 21 Metal oxide semiconductor transistor 22 Metal oxide semiconductor transistor 30 Display unit 31 Light emitting diode 3 2 Light emitting diode 50 Status display adapter

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Claims (1)

1231675 VI. Scope of patent application 1-ί ·? F-type traumatic asynchronous serial transmission (UART) transfer: political-asynchronous serial transfer (UART) interface transfer to an Ethernet network The port interface includes: an acquisition unit for acquiring an asynchronous serial transmission (UART) signal connected to the interface conversion unit; _σ, two driving units connected to the acquisition unit, according to the A driving signal is generated immediately after the capture; and & &% = display unit, connected to the driving unit, according to the driving signal, "= the state of the asynchronous serial transmission. H ^ Ming patent scope item 1 The described asynchronous serial transmission (UART) port " bits where the captured input pins are RXD, CTS and DSR. H Ϊ The asynchronous serial transmission (UART) described in the first item of the patent scope The transfer is 丄 where the output pin of the capture is RTS and DTR. ^ ^ Σσ of the asynchronous contention transmission (ART) described in item 2 of the patent scope, where the RXD signal captured by the capture unit passes A buffer element switch output is provided to the driving unit. For the asynchronous contention transmission described in item 2 or 3, the adapter, in which the captured RTS and CTS signals pass through an OR gate (〇1? R 6 as the application block Gate) 7 ° Switch output to the drive unit. (UART): Asynchronous serial transmission described in item 2 or item 3 of the patent range, or gate-to-switch, where the DTR and DSR signals of the operation are transmitted via 7 such as A switch is output to the driving unit. Adapter% of the asynchronous serial transmission (UART) described in item 1 of the patent ^ wherein the driving unit is composed of at least one metal oxide semiconductor Page 13 1231675 VI. Patent application (MOS FET) transistor composition. 8. The adapter for asynchronous serial transmission (UART) as described in item 7 of the scope of patent application, wherein the metal oxide semiconductor (MOS FET) transistor is a P-type metal oxide semiconductor transistor. ❿ Page 14