TW583757B - A structure of a flip-chip package and a process thereof - Google Patents

A structure of a flip-chip package and a process thereof Download PDF

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Publication number
TW583757B
TW583757B TW092104000A TW92104000A TW583757B TW 583757 B TW583757 B TW 583757B TW 092104000 A TW092104000 A TW 092104000A TW 92104000 A TW92104000 A TW 92104000A TW 583757 B TW583757 B TW 583757B
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TW
Taiwan
Prior art keywords
wafer
substrate
pads
bump
flip
Prior art date
Application number
TW092104000A
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English (en)
Other versions
TW200416971A (en
Inventor
Tsung-Ming Pai
Shin-Shyan Hsieh
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Advanced Semiconductor Eng
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Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW092104000A priority Critical patent/TW583757B/zh
Priority to US10/789,171 priority patent/US7052935B2/en
Application granted granted Critical
Publication of TW583757B publication Critical patent/TW583757B/zh
Publication of TW200416971A publication Critical patent/TW200416971A/zh

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    • H05K3/00Apparatus or processes for manufacturing printed circuits
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Description

583757 五、發明說明(1) 【發明所屬之技術領域】 本發明是有關於一種覆晶構裝結構及其製程,且特別 是有關於一種配置導電膠凸塊(conductive p〇lymer bump )於晶片與基板之間的覆晶構裝結構及其製程。 【先前技術】 覆晶接合技術(F 1 i p C h i p I n t e r c ο η n e c t Technology,簡稱FC)乃是利用面陣列(area array)的 方式’將多個晶片塾(die pad)配置於晶片(die)之主 動表面(active surface)上,並在晶片墊上形成凸塊 (bump ),接著將晶片翻覆(π ip )之後,再利用這些凸 塊來分別電性及機械性連接晶片之晶片墊至承載器 (carrier )上的接點(contact ),使得晶片可經由凸塊 而電性連接至承載器,並經由承載器之内部線路而電性連 接至外界之電子裝置。值得注意的是,由於覆晶接合技術 (FC)係可適用於向腳數(j^gh Pin Count)之晶片封農 結構’並同時具有縮小晶片封裝面積及縮短訊號傳輸路徑 等諸多優點’所以覆晶接合技術目前已經廣泛地應用於晶 片封裝領域’常見應用覆晶接合技術之晶片封裝結構例如 有覆晶球格陣列型(Flip Chip Ball Grid Array, FC/BGA)及覆晶針袼陣列型(FHp Chip piri Grid
Array」FC/fGA )等型態之晶片封裝結構。 & >第圖緣示習知之一種覆晶構裝結構的剖面示意圖。 月ί考第1圖 復日日構裝結構1 0 0包括一基板(s u b s t r a t e )110、多個凸塊l2〇及一晶片13〇。其中,基板n〇具有一
10543twf.ntd 第5頁 583757 五、發明說明(2) 頂面1 1 2及對應之一底面1丨4,且基板丨丨〇更具有多個凸塊 墊(bump pad ) 116。此外,晶片130具有一主動表面 (active surface ) 132及對應之一背面134,其中晶片 1 3 0之主動表面1 3 2係泛指晶片丨3 〇之具有主動元件 (active device)(未緣示)的一面,並且晶片13〇更具 有多個晶片塾1 3 6,其配置於晶片i 3 〇之主動表面} 3 2,用 以作為晶片1 3 0之訊號輸出入的媒介,其中這些凸塊墊1 ! 6 之位置係分別對應於這些晶片墊丨3 6之位置。另外,這些 凸塊1 2 0則分別電性及機械性連接這些晶片墊丨3 6之一至其 所對應之這些凸塊墊1 1 6之一。如此,晶片1 3 0所產生之訊 號可藉由凸塊1 2 0而傳導至基板1 1 〇,接著訊號經由基板 110之底面114的接點(未繪示)而傳導至外界的電子裝 置’例如印刷電路板(Printed Circuit Board,PCB)或 主機板(main board )等° 系見之凸塊包括錫錯凸塊(s〇lder bump)、金球凸 塊(gold bump)、導電膠凸塊(conductive polymer bump )以及高分子凸塊(p〇iymer bump )等四種型態,其 中又以錫鉛凸塊應用最為廣泛,但相對地其製造過程也相 當複雜而繁瑣,且凸塊製作費用高。請參考第1圖,習知 之錫鉛凸塊1 2 0的製程,首先在晶片1 3 0之晶片墊1 3 6上形 成一凸塊底金屬層(Under Bump Metallurgy,UBM) 1 3 8,其係由多層金屬所組成,包括由銻、鎢、鎳、金、 銅專及该專之合金所組成之黏著層(adhesion layer)、 阻絶層(barrier layer)以及沾锡層(wetting layer
10543twf .pt.d 第6頁 583757 五、發明說明(3) ),並以蒸鍍(evaporation)或濺鍍(sputtering)等 方式來形成上述之凸塊底金屬層1 3 8,最後再以印剃 (printing)或電鍍(electric-plating)的方式’將錫 鉛凸塊形成於晶片墊1 3 6之凸塊底金屬層1 3 8上,而植入錫 鉛凸塊1 2 0後,還必須經過迴銲(r e f 1 〇 w )步驟之後,以 使錫鉛凸塊1 2 0於熔融冷卻之後而成為一球體狀,接著再 清洗(c 1 ean i ng )殘留於錫鉛凸塊1 2 〇表面的助銲劑 (f lux )(未繪示),最後晶片13〇才能藉由錫鉛凸塊12〇 而電性及機械性連接於基板丨丨〇。然而,在降低覆晶構裝 結構的製作成本考量下,由於習知錫鉛凸塊的製程所使用 的設備均非常昂貴,且其製作過程亦非常複雜而繁瑣,如 此將無法製造出低成本之覆晶構裝結構。 【發明内容】 構及其 低覆晶 為 少包括 塊。晶 配置於 這些凸 別對應 主動表 4導電 鑑於此, 製程,用 構裝結構 達上述之 一晶片 、 片具有一 主動表面 塊塾係配 於這些晶 面及基板 膠凸塊係 本發明的目的 以減少覆晶構 的製作成本。 目的,本發明 一基板、多個 仇疋隹提供 衣結構的製程步驟’並且降 提出一種覆 主動表 。基板 置於基 片墊之 表面之 分別連 支樓物以及 面及多個晶片墊, 基板表面及 ’且這些凸 此外,這些 分佈於主動 具有 晶構裝結構,至 多個導電膠凸 而這些晶片墊係 多個凸塊墊,而 塊墊之位置係分 支撐物係配置於 表面之周緣。這 至其所對應之這 板表面 位置。 間’且 接這4匕 晶片墊之
$ 7頁 583757 五、發明說明(4) 些凸塊墊之一,且這些導電膠凸塊之一之中央的外徑小於 其兩端的外徑。 為達上述之目的,本發明提出一種覆晶構裝製程,適 用於將一晶片接合至一基板,其中晶片具有一主動表面及 多個晶片墊,而這些晶片墊係配置於主動表面,且基板更 具有一基板表面及多個凸塊墊,而這些凸塊墊係配置於基 板表面,且這些凸塊墊之位置係分別對應於這些晶片墊之 位置,此覆晶構裝製程至少包括下列步驟:(a )配置多 個支撐物於主動表面之周緣,並分別形成未固化之一導電 膠凸塊於每一這些凸塊墊之上;(b )移動晶片至基板表 面之上方,並使得晶片間接地經由這些支撐物而接觸基板 表面;(c )迫使晶片朝基板之方向作相對移動,用以降 低主動表面及基板表面之間的相對距離,以儲存這些支撐 物之彈性應變能,且增加每一這些導電膠凸塊與其所對應 之這些晶片墊之一的接觸面積;(d)不再迫使晶片朝基 板之方向作相對移動,使得這些支撐物之彈性應變能得以 釋放,用以增加這些支撐物之相對於基板表面的高度,-並 增加主動表面及基板表面之間的相對距離,且使得每一這 些導電膠凸塊之中央的外徑小於其兩端的外徑;以及(e )固化這些導電膠凸塊。 依照本發明之較佳實施例所述,上述之支撐物例如為 金凸塊,其係利用打線的方式,先在主動表面上形成金凸 塊之後,再扯斷金線而形成這些支撐物。此外,導電膠凸 塊係以網版印刷的方式,分別形成於其所對應之這些凸塊
10543twf.ptd 第8頁 583757 五、發明說明(5) 塾之一。 Λ #本’X : 3 !用導電膠凸塊作為連接晶片與基板之間的 制作忐ί ¥ =膠凸塊的製作成本較低於習知之錫鉛凸塊的 ^ ^ ’太此可製作出低成本之覆晶構裝結構。此外, ΐ ϊ ΐ製程上簡易而快速,因此可進-步減少覆晶 構t結構的製程步驟。 1。襄本毛明之上迷目的、特徵和優點能更明顯易懂, 下文特舉-較佳實施例,旅配合所附圖式,作詳細說明如 下: 【實施方式】 士第2A〜2C圖依序繪示本發明一較佳實施例之一種覆晶 構裝製程的流程示意圖。請先參考第2 A圖,首先提供一晶 片210,晶片210具有一主動表面212及多個晶片墊214,而 曰曰片墊2 1 4係配置於主動表面2 1 2。此外,配置多個支撐物 2 30於晶片210之主動表面212的周緣,例如主動表面21 2之 四個角落,而支撐物230例如以打線的方式,先在晶片21〇 之主動表面212上形成一金凸塊之後,再扯斷金線而形成 這些支撐物2 3 0。在打線的過程中,本發明可藉由既有而 成热之打線設備,將未固化之金線擠壓成一球體狀之凸 塊’並於凸塊形成之後,最後再扯斷金線,如此即可形成 支樓物2 3 0。值得注意的是’由於利用成熟之打線技術以 形成金凸塊,如此將有利於節省覆晶構裝結構之製作成 本。 同樣如第2A圖示,同時提供一基板220,基板2 20具有
1〇543twf.ptd
第9頁 583757 五、發明說明(6) 一基板表面222及多個凸塊墊224,而凸塊墊224係配置於 基板表面2 2 2,且凸塊墊2 2 4之位置係分別對應於晶片墊 2 1 4之位置。此外,分別形成未固化之一導電膠凸塊2 4 〇於 每一凸塊墊2 24之上。值得注意的是,由於導電膠凸塊24〇 之材質係為聚醯亞胺(poly imide )或環氧樹脂(epoxy r e s i η )等高分子聚合物,且摻雜多個導電粒子,其材質 例如為銀(Ag ),而導電膠凸塊24 0可以網版印刷 (screen printing)的方式,分別形成於其所對應之凸 塊墊2 2 4之一。 接著如第2B圖所示,移動晶片21〇至基板表面222之上 方,以使晶片21 0之晶片墊214分別位於導電膠凸塊240上 方。當晶片2 1 0放置於基板2 2 0時,晶片2 1 0間接地經由支 撐物230而接觸基板表面222,而支撐物230係用以提供晶 片210配置於基板220所需之支撐力,且支撐物230的高度G 係為晶片210與基板220之間的距離(standoff)。 接著如第2C圖所示,迫使晶片21〇朝基板220之方向作 相對移動,用以降低主動表面2 1 2及基板表面2 2 2之間的相 對距離G1,而支撐物2 3 0受壓並相對累積其彈性應變能, 故可增加每一導電膠凸塊240與其所對應之晶片墊214之一 的接觸面積。此時’導電膠凸塊24 0可分別連接晶片2 1 0之 晶片墊214之一至其所對應之基板220之凸塊墊2 24之一。 接著如第2D圖所示,不再迫使晶片210朝基板220之方 向作相對移動,使得支撐物23 0之彈性應變能得以釋放, 用以增加支撐物230之相對於基板表面222的高度G2,並增
10543twf.ptd 第10頁 583757 五、發明說明(7) 加主動表面212及基板表面222之間的相對距離G2,且導φ 膠凸塊24 0本身表面張力的作用,將使得每一導電膠凸塊% 240之中央的外徑D1小於其兩端的外徑D2。最後,可以加 熱的方式來固化導電膠凸塊240,如此即完成覆晶構壯二 構2 0 0。 日日 衣結 由上述之說明可知,本發明所揭露之覆晶構裝結 其製程’其結構主要包括一晶片、一基板、多個支樓物 (例如金凸塊)以及多個導電膠凸塊。因此,本發^ 由將多個導電膠凸塊配設於於晶片與基板之間,用二稭 連接,片之晶片墊及基板之凸塊墊,且導電膠凸塊之 的外徑係小於其兩端的外徑。此外,本發明、 支撐物於晶片與基板之間,I支撑物分佈於晶片 :之周圍’用以提供晶片配置於基板上所、 支撐物的高度係為晶片與基板之間的距離 ^力,且 外,本發明更可从 andoff)〇s _ 由支撐物之彈性應變能的釋妨u β、胃 膠凸塊本身的表面張力,將使 二以及導電 基板上,以減少覆晶封裂的製程U間】:快:地配置於 所以其製作 因此,本發 然其並非用 低成本之網版印刷技術製作而成於導電膠 成本將可逛低於習知之錫鉛凸塊的製 = 參 明係可製作出低成本之覆晶構裝結構。 以限:Ϊ'已以—較佳實施例揭露如上n並非用 :限疋本發明’任何熟習此技…、、其亚非用 神和範圍内,當可作此 不脫離本發明之精 護範圍當視後附之申& 1 _動與潤飾’因此本發明之保 甲μ專利乾圍所界定者為準。
Ptd J〇543twf. 583757 圖式簡單說明 第1圖繪示習知之一種覆晶構裝結構的剖面示意圖。 第2A〜2D圖依序繪示本發明一較佳實施例之一種覆晶 構裝製程的流程示意圖。 【圖式標記說明】 100 晶 片 封 裝 結構 110 基 板 112 頂 面 114 底 面 116 凸 塊 墊 118 導 線 層 120 凸 塊 130 晶 片 132 主 動 表 面 134 背 面 136 晶 片 墊 138 凸 塊 底金 屬 層 140 銲 球 200 覆 晶 構裝 結 構 210 晶 片 212 主 動 表面 214 晶 片 墊 220 基 板 222 基 板 表 面 224 凸 塊 墊 230 支 撐 物 240 :導 電 膠凸 塊 G、G1 、 G2 ·· 1¾ 度 D1 、 D2 : :外徑
10543twf.ptd 第12頁

Claims (1)

  1. 583757 六、申請專利範圍 1. 一種覆晶構裝結構,至少包括: 一晶片,具有一主動表面及複數個晶片墊,而該些晶 片墊係配置於該主動表面; 一基板,具有一基板表面及複數個凸塊墊,而該些凸 塊墊係配置於該基板表面,且該些凸塊墊之位置係分別對 應於該些晶片墊之位置; 複數個支撐物,配置於該主動表面及該基板表面之 間,且分佈於該主動表面之周緣;以及 複數個導電膠凸塊,分別連接該些晶片墊之一至其所 對應之該些凸塊墊之一,且該些導電膠凸塊之一之中央的 外徑小於其兩端的外徑。 2. 如申請專利範圍第1項所述之覆晶構裝結構,其中 該些支撐物係為金凸塊。 3. 如申請專利範圍第1項所述之覆晶構裝結構,其中 該些導電膠凸塊係摻雜複數個導電粒子。 4. 如申請專利範圍第3項所述之覆晶構裝結構,其中 該些導電粒子之材質係為銀。 5. —種覆晶構裝製程,適用於將一晶片接合至一基 板,其中該晶片具有一主動表面及複數個晶片墊,而該些 晶片墊係配置於該主動表面,且該基板更具有一基板表面 及複數個凸塊墊,而該些凸塊墊係配置於該基板表面,且 該些凸塊墊之位置係分別對應於該些晶片墊之位置,該覆 晶構裝製程至少包括下列步驟: (a )配置複數個支撐物於該主動表面之周緣,並分
    10543twf.ptd 第13頁 583757 六、申請專利範圍 別形成未固化之一導電膝凸塊於每一該些凸塊塾 (b)移動該晶片至該基板表面之上方,、, 上’ 片間接地經由該些支撐物而接觸該基板表面; 坤该晶 (c )迫使該晶片朝該基板之方向作相董+ 宁移 降低該主動表面及該基板表面之間的相對距離 ’用以 些支樓物之彈性應變能,且增加每一該些導+抑以彳諸存該 所對應之該些晶片墊之一的接觸面積; 包私凸塊與其 (d )不再迫使δ玄晶片朝該基板之方向作 使得該些支撐物之彈性應變能得以釋放,用r目㊉對移動, 撐物之相對於該基板表面的高度,並增加該=增加該些支 基板表面之間的相對距離,且使得該4b導=動表面及該 中央的外徑小於其兩端的外徑;以及 ,鬼之一之 (e )固化該些導電膠凸塊。 6.如申請專利範圍第5項所述之覆晶構 該些支撐物係採用金凸塊。 、衣,其中 7 ·如申請專利範圍笙 每 固弟5項所述之復晶構裝制 驟(a )之時,包括釗田上 > > 衣衣矛王,於步 匕從利用打線的方式,先在 ^ 形成一金凸塊之後,^ 〇乂主動表面上 « λ由& *曼再扯斷金線而形成該些立挣仏 8 ·如申δ月專利範圊 .m 文撐物之_ 〇 該些導電膠凸塊传 項所、设晶構裝製程,复中 9·如申請複數個導電粒子。 ,、中 該些導電粒子之材;第8項所述之覆晶構骏製程,其中 10 ·如申請專利二、為銀。 驟(〇之時,包^圍第5項所述之覆晶構裝製程,於牛 以網版印刷的方式,將該些導電膠凸V 583757 六、申請專利範圍 分別形成於其所對應之該些凸塊墊之一。
    10543twf.ptd 第15頁
TW092104000A 2003-02-26 2003-02-26 A structure of a flip-chip package and a process thereof TW583757B (en)

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