TW515948B - Content securing method of non-volatile storage device and architecture thereof - Google Patents

Content securing method of non-volatile storage device and architecture thereof Download PDF

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Publication number
TW515948B
TW515948B TW88122377A TW88122377A TW515948B TW 515948 B TW515948 B TW 515948B TW 88122377 A TW88122377 A TW 88122377A TW 88122377 A TW88122377 A TW 88122377A TW 515948 B TW515948 B TW 515948B
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Taiwan
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data
address
original
flash memory
read
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TW88122377A
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Chinese (zh)
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Jian-Tsz Hou
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Jian-Tsz Hou
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Abstract

The present invention relates to a content securing method of non-volatile storage device and an architecture thereof. Firstly, programs stored in a flash memory are block-based. Based on the blocks, rotation is carried out or, in other words, stored addresses are scrambled, to store the data in the original address into a new address after rotation. A random number generator is applied to generate a random number reading sequence for data reading and the read data includes correct data and some dummy data. Then, all the dummy read data are filtered before carrying out address rotation to recover and restore the original data. So, by means of address scrambling, data are directly read into useless data to make data stealing, modification, and alteration of illegal intruders difficult. Thus, protection is provided to flash memory.

Description

515948 五、發明說明(1) 發明摘要說明: 本發明係有關一種非揮發性儲存裝置内容保密方法與 3 j指:種利用位址搗亂使資料混亂組合,使非^過 原程序之貝料成為無用,藉以保護快閃記憶體' 受竊取、修改、變更者。 f貝料不 技術背景說明: 如第一圖所示,現有電腦的架構中微控制器單元 MClKnucro controller unit)為架構之主體,其外 憶體(多使用快閃記憶體1()⑴ash則 匕置存於快閃記憶體i。内,而目前的加/解密保執護仃系的私 均未對快閨記檍體10提供择何的保護,因此儲存在快閃 =體10内^程式内容將難以保護,熟項密碼學破解技術者 能輕易的讀取快閃記憶體丨0内貯存的明文,例如儲存在快 閃記憶體10内的程式是檢測使用者的密碼、驗證使用者身 伤的加岔部份,如此系統的一切資源將如同完全公開。或 者利用軟件(如SOFT IN CIRCUIT EMULATOR,SOFT ICE)破 解、修改程式,使得入侵者未知密碼的情況下,直接讀取 快閃記憶體10,即能達到進入系統竊取資源之目的,使系 統的安全性堪虞。 再舉例來說,行動電話的製作廠商通常將其自行開發的程 式以DSP製作,這些程式都是關於行動電話功能、收訊能 力等重要且不欲人知的資料,均享有智慧財產權的保護, 但置存於快閃記憶體1〇時卻使這些重要資料形同公開。換515948 V. Description of the invention (1) Summary of the invention: The present invention relates to a non-volatile storage device content confidentiality method and 3 j means: a kind of use of address disruption to make data messy, so that non- ^ Useless to protect flash memory 'stolen, modified, changed. Technical background description: As shown in the first figure, the microcontroller unit (MClKnucro controller unit) in the existing computer architecture is the main body of the architecture, and its external memory (multiple flash memory 1 ()) is used. It is stored in the flash memory i. However, the current encryption / decryption protection system does not provide any protection for the quick girlfriend body 10, so it is stored in the flash = body 10 ^ program The content will be difficult to protect. Those skilled in cryptographic cracking technology can easily read the clear text stored in flash memory 丨 0. For example, the program stored in flash memory 10 is to detect the user ’s password and verify the user ’s body. All the resources of the system will be completely disclosed as such, or use software (such as SOFT IN CIRCUIT EMULATOR, SOFT ICE) to crack and modify the program, so that the intruder can directly read the flash memory if the password is unknown. It can achieve the purpose of stealing resources by entering the system, making the system security at risk. For another example, mobile phone manufacturers usually use DSPs to develop their own programs. These programs are In the mobile phone function, and does not receive important information people want to know information such as capacity, are entitled to the protection of intellectual property rights, but the set is stored in flash memory 1〇 Shique these important data is tantamount to public. In other

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言之 在提供系統保護的加/解密系統中 恍网記憶體 疑^的成為安全上漏洞 ί:”項目前的解決方法(如第二圖),即是將微 : 早兀MCU ”快閃記憶體1〇置入同一個IC2〇中透過 2的資料線路存取,冑免快閃記憶體内欲執行的程式被 决# i修改及破解。然而,此方法雖幾乎無法被破解,但 ^產快閃記憶體10及微控制器單元MCU之邏輯元件分屬不 5的製程,將造成製程費用的大幅增加。因此亦非一理想 的解決方法。 〜 緣此本發明主要疋鑑於快閃記憶體的讀取/窵入時機在_ 二般開機或是韁式載入,而此兩種情況不經常發生,因此 =利用夕許的邏輯設计及特殊設計之軟件達到對快閃記憶 體的保護。 依據前述,本發明之主要目的即是提供一種韭揮發性儲存 裝置内容保密方法與架構,主要是將程式以適當大小作方 塊化處理,利用位址搗亂(scrambling)與亂數(rand0In)的 觀念,使資料的排列隨著位址變化而產生新的組合,且不 經由還原方法無法重整回原始資料,藉以提供快閃記憶體 保護的安全性,且無需花費大筆製程費用。 以下將對本發明之結構設計與技術原理,作一詳細之說 _ 明’並參閱附呈之圖式,將對本發明之特徵作更進一步之 瞭解,其中:In other words, in the encryption / decryption system that provides system protection, the network memory is suspected to be a security loophole: "The solution before the project (as shown in the second picture) is to change the micro: early Wu MCU" flash memory The body 10 is placed in the same IC20 and accessed through the 2 data line, and the program to be executed in the flash memory is determined to be modified and cracked. However, although this method can hardly be cracked, the production of the flash memory 10 and the logic elements of the microcontroller unit MCU belongs to a different process, which will cause a significant increase in process costs. Therefore, it is not an ideal solution. This is why the present invention is mainly based on the fact that the flash memory is read / injected at the _ second boot or load mode, and these two situations do not occur often, so = use Xixu's logic design and Specially designed software achieves flash memory protection. According to the foregoing, the main purpose of the present invention is to provide a method and structure for protecting the content of a volatile storage device. The method is mainly to block the program with an appropriate size and use the concepts of address scrambling and random numbers (rand0In). In order to make the data arrangement a new combination with the change of the address, the original data cannot be reorganized without the restoration method, so as to provide the security of flash memory protection without the cost of a large process. The structure design and technical principle of the present invention will be described in detail below _ and explained with reference to the accompanying drawings to further understand the features of the present invention, of which:

515948 五、發明說明(3) 第一圖係現有電腦架構示意圖; 第二圖係現有將微控制器單元與快閃記憶體置入同一個I C 之結構示意圖; 第三圖係為本發明之系統架構示意圖; 第四圖係為第三圖之記憶體資料保密晶片之内部架構圖; 第五圖係本發明資料旋轉前後之示意圖; 第六圖係本發明之寫入動作步驟流程圖: 第七圖係本發明之讀取動作步驟流程圖: 第八圖係本發明第二種實施例架構示意圖; 第九圖係為第八A圖之資料旋轉前後之示意圖。 籲 圖號說明:515948 V. Description of the invention (3) The first diagram is a schematic diagram of an existing computer architecture; the second diagram is a schematic diagram of a current structure in which a microcontroller unit and a flash memory are placed in the same IC; the third diagram is a system of the present invention Schematic diagram; The fourth diagram is the internal architecture diagram of the memory data security chip of the third diagram; the fifth diagram is the schematic diagram of the data before and after the rotation of the invention; the sixth diagram is the flowchart of the write operation steps of the invention: The diagram is a flowchart of the reading operation steps of the present invention: The eighth diagram is a schematic diagram of the architecture of the second embodiment of the present invention; the ninth diagram is a diagram before and after the data of the eighth diagram A is rotated. Call for illustrations:

1 0 快閃記憶體 20 1C 3 0記憶體資料保密晶片 31 位址搗亂器 32 亂數產生器 33解碼器 3 4緩衝器 g 35鑰匙 4 0晶片 41暫存器 42可程式唯讀記憶體 43亂數產生器1 0 Flash memory 20 1C 3 0 Memory data security chip 31 Address disturber 32 Random number generator 33 Decoder 3 4 Buffer g 35 Key 4 0 Chip 41 Register 42 Programmable read-only memory 43 Random number generator

515948515948

如第三圖所示’本發明I微控制器單元卿或MR在對 閃記憶體1 0讀取或寫入資料前,係先 、 3〇:Γ=: 或還原。該記憶體資料保密晶片 30内。Ρ架構如第四圖所示;包括有: -位岛亂器31 ’係將方塊化的程式進行旋轉,將原始的 位址搗亂出一組新位址供原始資料儲存,並依新位址 快閃記憶體1 0 ;As shown in the third figure, the microcontroller unit or the MR of the present invention reads or writes data to the flash memory 10, first, 30: Γ =: or restore. The memory information is stored in the security chip 30. The P structure is shown in the fourth figure; it includes:-Bit Island Scrambler 31 'is a block program that rotates, disrupts the original address into a set of new addresses for the original data storage, and uses the new address Flash memory 10;

-亂數產生器32,係產生一組隨機順彳,使快閃記憶體1〇 内資料依此順序被讀出; 了解碼器33,係將亂數順序讀取的位址資料過濾出多餘的 資料,並逆轉程式方塊獲得原始的資料與位址而供微控制 器單元MCU (或DSP)執行。 以下將就微控制器單元MCU對快閃記憶體10寫入(write)及 讀出(read)兩部份作為說明: [寫入程序]----可視為對資料的編碼動作: 軟件將欲執行的程式進行方塊化(block based)處理,一 般係以8x8作一方塊基礎,以這些方塊作為基礎進行旋轉 (rotate) ’即透過位址捣亂器31將儲存的位址捣亂 (scrambling),使原始位址内之資料儲存在旋轉後的新位 址内。為簡化說明,以下以一4 X 4方塊作一說明。 第五圓左側為一方塊化的原始資料,其位址8Oh所儲存為 0011,位址81h所儲存為1011,82h所儲存為11〇〇,83h所 儲存為1010。旋轉(於本實施例係向右旋轉90度,不限定-Random number generator 32, which generates a set of random sequences, so that the data in flash memory 10 is read in this order; Understanding the code generator 33, which filters the address data read in random numbers in order Data, and invert the program block to obtain the original data and address for the microcontroller unit MCU (or DSP) to execute. In the following, the MCU unit MCU writes and reads the flash memory 10 as two parts: [Writing procedure] ---- Can be regarded as the encoding action of the data: The software will The program to be executed is block-based. Generally, 8x8 is used as a block basis, and these blocks are used as a basis to rotate 'that is, the stored address is scrambling through the address disruptor 31. ), So that the data in the original address is stored in the new address after rotation. In order to simplify the description, a 4 X 4 block is used for explanation below. The left side of the fifth circle is a squared raw data. The address 8Oh is stored as 0011, the address 81h is stored as 1011, 82h is stored as 1100, and 83h is stored as 1010. Rotate (rotate 90 degrees to the right in this embodiment, not limited

第7頁 515948Page 7 515948

式方塊則如第五圖右侧,新的位址 «,=ΐ 為1110,81,11所儲存者轉變為0100, η 1者轉變為1011,83,h所儲存者轉變為_。對 ^' x方塊,即可發現右侧圖的最右邊縱向資料即$ ::rh資一料’以此類推。因此很明顯的相同位址内的 1已經儿全被捣亂,這些資料儲存在快閃記憶體1〇 1 η所1ί =侵者並不知資料已捣亂,其直接自快閃記憶體 10所讀取者,已完全不同於原始資料。 寫入動作可歸納出第六圖之步驟流程圖: 步驟a·程式方塊化步驟; 步驟b.旋轉方塊將原始資料的位址搗亂產生新位址步驟; 步驟c•原始資料貯存在新的位址; 步驟d·依據新的位址寫入快閃記憶體1〇。 [讀取程序] 可視為對資料的解碼動作 利用亂數產生器32(random number generator)隨機產生 一組隨機順序,將快閃記憶體丨〇内的資料依此亂數順序讀 出,並暫存於一緩衝器34(可為SRAM)内,這些被讀取的資 料中包含有前述寫入程序中寫入的資料及多餘(dummy)資 料’因此在資料還原時必需先將多餘資料過濾出,找到所 需的相關位址,透過解碼器33過濾出多餘的位址資料,再 逆轉此方塊而獲得原始的資料與位址而供微控制器單元 MCU或DSP利用。而由於快閃記憶體1〇係外掛於微控制器單 元MCU或DSP ’非法入侵者亦可讀取這些資料,但透過亂數The formula box is shown on the right side of the fifth figure. The new address «, = ΐ is 1110, 81,11 and the stored one is changed to 0100, η 1 is changed to 1011, 83, and h is changed to _. For the ^ 'x box, you can find the rightmost vertical data in the right figure, that is, $: rh data, and so on. Therefore, it is obvious that all 1s in the same address have been disrupted. These data are stored in the flash memory 101. The intruder does not know that the data has been disrupted, it directly from the flash memory 10 The reader is completely different from the original data. The writing operation can be summarized as the flow chart of the sixth figure: Step a · Program block step; Step b. Rotate the box to disturb the original data address to generate a new address step; Step c • Store the original data in a new position Address; step d · write to the flash memory 10 according to the new address. [Reading procedure] It can be regarded as the decoding operation of the data. A random number generator 32 (random number generator) is used to randomly generate a random sequence. Stored in a buffer 34 (can be SRAM). These read data include the data written in the aforementioned writing procedure and dummy data. Therefore, the redundant data must be filtered out when the data is restored. , Find the required relevant address, filter out the redundant address data through the decoder 33, and then reverse this box to obtain the original data and address for use by the microcontroller unit MCU or DSP. Since the flash memory 10 is externally connected to the MCU or DSP of the microcontroller unit, the illegal intruder can also read these data, but through random numbers

515948 五、發明說明(6) 產生器32提供的亂數讀取順序,其讀取的將是包含所需及 多餘資料,及無法瞭解的順序排列組合,因此極難破解出 讀取的資料内容。 讀取動作可歸納出第七圖之步驟流程圖: 步驟a.利用亂數產生器32產生—組亂數讀取順序步驟; 步驟b·依步驟a的順序自快閃記憶體1〇中讀出並暫存於緩 衝器34步驟; 步驟c·將緩衝器34的暫存值過濾出多餘資料; 步驟d·逆旋轉方塊獲得原始的位址及資料。 另外’在讀取程序中,因每一個記憶體資料保密晶片3 〇係 使用一個單一鑰匙3 5( key),也就是說每一個系統有它單 一的位址映射(mapping)順序,因此能夠過濾出什麼位址 的資料是多餘的,什麼位址的資料是有用的。而這個餘匙 35能夠被儲存在記憶體資料保密晶片3〇内或是卡片(smart card)中。 [第二種實施例] 由於位址是線性增加,在這個簡易變化中,非法入侵者極 為各易找到其所需的程式所在位址,因此在本實施例中係 利用晶片40内原始的隨機碼對真實的位址作隨機對調,產 生一組新的隨機位址儲存資料,作一簡易的變化。 如第八圖所示,微控制器單元MCU所載入的程式以位元組 (BYTE)為早位讀入晶片40,儲存在晶片40内的暫存器41 中,這個晶片40内亦設有一只能寫一次的可程式唯讀記憶515948 V. Description of the invention (6) The random number reading order provided by the generator 32 will read the required and redundant data, and the ordering and combination that cannot be understood, so it is extremely difficult to crack the read data content . The reading operation can be summarized in the flowchart of the seventh figure: Step a. Use the random number generator 32 to generate a group of random number reading sequence steps; Step b. Read from the flash memory 10 in the order of step a. Steps of outputting and temporarily storing in the buffer 34; Step c. Filtering the temporary storage value of the buffer 34 to remove redundant data; Step d. Reverse rotating the block to obtain the original address and data. In addition, in the reading process, since each memory data security chip 3 0 uses a single key 3 5 (key), that is, each system has its single address mapping sequence, so it can be filtered What address information is redundant and what address information is useful. And this spare key 35 can be stored in the memory data security chip 30 or a smart card. [Second Embodiment] Since the address is linearly increased, in this simple change, illegal intruders are very easy to find the address of the program they need. Therefore, in this embodiment, the original randomness in the chip 40 is used. The code randomly swaps real addresses to generate a new set of random addresses to store data and make a simple change. As shown in the eighth figure, the program loaded by the microcontroller unit MCU is read into the chip 40 with the byte (BYTE) as an early bit, and stored in the register 41 in the chip 40. This chip 40 is also provided with Programmable read-only memory

515948 五、發明說明(7) '一'一 ---- 體42(PROM)或是較小容量的快閃記憶體。如前述,晶片 中要納入快閃記憶體10是困難且花費高,但製作一個可程 式唯讀記憶體42卻是非常容易。亂數產生器43產生的隨機 碼係燒入可程式唯讀記憶體42並架構出一轉換表(圖式未 畫),用以控制原始位址與旋轉後位址的對應關係,將原 =位址内資料依隨機碼寫出,再對隨機位址旋轉寫入快閃 圮憶體1 0,藉由位址的打散使資料直接讀取即成為無用的 資料,使非法入侵者難以竊取、修改、便更資料,而對快 閃纪憶體10提供保護者。再者,由於是亂數產生器43隨機 產生,因此在實際製作的晶片4〇所產生的轉換表均不相 =,因此並不限定唯一方式去覆蓋快閃記憶體丨〇内之原始 資料。 另外,原始位址亦可先進行補數運算再進行隨機對調,以 增加破解的困難性。 " 以下以一4位元位址作一說明(如第九圖),as〜A〇為原始 位址,m3〜m0為隨機碼位址,圖中所示的箭頭為兩者的隨 機對調關係。舉例來說, A3 是0011,A2 是〇〇1〇,A1*000 1,人〇是〇〇〇〇,對原始位址 作補數運算 ’ m3 =A2,m2 =A〇,ml =A3,m〇 =A1,m3 即為 0110 ’m2即為ooio,mi即為oiii ίο即為〇〇11,作為&存〇 快閃記憶體10之新位址,原始資料即因上述的運算更加 以擷取。 讀取時,則透過可程式唯讀記憶體42(PR〇M)所儲存的轉換 表,回復為原始資料執行。515948 V. Description of the invention (7) 'One' One ---- the body 42 (PROM) or a smaller flash memory. As mentioned above, it is difficult and expensive to include flash memory 10 in the chip, but it is very easy to make a programmable read-only memory 42. The random code generated by the random number generator 43 is burned into the programmable read-only memory 42 and a conversion table (not shown) is constructed to control the correspondence between the original address and the rotated address. The data in the address is written according to the random code, and then the flash memory 10 is rotated and written into the random address. The data is directly read by the address fragmentation, which makes it useless, making it difficult for illegal intruders to steal. , Modify, and update the information, and provide protection for the Flash memory 10. In addition, since the random number generator 43 randomly generates the conversion tables generated on the actually manufactured wafer 40, they are not identical, so it is not limited to the only way to cover the original data in the flash memory. In addition, the original address can be complemented first and then randomly swapped to increase the difficulty of cracking. " The following uses a 4-bit address as an illustration (as in the ninth figure), as ~ A0 is the original address, m3 ~ m0 is the random code address, and the arrow shown in the figure is the random swap of the two. relationship. For example, A3 is 0011, A2 is 〇〇〇〇, A1 * 000 1, and 〇 is 〇〇〇〇, the original address is complemented operation 'm3 = A2, m2 = A 0, ml = A3, m〇 = A1, m3 is 0110, m2 is ooio, mi is oiii, and ο is 〇〇11, as & the new address of the flash memory 10 is stored, and the original data is more based on the above operation. Capture. When reading, the conversion table stored in the programmable read-only memory 42 (PROM) is restored to the original data.

515948 五、發明說明(8) 另外’由於電腦開機後即對体 料,之後依照順序讀取=讀取第-筆資 用-亂數產生器43在在資料:::加破解的困難度,可利 機的插入不需要的資料,電腦回所需的貢科間隨 兩^ ^^^^ ^ 哥勒同樣對這些插入的資料讀 取,形成假讀取的情況,如此非沐 ^^β ^ ^卜x 此非去入侵者將無法獲知正確 的位址順序,而無從操取正確的資料。 综上料,本I明所提供之非揮發性儲存裝置内 ΐ m?:址搗亂(scrambi ing)與峨—)的 觀而,使方塊化處理的資料排列隨著位址變化而產生新的 組合,且不經由還原方法無法重整回原始資料,對於現 加/解密保護系統無法提供保護的快閃記憶體之缺失提出 有效之解決辦法及對策,確實已符合創作專利之申請要 件,懇請鈞局詳加審查,並惠賜准予專利,以嘉氧民生 利國利民,實感德便。 〜 唯以上所敘述之技術、圖說、程式或控制等方法,僅僅係 本發明較佳實施例之一而已;舉凡依本發明申請專利範圍' 之技術所作之均等變化或修飾或擷取部分功能之雷同製 作,皆應仍屬本發明專利權所涵蓋之範圍;當不能依此限 定本發明實施之範圍。515948 V. Description of the invention (8) In addition, 'Since the computer is turned on, the material is read, and then read in order = read the first-pen resource-random number generator 43 in the data ::: increase the difficulty of cracking, It is possible to insert unwanted data, and the computer will return the required Gongke with two ^ ^^^^ ^ Gore also reads the inserted data, forming a situation of false reading, so it is not ^^ β ^ ^ 卜 x This non-intruder will not be able to know the correct address sequence, and will not be able to access the correct data. In summary, in the non-volatile storage device provided by the present invention, m ?: address scrambling and e-), the data arrangement of the block processing will generate a new one as the address changes. Combination, and cannot restore the original data without the restoration method, and propose effective solutions and countermeasures for the lack of flash memory that cannot be protected by the current encryption / decryption protection system, which has indeed met the application requirements for the creation patent. The Bureau has conducted detailed examination and granted patents to benefit the people and benefit the country and the people. ~ Only the methods, techniques, diagrams, programs, or control methods described above are just one of the preferred embodiments of the present invention; for example, all equivalent changes or modifications or extraction of some functions made according to the technology of the scope of patent application of the present invention The same production should still fall within the scope of the patent right of the present invention; when the scope of implementation of the present invention cannot be limited accordingly.

Claims (1)

515948 六、申請專利範圍 d·逆旋轉方塊獲得原始的位址及資料; 5· 種-非揮發性儲存裴置内容保密架構,主要是在料快 ,态單兀(、或DSP)與快閃記憶體間設有一記憶體資料二 J片’用以對寫入及讀取快閃記憶體的資料加冑,包括在 -位址搗亂器,係將方塊化的程式進行旋轉,㈣始 址搗亂出一組新位址供原始資料儲存,並依址^入 閃記憶體; 视祉冩入快 -亂數產生器,係產生一組隨機順序,使快 料依此順序被讀出; 〇 u體内貢 :解:器趙,:亂數順序讀取的位址資料過濾出多餘的資 枓並逆轉耘式方塊獲得原始的資料與位址而二 單元(或DSP)執行。 叩仏从控制器 6·如申請專利範圍第5項所述之非揮發性儲存裴置 密架構,其中該記憶體資料保密晶片更包括有一單一= 起,係作單一的位址映射順序,而過濾出多餘的資料、。 7· 一種非揮發性儲存裝置内容保密方法,特別暑、 fF /、此冩一次的可程式唯讀記憶體(PR0M)或是 ,其特徵在:利用一亂數產生器產生隨 唯讀記憶體架構出一轉換表’用以控制原始 、疋轉後位址的對應關係,將原始位址内資料依隨機 碼寫出’再對隨機位址旋轉寫入快閃記憶體。 8.如申請專利範圍第7項所述之非揮發性儲存裝置内容保515948 6. Application scope d. Reverse rotation block to obtain the original address and data; 5. Kinds of non-volatile storage and confidentiality structure of the content, mainly in fast material, single unit (or DSP) and flash There is one memory data and two J pieces in the memory, which are used to add and write data to and from the flash memory, including the in-address disturber, which rotates the block program, and starts the address disruption. Create a new set of addresses for storing the original data, and insert them into the flash memory according to the address; Depending on the well-being, a fast-random number generator is generated to generate a random sequence so that the fast data is read out in this order; 〇u Internal tribute: solution: device Zhao ,: address data read in random order filters out excess resources and reverses the square block to obtain the original data and address and the two units (or DSP) execute.叩 仏 From the controller 6. The non-volatile storage architecture described in item 5 of the scope of the patent application, wherein the memory data security chip further includes a single device, which is a single address mapping sequence, and Filter out extra data. 7. · A non-volatile storage device content confidentiality method, especially the special read-only memory (PR0M), or the characteristics of: the use of a random number generator to generate random read-only memory Construct a conversion table 'to control the correspondence between the original and converted addresses, write the data in the original address according to a random code', and then rotate the random address into the flash memory. 8. Content protection of non-volatile storage device as described in item 7 of the scope of patent application 第13頁 515948 六、申請專利範圍 密方法,其中在位址隨機對調前更包括有對原始位址進行 補數運算之步驟。 9.如申請專利範圍第7項所述之非揮發性儲存裝置内容保 密方法,其中讀取時,可利用亂數產生器在所需的資料 間’隨機的插入不需要的貧料’電腦同樣對這些插入的貧 料讀取,形成假讀取的情況,使非法入侵者將無法獲知正 確的位址順序,而無從擷取正確的資料。 #Page 13 515948 VI. Patent application range secret method, which includes the steps of performing a complement operation on the original address before the address is randomly swapped. 9. The non-volatile storage device content confidentiality method described in item 7 of the scope of patent application, wherein when reading, a random number generator can be used to 'randomly insert unnecessary lean materials' among the required data. The computer is also the same For these inserted lean material reads, a false read situation is formed, so that illegal intruders will not be able to know the correct address sequence, and will not be able to retrieve the correct data. # 第14頁Page 14
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101887750A (en) * 2009-05-15 2010-11-17 康佳集团股份有限公司 Method for storing dynamic data by using Flash memory
CN101241758B (en) * 2007-01-04 2013-01-30 三星电子株式会社 Memory system and method using scrambled address data
TWI774183B (en) * 2021-01-08 2022-08-11 瑞昱半導體股份有限公司 Memory access apparatus and method having address scrambling mechanism

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101241758B (en) * 2007-01-04 2013-01-30 三星电子株式会社 Memory system and method using scrambled address data
CN101887750A (en) * 2009-05-15 2010-11-17 康佳集团股份有限公司 Method for storing dynamic data by using Flash memory
TWI774183B (en) * 2021-01-08 2022-08-11 瑞昱半導體股份有限公司 Memory access apparatus and method having address scrambling mechanism
US11977747B2 (en) 2021-01-08 2024-05-07 Realtek Semiconductor Corporation Memory access apparatus and method having address scrambling mechanism

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