TW515007B - Method for producing dense pattern by spacer - Google Patents

Abstract

A method for producing a dense pattern using a spacer is applicable on a dense pattern with equal line width and line pitch, and comprises: defining by etching a substrate, which is sequentially formed with an oxide layer, a conductive layer, a first mask layer, and a second mask layer, to form at least two mask patterns and form an opening, in which the width of the opening is substantially three times of the width of the second mask pattern layer; correspondingly forming a plurality of spacers on the sidewall of the second mask pattern layer, in which the thickness of the spacer is substantially equal to the width of the second mask pattern layer; removing the second mask pattern layer and using the spacers as a mask to form a first mask pattern layer; and using the first mask pattern layer as a mask to etch the conductive layer to complete the production of a dense pattern having a fine line width and an equal line pitch.

Description

515007 V. Description of the invention (1) Field of the invention: The present invention relates to a manufacturing method for forming dense patterns in semiconductor technology, and in particular to a manufacturing method for forming dense patterns using spacers. A dense line structure with fine line width is obtained. Relevant technical description: In the manufacturing process of semiconductor integrated circuits, the microlithography process has always occupied a key position. This process precisely defines the designed pattern on the photoresist layer, and then performs the remaining steps. The pattern of the photoresist layer is transferred to a semiconductor substrate to obtain a desired circuit structure. Generally speaking, the lithography process mainly includes photoresist coating, pre-baking, exposure, development, and hard baking. Among them, the resolution of the exposure program (resolotin) is a key factor in whether the component accumulation can be further improved. At present, as the integration degree of semiconductor integrated circuits is rapidly increasing, the line width required by lithography technology is also getting smaller and smaller. Similarly, the distance between the semiconductor elements (hereinafter referred to as a space) is also shortened. However, the use of the 'mask type' and the matching exposure light source will affect the resolution of the distance between the above-mentioned components in the exposure process, so that the line width and line pitch are limited when they are reduced. For example, when semi-transparent (half-tone phase shift reticle and KrF) lasers are used as exposure light sources today, it is difficult to produce line widths and line pitches of 0 nm (nm). Dense pattern. Although, a Levenson phase shift mask can be used to produce a dense pattern, but the mask production is difficult and the manufacturing cost increases.

There is a manufacturing method plated on it and A. Ai Ming provides a method for forming a dense pattern by using a spacer. The gasification pattern layer side has a space between a plurality of isocated patterns. After c is formed into a plurality of spacers to reduce the oxidized pattern layer, the dense pattern is transferred to the inscription: f the pattern layer and the plurality of spacers are used as a mask to perform the process: Figure: i mouse silicon layer. Finally, the silicon nitride layer is used as a mask and an expensive photomask is moved. This eliminates the need for complex production costs. The cover p can manufacture densely patterned circuit structures and reduce manufacturing. Summary of the invention:

The system of ί = the purpose of the Ming is to provide a dense pattern using spacers / to reduce the distance (i s ο 1 a t e d) by forming spacers-to further define money to create dense patterns.

隼 ® ΪAccording to the above-mentioned object, the present invention provides a manufacturing method for forming a compact using a spacer, including the following steps. A substrate is provided on which a conductive layer, a first shielding layer, and a second layer are formed. Masking layer; engraving the second masking layer to expose the surface of the first masking layer and simultaneously form two first masking layers to form an opening having a first predetermined width, corresponding to the side walls of the two second masking patterns Forming a plurality of spacers having a second predetermined width; removing the two second masking pattern layers to expose the surface of the first masking layer 'using these spacers as a mask to etch the first masking layer to expose the surface of the conductive layer and forming a plurality of A masking pattern layer; and using the first masking pattern layer as a mask to etch the conductive layer to transfer a dense pattern onto the conductive layer. Among them, the conductive layer, the first shielding layer, and the second shielding layer

0548-7201TWF; 90082; spin.ptd Page 5 515007 5. Description of the invention (3) " ----- ^ The spacers are a polycrystalline silicon-metal silicide layer, a silicon nitride layer, an oxide layer And a polycrystalline silicon. Furthermore, the first-predetermined width is approximately three times the width of the second mask 1 pattern layer. In addition, the second predetermined width is approximately the same as the width of the second opaque pattern layer and is a simple description of the pattern of 100 to 110 nanometers. In order to make the above-mentioned objects, features, and advantages of the present invention more obvious and understandable, Specific preferred embodiments are given below, and in conjunction with the accompanying drawings, the description is as follows: Figures 1 2 3 4 5 to 6 are schematic cross-sectional views showing the formation of a dense pattern using a polycrystalline silicon spacer according to an embodiment of the present invention. [Description of symbols] 100 ~ substrate; 104 ~ conductive layer; 106 ~ first shielding layer 107 ~ spacers; 102 ~ oxide layer; 104a ~ conductive pattern layer; 106a ~ first shielding pattern layer; 108 ~ Second masking layer; 108a ~ second masking pattern layer;

0548-7201TWF; 90082; s p i n.p t d page 6 1 0 9 ~ opening; 11 0 ~ anti-reflection layer; 2 110a ~ anti-reflection pattern layer; 12 ~ photoresist layer; 3 112a ~ photoresist pattern layer. The detailed description of the preferred embodiment: 4 The following describes the manufacturing method of the Φ set pattern using spacers 5 in the embodiment of the present invention with reference to Figures 1 to 6, which is suitable for dense patterns with equal line width and line spacing. 6 First, please refer to Figure 1 to provide a substrate 100, such as a silicon wafer.

V 515007

Then, a thin oxide layer 102, a conductive layer 104, such as a polycrystalline silicon, a metal silicide layer (pOlycide), and a first shielding layer 106, such as nitrogen, are sequentially deposited on the substrate 100. A silicon layer with a thickness of about 500 Angstroms (A), a second shielding layer 108, such as an oxide layer with a thickness of not less than 35,000 Angstroms, two anti-reflection layers 110, and a photoresist layer H2, the thickness of which About 400 Angstroms. In this embodiment, the thin oxide layer 02 is used as a gate oxide layer and the polycrystalline silicon silicide layer 104 is used as a gate electrode. Next, please refer to FIG. 2. Using a conventional lithography process, for example, using a transflective phase shift mask and a KrF laser as an exposure light source, define at least two photoresist pattern layers l12a and The surface of the anti-reflection layer 110 is exposed. Among these, the width of these photoresist pattern layers 11 2a is denoted as W, and the distance between two adjacent photoresist pattern layers 112a is about twice the width W of the photoresist pattern layer i12a, and is denoted as 3W. In addition, in this embodiment, w is in a range of 110 nm (nm) to 110 nm. Next, the anti-reflection layer 110 and the second masking layer 108 ′ are sequentially etched to expose the surface of the first masking layer 106 and form two stacked anti-reflection pattern layers 110a and 108g. An opening 109 is formed, as shown in the figure. In this way, the line width can be defined first: the alienation pattern with a line spacing of 1: 3. · '4 Next, referring to FIG. 3, after removing the photoresist pattern layer 1a and 2a and the anti-reflection pattern layer 110a, the width of the opening 109 is approximately three times the width of the second masking pattern layer 108a. Next, a total of four spacers 107 are formed on the side walls of the two second shielding pattern layers 108 & In this embodiment, the width of the polycrystalline silicon spacer 107 is substantially the same as the width W of the second shielding pattern layer 108a and is in the range of about 100 nm to 110 nm.

0548-7201TWF; 90082; spin.ptd page 7 M!) UU7 V. Description of the invention (5). In addition, in order to make the polycrystalline silicon spacer 丨 〇7 have a sufficient height to be the mask for the back Bin etching, the thickness of the second shielding layer was previously formed at least 3 500 Angstroms, as described above. As described above, the polycrystalline spar spacer 107 formed subsequently has substantially the same height. Next, referring to FIG. 4, the second masking pattern layer 10a is removed by etching to expose the surface of the first masking layer 6 while leaving four polycrystalline silicon spacers 107 arranged at equal intervals. That is, the pitch and the width of the polycrystalline silicon spacer 107 are both in the range of 100 nm to 110 nm. Next, referring to FIG. 5, the first masking layer 106 is etched by using these polycrystalline silicon spacers as a mask to expose the surface of the conductive layer 104 and form a plurality of first masking pattern layers 106a. Finally, referring to FIG. 6, after removing the remaining polycrystalline silicon spacers 〇07, the conductive layer 10 is etched by using the first masking pattern layer 106a as a hard mask, and the The dense pattern transfer is smoothly transferred and a conductive pattern layer 104a is formed. That is, the definition of the gate pattern is completed. Therefore, according to the manufacturing method of forming a dense pattern using a spacer according to an embodiment of the present invention, a dense pattern having a line width and a line pitch equal to about 110 nm can be formed. Furthermore, it is possible to complete dense pattern production with fine line width without using complicated and expensive photomasks and lithography equipment, thereby reducing production costs. In addition, in this embodiment, the first predetermined width is three times the second predetermined width as an example. However, the present invention is not limited to this, as long as the first predetermined width is greater than twice the second predetermined width to make these intervals The objects 10 can maintain a distance between them without overlapping, and the manufacturing method of the present invention can also be applied. Although the present invention has been disclosed above in the preferred embodiment, it is not intended to

0548-7201TWF; 90082; spin.ptd Page 8 515007 5. Description of the invention (6) The invention is limited. Any person skilled in the art can make changes and decorations without departing from the spirit and scope of the invention. Therefore, The protection scope of the present invention shall be determined by the scope of the attached patent application.

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Claims (1)

515007 VI. Scope of patent application Y 1 · A manufacturing method for forming dense patterns by using spacers, including the step of enumeration: providing a substrate, in which a conductive layer, a tritium shielding layer, and a second shielding layer are sequentially formed on the substrate; It is defined that the second masking layer is etched to expose the surface of the first masking layer and at least two second masking pattern layers are formed at the same time to form an opening having a first night schedule ^ corresponding to the sidewalls of the second masking pattern layers. Forming a plurality of spacers having a second softness; removing the second masking pattern layer to expose the surface of the first masking layer; using the spacers as a mask to etch the first masking layer to produce the A plurality of first masking pattern layers are formed on the surface of the conductive layer; and the conductive masks are etched by using the first masking pattern layers as a mask to transfer dense patterns to the conductive layer. 〃 2 · The manufacturing method of forming a dense case using spacers as described in item 1 of the scope of patent application, wherein the conductive layer is a polycrystalline silicon-metal silicide layer 0 3 · As described in the scope of patent application item 1 The method for forming a dense match using spacers, wherein the first shielding layer is a silicon nitride layer. 4 \ The manufacturing method of using the spacer to form a dense @ case as described in item 1 of the scope of the patent application, wherein the second shielding layer is an oxide layer. 5. The manufacturing method of forming a dense pattern using a spacer as described in item 1 of the scope of patent application, wherein the thickness of the second shielding layer is not less than 3500 angstroms. 6 · Use the spacer to form a dense map as described in item 1 of the scope of patent application 0548-7201TWF; 90082; spin.ptd 515007 The fixed width is roughly the second masking image. 6. The manufacturing method of the scope of patent application, in which the second dispersing layer is provided by two. .7 #The use of spacers to form dense maps. The manufacturing method of the second established case where the predetermined width is greater than twice, in which the first predetermined width. . ^ # 述 的 Using spacers to form a dense map 8. As mentioned in the first patent application & ^ ^ n i β β system is composed of polycrystalline silicon. 9. As described in the application for the patent application, the manufacturing method of forming a dense pattern by using spacers, wherein the second preferred width is approximately the same as that of the second shadowing image. The manufacturing method of forming a dense pattern using spacers is described, wherein the second predetermined width is in a range of 100 to 110 nanometers. 11 · A manufacturing method for forming dense patterns using spacers, suitable for dense patterns with equal line width and line spacing 'includes the following steps: A substrate is provided, and a conductive layer, a first shielding layer and a A second masking layer; defining the first masking layer to be etched to expose the surface of the first masking layer and simultaneously forming at least two second masking pattern layers to form an opening, wherein the width of the opening is substantially any of the second masking layers Three times the width of the pattern layer; forming a plurality of spacers corresponding to the walls of the second masking pattern layer, and the width of any of the spacers is substantially the same as the width of any of the first and second masking pattern layers; Waiting for the second masking pattern layer to expose the surface of the first masking layer; 0548-7201TWF; 90082; spin.ptd p. 11 515007