TW501061B - In-circuit programming process device and method of integrated circuit - Google Patents

In-circuit programming process device and method of integrated circuit Download PDF

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Publication number
TW501061B
TW501061B TW87100137A TW87100137A TW501061B TW 501061 B TW501061 B TW 501061B TW 87100137 A TW87100137 A TW 87100137A TW 87100137 A TW87100137 A TW 87100137A TW 501061 B TW501061 B TW 501061B
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Taiwan
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programming
item
patent application
instructions
integrated circuit
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TW87100137A
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Chinese (zh)
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Jiun-Gung Suen
Chang-Luen Chen
Chi-Hung Li
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Macronix Int Co Ltd
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Abstract

There is provided an integrated circuit architecture with in-circuit programming, which comprises: a micro-controller on the integrated circuit, and more than one array of nonvolatile memory for storing instructions including more than one in-circuit programming instruction. By using a control program on the device, the device interactively establishes a programming process transaction with external devices, and the software of the micro-controller is modified by the data obtained in the transaction. The part of in-circuit programming code that may be changed in different application environments is stored in the memory cells of flash memory capable of being re-programmed. The remained in-circuit programming code that will not be changed is stored in the memory cells of mask ROM that is effective is area. As a result, the in-circuit programming system can be flexibly fit into different application environments, thereby reducing the integrated circuit area occupied by the in-circuit programming system.

Description

501061 A7 __B7__ 五、發明説明(I) 本發明是有關於一種具有用來儲存指令的非揮發性 記憶體的積體電路,而這些指令被該積體電路上的微控 制器執行。更特別地,係有關於一種可完成線上燒錄 (in-circuitprogramming,ICP)處理以修正和更新儲存 的指令集的技術。 習知技術描述 經濟部中央標準局員工消費合作社印製 iii. HI im IKK—· ml inf ml mi , Jt In ............... n n I BilBi、一5 (請先閲讀背面之注意事項再填寫本頁) 積體電路上的微控制器已經在發展。包括用來儲存指 令集並在積體電路上的非揮發性記憶體陣列,而此微控 制器將執行這些指令集。那些被存於唯讀記憶體(Read Only Memory,ROM)的指令必須在該裝置製造期間就已經 燒錄,並且不能有所改變。一種替換的技術是,將這些 指令集儲存於可抹除可燒錄唯讀記憶體(EPROM)陣列 內。然而,在該裝置被安置於電路之前,這些設備需要 特殊的硬體來燒錄該EPROM陣列。還有一種技術是,利用 可電除可燒錄唯讀記憶體(EEPR0M)來儲存指令集。 EEPR0M的好處是,它比EPR⑽更快被燒錄,並且中途還 可更改。還有另一種技術是,利用快閃記憶體來儲存指 令集,此種記憶體容許非揮發性記憶體有更高的密度和 更快速地可再燒錄(reprogramming)。當一個裝置結合了 一個可再燒錄的非揮發性記憶體,例如具有一個微控制 器的EEPR0M或快閃記憶體,藉由容許以交談式的演繹法 則爲基礎的線上燒錄%該裝置已在電路裡時,就可以再 燒錄。 3 本紙張尺度適用中國國家標準(CNS ) A4規格(21〇X:297公釐) 501061 經濟部中央標準局員工消費合作社印製 A7 B7 五、發明説明(7) 在網路環境裡,若是具有交談式地下載指令集和資 料到遠端設備的能力的話,是非常有價値的。例如,公 司可以服務客戶的機器設備,但不需要求客戶將機器設 備帶至服務中心。而是公司經由通訊管道,如國際網路 或電話線,利用客戶的機器設備的線上燒錄能力,可以 執行診斷功能。藉由此法,軟體的更新可以被下載到客 戶的機器設備上,並且該機器設備有了修正或更新的碼 後,可以再正常運作。 有此功能之習知技術的裝置有AT89S8252微控制 器,是由美國加州聖荷西之Atmel公司製造,以及 P89CE558單晶元之微控制器,由荷蘭Eindhoven之菲力 浦半導體公司製造。根據菲力浦P89CE558微控制器的架 構,罩幕(mask)式ROM是給線上燒錄指令集之用,該微控 制器用這些指令集來更新晶元上的快閃記憶體。所以, 菲力浦微控制器需要一個經緻的罩幕式ROM模組來儲存 修正過的線上燒錄碼,以配合各種獨特的環境。對於一 個獨特的環境,爲了採用線上燒錄碼,在完成該裝置製 造之前,必須先了解環境,以便將罩幕式ROM作適當的編 碼。甚且,該線上燒錄通訊管道被固著在菲力浦微控制 器內的一個串列RS232璋(po r t)。此將微控制器的用途限 制到一個相當狹窄的應用範圍內,並且,在動態/的通訊 ? 環境裡也難以利用線上燒錄功能,其中的串列埠無法與 一通訊管道配合良好,而經此管道可以提供更新軟體。 4 _ 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐)501061 A7 __B7__ 5. Description of the invention (I) The present invention relates to an integrated circuit having a non-volatile memory for storing instructions, and the instructions are executed by a microcontroller on the integrated circuit. More specifically, it relates to a technology that can perform in-circuit programming (ICP) processing to modify and update stored instruction sets. Known technical description Printed by the Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs iii. HI im IKK— · ml inf ml mi, Jt In ............... nn I BilBi, 1 5 ( (Please read the precautions on the back before filling out this page) Microcontrollers on integrated circuits have been developed. It includes a non-volatile memory array used to store the instruction set and on the integrated circuit, and the microcontroller will execute these instruction sets. The instructions stored in the Read Only Memory (ROM) must be programmed during the device's manufacture and cannot be changed. An alternative technique is to store these instruction sets in an erasable and rewritable read-only memory (EPROM) array. However, before the device was placed in the circuit, these devices required special hardware to program the EPROM array. Another technique is to use an erasable and rewritable read-only memory (EEPR0M) to store the instruction set. The advantage of EEPR0M is that it can be burned faster than EPR⑽, and it can be changed halfway through. Yet another technique is to use flash memory to store the instruction set. This memory allows non-volatile memory to have a higher density and faster reprogramming. When a device incorporates a re-programmable non-volatile memory, such as EEPROM or flash memory with a microcontroller, by allowing online programming based on the interactive deduction rule% the device has It can be reprogrammed while in the circuit. 3 This paper size applies the Chinese National Standard (CNS) A4 specification (21 ×: 297 mm) 501061 Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (7) In the network environment, if there is The ability to interactively download instruction sets and data to a remote device is extremely valuable. For example, a company can service a customer's machine equipment, but does not require the customer to bring the machine equipment to a service center. Instead, the company can use the online programming capabilities of customers' machines and equipment to perform diagnostic functions through communication channels, such as international networks or telephone lines. In this way, the software update can be downloaded to the customer's machine equipment, and the machine equipment can be operated normally after the machine equipment has the correction or update code. Devices with this technology are AT89S8252 microcontrollers, manufactured by Atmel Corporation of San Jose, California, and P89CE558 single-chip microcontrollers, manufactured by Philips Semiconductors, Eindhoven, The Netherlands. According to the architecture of the Philips P89CE558 microcontroller, a mask ROM is used for online programming instruction set, and the microcontroller uses these instruction set to update the flash memory on the wafer. Therefore, Philips microcontrollers require a well-proven mask ROM module to store the modified online programming code to match a variety of unique environments. For a unique environment, in order to use the online programming code, the environment must be understood before the device can be manufactured in order to properly encode the mask ROM. In addition, the online programming communication channel is fixed to a serial RS232 璋 (po r t) in the Philips microcontroller. This limits the use of the microcontroller to a fairly narrow range of applications, and it is difficult to use the online programming function in a dynamic / communication? Environment, where the serial port cannot co-operate well with a communication channel. This channel can provide updated software. 4 _ This paper size applies to China National Standard (CNS) A4 (210X297 mm)

Hi- nn I eMmmMmf In Kd HIBi an— «, Jw n_i 1 ·_ϋ— m «I--"J (請先閲讀背面之注意事項再填寫本頁) 501061 A7 ____B7_ 五、發明説明(> ) 根據Atmel AT89S8252微控制器的架構,一個晶元上 精緻的串列週邊介面堤(serial peripheral interface,SPI)是用來更新快閃記憶體。此種SPI埠有 其缺點,亦即,它是用不具彈性的程式邏輯來實施;由於 此SPI埠的不具彈性,所以無法實施線上燒錄更修的技 術,Atmel晶元有更大的缺點是,爲了能夠握手式地與線 上燒錄啓始器交談,必須加入複雜的硬體,並且,爲了 快閃記憶體,需要模擬(emulating)抹除/燒錄/確認的波 型。該SPI匯流排對各種系統應用來說,並非永遠都是最 佳的選擇;它需要額外的系統邏輯來更改原始復歸 (reset)電路,而,線上燒錄演繹法則會使用該系統邏輯; 並且,在晶元上必須附有複雜的SPI驅動器和接收器邏 輯。 •… 急待需要的是,一個在線上燒錄處理程序裡,當減 小被快閃記憶體佔據的積體電路的面積時,能夠維持彈 性佳的線上燒錄架構。其中,在實施線上燒錄功能時, 會使用該快閃記憶體。 經濟部中央標準局員工消費合作社印製 -a····— mmmmmmmmtmm mmmmmmmmmmmmm ·ϋ·— Bn·.·— turn ϋ_1— «ϋ··'J 1·11 ·101 ·1·ιϋ m· 111 -·. > (請先閱讀背面之注意事項再填寫本頁) 發明槪述 本發明提供一種支援線上燒錄之積體電路上的微控 制器系統的架構。該系統藉由儲存在快閃記憶體內的一 些線上燒錄碼,來維持在線上燒錄處理程序裡的彈性;利 用該線上燒錄處理程序,這些線上燒錄碼可容易地在快 閃記憶體內被更改,並且,那些不需要更改的線上燒錄 _ 5 本紙張尺度適用中國國家標準(CNS〉A4規格(210X297公釐) 501061 A7 B7 _ 五、發明説明(牛) 碼部份,則被儲存在積體電路上的面積上-有效率 (space-efficient)的罩幕式ROM的細胞單元(c e 11)上。 特別地,在線上燒錄處理程序中,處理通訊的那些線上 燒錄碼被存在快閃記憶體內,使得這些碼可以容易地被 更改,以適應各種不同的通訊格式與協定。那些在線上 燒錄處理程序中用來實施抹除程式以及確認部份的碼, 則被保留在積體電路上的面積上-有效率罩幕式R⑽的細 胞單元裏。甚且,本發明之快閃記憶體陣列更藉著由存 於罩幕式ROM的軟體來實施狀態機制(state machine), 以執行快閃記憶體之抹除、燒錄和確認功能。對於抹除、 燒錄和確認功能的時序功能,以往係由典型地硬體來實 施,本發明也將其用儲存在罩幕式ROM的硬體來實施。本 發明中,快閃記憶體的設計因此而簡化,結果也減少了 被快閃記憶體佔有的有關積體電路的所有面積。 以此,本發明之線上燒錄架構有效地維持線上燒錄系 統的彈性,而減少被線上燒錄系統佔據的有關積體電路 的所有面積的需求。 經濟部中央標準局員工消費合作社印製 ϋϋ' n ml —^n In 111 nn UK . 4 n m··—· —I— m· nn -1ϋ^—、一一^ (請先閲讀背面之注意事項再填寫本頁) 另外,本發明可視爲一種積體電路上可執行線上燒錄 的裝置,其包含有一執行指令集的積體電路上的處理器。 該積體電路包括一個外在埠,經由此外在埠,資料從一 外在資源獲得。此積體電路也包括一個第一記憶體陣列, 該陣列包含非揮發性記憶體細胞單元,以輪存那些被處 理器執行的指令集,該指令集包括有,用來控制自外部 __6 本紙張尺度適用中國國家標準(€奶)八4規格(210父297公釐) 經濟部中央標準局員工消費合作社印製 刈 1061 A7 _______^_ _B7__ 五、發明説明(f ) 來源的額外傳送指令到積體電路的那些控制指令,該傳 送經由外部埠。另外,該積體電路也包括一個第二記憶 體陣列,此陣列儲存有被處理器執行的指令集,該指令 集包括有一組指令,用來控制在抹除、燒錄和確認第一 記憶體陣列裡的指令的那些線上燒錄處理步驟。 另外,本發明之第二記憶體陣列包含複數個非揮發 性罩幕式ROM的細胞單元。 根據本發明,在線上燒錄處理程序期間的抹除、燒 錄和確認的運算序列,係經由存在第二記憶體陣列上的 罩幕式ROM細胞單元裡的軟體來完成的。 根據本發明,線上燒錄處理程序的抹除、燒錄和確 認運算的時序係由執行該軟體的處理器來完成。另外, 此處理器藉由寫入指令到控制暫存器來控制與線上燒錄 處理程序裡有關的抹除、燒錄和確認的運算。此處理器 與第一記憶體陣列耦合。 根據本發明,內電路監視裝置更包括一個監視計時 計(watch dog timer)。在線上燒錄處理器執行燒錄處理 指令的期間,如有死結(deadlock)的錯誤發生,此計時 器會啓動(trigger)復原程序。 另外,經由外部埠可從外部來源收到資料,而該外 部埠可被組織化而運作成爲一平行埠或串列埠。 根據本發明,第一記憶體陣列包含複數個分開來而 可抹除的非揮發性記憶體細胞單元的區塊。 7 ^紙張尺度適用中國國家標準(CNS Γα4規格(210X297公羞 (請先閲讀背面之注意事項再填寫本頁) :裝.Hi- nn I eMmmMmf In Kd HIBi an— «, Jw n_i 1 · _ϋ— m« I-" J (Please read the notes on the back before filling out this page) 501061 A7 ____B7_ V. Description of the invention (>) According to the architecture of the Atmel AT89S8252 microcontroller, a delicate serial peripheral interface (SPI) on a wafer is used to update the flash memory. This kind of SPI port has its shortcomings, that is, it is implemented with inflexible program logic; due to the inflexibility of this SPI port, it is impossible to implement online programming and repair techniques. Atmel wafers have a greater disadvantage: In order to be able to talk to the online programming initiator with a handshake, complicated hardware must be added, and in order to flash the memory, it is necessary to emulate the erasing / programming / confirmation waveform. The SPI bus is not always the best choice for various system applications; it requires additional system logic to change the original reset circuit, and the online programming deduction method uses the system logic; and, Complex SPI driver and receiver logic must be attached to the die. •… What is urgently needed is an online programming program that can maintain a flexible online programming architecture while reducing the area of the integrated circuit occupied by flash memory. The flash memory is used when the online programming function is implemented. Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs -a ···· — mmmmmmmmtmm mmmmmmmmmmmmm · ϋ · — Bn ·. · — Turn ϋ_1— «ϋ ·· 'J 1 · 11 · 101 · 1 · ιϋ m · 111- ·. ≫ (Please read the precautions on the back before filling out this page) Invention Description The present invention provides a micro-controller system architecture that supports online programming of integrated circuits. The system maintains the flexibility in the online programming process by using some online programming codes stored in the flash memory; using this online programming process, these online programming codes can be easily stored in the flash memory It has been modified, and those online programming that do not need to be changed _ 5 This paper size applies to the Chinese national standard (CNS> A4 specification (210X297 mm) 501061 A7 B7 _ 5. The description of the invention (ox) code, it is stored On the area of the integrated circuit-the cell unit (ce 11) of the space-efficient mask ROM. In particular, in the online programming program, those online programming codes that deal with communication are Exist in flash memory, so that these codes can be easily changed to adapt to different communication formats and protocols. The codes used to implement the erase program and confirm the part in the online programming process are kept in The area on the integrated circuit is in the cell unit of the efficient mask-type R 。. Furthermore, the flash memory array of the present invention is implemented by software stored in the mask-type ROM. (State machine) to perform flash memory erase, burn and confirm functions. The sequential functions of erase, burn and confirm functions have traditionally been implemented by typical hardware, and the present invention also implements them It is implemented by the hardware stored in the mask ROM. In the present invention, the design of the flash memory is simplified, and as a result, the total area of the integrated circuit occupied by the flash memory is reduced. The invention of the online programming architecture effectively maintains the flexibility of the online programming system and reduces the need for all areas of the integrated circuit occupied by the online programming system. Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs ϋϋ n ml — ^ n In 111 nn UK. 4 nm ·· — · —I— m · nn -1ϋ ^ —, one by one ^ (Please read the precautions on the back before filling this page) In addition, the present invention can be regarded as a integrated circuit The device capable of performing online programming on the upper side includes a processor on an integrated circuit that executes an instruction set. The integrated circuit includes an external port through which data is obtained from an external resource. This integrated body Circuit also Including a first memory array, the array contains non-volatile memory cell units to rotate those instruction sets executed by the processor, the instruction set includes, used to control from the outside __6 This paper standard applies to China Standard (€ milk) 8 specifications (210 father 297 mm) Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 刈 1061 A7 _______ ^ _ _B7__ V. Description of the invention (f) Extra transmission instructions from the source to the integrated circuit The control instruction is transmitted through an external port. In addition, the integrated circuit also includes a second memory array, which stores an instruction set executed by the processor, and the instruction set includes a set of instructions for controlling the erasing Steps to write and confirm the instructions in the first memory array. In addition, the second memory array of the present invention includes a plurality of non-volatile mask ROM cells. According to the present invention, the operation sequence of erasing, programming and confirming during the online programming process is performed by software stored in a mask ROM cell unit on the second memory array. According to the present invention, the sequence of erasing, programming, and confirming operations of the online programming program is performed by a processor executing the software. In addition, this processor controls the erase, program, and confirm operations related to the online programming process by writing instructions to the control register. This processor is coupled to the first memory array. According to the present invention, the internal circuit monitoring device further includes a watch dog timer. During the execution of the programming instructions by the online programming processor, if a deadlock error occurs, this timer will trigger a recovery procedure. In addition, data can be received from an external source via an external port, and the external port can be organized to operate as a parallel or serial port. According to the present invention, the first memory array includes a plurality of blocks of nonvolatile memory cell units that are separated and erasable. 7 ^ Paper size applies Chinese national standard (CNS Γα4 specification (210X297) (Please read the precautions on the back before filling this page): Packing.

、1T 501061 經濟部中央標準局員工消費合作社印製 A7 B7__ 五、發明説明(W ) 另外,本發明之積體電路包含複數個至外部資料來 源的璋,如一個以上的串列璋,一個以上的平行埠,以 及潛在的一個以上的通訊埠。在這些埠中,用來接收來 自一個外部資源的線上燒錄指令的埠,係由線上燒錄碼 本身的指令所決定,所以可以被機動性的更換。 本發明之積體電路,包括一個資料路徑,用來燒錄 及確認第一記憶體陣列,及,可隨意地,第二記憶體陣列。 其與線上燒錄指令無關。所以,多工輸入/輸出接腳或其 相似的,在製造或裝載晶元至系統之前,原始軟體可以 下載到該裝置上。 茲配合下列圖式、詳細說明以及專利申請範圍,將上 述及本發明之其他目的與優點詳述於后。 圖式之簡要說明 第一圖係本發明之積體電路的線上燒錄的系統方塊圖。 第二圖係本發明之位址空間方塊圖,其中,該位址空間 包含即將被微控制器100執行的指令。 第三圖係說明本發明如何積體成一系統的方塊圖,其中, 該系統包括一條通訊管道和線上燒錄啓始器340。 第四A圖係本發明之線上燒錄處理程序之流程圖的第一 部份。 第四B圖係本發明之線上燒錄處理程序之流程圖的第二 部份。 8 (請先閱讀背面之注意事項再填寫本頁) .裝. 訂 d $紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐Ί " 501061 經濟部中央標準局員工消費合作社印裝 A7 B7 五、發明説明(j?) 第四C圖係本發明之線上燒錄處理程序之流程圖的第三 部份。 發明之詳細說明 下列說明使熟悉本項技藝之人士得以製造和使用本 發明。本說明書中,並提供本發明之特殊應用和它的需 求條件。對於熟悉本項技藝之人士,較佳實施例所做之 各種修飾,是非常明顯易知的,並且,本發明之原理可 使用到其他實施例和應用,亦應涵蓋在本發明之精神範 疇內。所以,本發明並不特意局限在以下所示之實施例, 但是,揭露於此者,將可依據其原理和特徵涵蓋至最廣 範疇。 第一圖爲本發明之積體電路的線上燒錄的系統方塊 圖。所有圖示於第一圖裡的元件,皆駐留在積體電路上。 微控制器100執行來自罩幕式ROM模組160的指令和可被 多次(multiple time)燒錄的ROM 140。可被多次燒錄的 ROM140爲一簡化的快閃記憶體陣列,該陣列被分割爲複 數個獨立的可抹除的快閃記憶體細胞單元的區塊。可被 多次燒錄的ROM 140也包含狀態位元和啓動(boot)向量 146,該向量直接連接到微控制器1〇〇。可被多次燒錄的 ROM 140也包含實施線上燒錄通訊指揮器(handUr)142 的編碼,和實施對微控制器100的使用者自定(11^^ defined)功能的使用者編碼144。微控制器100包括那些 經由輸入/輸出埠120,而至積體電路外部的連接,岔斷 _ 9 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) ---------^裝-- (請先閲讀背面之注意事項再填寫本頁) 訂 J·. 501061 經濟部中央標準局員工消費合作杜印製 A7 B7 五、發明説明(?) 線122,和其他訊號124。岔斷線122和其他訊號124通 常用來定坐標和經由輸入/輸出璋120的同部通訊。微控 制器100另外還包括計時器105 ’用來實施對微控制器 100的時序功能。監視計時器110與微控制器100耦合, 並用來偵測在微控制器1〇〇運作時的死結。 微控制器100發出一個指令位址126,以饌入罩幕式 ROM模組160及可被多次燒錄的ROM140兩者的位址輸 入。指令位址126標引在罩幕式ROM模組160及可被多次 燒錄的ROM 140之內的指令。來自在罩幕式ROM模組160 及可被多次燒錄的ROM 140的指令經由多工器(MUX)餵 入,該多工器有選擇性地將這些指令切換到微控制器 100。另外,狀態位元和啓動向量146餵入微控制器100, 而狀態位元和啓動向量146爲可被多次燒錄的ROM 140 的一部份。 在本發明之一較佳實施例中,該狀態位元和啓動向 量146並非是可被多次燒錄的ROM 140裡快閃記憶體陣列 的一部份。而是在可被多次燒錄的ROM 140裡的一個分開 的暫存器。當一個特殊的位址和特殊的控制訊號被輸入 可被多次燒錄的ROM 140時,此暫存器有選擇性地從可被 多次燒錄的ROM 140被輸出。 微控制器100經由快閃控制暫存器150,控制可被多 次燒錄的ROM 140的運作。快閃控制暫存器150包括控制 暫存器152和時序暫存器154。爲了在可被多次燒錄的 10 本紙張尺度適用中國國家標準(CNS ) A4規格(210 X 297公釐) (請先聞讀背面之注意事項再填寫本頁) .裝- 訂 501061 A7 B7 五、發明説明(f ) ROM 140內的碼,微控制器100將控制碼寫入快閃控制暫 存器150,以控制線上燒錄處理程序之抹除、燒錄和確認 功能。 表一和表二說明了本發明之一較佳實施例的控制 碼。表一包含一列的位元圖案,爲了可被多次燒錄的ROM 140,這些圖案被餵入控制暫存器152,用來控制抹除、 燒錄和確認功能。 表一 FMCON: Flash Module Control register FMC01^7:4】: Reserved FMCON[3:0]: i.e. MS[3:0] of MTPG2 module normai read MTP module at DPTR/PA{!5:0] location; this is the default value after 0000: reset 0001: erase 0-64KB as well as LOCK bits 0010: block erase; erase 0-16K if DPTR [2:0] = 000 erase 16-32K if DPTR [2:0]= = 010 erase 32-48K if DPTR [2:0]= =100 erase 48-56K if DPTR [2:0} = 110 erase 56-64K if DPTR [2:0] =m 0011: program byte at DPTR/PA [15:0] with data = FMDATA/DQ[7:0) 0100: verify erased byte at DPTR/PA [15:0] 0101: verify programmed byte at DFTR/PA [15:0] program lock 0110: bits, program LOCKfl] to be 1 if DPTR [1:0] - 00 經濟部中央標隼局員工消費合作社印製 (請先閱讀背面之注意事項再填寫本頁) program LOCK[2) to be 1 if DPTR [i :〇j = 01 program L0CK[3] to be t if DPTR [1:0] = lx 0 Π1: verify three programmed lock bits 1001: erase status bits as well as boot vector 1010: program status bits or boot vector, program SBIT[ l :0] if DPTR[0] * 0 with FMDATA/DQ[ 1:0] program BVEC(7iO] if DPTR[0) = l with FMDATA/DQ[7:0] 1011: verify programmed status bits or boot vector;1T 501061 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs A7 B7__ 5. Description of the invention (W) In addition, the integrated circuit of the present invention includes a plurality of 璋 to external data sources, such as more than one serial 璋, more than one Parallel ports, and potentially more than one communication port. Among these ports, the port used to receive online programming instructions from an external source is determined by the instructions of the online programming code itself, so it can be replaced flexibly. The integrated circuit of the present invention includes a data path for programming and confirming the first memory array, and optionally, the second memory array. It has nothing to do with the online programming instruction. Therefore, multiplexed I / O pins or similar, the original software can be downloaded to the device before manufacturing or loading the wafer into the system. In conjunction with the following drawings, detailed description, and scope of patent applications, other objects and advantages of the present invention are described in detail below. Brief Description of the Drawings The first figure is a block diagram of an online programming system of the integrated circuit of the present invention. The second figure is a block diagram of the address space of the present invention, wherein the address space contains instructions to be executed by the microcontroller 100. The third figure is a block diagram illustrating how the present invention is integrated into a system, where the system includes a communication channel and an online programming initiator 340. Figure 4A is the first part of the flowchart of the online programming process of the present invention. Figure 4B is the second part of the flowchart of the online programming process of the present invention. 8 (Please read the precautions on the back before filling this page). Packing. Order d $ Paper size applies to China National Standard (CNS) A4 specifications (210X297 mmΊ " 501061 Employees' Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs, printed by A7 B7 V. Description of the invention (j?) Figure 4C is the third part of the flowchart of the online programming process of the present invention. Detailed description of the invention The following description enables those skilled in the art to make and use the invention In this specification, the special application of the present invention and its requirements are provided. For those familiar with the art, the various modifications made by the preferred embodiment are very obvious and easy to understand, and the principle of the present invention can be The use of other embodiments and applications should also be covered within the spirit of the present invention. Therefore, the present invention is not intentionally limited to the embodiments shown below, but those disclosed here will be covered according to its principles and characteristics To the widest category. The first picture is the block diagram of the system for online programming of the integrated circuit of the present invention. All the components shown in the first picture reside on the integrated circuit. Micro The controller 100 executes instructions from the mask ROM module 160 and a ROM 140 that can be programmed multiple times. The ROM 140 that can be programmed multiple times is a simplified flash memory array, which is Divided into multiple independent erasable flash memory cell units. The ROM 140, which can be reprogrammed multiple times, also contains status bits and a boot vector 146, which is directly connected to the microcontroller 100. The ROM 140, which can be programmed multiple times, also contains the code to implement the online programming communication controller (handUr) 142, and the use of the user-defined (11 ^^ defined) function of the microcontroller 100. The encoder code 144. The microcontroller 100 includes those that are connected to the outside of the integrated circuit via the input / output port 120 and break off_ 9 This paper size applies to the Chinese National Standard (CNS) A4 specification (210X297 mm) --- ------ ^ 装-(Please read the notes on the back before filling out this page) Order J ·. 501061 Consumer Co-operation of the Central Standards Bureau of the Ministry of Economic Affairs Du printed A7 B7 V. Description of the Invention (?) Line 122 , And other signals 124. Fork 122 and other signals 124 are commonly used Coordinates and the same communication via input / output 璋 120. The microcontroller 100 additionally includes a timer 105 'for implementing the timing function of the microcontroller 100. The watchdog timer 110 is coupled to the microcontroller 100 and is used to detect The deadlock during the operation of the microcontroller 100 is measured. The microcontroller 100 issues a command address 126 to enter the address of both the mask ROM module 160 and the ROM 140 that can be programmed multiple times. The instruction address 126 refers to instructions within the mask ROM module 160 and the ROM 140 that can be programmed multiple times. The instructions from the on-screen ROM module 160 and the ROM 140 that can be repeatedly programmed are fed through a multiplexer (MUX) that selectively switches these instructions to the microcontroller 100. In addition, the status bit and the startup vector 146 are fed into the microcontroller 100, and the status bit and the startup vector 146 are part of the ROM 140 that can be programmed multiple times. In a preferred embodiment of the present invention, the status bit and the startup vector 146 are not part of the flash memory array in the ROM 140, which can be programmed multiple times. Instead, it is a separate register in ROM 140 that can be programmed multiple times. When a special address and a special control signal are input to the ROM 140 which can be repeatedly programmed, this register is selectively output from the ROM 140 which can be repeatedly programmed. The microcontroller 100 controls the operation of the ROM 140 which can be programmed multiple times via the flash control register 150. The flash control register 150 includes a control register 152 and a timing register 154. In order to apply the Chinese National Standard (CNS) A4 specification (210 X 297 mm) to 10 paper sizes that can be repeatedly burned (please read the precautions on the back before filling this page). Binding-Order 501061 A7 B7 V. Description of the invention (f) The code in the ROM 140, the microcontroller 100 writes the control code into the flash control register 150 to control the erasing, burning and confirming functions of the online burning processing program. Tables 1 and 2 illustrate the control codes of a preferred embodiment of the present invention. Table 1 contains a row of bit patterns. For the ROM 140 that can be programmed multiple times, these patterns are fed into the control register 152, which is used to control the erase, programming, and confirmation functions. Table 1 FMCON: Flash Module Control register FMC01 ^ 7: 4]: Reserved FMCON [3: 0]: ie MS [3: 0] of MTPG2 module normai read MTP module at DPTR / PA {! 5: 0] location; this is the default value after 0000: reset 0001: erase 0-64KB as well as LOCK bits 0010: block erase; erase 0-16K if DPTR [2: 0] = 000 erase 16-32K if DPTR [2: 0] = = 010 erase 32-48K if DPTR [2: 0] = = 100 erase 48-56K if DPTR [2: 0] = 110 erase 56-64K if DPTR [2: 0] = m 0011: program byte at DPTR / PA [ 15: 0] with data = FMDATA / DQ [7: 0) 0100: verify erased byte at DPTR / PA [15: 0] 0101: verify programmed byte at DFTR / PA [15: 0] program lock 0110: bits, program LOCKfl] to be 1 if DPTR [1: 0]-00 Printed by the Consumer Cooperatives of the Central Bureau of Standards, Ministry of Economic Affairs (please read the precautions on the back before filling out this page) program LOCK [2) to be 1 if DPTR [i : 〇j = 01 program L0CK [3] to be t if DPTR [1: 0] = lx 0 Π1: verify three programmed lock bits 1001: erase status bits as well as boot vector 1010: program status bits or boot vector, program SBIT [l: 0] if DPTR [0] * 0 with FMDATA / DQ [1: 0] program BVEC (7iO] if DPTR [0) = l with FMDATA / DQ [7: 0] 1011: verify programmed status bits or boot vector;

verify SBIT(l:0j if DPTR[〇l = 0 verify BVEC[7:0] if DPTR[0) = I 1111: read Manufacture ID or Device ID TABLE 1 11 本紙張尺度適用中國國家標準(CNS ) A4規格(21 OX 297公釐) 經濟部中央標準局員工消費合作社印製 501061 A7 B7 五、發明説明(θ ) 表二包含一列的功能,由時序暫存器154內的多種位 元來實施執行。藉由製造這些位元,微控制器100產生了 快閃記憶體之抹除、程式和確認運作所需的波型。 表一. FMTIM: Flash Module Timing register, used by software to emulate ihc waveform needed for flash operations. FMTIM[7J: VPP Enable bit. FMTIM[6]: Module Enable bit FMTIM(51: Read Enable bit FMTIM[4J: Write Enable bit FMTIM[3:0】: Reserved TABLE 2 _ 罩幕式ROM模組160包含那些實施抹除、燒錄和確認 指揮器162的碼。這些碼包含那些執行關於線上燒錄之抹 除、燒錄和確認運作的序列及時序的碼。表三列出本發 明之一較佳實施例的這種型態的碼。表三列出8051副程 式的組合語言碼,這些副程式相關於線上燒錄系統的抹 除、燒錄和確認的功能。 12 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) I—: 、訂-----_ (請先閲讀背面之注意事項再填寫本頁) 501061 A7B7 五、發明説明(I1 )表三 ;SFR define .EQU FMCON, 0x40H ; ;Flash Module CONtrol register .EQU FMTIM, 0x41H ; ;Flash Module TIMing register .EQU ( delay 1, OxFAH ;used by s/w to emulate the emulate ;the waveform needed for flash operations Tek = l/Fosc (ns) .EQU delay 2, Oxl AH i delay 1 * (256 - 2000/(Tck· 12)+!) dclay2 - (500000000/ (Tek· 12 * 65536) ;Subroutine: Erase full chip ERASE: MOV FMCON, #0001001 Ob chip erase VPP in and CEB is active MOV FMTIM,#! 1000000b LCALL DELAY2us delay tVPS or iCES (2us) MOV FMTIM,#U0l0000b WEB is active LCALL DELAY is delay tEW (erase time) MOV FMTiM,#ll000000b disable WEB LCALL DELAYSOOms delay lER (0.5s) MOV FMTIM, #00000000b clear FMTIM MOV FMCON,_000000b clear FMCON RET ;Subroutine: Verify erased byte ERASE_VERIFY: MOV FMCON, #00010010b ;verify chip erase MOV FMTIM,# 11000000b ;VPP in. CEB is active MOV DPTR, _H ;Address (請先閲讀背面之注意事項再填寫本頁) 一裝· 訂 經濟部中央標準局員工消費合作社印製 13 本紙張尺度適用中國國家標準(CNS ) A4規格(210 X 297公釐) 501061 A7 B7 五、發明説明('V) 經濟部中央標準局員工消費合作社印製verify SBIT (l: 0j if DPTR [〇l = 0 verify BVEC [7: 0] if DPTR [0) = I 1111: read Manufacture ID or Device ID TABLE 1 11 This paper size applies to China National Standard (CNS) A4 specifications (21 OX 297 mm) 501061 A7 B7 printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the Invention (θ) Table 2 contains a list of functions implemented by various bits in the timing register 154. By manufacturing these bits, the microcontroller 100 generates the waveforms required for erasing, programming, and verifying the flash memory. Table 1. FMTIM: Flash Module Timing register, used by software to emulate ihc waveform needed for flash operations. FMTIM [7J: VPP Enable bit. FMTIM [6]: Module Enable bit FMTIM (51: Read Enable bit FMTIM [4J: Write Enable bit FMTIM [3: 0]: Reserved TABLE 2 _ The mask ROM module 160 contains codes that implement erasing, programming, and confirmation of the director 162. These codes include those that perform erasing, programming Sequence and timing codes for recording and confirming operation. Table 3 lists codes of this type of a preferred embodiment of the present invention. Table 3 lists the combined language codes of the 8051 subroutines, which are related to online burning The function of erasing, burning and confirming the recording system. 12 This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) I—: 、 Order -----_ (Please read the notes on the back first (Fill in this page again) 501061 A7B7 V. Description of the invention (I1) Table III; SFR define .EQU FMCON, 0x40H;; Flash Module CONtrol register .EQU FMTIM, 0x41H;; Flash Module TIMing register .EQU (delay 1, OxFAH; used by s / w to emula te the emulate; the waveform needed for flash operations Tek = l / Fosc (ns) .EQU delay 2, Oxl AH i delay 1 * (256-2000 / (Tck · 12) +!) dclay2-(500000000 / (Tek · 12 * 65536); Subroutine: Erase full chip ERASE: MOV FMCON, # 0001001 Ob chip erase VPP in and CEB is active MOV FMTIM, #! 1000000b LCALL DELAY2us delay tVPS or iCES (2us) MOV FMTIM, # U0l0000b WEB is active LCALL DELAY is delay tEW (erase time) MOV FMTiM, # ll000000b disable WEB LCALL DELAYSOOms delay lER (0.5s) MOV FMTIM, # 00000000b clear FMTIM MOV FMCON, _000000b clear FMCON RET; Subroutine: Verify erased byte ERASE_VERIFY: MOV FMCON, # 00010010b ; verify chip erase MOV FMTIM, # 11000000b; VPP in. CEB is active MOV DPTR, _H; Address (Please read the precautions on the back before filling out this page) One pack · Ordered by the Central Standards Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 13 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 501061 A7 B7 V. Description of Invention ('V) Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs

LCALL DELAY2us ;delay tMS (2us) MOV FMTIM,#ll 100000b ;OEB is active MOV R1,#00H MOV R0. #00H NOP NOP LOOP_E: ;MOVX A,@DPTR ;read Flash CJNE A,#0xFFH, ERASE_FA!L INC DPTR · DJNZ R0, LOOP E DJNZ Rl,LOOP_E MOV R7, //OxFFH ;erase verify passed SIMP END EV ERASE_FAIL: MOV R7, A ;erase verify fail END EV: MOV FMTIM, #0000000b ;clear FMTIM MOV FMCON, #0000000b ;clear FMCON RET ;Subroutine: Program byte ;DPTR: program address ;A: program data PROGRAM 一 B: MOV FMCON, #0001000lb ;program byte LCALL PROGRAM MOV FMCON, #00000000b ;dear FMCON RET ;Subroutine Verify Byte ;DPTR: verify address ;A: verify data VERIFY_B: MOV FMCON, #0001001 lb ;verify byte MOV FMTIM,# 110000000b ;VPP in, CEB active MOV b.a LCALL DELAY2us ;delay tPV(2us) MOV FMTIM, #11100000b ;OEB is active NOP ;delay 4 NOP NOP NOP NOP CJNE A, B, VERIFY_B_FAIL MOV R7, #0xFFH ;verify passed SJMP END PV VERIFY_B_FAIL MOV R7, A ;program verify fail END_PV: MOV FMTIM, «00000000b ;clear FMTIM MOV FMCON, #00000000b ;clear FMCON RET ;Subroutine: Program LOCK bits ;which lock bit being programmed depends on DPTR [2:0j PROGRAM_L: MOV FMCON. #000I0l00b ;program LOCK bit LCALL PROGRAM 14 本紙張尺度適用中國國家標準(CNS ) Α4規格(210X297公釐) (請先聞讀背面之注意事項再填寫本頁) •裝·LCALL DELAY2us; delay tMS (2us) MOV FMTIM, # ll 100000b; OEB is active MOV R1, # 00H MOV R0. # 00H NOP NOP LOOP_E:; MOVX A, @ DPTR; read Flash CJNE A, # 0xFFH, ERASE_FA! L INC DPTRDJNZ R0, LOOP E DJNZ Rl, LOOP_E MOV R7, // OxFFH; erase verify passed SIMP END EV ERASE_FAIL: MOV R7, A; erase verify fail END EV: MOV FMTIM, # 0000000b; clear FMTIM MOV FMCON, # 0000000b; clear FMCON RET; Subroutine: Program byte; DPTR: program address; A: program data PROGRAM 1B: MOV FMCON, # 0001000lb; program byte LCALL PROGRAM MOV FMCON, # 00000000b; dear FMCON RET; Subroutine Verify Byte; DPTR: verify address; A: verify data VERIFY_B: MOV FMCON, # 0001001 lb; verify byte MOV FMTIM, # 110000000b; VPP in, CEB active MOV ba LCALL DELAY2us; delay tPV (2us) MOV FMTIM, # 11100000b; OEB is active NOP; delay 4 NOP NOP NOP NOP CJNE A, B, VERIFY_B_FAIL MOV R7, # 0xFFH; verify passed SJMP END PV VERIFY_B_FAIL MOV R7, A; program verify fail END_PV: MOV FMTIM, «00000000 b; clear FMTIM MOV FMCON, # 00000000b; clear FMCON RET; Subroutine: Program LOCK bits; which lock bit being programmed depends on DPTR [2: 0j PROGRAM_L: MOV FMCON. # 000I0l00b; program LOCK bit LCALL PROGRAM 14 China National Standard (CNS) Α4 specification (210X297 mm) (Please read the precautions on the back before filling this page) • Installation ·

、1T 501061 A7 B7 五、發明説明(1) 經濟部中央標準局員工消費合作社印製 MOV FMCON, tfOOOOOOOOb ;clear FMCON RET ;Subroutine: Verify LOCK bits VERIFY_L: MOV FMCON. #0001010lb ;verify three programmed lock bits LCALL VERIFY L S MOV FMCON, #00000000b ;clear FMCON RET ;Subroutine: Program Status bit PROG RAM一S: MOV FMCON, #00010 U0b ;program State bit LCALL PROGRAM MOV FMCON, #00000000b ;clear FMCON RET ;Subroutine: Verify programmed status bit VERIFY_S: MOV FMCON, #000l01Ub ;verify state bil LCALL VERIFY_L_S MOV FMCON^OOOOOOOOb ;clear FMCON RET ;Subroutine: PROGRAM PROGRAM: MOV FMTIM, #11000000b VPP in, CEB active LCALL DELAY2us delay iVPS or ICES or tMS (2us) MOV FMTIM, #11010000b WEB is active LCALL DELAYIOOus delay tPW(100us) MOV FMTIM,#ll000000b disable WEB LCALL DELAY2us delay tPR (2us) MOV FMTIM, #00000000b clear FMTIM RET ;Subroutine: Verify LOCK bits or State bit VERIFY 一 L一 S: "Kiev B.A ‘ MOV FMTIM, #01000000b VPP = 5V, CEB active LCALL DELAY2us delay tVPS or iCES or tMS (2us) MOV FMTIM,# Π100000b OEB is active NOF NOP NOP NOP ONE A, B, VER1FY_LS_FAIL MOV R7, #0xFFH ; ,verify LOCK or Slate bit passed SJMP END_VLS VERIFY_LS_FAIL MOV R7.A ; ;verify LOCK or state fail END_VLS: 一 MOV FMTIM, #00000000b ; ;clear FMTIM RET ;Subroutine: DELAY2us DELAY2us: 15 本紙張尺度適用中國國家標準(CNS ) A4規格(210 X 2们公釐) I---/-----裝^-------訂^—----- (請先閱讀背面之注意事項再填寫本頁) 501061 A7 B7 五、發明説明(\f ) 經濟部中央標準局員工消費合作社印製 PUSH IE CLR EA MOV THI.^OxFFH MOV TLI,#delayI MOV TCON, #00H MOV TMOD, #10H ;TIMER1,M0DE 1 SETB TR1 ;stan TIMER l LOOPi: JNB TFI, LOOP I MOV TCON, #00H ;clear TFI and TR1 POP RET IE ;Subroutine: DELAY 1 OOus DELAY 1 OOus MOV R7, #0x32H L00P2: LCALL DELAY2us DJNZ RET R7, LOOP2 ;Subroutine: DELAY500ms DELAYSOOms: PUSH CLR IE EA MOV R7, #dclay2 MOV TCON, #00H MOV TMOD, #I0H ;TIMERI,MODE I LOOP4: MOV THI,#00H MOV TL1,#00H SETB TR1 LOOP3: JNB TF1, LOOP3 MOV TCON, #00H ;clear TFI and TR1 DJNZ R7, LOOP4 POP IE RET ;Subroutine: DELAY Is DELAY Is: LCALL DELAYSOOms LCALL RET .END DELAY500ms TABLE 3 —I- ϋϋ ϋ·— m In nl· —-—-I mi 11_1 m «ml— am TJ In ϋϋ κι I mu (請先閲讀背面之注意事項再填寫本頁) 16 本紙張尺度適用中國國家標準(CNS ) A4規格(2丨0X297公釐) 501061 經濟部中央標準局員工消費合作社印製 A7 B7 五、發明説明0〇> ) 本發明之要點爲線上燒錄碼可以分成兩部份。那些 通常會被更改的碼的部份,例如線上燒錄通訊指揮器, 其必須對各種不同的通訊協定重新配置的碼,則被儲存 在可被多次燒錄的ROM 140內的快閃記憶體。那些不須更 改的線上燒錄碼的部份,特別是那些適合可被多次燒錄 的ROM 140之架構的抹除、燒錄和確認的功能,則儲存於 面積上-有效率的罩幕式ROM模組160。 參考第一圖,線上燒錄處理程序的運作如下:微控 制器100執行來自線上燒錄通訊指揮器142的碼,經由輸 入/輸出璋120之其中一個埠,其與在遠端的線上燒錄啓 動器通訊。新的指令必須下載到可被多次燒錄的ROM 140 之使用者的碼區(code sect ion)144。被下載的指令經由 輸入/輸出埠120之其中一個埠被傳送到微控制器100。 微控制器100執行在罩幕式ROM模組160內的抹除、燒錄 和確認指揮器162裡的碼,而模組160將這些新碼下載到 可被多次燒錄的ROM 140的使用者的碼區144。微控制器 100與監視計時器110同時運作,以偵測微控制器100執 行線上燒錄碼時的死結。爲了讓新的指令可以燒錄到可 被多次燒錄的ROM 140,微控制器100經由寫入控制暫存 器152和時序暫存器154的一序列指令,首先抹除可被多 次燒錄的R0M140的一部份。然後,微控制器100經由寫 入控制暫存器152和時序暫存器154的額外指令,讓新碼 可以燒錄到可被多次燒錄的ROM 140。最後,微控制器 __ 17 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 501061 A7 __B7 五、發明説明(\W) 100經由寫入控制暫存器152和時序暫存器154的一序列 指令,確認可被多次燒錄的ROM 140裡新碼的燒錄處理。 第二圖說明被微控制器100的位址空間200。該位址 空間被分成複數個獨立而可抹除的快閃記憶體的區塊和 一個罩幕式ROM記憶體區塊。#1使用者區塊260從位址0 延伸至位址16K。#2使用者區塊250從位址16K延伸至位 址32K。#3使用者區塊240從位址32K延伸至位址48K。 #4使用者區塊230從位址48K延伸至位址56K。爲了下載 新的指令到可被多次燒錄的ROM 140的使用者碼區144。 這些主要的啓動碼就被用到。假如這個主要啓動碼空間 不夠,#4使用者區塊230可以用來儲存輔助的啓動碼。 在位址63K與64K之間的位址空間包含抹除、燒錄 和確認副程式210。位址空間200的部份則位於罩幕式 ROM模組160。從位址0到63K的位址空間200的其他部 份則位於可被多次燒錄的ROM 140內的快閃記憶體單元。 儘管這兩個位址空間200的部份駐留在不同的記憶體模 組內,它們包含了給微控制器100用的一個單一的位址空 間200的部份。來自罩幕式ROM模組160和可被多次燒錄 的ROM 140的指令經由多工器130選擇性的被切換到微控 制器100。 第一圖所示之實施例中,只顯示一個單一罩幕式ROM 模組160和一個單一可被多次燒錄的ROM 140。可變換的 系統包括多個罩幕式ROM模組和多個可被多次燒錄的 18 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) ! IIAW~ 裝 訂 (請先閲讀背面之注意事項再填寫本頁) 501061 A7 B7 經濟部中央標準局員工消費合作社印製 五、發明説明() ROM。甚至可容許在線上燒錄指令的設計和實施中更具彈 性。 第二圖說明本發明的應用環境。本發明實施於系統 300內的一個積體電路310。系統300包含有一個印刷電 路版或是某種其他系統的實施。積體電路310包括微控制 器100、罩幕式ROM模組160、可被多次燒錄的R0M 14〇 以及線上燒錄系統的元件。微控制器100與複數個積體電 路312 、 314及316耦合。到通訊管道的橋接器 (bridge)320提供一條管道,穿過該管道,線上燒錄碼於 是被傳送。到通訊管道的橋接器320可以包含一個簡單的 網路埠,或是可以包括額外的膠黏邏輯(glue logic), 用來讓線上燒錄系統透明成非線上燒錄碼。到通訊管道 的橋接器320的功能可以被改變,容許到通訊管道的橋接 器320耦合至不同層次的資料比率、錯誤比率和複雜性的 各種不同的線上燒錄通訊管道。例如,通訊管道330的一 個實施例裡,包含有一個網際網路執行一個網際網路通 訊協定。 經由通訊網路330,到通訊管道的橋接器320耦合至 一個線上燒錄啓始器340,例如,個人電腦或工作站。線 上燒錄啓始器340被一條通訊管道345耦合至大型儲存 裝置350。線上燒錄啓始器340可以用多種不同方式耦合 至微控制器100。在一實施例中,一個內電路啓始器是經 由通訊管道330上之網際網路的一個全球網際網站。也可 19_ 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閲讀背面之注意事* 4 項再填- 裝丨| :寫本頁) 訂 i# 經濟部中央標準局員工消費合作社印製 501061 A7 B7 五、發明説明(\贫) 變換爲,線上燒錄啓始器340扮演穿過一個撥接數據機聯 接的啓始器。還有另外的實施例是,通訊管道330是個人 電腦系統內的一條通訊匯流排,並且經由此匯流排330, 下載內電路軟體。此實施例中,至系統300的昇級可以被 分散到軟碟機上的終端使用者,否則的話,或是經由線 上燒錄啓始器340而被下載。 在某些應用裡,不需要有到通訊管道的橋接器320。 參看第一圖,在某些應用裡,包含在線上燒錄通訊指揮 器142,經由輸入/輸出埠120之其中一個埠,跨過通訊 管道330,本身就足以實施適當的線上燒錄通訊協定。因 此,可容許輸入/輸出埠120之其中一個埠直接連到通訊 管道330,所以不需要有到通訊管道的橋接器320。 第4A至4C圖包含了關於在線上燒錄處理程序運作的 流程圖。第4A至4C圖的每一圖被分成四行。第一行,標 示爲“線上燒錄啓始器340”,代表著線上燒錄啓始器340 的活動,如第三圖所示。線上燒錄啓始器340是積體電路 310經由一條通訊管道330,與線上燒錄系統300連接。 線上燒錄啓始器340啓始及控制該線上燒錄處理程序。第 4A至4C圖之剩下三行代表著微控制器100執行不同主題 碼的行爲。這些主題碼儲存在罩幕式ROM模組160和可被 多次燒錄的ROM 140裡。標示有“使用者碼144”的行代表 著微控制器100執行可被多次燒錄的ROM 140裡的使用者 碼144時的行爲。標示有“線上燒錄通訊指揮器142”的行 20 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) '~ I--^-----0^-- (請先閱讀背面之注意事項再填寫本頁) 訂 經濟部中央樣準局員工消費合作社印製 501061 A7 ____B7_ _ 五、發明説明 (^) 代表著微控制器100執行可被多次燒錄的ROM 140裡的線 上燒錄通訊指揮器142時的行爲。標示有“抹除/燒錄/確 認指揮器162”的行代表著微控制器1〇〇執行罩幕式ROM 模組160裡的抹除/燒錄/確認指揮器162時的行爲。 第4A、4B及4C圖的線上燒錄處理程序運作說明如 下。一當系統復歸或是當監控計時器110時間到的時候, 微控制器100進入狀態430,在此狀態中檢查一狀態位 元。假如狀態位元爲0,微控制器100進入在使用者碼。 內的步驟420。假如狀態位元被設定爲1,微控制器100 . 跳至被啓動向量所指到的位置,然後執行在線上燒錄通 訊指揮器142的步驟440。 在步驟420,微控制器100等候線上燒錄啓始器 340,以取得其中的下一個指令。當線上燒錄啓始器340 執行步驟400時,它傳送一個更新的指令給微控制器 100。該更新的指令被微控制器100收到後,迫使微控制 器100進行到步驟421。在步驟421,微控制器100詢問 該收到的指令是否爲一更新的指令。假如不是的話,微 控制器100進行到步驟426,在此步驟420中,微控制器 100發生正常運作後,執行非線上燒錄的使用者碼。然後, 系統返回至步驟420,以取得下一個指令。假如是一個更 新的指令,微控制器100進行到步驟422,在此步驟中, 一個“要求確認(r eciues t t〇 conf i rm)”被送到線上燒錄 啓始器340。執行步驟400後,線上燒錄啓始器340進行 21 本紙張又度適用中國國家標準(CNS ) A4規格(210X297公釐) I 裝 I 訂 I (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 501061 A7 __B7_ 五、發明説明(〉々) 到步驟401,在此步驟中,線上燒錄啓始器340等候一個 確認的要求。當收到確認要求的指令時,線上燒錄啓始 器340進行到步驟402,在此步驟中,一個確認的指令被 送給微控制器100。在步驟423時,微控制器100收到該 確認指令,然後進行到線上燒錄通訊指揮器142內的步驟 445,在此步驟中,微控制器100傳送一個“就緒至線上 燒錄”的指令給線上燒錄啓始器340。在發出確認指令 後,線上燒錄啓始器340進行到步驟403,在此步驟中, 線上燒錄啓始器340等候來自微控制器100的一個“就緒 至線上燒錄”的指令。 假如在步驟430,該狀態位元被設定爲1,則微控制 器100執行一組步驟,以確認在線上燒錄通訊指揮器142 內的線上燒錄的要求。這組步驟幾乎與那些當狀態位元 被設定爲0時,被用來確認在使用者碼144內之線上燒錄 要求的步驟成鏡(mirror)反射對應。在步驟440中,微控 制器1〇〇等候來自線上燒錄啓始器340的下一個指令。當 線上燒錄啓始器執行步驟400時,它傳送一個更新的指令 給微控制器100。當微控制器100在步驟400收到該更新 指令時,則進行到步驟441。在此步驟中,微控制器100 決定該指令是否爲一個更新的指令。假如不是,微控制 器100進行到步驟442。此步驟中,沒有運作(Ν00Ρ )發 生。然後,微控制器100返回至步驟440,以接收另一個 指令。 __ 22 本紙張尺度適用中國國家標準(CNS ) A4規格(2】0X297公釐) ----^-----0^-- (請先聞讀背面之注意事項再填寫本頁)1T 501061 A7 B7 V. Description of Invention (1) MOV FMCON, tfOOOOOOOOb; clear FMCON RET; Subroutine: Verify LOCK bits VERIFY_L: MOV FMCON. # 0001010lb; verify three programmed lock bits LCALL VERIFY LS MOV FMCON, # 00000000b; clear FMCON RET; Subroutine: Program Status bit PROG RAM_S: MOV FMCON, # 00010 U0b; program State bit LCALL PROGRAM MOV FMCON, # 00000000b; clear FMCON RET; Subroutine: Verify initialize status bit VERIFY_S: MOV FMCON, # 000l01Ub; verify state bil LCALL VERIFY_L_S MOV FMCON ^ OOOOOOOOb; clear FMCON RET; Subroutine: PROGRAM PROGRAM: MOV FMTIM, # 11000000b VPP in, CEB active LCALL DELAY2us delay iVPS or ICES or tCES , # 11010000b WEB is active LCALL DELAYIOOus delay tPW (100us) MOV FMTIM, # ll000000b disable WEB LCALL DELAY2us delay tPR (2us) MOV FMTIM, # 00000000b clear FMTIM RET; Subroutine: Verify LOCK bits or State bit VERIFY one L one S: " Kiev BA 'MOV FMTIM, # 01000000b VPP = 5V, CEB active LCALL DELAY2us delay tVPS or iCES or tMS (2us) MOV FMTIM, # Π100000b OEB is active NOF NOP NOP NOP ONE A, B, VER1FY_LS_FAIL MOV R7, # 0xFFH;, verify LOCK or Slate bit passed SJMP END_VLS VERIFY_LS_FAIL MOV R7.A;; verify LOCK or state fail END_VLS: one MOV FMTIM, # 00000000b;; clear FMTIM RET; Subroutine: DELAY2us DELAY2us: 15 This paper standard applies to China National Standard (CNS) A4 (210 X 2 mm) I --- / ----- Installation ^ ------- Order ^ ------ (Please read the precautions on the back before filling this page) 501061 A7 B7 V. Description of Invention (\ f) Printed by PUSH IE CLR EA MOV THI. ^ OxFFH MOV TLI, # delayI MOV TCON, # 00H MOV TMOD, # 10H; TIMER1, M0DE 1 SETB TR1 ; stan TIMER l LOOPi: JNB TFI, LOOP I MOV TCON, # 00H; clear TFI and TR1 POP RET IE; Subroutine: DELAY 1 OOus DELAY 1 OOus MOV R7, # 0x32H L00P2: LCALL DELAY2us DJNZ RET R7, LOOP2; Subroutin e: DELAY500ms DELAYSOOms: PUSH CLR IE EA MOV R7, # dclay2 MOV TCON, # 00H MOV TMOD, # I0H; TIMERI, MODE I LOOP4: MOV THI, # 00H MOV TL1, # 00H SETB TR1 LOOP3: JNB TF1, LOOP3 MOV TCON, # 00H; clear TFI and TR1 DJNZ R7, LOOP4 POP IE RET; Subroutine: DELAY Is DELAY Is: LCALL DELAYSOOms LCALL RET .END DELAY500ms TABLE 3 —I- ϋϋ ϋ · — m In nl · —-—- I mi 11_1 m «ml— am TJ In ϋϋ κι I mu (Please read the notes on the back before filling this page) 16 This paper size applies to China National Standard (CNS) A4 (2 丨 0X297 mm) 501061 Central Standard of the Ministry of Economic Affairs Printed by the Consumer Cooperative of the Bureau A7 B7 V. Description of the invention 0〇>) The gist of the present invention is that the online programming code can be divided into two parts. The part of the code that is usually changed, such as the online programming communication commander. The code that must be reconfigured for various protocols is stored in the flash memory in the ROM 140 that can be programmed multiple times. body. Those parts of the online programming code that do not need to be changed, especially those that are suitable for erasing, programming, and confirming the structure of the ROM 140 that can be programmed multiple times, are stored on the area-an efficient mask ROM module 160. Referring to the first figure, the operation of the online programming program is as follows: the microcontroller 100 executes the code from the online programming communication director 142, and via one of the ports of input / output 璋 120, it is connected to the remote online programming Launcher communication. The new instruction must be downloaded to the user's code area 144 of the ROM 140, which can be programmed multiple times. The downloaded command is transmitted to the microcontroller 100 through one of the input / output ports 120. The microcontroller 100 executes the erasing, programming and confirmation codes in the mask ROM module 160, and the module 160 downloads these new codes to the ROM 140 which can be repeatedly programmed. Code area 144. The microcontroller 100 and the watchdog timer 110 operate simultaneously to detect the dead knot when the microcontroller 100 executes the online programming code. In order to allow new instructions to be programmed into the ROM 140 that can be programmed multiple times, the microcontroller 100 first erases the instructions that can be programmed multiple times by writing to the control register 152 and the timing register 154. Part of the recorded ROM0. The microcontroller 100 then writes the new code to the ROM 140, which can be programmed multiple times, via additional instructions written to the control register 152 and the timing register 154. Finally, the microcontroller __ 17 This paper size applies to the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling out this page) Printed by the Consumers Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 501061 A7 __B7 V. Description of the Invention (\ W) 100 Through a sequence of instructions written in the control register 152 and the timing register 154, it is confirmed that the new code in the ROM 140 can be burned multiple times. The second figure illustrates the address space 200 of the microcontroller 100. The address space is divided into a plurality of independent and erasable blocks of flash memory and a mask ROM block. The # 1 user block 260 extends from address 0 to 16K. The # 2 user block 250 extends from address 16K to address 32K. The # 3 user block 240 extends from address 32K to address 48K. The # 4 user block 230 extends from address 48K to address 56K. In order to download a new instruction to the user code area 144 of the ROM 140 that can be programmed multiple times. These main activation codes are used. If there is not enough space for this primary activation code, the # 4 user block 230 can be used to store auxiliary activation codes. The address space between addresses 63K and 64K contains the erase, burn, and confirm subroutines 210. Part of the address space 200 is located in the mask ROM module 160. The other parts of the address space 200 from addresses 0 to 63K are located in flash memory cells in the ROM 140, which can be programmed multiple times. Although these two portions of the address space 200 reside in different memory modules, they contain a single portion of the address space 200 for the microcontroller 100. The instructions from the mask ROM module 160 and the ROM 140 that can be repeatedly programmed are selectively switched to the microcontroller 100 via the multiplexer 130. In the embodiment shown in the first figure, only a single mask ROM module 160 and a single ROM 140 that can be programmed multiple times are shown. The convertible system includes multiple cover-type ROM modules and multiple 18-page paper sizes that can be programmed multiple times. Applicable to China National Standard (CNS) A4 specifications (210X297 mm)! IIAW ~ Binding (please read the back first) Note for re-filling this page) 501061 A7 B7 Printed by the Consumers' Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of Invention () ROM. It can even allow more flexibility in the design and implementation of online programming instructions. The second figure illustrates the application environment of the present invention. The invention is implemented in an integrated circuit 310 within the system 300. System 300 includes a printed circuit board or implementation of some other system. The integrated circuit 310 includes a microcontroller 100, a mask ROM module 160, a ROM 140 that can be programmed multiple times, and components of an online programming system. The microcontroller 100 is coupled to a plurality of integrated circuits 312, 314, and 316. The bridge 320 to the communication pipe provides a pipe through which the online programming code is transmitted. The bridge 320 to the communication channel may include a simple network port, or may include additional glue logic to make the online programming system transparent to non-online programming codes. The function of the bridge 320 to the communication channel can be changed to allow the bridge 320 to the communication channel to be coupled to various online programming communication channels with different levels of data ratio, error ratio and complexity. For example, one embodiment of the communication channel 330 includes an Internet implementation of an Internet communication protocol. Via the communication network 330, the bridge 320 to the communication channel is coupled to an online programming initiator 340, such as a personal computer or a workstation. The on-line programming initiator 340 is coupled to the large storage device 350 by a communication pipe 345. The online programming initiator 340 can be coupled to the microcontroller 100 in a number of different ways. In one embodiment, an internal circuit initiator is a global Internet site via the Internet on the communication channel 330. Can also 19_ This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the notes on the back * 4 items before filling-Packing 丨 |: Write this page) Order i # Central Bureau of Standards, Ministry of Economic Affairs Printed by Employee Consumer Cooperatives 501061 A7 B7 V. Invention Description (\ Poor) Transformed into the online programming initiator 340 acting as the initiator connected through a dial-up modem. In another embodiment, the communication pipe 330 is a communication bus in a personal computer system, and the internal circuit software is downloaded through the bus 330. In this embodiment, the upgrade to the system 300 may be distributed to end users on the floppy disk drive, otherwise it may be downloaded via the online burn initiator 340. In some applications, a bridge 320 to the communication pipeline is not required. Referring to the first figure, in some applications, including the online programming communication commander 142, which crosses the communication channel 330 through one of the input / output ports 120, is itself sufficient to implement an appropriate online programming communication protocol. Therefore, one of the input / output ports 120 can be directly connected to the communication pipe 330, so there is no need for a bridge 320 to the communication pipe. Figures 4A to 4C contain flowcharts on the operation of the online programming process. Each of the figures 4A to 4C is divided into four lines. The first line is labeled "Online Burner Starter 340", which represents the activities of the Online Burner Starter 340, as shown in the third figure. The online programming initiator 340 is an integrated circuit 310 connected to the online programming system 300 via a communication channel 330. The online programming initiator 340 starts and controls the online programming process. The remaining three lines of Figures 4A to 4C represent the behavior of the microcontroller 100 executing different theme codes. These theme codes are stored in the mask ROM module 160 and the ROM 140 which can be repeatedly programmed. The line labeled "User Code 144" represents the behavior of the microcontroller 100 when executing the user code 144 in the ROM 140, which can be programmed multiple times. Line 20 marked with "Online Burning Communication Director 142" This paper size applies to China National Standard (CNS) A4 specification (210X297 mm) '~ I-^ ----- 0 ^-(Please read first Note on the back, please fill in this page again.) Order printed by the Central Consumer Bureau of the Ministry of Economic Affairs, printed by the Consumer Cooperative 501061 A7 ____B7_ _ V. Description of the invention (^) represents the execution of the microcontroller 100 in the ROM 140, which can be programmed multiple times. The behavior when the communication director 142 is burned online. The line labeled "Erase / Burn / Confirm Director 162" represents the behavior of the microcontroller 100 when it executes the Erase / Burn / Confirm Director 162 in the mask ROM module 160. The operation of the online programming process of Figures 4A, 4B and 4C is described below. When the system is reset or when the monitoring timer 110 expires, the microcontroller 100 enters state 430, and a status bit is checked in this state. If the status bit is 0, the microcontroller 100 enters the user code. Within step 420. If the status bit is set to 1, the microcontroller 100 jumps to the position pointed by the start vector, and then executes step 440 of programming the communication director 142 online. In step 420, the microcontroller 100 waits for the online programming initiator 340 to obtain the next instruction therein. When the online programming initiator 340 executes step 400, it sends an updated instruction to the microcontroller 100. After the updated instruction is received by the microcontroller 100, the microcontroller 100 is forced to proceed to step 421. In step 421, the microcontroller 100 asks whether the received instruction is an updated instruction. If not, the micro-controller 100 proceeds to step 426. In this step 420, after the micro-controller 100 operates normally, the user code written off-line is executed. The system then returns to step 420 to obtain the next instruction. If it is an update command, the microcontroller 100 proceeds to step 422, in which a "request for confirmation (reciues t t conf i rm)" is sent to the online programming initiator 340. After performing step 400, the online burning starter 340 performs 21 papers that are again applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) I installed I ordered I (Please read the precautions on the back before filling this page) Printed by the Employees' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 501061 A7 __B7_ V. Description of the invention (> 々) Go to step 401. In this step, the online programming initiator 340 waits for a confirmation request. When the confirmation request instruction is received, the online programming initiator 340 proceeds to step 402, in which a confirmation instruction is sent to the microcontroller 100. In step 423, the microcontroller 100 receives the confirmation instruction, and then proceeds to step 445 in the online programming communication director 142. In this step, the microcontroller 100 transmits a "ready to online programming" instruction The starter 340 is burned online. After issuing the confirmation instruction, the online programming initiator 340 proceeds to step 403. In this step, the online programming initiator 340 waits for a "ready to online programming" instruction from the microcontroller 100. If the status bit is set to 1 in step 430, the microcontroller 100 performs a set of steps to confirm the online programming request in the online programming communication director 142. This set of steps corresponds almost to those steps that are used to confirm that the required programming into the user code 144 is mirror reflection when the status bit is set to zero. In step 440, the microcontroller 100 waits for the next instruction from the online programming initiator 340. When the online programming initiator executes step 400, it transmits an updated instruction to the microcontroller 100. When the microcontroller 100 receives the update instruction in step 400, it proceeds to step 441. In this step, the microcontroller 100 determines whether the instruction is an updated instruction. If not, the microcontroller 100 proceeds to step 442. In this step, no operation (N00P) occurs. The microcontroller 100 then returns to step 440 to receive another instruction. __ 22 This paper size applies Chinese National Standard (CNS) A4 specification (2) 0X297 mm. ---- ^ ----- 0 ^-(Please read the precautions on the back before filling in this page)

、1T 501061 A7 B7 五、發明説明(il) 假如在步驟441中,微控制器100收到一個更新指 令,則進行到步驟443,在此步驟中,微控制器100傳送 一個確認要求的指令給線上燒錄啓始器340。在線上燒錄 啓始器340執行步驟400後,該啓始器進行到步驟401, 以等候一個確認指令。一但收到來自微控制器1〇〇的確認 指令,線上燒錄啓始器340進行到步驟402,在此步驟中, 該啓始器傳送一個確認指令給微控制器100。微控制器 100執行步驟443後,進行到步驟444,以等候來自線上 燒錄啓始器340的確認指令。微控制器100—但收到該確 認指令後,進行到步驟445。在此步驟中,微控制器100 傳送一個“就緒至線上燒錄”的指令給線上燒錄啓始器 340。線上燒錄啓始器340執行步驟402後,進行到步驟 403,以等候來自微控制器100之就緒至線上燒錄的指 令。 經濟部中央標準局員工消費合作社印製 (請先閲讀背面之注意事項再填寫本頁) 至此,線上燒錄指令的確認程序完成了,然後,發 生下載新的使用者碼。線上燒錄啓始器340在執行步驟 403後,進行到步驟404。在此步驟中,線上燒錄啓始器 340通過通訊管道330,以加密(encrypted )格式將新 的使用者碼下載到微控制器100。在步驟446,微控制器 100收到該新的使用者碼,然後將該資料格式解密 (decrypt)。微控制器1〇〇執行步驟446後,進行到步驟 447。在此步驟中,送出一個核對和(check sum)給線上燒 錄啓始器340。線上燒錄啓始器340在執行步驟404後, __ 23_ ^紙張尺度適用中國國家標^ ( CNS ) A4規格(210X297公釐) 501061 A7 ___B7_ 五、發明説明(>” 進行到步驟405,以等候該核對和。收到該核對和後,線 上燒錄啓始器340進行到步驟406,以確認收到的核對和 與送到微控制器100的碼的微控制器100是否一致。假如 核對和沒有一致的話,線上燒錄啓始器340進行到步驟 408,此步驟爲終點狀態,並且產生錯誤旗標。假如核對 和的話,線上燒錄啓始器340進行到步驟407,以發出一 個“繼續進行(go ahead)”的指令。微控制器100在步驟 447送出核對和後,進行到步驟448,以等候該繼續進行 的指令。 經濟部中央標準局員工消費合作社印製 (請先閱讀背面之注意事項再填寫本頁) 一當收到來自線上燒錄啓始器340之繼續進行的指 令後,微控制器100繼續進行到步驟449,在此步驟中, 開始線上燒錄處理。在步驟449中,微控制器100燒錄及 確認啓動向量,並且令狀態位元1,以指示一個線上燒錄 運算正在發生。然後,微控制器100確認狀態位元爲設定 値後,設定並啓動監視計時器110。接著,微控制器100 進行到步驟450,以呼叫來自抹除/燒錄/確認指揮器162 的抹除副程式。然後,又進行到抹除/燒錄/確認指揮器 162內的步驟460,在此步驟中,微控制器100抹除在可 被多次燒錄的ROM 140裡的特定區塊。之後,微控制器 1〇〇進行到線上燒錄通訊指揮器142內的步驟451。在步 驟451,微控制器100呼叫來自抹除/燒錄/確認指揮器 162的確認位元組副程式。微控制器然後進行到步驟 461,以執行該確認位元組副程式。接著,微控制器1〇〇 24 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 501061 A7 ___B7__ 五、發明説明(yb) 進行到在線上燒錄通訊指揮器142內的步驟452。在步驟 452,微控制器100決定抹除運作的確認是否已經完成。 假如沒有,則返回至步驟451以確認其後的位元組。假如 是的話,微控制器100進行到步驟453,以傳送一個抹除 OK指令給線上燒錄啓始器340。線上燒錄啓始器340在 執行步驟407之後,進行到步驟409,以等候一個抹除OK 的指令。收到該抹除OK的指令後,線上燒錄啓始器340 進行到步驟410,以等候來自微控制器100的燒錄OK的 指令。 經濟部中央標準局員工消費合作社印製 (請先閲讀背面之注意事項再填寫本頁) 微控制器100在步驟453發出該抹除OK的指令後, 進行到步驟454以呼叫來自抹除/燒錄/確認指揮器162 的燒錄位元組副程式,然後進行到步驟4 6 2以執行燒錄位 元組副程式。接下來,前進到線上燒錄通訊指揮器142 內的步驟455。在步驟455微控制器100決定是否已經完 成燒錄。假如沒有,微控制器100則返回至步驟454,呼 叫程式位元組指令,以使其後的位元組被燒錄。假如該 燒錄處理完畢,則微控制器100進行到步驟456,以呼叫 確認位元組副程式。然後,微控制器100進行到抹除/燒 錄/確認指揮器162內的步驟463的確認位元組副程式。 在步驟463,執行確認位元組副程式。微控制器100進行 到線上燒錄通訊指揮器142內的步驟457。在步驟457, 微控制器100決定確認運作是否已經完成。假如不是的 話,微控制器100則返回至步驟456,呼叫確認位元組指 25___ 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 501061 Α7 Β7 五、發明説明 令,以使其後的位元組被確認。假如該確認運作已經完 成,則微控制器100進行到步驟458。在步驟458時,完 成線上燒錄之燒錄和確認運作。微控制器100設定狀態位 元爲0,並確定該狀態位元爲0,然後關掉監視計時器 110。接著,微控制器100進行到步驟459,以發出一個 程式ΟΚ指令給線上燒錄啓始器340。線上燒錄啓始器340 在步驟410收到該燒錄ΟΚ指令之後,進行到步驟411, 傳送一個復歸指令給微控制器100。微控制器100在步驟 459發出一個燒錄ΟΚ指令後,進行到在使用者碼144內 的步驟424,以等候一個復歸指令。當從線上燒錄啓始器 340收到復歸指令,微控制器100進行到終端狀態的步驟 425。在步驟411發出復歸指令後,線上燒錄啓始器340 也是終端狀態的步驟412。此時,線上燒錄處理程序完 成。當新的線上燒錄處理程序被線上燒錄啓始器340重新 啓始時,該線上燒錄程序將再重覆。 經濟部中央標準局員工消費合作社印製 ---------裝·-- (請先閲讀背面之注意事項再填寫本頁) 利用第一圖之架構,系統的設計者可以採用線上燒 錄碼到特殊的環境。所以,製造商選取一種積體電路, 如第一圖所示,以便實施在其電路裡。假如該線上燒錄 碼尙未就緒,則利用微控制器100和晶元300上可使用的 各種通訊埠來使配合特殊的環境的系統,其電路板需要 的額外的邏輯減至最少。首先,設計者爲線上燒錄選取 適當的聯結和協定。其次,發展和改良選取的環境的線 上燒錄碼。然後,在系統的正常運作期間,讓線上燒錄 ___26___ 本紙張尺度適用中國國家標準(CNS ) Α4規格(210X297公釐) 501061 經濟部中央標準局員工消費合作社印製 A7 B7 五、發明説明 (vS) 碼與將被執行的燒錄程式積體。接下來,將積體的線上 燒錄碼和使用者碼儲存於可被多次燒錄的ROM 140裡的快 閃記憶體內。然後,確認抹除和燒錄的運作。之後,將 微控制器100,包括積體的線上燒錄碼,置放於系統內。 接著,執行和測試該線上燒錄碼。假如系統運作得很好, 則大量生產該系統。假如線上燒錄碼需要修改,則重覆 線上燒錄程序來使該線上燒錄碼最佳化。同樣的,利用 相同的燒錄處理技術,將系統碼最佳化。利用本發明之 交談式的線上燒錄處理技術,系統的終端使用者所以可 得到深留在控制器100內的健全的線上燒錄碼。該燒錄碼 可以隨即更新和修正。 結語 本發明提供一種適用於各種線上燒錄處理應用的有 彈性的快閃記憶體-基礎微控制器架構。例如,電視或轉 訊監控器,數位視訊軟碟或光碟ROM,遠端的控制裝置或 機動的電話可以包括具有本發明之線上燒錄架構的微控 制器。利用本發明之有彈性的架構,更新的線上燒錄碼 的各種來源則可以被下載到各別的裝置上。本發明所以 可以對特殊的應用環境作修正和調整。爲了支援線上燒 錄結構,幾乎不須膠黏邏輯。甚且,結合線上燒錄的微 控制器的電源可以有槓桿作用,以簡化線上燒錄系統之 27 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 會ΜΜΜΜΜ· Μ······· ΜΜΜΗΜΙ· ΜΜ·Μ·Μ·> "mi (_i (請先閲讀背面之注意事項再填寫本頁) 訂 501061 A7 B7 五、發明説明(4) 快閃記憶體的設計。 藉由儲存線上燒錄碼的積體電路規格部份於罩幕式 ROM細胞單元的有效率積體電路,保護積體電路上的積體 電路的佔有面積。這部份的碼不可能變更。那些可能經 常被更改的線上燒錄碼的其他部份,如通訊指揮器,則 被保留在快閃記憶體內。如此,該線上燒錄系統可以有 彈性地塑造到不同的應用環境,而減少被線上燒錄系統 佔據的積體電路積體電路。 以上係本發明之較佳實施例的圖說、詳細說明以及 與習知技術之檢驗數據的比較。唯,以上所述者,僅爲 本發明之較佳實施例而已,當不能以此限定本發明實施 之範圍。即大凡依本發明申請專利範圍所作之均等變化 與修飾,皆應仍屬本發明專利涵蓋之範圍內。 裝 訂— (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 28 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐)1T 501061 A7 B7 V. Description of the Invention (il) If the microcontroller 100 receives an update instruction in step 441, it proceeds to step 443. In this step, the microcontroller 100 transmits a confirmation request instruction to Online starter 340. After the initiator 340 is executed online, the initiator 340 proceeds to step 401 to wait for a confirmation instruction. Upon receiving the confirmation command from the microcontroller 100, the online programming initiator 340 proceeds to step 402. In this step, the initiator transmits a confirmation instruction to the microcontroller 100. After the microcontroller 100 executes step 443, it proceeds to step 444 to wait for a confirmation command from the online programming initiator 340. Microcontroller 100—but after receiving the confirmation instruction, proceed to step 445. In this step, the microcontroller 100 sends a “Ready to Online Programming” command to the online programming initiator 340. After the online programming initiator 340 executes step 402, it proceeds to step 403 to wait for the ready-to-online programming instruction from the microcontroller 100. Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling this page) At this point, the confirmation process of the online programming instruction is completed, and then a new user code is downloaded. After the online programming initiator 340 executes step 403, it proceeds to step 404. In this step, the online programming initiator 340 downloads the new user code to the microcontroller 100 in an encrypted format through the communication channel 330. In step 446, the microcontroller 100 receives the new user code, and then decrypts the data format. After the microcontroller 100 executes step 446, it proceeds to step 447. In this step, a check sum is sent to the online programming initiator 340. After the online programming initiator 340 executes step 404, __ 23_ ^ paper size applies Chinese national standard ^ (CNS) A4 specification (210X297 mm) 501061 A7 ___B7_ V. Description of the invention (>) Proceed to step 405 to Wait for the checksum. After receiving the checksum, the online flash initiator 340 proceeds to step 406 to confirm whether the received checksum is consistent with the microcontroller 100 of the code sent to the microcontroller 100. If the checksum If there is no agreement, the online programming initiator 340 proceeds to step 408, this step is the end state, and an error flag is generated. If the check is checked, the online programming initiator 340 proceeds to step 407 to issue a " Go ahead "instruction. After the microcontroller 100 sends a checksum at step 447, it proceeds to step 448 to wait for the instruction to continue. Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the back first) (Please note this page before filling in this page.) Upon receiving the instruction to continue from the online programming initiator 340, the microcontroller 100 proceeds to step 449. In this step, start the online Programming process. In step 449, the microcontroller 100 programs and confirms the startup vector, and sets the status bit 1 to indicate that an online programming operation is taking place. Then, the microcontroller 100 confirms that the status bit is set. After that, the watchdog timer 110 is set and started. Then, the microcontroller 100 proceeds to step 450 to call the erase subroutine from the erase / burn / confirm director 162. Then, it proceeds to the erase / burn / Confirm step 460 in the director 162. In this step, the microcontroller 100 erases a specific block in the ROM 140 that can be programmed multiple times. After that, the microcontroller 100 proceeds to online programming. Step 451 in the communication director 142. In step 451, the microcontroller 100 calls the confirmation byte subroutine from the erase / flash / confirm director 162. The microcontroller then proceeds to step 461 to perform the confirmation Byte subroutine. Next, the micro controller 10024 applies the Chinese National Standard (CNS) A4 specification (210X297 mm) 501061 A7 ___B7__ V. Description of the invention (yb) The communication command is programmed online In the device 142 Step 452. At step 452, the microcontroller 100 determines whether the confirmation of the erasing operation has been completed. If not, it returns to step 451 to confirm the subsequent bytes. If so, the microcontroller 100 proceeds to step 453. To send an erase OK command to the online burning initiator 340. After performing step 407, the online burning initiator 340 proceeds to step 409 to wait for an erase OK command. The erase OK is received After the instruction, the online programming initiator 340 proceeds to step 410 to wait for the instruction of programming OK from the microcontroller 100. Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling out this page). After the microcontroller 100 issues the erase OK instruction in step 453, it proceeds to step 454 to call the erase / burn Record / confirm the programming byte subroutine of the director 162, and then proceed to step 4 2 to execute the programming byte subroutine. Next, proceed to step 455 in the online programming communication director 142. The microcontroller 100 determines in step 455 whether the programming has been completed. If not, the microcontroller 100 returns to step 454 to call the program byte instruction so that the following bytes are programmed. If the programming process is completed, the microcontroller 100 proceeds to step 456 to call the confirmation byte subroutine. The microcontroller 100 then proceeds to the confirm byte subroutine of step 463 in the erase / burn / confirm command 162. At step 463, the confirm byte subroutine is executed. The microcontroller 100 proceeds to step 457 in the online programming communication director 142. In step 457, the microcontroller 100 decides whether the confirmation operation has been completed. If it is not, the microcontroller 100 returns to step 456, and the call confirmation byte refers to 25___ This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) 501061 Α7 Β7 V. Instruction order to make it The following bytes are confirmed. If the confirmation operation has been completed, the microcontroller 100 proceeds to step 458. At step 458, the burning and confirming operation of the online burning is completed. The microcontroller 100 sets the status bit to 0, determines that the status bit is 0, and then turns off the watchdog timer 110. The microcontroller 100 then proceeds to step 459 to issue a program OK command to the online programming initiator 340. After receiving the programming OK command in step 410, the online programming initiator 340 proceeds to step 411 and sends a reset command to the microcontroller 100. After the microcontroller 100 issues a programming OK command in step 459, it proceeds to step 424 in the user code 144 to wait for a reset command. When the reset command is received from the online programming initiator 340, the microcontroller 100 proceeds to the terminal state step 425. After the reset instruction is issued in step 411, the online burning initiator 340 is also the terminal state in step 412. At this point, the online programming process is complete. When the new online programming process is restarted by the online programming initiator 340, the online programming process will be repeated again. Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs --------- Installation-- (Please read the precautions on the back before filling this page) Using the structure of the first picture, the system designer can use online Burn code to special environment. Therefore, the manufacturer chooses an integrated circuit as shown in the first figure in order to implement it in its circuit. If the online programming code is not ready, the various communication ports available on the microcontroller 100 and the wafer 300 are used to minimize the additional logic required by the circuit board of the system for special environments. First, the designer selects the appropriate connections and protocols for online programming. Second, develop and improve on-line programming codes for selected environments. Then, during the normal operation of the system, let the online burning ___26___ This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) 501061 Printed by the Consumers Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention ( vS) code and the programming program to be executed. Next, the integrated online programming code and user code are stored in a flash memory in the ROM 140 that can be programmed multiple times. Then, confirm the operation of erasing and burning. After that, the microcontroller 100, including the integrated online programming code, is placed in the system. Then, execute and test the online programming code. If the system works well, mass produce the system. If the online programming code needs to be modified, repeat the online programming procedure to optimize the online programming code. Similarly, the system code is optimized by using the same programming processing technology. Using the interactive online programming processing technology of the present invention, the end user of the system can thus obtain a sound online programming code that is deep within the controller 100. The flash code can be updated and corrected immediately. Conclusion The present invention provides a flexible flash memory-based microcontroller architecture suitable for a variety of online flash processing applications. For example, a television or transponder monitor, a digital video floppy disk or a compact disc ROM, a remote control device or a mobile phone may include a microcontroller having an online programming architecture of the present invention. Utilizing the flexible architecture of the present invention, various sources of updated online programming codes can be downloaded to individual devices. Therefore, the invention can modify and adjust the special application environment. To support online programming structures, there is almost no need to glue logic. Furthermore, the power of the microcontroller combined with online programming can be leveraged to simplify the online programming system. The 27 paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm). MMMMM · M ··· ···· ΜΜΜΗΜΙ · ΜΜ · Μ · Μ · > " mi (_i (Please read the notes on the back before filling this page) Order 501061 A7 B7 V. Description of the invention (4) Design of flash memory. The integrated circuit specification part of the programming code stored on the line is used in the efficient integrated circuit of the mask ROM cell to protect the area occupied by the integrated circuit on the integrated circuit. This part of the code cannot be changed. Other parts of the online programming code that may be frequently changed, such as the communication commander, are retained in the flash memory. In this way, the online programming system can be flexibly shaped to different application environments and reduce The integrated circuit occupied by the online programming system. The above is a diagram of the preferred embodiment of the present invention, a detailed description, and a comparison with the test data of the conventional technology. It is only the preferred embodiment of the present invention, when the scope of implementation of the present invention cannot be limited by this. That is, all equal changes and modifications made in accordance with the scope of the patent application of the present invention should still fall within the scope of the invention patent. Read the notes on the back and fill in this page) Printed by the Central Consumers Bureau of the Ministry of Economic Affairs, Consumer Cooperatives 28 This paper size applies to China National Standard (CNS) A4 (210X297 mm)

Claims (1)

501061 經濟部中央標準局員工消費合作社印製 A8 B8 C8 D8 六、申請專利範圍 1· 一種積體電路的線上燒錄處理裝置,包含: 一處理器,位於積體電路上,用來執行指令; 一外部埠,位於積體電路上,經由該埠接收來自外部 來源的資料; 一第一記憶體陣列,包含積體電路上的非揮發性記憶 體細胞單元,該陣列儲存要被該處理器執行的指令, 該指令包括有,用來控制自外部來源之傳送指令到積 體電路的那些控制指令,該傳送經由外部埠;以及, 一第二記憶體陣列,位於積體電路上,該陣列儲存被 該處理器執行的指令,該指令包括有一組指令,用來 控制在抹除、燒錄和確認記憶體第一陣列裡的指令的 那些線上燒錄處理步驟。 2 ·如專利申請範圍第1項所述之積體電路的線上燒錄處 理裝置,其中之第一記憶體陣列裡的非揮發性記憶體 細胞單元包含複數個浮閘記憶體細胞單元。 3·如專利申請範圍第1項所述之積體電路的線上燒錄處 理裝置,其中之第二記憶體陣列包含複數個非揮發性 記憶體細胞單元。 4 ·如專利申請範圍第1項所述之積體電路的線上燒錄處 理裝置,其中之第二記憶體陣列包含複數個罩幕式唯 讀記憶體細胞單元。 本紙張尺度適用中國國家檬準(CNS ) Α4規格(210 X 297公釐) 111_------- (請先閱讀背面之注意事項再填寫本頁) 、τ ·# 501061 A8 B8 C8 D8 經濟部中央標準局員工消費合作社印製 六、申請專利範圍 5·如專利申請範圍第1項所述之積體電路的線上燒錄處 理裝置,其中之第二記憶體陣列包含複數個浮閛記憶 體細胞單元。 6·如專利申請範圍第1項所述之積體電路的線上燒錄處 理裝置,其中之抹除、燒錄和確認該記憶體第一陣列 裡的運作程序,係由一組被該處理器執行的指令所控 制。 7·如專利申請範圍第1項所述之積體電路的線上燒錄處 理裝置,其中之抹除、燒錄和確認該記憶體第一陣列 裡的運作程序,係由一組被該處理器執行並且儲存於 該第二記憶體陣列裡的罩幕式唯讀記憶體細胞單元 的指令來控制。 8. 如專利申請範圍第6項所述之積體電路的線上燒錄處 理裝置,其中該處理器經由一控制暫存器,來控制關 於第一記憶體陣列的抹除、燒錄和確認的運作,且該 控制暫存器與第一記憶體陣列耦合。 9. 如專利申請範掘第1項所述之積體電路的線上燒錄處 理裝置,其中關於第一記憶體陣列的抹除、燒錄和確 認的運作的時序,係由一包含在該處理器的計時器來 控制。 10. 如專利申請範圍第1項所述之積體電路的線上燒錄 處理裝置,其中關於第一記憶體陣列的抹除、燒錄和 確認的運作的時序,係由一組被該處理器執行的指令 (請先聞讀背面之注意事項再填寫本頁) Φ— 項再填* 裝· -、tT 本紙張尺度適用中國國家標準(CNS ) A4規格(210Χ29<7公釐) 501061 經濟部中央標準局員Η消費合作社印製 A8 B8 C8 D8 申請專利範圍 來控制。 11·如專利申請範圍第1項所述之積體電路的線上燒錄 處理裝置,其中關於第一記憶體陣列的抹除、燒錄和 確認的運作的時序,係由一組被該處理器執行並且儲 存在該第二記憶體陣列裡的罩幕式唯讀記憶體細胞 單元的指令來控制。 12·如專利申請範圍第1項所述之積體電路的線上燒錄 處理裝置,更包括一個與該處理器耦合的監視計時 器,在該線上燒錄處理器執行程式處理指令的期間, 如有錯誤發生,該計時器會啓動復原程序。 13.如專利申請範圍第1項所述之積體電路的線上燒錄 處理裝置,其中之第一記憶體陣列包含複數個分開來 而可被獨立抹除的非揮發性記憶體細胞單元的區 塊。 14·如專利申請範圍第1項所述之積體電路的線上燒錄 處理裝置,其中之外部埠包含一個串列埠。 15·如專利申請範圍第1項所述之積體電路的線上燒錄 處理裝置,其中之外部埠包含一個平行埠。 16·如專利申请範圍第1項所述之積體電路的線上燒錄 處理裝置,其中之外部埠可被組織化而運作成爲一平 行埠或串列璋。 17 ·如專利申請範圍第1項所述之積體電路的線上燒錄處 理裝置,包括複數個連結至外部資料來源的埠,該複 本紙張尺度適用中國國家標準(CNS ) a4規格(210Χ297公釐) 7IJ----_菸1-------订----- (請先閲讀背面之注意事項存填寫本買) 501061 經濟部中央標準局員工消費合作社印製 A8 B8 C8 _ D8々、申請專利範圍 數個埠中那些是被用來作爲線上燒錄所需之外部 埠’係由控制該線上燒錄步驟的一組指令中的指令所 決定。 18. —種積體電路的線上燒錄處理裝置,包含: 一處理器,位於積體電路上,用來執行指令; 一外部璋,位於積體電路上,經由該埠接收來自外部 來源的資料; 一第一記憶體陣列,包含積體電路上的浮閘記憶體細 胞單元,該陣列儲存要被該處理器執行的指令,該指 令包括有,用來控制自外部來源傳送指令到積體電路 的那些控制指令,該傳送經由外部埠; 一第二記憶體陣列,包含位於積體電路上的罩幕式唯 讀記憶體細胞單元,該陣列儲存被該處理器執行的指 令,該指令包括有一組指令,用來控制、排序和安排 時序,以達成線上抹除、燒錄和確認第一記憶體陣列 裡的指令;以及, 一控制暫存器,與第一記憶體陣列耦合,該處理器經 由此控制暫存器,來控制關於第一記憶體陣列的抹 除、燒錄和確認的運作。 19. 如專利申請範圍第18項所述之積體電路的線上燒錄 處理裝置,更包括一個與該處理器耦合的監視計時 器,在該線上燒錄處理器執行處理燒錄指令的期間, 如有錯誤發生,該計時器會啓動復原程序。 32 (請先聞讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) A4規格(210 X 297公釐) 經濟部中央標準局貞工消費合作社印製 501061 A8 Βδ C8 ___ D8 ^、申請專利範圍 20·如專利申請範圍第18項所述之積體電路的線上燒錄 處理裝置’其中之第一記憶體陣列包含複數個分開來 而可獨立被抹除的非揮發性記憶體細胞單元的區 frft 塊。 21·如專利申請範圍第18項所述之積體電路的線上燒錄 處理裝置,其中之外部埠包含一個串列埠。 22·如專利申請範圍第18項所述之積體電路的線上燒錄 處理裝置,其中之外部埠包含一個平行埠。 23·如專利申請範圍第18項所述之積體電路的線上燒錄 處理裝置,其中之外部埠可被組織化而運作成爲一平 行璋或串列埠。 24.如專利申請範圍第18項所述之積體電路的線上燒錄 處理裝置,包括複數個至外部資料來源的埠,該複數 個埠中那些是被用來作爲線上燒錄所需之外部埠,係 由控制該線上燒錄步驟的一組指令中的指令所決 定。 25· —種積體電路的線上燒錄處理方法,其中該積體電 路包括一處理器和一外部埠,該方法包含下列步驟: 在該積體電路上提供一包含非揮發性記憶體細胞單 元之第一記憶體陣列,和一第二記憶體陣列; 該積體電路接收一個來自在外部啓始器的線上燒錄 指令; 33 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閲讀背面之注意事項再填寫本頁) -裝· 訂 501061 ABCD 經濟部中央榡準局員工消費合作社印製 六、申請專利範圍 回應該線上燒錄指令,並利用該處理器執行一組指 令,來控制在抹除、燒錄和確認第一記憶體陣列裡的 那些線上燒錄處理步驟;以及, 利用該線上燒錄處理器執行一組來自第一記憶體陣 列的指令,來控制自外部來源之傳送指令到積體電 路,並控制該傳送經由該外部埠。 26·如專利申請範圍第25項所述之積體電路的線上燒錄 處理方法,其中用來控制在抹除、燒錄和確認第一記 憶體陣列裡的那些線上燒錄處理步驟中的該組指令 係儲存於第二記憶體陣列裡。 27.如專利申請範圍第25項所述之積體電路的線上燒錄 處理方法,其中之第一記憶體陣列裡的非揮發性記憶 體細胞單元包含複數個浮閘記憶體細胞單元。 28·如專利申請範圍第25項所述之積體電路的線上燒錄 處理方法,其中之第二記憶體陣列包含複數個罩幕式 唯讀記憶體細胞單元。 29·如專利申請範圍第25項所述之積體電路的線上燒錄 處理方法,其中之第二記憶體陣列包含複數個非揮發 性記憶體細胞單元。 30.如專利申請範圍第25項所述之積體電路的線上燒錄 處理方法,其中之第二記憶體陣列包含複數個浮閘記 憶體細胞單元。· 尽*·.氏張尺度適用中國國家標準(CNS〉A4規格(210X297公釐) (請先聞讀背面之注意事項再填寫本頁) 501061 經濟部中央標準局員工消費合作社印製 A8 B8 C8 D8 六、申請專利範圍 31·如專利申請範圍第25項所述之積體電路的線上燒錄 處理方法,其中關於第一記憶體陣列的抹除、燒錄和 確認的運作的程序,係由一組被該處理器執行的指令 來控制。 32.如專利申請範圍第25項所述之積體電路的線上燒錄 處理方法,其中該處理器經由一控制暫存器,來控制 關於第一記憶體陣列的抹除、燒錄和確認的運作,且 該控制暫存器與第一記憶體陣列耦合。 33·如專利申請範圍第25項所述之積體電路的線上燒錄 處理方式,其中關於第一記憶體陣列的抹除、燒錄和 確認的運作的時序,係由一包含在該處理器的計時器 來控制。 34·如專利申請範圍第25項所述之積體電路的線上燒錄 處理方式,其中關於第一記憶體陣列的抹除、燒錄和 確認的運作的時序,係由一組被該處理器執行的指令 來控制。 35.如專利申請範圍第25項所述之積體電路的線上燒錄 處理方法,包括一個與該處理器耦合的監視計時器, 在該線上燒錄處理器執行燒錄處理指令的期間,如有 錯誤發生,該計時器會啓動復原程序。 36·如專利申請範圍第25項所述之積體電路的線上燒錄 處理方法,其中之第一記憶體陣列包含複數個分開來 而可獨立被抹除的非揮發性記憶體細胞單元的區 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐〉 "ΤΤΊ;-----φ-裝------訂------MW (請先閲讀背面之注意事項再填寫本頁) 501061 Α8 Β8 C8 D8 々、申請專利範圍. i4±3 塊。 37. 如專利申請範圍第25項所述之積體電路的線上燒錄 處理方法,其中之外部埠包含一個串列埠。 38. 如專利申請範圍第25項所述之積體電路的線上燒錄 處理方法,其中之外部埠包含一個平行埠。 39. 如專利申請範圍第25項所述之積體電路的線上燒錄 處理方法,其中之外部埠可被組織化而運作成爲一平 行埠或串列埠。 40·如專利申請範圍第25項所述之積體電路的線上燒錄 處理方法,其中該積體電路包括複數個至外部資料來 源的埠,並且更包括一步驟: 該璋中用爲外部埠者,係由利用該處理器來執行指令 的一組指令所決定,該組指令並控制該線上燒錄所需 \ 的步驟。 (請先聞讀背面之注意事項再填寫本頁) •裝^------訂I --- 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) Α4規格(2i〇X297公釐)501061 Printed by A8 B8 C8 D8 of the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 6. Application for patents 1. An on-line programming device for integrated circuits, including: a processor, located on the integrated circuits, for executing instructions; An external port is located on the integrated circuit and receives data from an external source through the port; a first memory array includes non-volatile memory cell units on the integrated circuit, and the array stores to be executed by the processor The instructions include those controlling instructions for controlling transmission instructions from an external source to the integrated circuit, the transmission being via an external port; and, a second memory array located on the integrated circuit, the array storing The instructions executed by the processor include a set of instructions for controlling the online programming processing steps of erasing, programming and confirming the instructions in the first array of memory. 2. The on-line flash processing device of the integrated circuit according to item 1 of the scope of patent application, wherein the non-volatile memory cell unit in the first memory array includes a plurality of floating gate memory cell units. 3. The on-line flash processing device of the integrated circuit according to item 1 of the scope of patent application, wherein the second memory array includes a plurality of non-volatile memory cell units. 4. The on-line flash processing device of the integrated circuit according to item 1 of the patent application scope, wherein the second memory array includes a plurality of mask-type read-only memory cell units. This paper size applies to China National Standard (CNS) Α4 specification (210 X 297 mm) 111 _------- (Please read the precautions on the back before filling this page), τ · # 501061 A8 B8 C8 D8 Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. 6. Application for a patent scope. 5. An on-line programming device for integrated circuits as described in item 1 of the patent application scope. Somatic cell unit. 6. The on-line programming device for integrated circuits as described in item 1 of the scope of patent application, wherein erasing, programming and confirming the operating procedures in the first array of the memory are performed by a group of processors Controlled by executed instructions. 7. The on-line programming device for integrated circuits as described in item 1 of the scope of patent application, wherein erasing, programming and confirming the operating procedures in the first array of the memory are performed by a group of processors Controlled by instructions of the mask-type read-only memory cell unit executed and stored in the second memory array. 8. The on-line flash processing device of the integrated circuit according to item 6 of the patent application scope, wherein the processor controls the erasing, programming and confirmation of the first memory array via a control register. And the control register is coupled to the first memory array. 9. The on-line programming processing device of the integrated circuit according to item 1 of the patent application, wherein the timing of the operation of erasing, programming, and confirming the first memory array is included in the processing. Timer to control. 10. The on-line flash processing device of the integrated circuit according to item 1 of the patent application scope, wherein the timing of the operation of erasing, flashing and confirming the first memory array is performed by a group of processors Instructions executed (please read the precautions on the reverse side and fill in this page) Φ— items and then fill in * pack,-, tT This paper size is applicable to China National Standard (CNS) A4 specification (210 × 29 < 7 mm) 501061 Ministry of Economic Affairs The members of the Central Bureau of Standards and the Consumer Cooperative printed A8, B8, C8, and D8 patent scopes to control. 11. The on-line programming device for integrated circuits as described in the first item of the scope of patent application, wherein the timing of the operation of erasing, programming and confirming the first memory array is performed by a group of processors Controlled by instructions of the mask-type read-only memory cell unit executed and stored in the second memory array. 12. The on-line programming processing device for integrated circuits as described in item 1 of the scope of patent application, further comprising a watchdog timer coupled to the processor, during which the programming processor executes program processing instructions, If an error occurs, the timer will start the recovery process. 13. The on-line flash processing device of the integrated circuit as described in item 1 of the scope of patent application, wherein the first memory array includes a plurality of areas of non-volatile memory cell units that are separated and can be independently erased. Piece. 14. The on-line programming processing device for integrated circuits as described in item 1 of the scope of patent application, wherein the external port includes a serial port. 15. The on-line programming device for integrated circuits as described in item 1 of the scope of patent application, wherein the external port includes a parallel port. 16. The on-line programming processing device for integrated circuits as described in item 1 of the scope of patent applications, wherein the external ports can be organized to operate as a parallel port or a serial port. 17 · On-line programming device for integrated circuits as described in item 1 of the scope of patent application, including multiple ports connected to external data sources, the paper size of the copy is applicable to Chinese National Standard (CNS) a4 specifications (210 × 297 mm ) 7IJ ----_ Smoke 1 ------- Order ----- (Please read the precautions on the back and fill in this purchase) 501061 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs A8 B8 C8 _ D8. The number of patent application ports which are used as external ports required for online programming is determined by the instructions in a set of instructions that control the online programming steps. 18. —An on-line programming device for integrated circuits, including: a processor located on the integrated circuit for executing instructions; an external frame located on the integrated circuit and receiving data from external sources through the port A first memory array, including floating gate memory cell units on the integrated circuit, the array storing instructions to be executed by the processor, the instructions including: used to control transmission of instructions from an external source to the integrated circuit Those control instructions are transmitted through an external port. A second memory array includes a mask-type read-only memory cell unit located on the integrated circuit. The array stores instructions executed by the processor. The instructions include a A set of instructions for controlling, sorting, and arranging timings to achieve online erasing, programming, and confirming instructions in the first memory array; and a control register coupled to the first memory array, the processor The control register is thus used to control the operation of erasing, programming and confirming the first memory array. 19. The on-line programming processing device of the integrated circuit described in item 18 of the scope of patent application, further comprising a monitoring timer coupled to the processor, during which the on-line programming processor executes processing programming instructions, If an error occurs, the timer will start the recovery process. 32 (Please read the notes on the reverse side before filling out this page) This paper size applies the Chinese National Standard (CNS) A4 size (210 X 297 mm) Printed by Zhenong Consumer Cooperative, Central Standards Bureau, Ministry of Economic Affairs, 501061 A8 Βδ C8 ___ D8 ^ Application for patent scope 20 · The on-line programming device for integrated circuits as described in item 18 of the patent application scope 'wherein the first memory array includes a plurality of nonvolatile non-volatile and separately erasable Zone frft blocks of memory cell units. 21. The on-line programming processing device for integrated circuits according to item 18 of the scope of patent application, wherein the external port includes a serial port. 22. The on-line programming device for integrated circuits as described in item 18 of the scope of patent application, wherein the external port includes a parallel port. 23. The on-line programming processing device for integrated circuits as described in item 18 of the scope of patent application, wherein the external port can be organized to operate as a parallel port or a serial port. 24. The on-line programming processing device for integrated circuits as described in item 18 of the scope of patent application, including a plurality of ports to external data sources, and the plurality of ports are used as external required for online programming The port is determined by the instructions in a set of instructions that control the online programming step. 25 · —An on-line programming method for an integrated circuit, wherein the integrated circuit includes a processor and an external port, and the method includes the following steps: providing a non-volatile memory cell unit on the integrated circuit A first memory array, and a second memory array; the integrated circuit receives an online programming instruction from an external initiator; 33 paper sizes are applicable to China National Standard (CNS) A4 (210X297 mm) ) (Please read the notes on the back before filling out this page)-Binding · Order 501061 ABCD Printed by the Consumers Cooperative of the Central Government Bureau of the Ministry of Economic Affairs 6. Apply for a patent scope and respond to the online programming instructions, and use this processor to execute a A set of instructions to control those online programming processing steps in erasing, programming and confirming the first memory array; and using the online programming processor to execute a group of instructions from the first memory array to control Sends an instruction from an external source to the integrated circuit, and controls the transmission through the external port. 26. The on-line programming processing method of an integrated circuit as described in item 25 of the scope of patent application, wherein it is used to control the steps in the online programming processing steps of erasing, programming and confirming the first memory array. Group instructions are stored in the second memory array. 27. The on-line flash processing method for integrated circuits as described in item 25 of the scope of patent application, wherein the non-volatile memory cell unit in the first memory array includes a plurality of floating gate memory cell units. 28. The on-line programming processing method for integrated circuits as described in item 25 of the scope of patent application, wherein the second memory array includes a plurality of mask-type read-only memory cell units. 29. The on-line flash processing method of an integrated circuit as described in item 25 of the scope of patent application, wherein the second memory array includes a plurality of non-volatile memory cell units. 30. The on-line flash processing method for integrated circuits as described in item 25 of the scope of patent application, wherein the second memory array includes a plurality of floating memory cell units. · As far as possible, the Chinese standard (CNS> A4 size (210X297 mm) is applicable to the Zhang scale. (Please read the notes on the back before filling out this page) 501061 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs A8 B8 C8 D8 VI. Scope of patent application 31. The on-line programming processing method of the integrated circuit as described in item 25 of the patent application scope, wherein the procedure for erasing, programming and confirming the first memory array is performed by A set of instructions executed by the processor to control. 32. The on-line programming processing method of an integrated circuit as described in item 25 of the scope of patent application, wherein the processor controls a first register through a control register. The operation of erasing, programming, and confirming the memory array, and the control register is coupled with the first memory array. 33. The online programming processing method of the integrated circuit as described in item 25 of the scope of patent application, The timing of the erasing, programming, and confirming operations of the first memory array is controlled by a timer included in the processor. 34. The product described in item 25 of the scope of patent application The online programming processing method of the circuit, in which the timing of the operation of erasing, programming and confirming the first memory array, is controlled by a set of instructions executed by the processor. The on-line programming processing method of the integrated circuit described in the above item includes a monitoring timer coupled to the processor, and if an error occurs during the execution of the programming processing instruction by the on-line programming processor, the timer will Start the recovery process. 36. The on-line programming processing method for integrated circuits as described in item 25 of the scope of patent application, wherein the first memory array includes a plurality of nonvolatile memories that are separated and can be independently erased. The cell size of the cell unit applies to the Chinese National Standard (CNS) A4 specification (210X 297 mm) "ΤΤΊ; ----- φ-pack ------ order ------ MW (please (Please read the notes on the back before filling this page) 501061 Α8 Β8 C8 D8 々, the scope of patent application. I4 ± 3 block. 37. The online programming method of integrated circuit as described in item 25 of the patent application scope, where The external port contains a string 38. The online programming method of the integrated circuit described in item 25 of the patent application scope, wherein the external port includes a parallel port. 39. The integrated circuit described in item 25 of the patent application scope Online programming processing method, in which the external port can be organized to operate as a parallel port or serial port. 40. Online programming processing method of integrated circuit as described in the patent application scope item 25, wherein the product The body circuit includes a plurality of ports to an external data source, and further includes a step: The external port is used by the processor, which is determined by a set of instructions using the processor to execute instructions, and the set of instructions controls the line Steps required for burning. (Please read the precautions on the reverse side before filling out this page) • Packing ^ ------ Order I --- Printed by the Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs This paper is printed in accordance with China National Standard (CNS) Α4 specifications (2i〇X297 mm)
TW87100137A 1998-01-07 1998-01-07 In-circuit programming process device and method of integrated circuit TW501061B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8117703B2 (en) * 2005-03-03 2012-02-21 Knight, Llc. Modular dual-purpose chemical dispensing system for laundry or warewash
TWI829096B (en) * 2022-02-16 2024-01-11 新唐科技股份有限公司 Method and microcontroller for driving in-system-programming

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8117703B2 (en) * 2005-03-03 2012-02-21 Knight, Llc. Modular dual-purpose chemical dispensing system for laundry or warewash
TWI829096B (en) * 2022-02-16 2024-01-11 新唐科技股份有限公司 Method and microcontroller for driving in-system-programming

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