TW357295B - Microprocessor's data writing, reading operations - Google Patents

Microprocessor's data writing, reading operations

Info

Publication number
TW357295B
TW357295B TW083101177A TW83101177A TW357295B TW 357295 B TW357295 B TW 357295B TW 083101177 A TW083101177 A TW 083101177A TW 83101177 A TW83101177 A TW 83101177A TW 357295 B TW357295 B TW 357295B
Authority
TW
Taiwan
Prior art keywords
memory
move
microprocessor
read
data
Prior art date
Application number
TW083101177A
Other languages
Chinese (zh)
Inventor
Iii Graham B Whitted
James A Kane
Hsiao-Shih Chang
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Application granted granted Critical
Publication of TW357295B publication Critical patent/TW357295B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol

Abstract

A circuit and a method rapidly and efficiently perform string-move and other memory-to-memory move operations. By recognizing that it is unnecessary to pass the read data through the central processing unit on memory-to-memory move operations, the number of clock cycles required to perform a memory-to-memory move operation is reduced. A higher rate of throughput is thereby achieved. The circuit and method are embodied in a memory control unit of a microprocessor. The memory control unit stores the data read from the read portion of a string move operation or memory-to-memory move operation and writes the stored data to memory during the write portion of the operation which occurs in the clock cycle immediately following the read portion of the operation. The central processing unit of the microprocessor is bypassed during the operation.
TW083101177A 1994-02-08 1994-02-15 Microprocessor's data writing, reading operations TW357295B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US19323694A 1994-02-08 1994-02-08

Publications (1)

Publication Number Publication Date
TW357295B true TW357295B (en) 1999-05-01

Family

ID=22712773

Family Applications (1)

Application Number Title Priority Date Filing Date
TW083101177A TW357295B (en) 1994-02-08 1994-02-15 Microprocessor's data writing, reading operations

Country Status (2)

Country Link
TW (1) TW357295B (en)
WO (1) WO1995022110A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0005316D0 (en) * 2000-03-07 2000-04-26 Memory Corp Tech Ltd High-speed interface for audio player device
US9218183B2 (en) * 2009-01-30 2015-12-22 Arm Finance Overseas Limited System and method for improving memory transfer

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS584470A (en) * 1981-07-01 1983-01-11 Hitachi Ltd Memory controller
JPS618785A (en) * 1984-06-21 1986-01-16 Fujitsu Ltd Access control system for storage device
JPS6243744A (en) * 1985-08-21 1987-02-25 Nec Corp Microcomputer
JPS63155340A (en) * 1986-12-19 1988-06-28 Fujitsu Ltd Reading system for storage device
EP0425550B1 (en) * 1988-06-30 1995-01-04 Wang Laboratories, Inc. Memory control unit
US5202969A (en) * 1988-11-01 1993-04-13 Hitachi, Ltd. Single-chip-cache-buffer for selectively writing write-back and exclusively writing data-block portions to main-memory based upon indication of bits and bit-strings respectively
US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
US5371874A (en) * 1989-01-27 1994-12-06 Digital Equipment Corporation Write-read/write-pass memory subsystem cycle
EP0507951B1 (en) * 1990-09-18 1999-03-03 Fujitsu Limited Exclusive control method for shared memory
US5283880A (en) * 1991-01-02 1994-02-01 Compaq Computer Corp. Method of fast buffer copying by utilizing a cache memory to accept a page of source buffer contents and then supplying these contents to a target buffer without causing unnecessary wait states

Also Published As

Publication number Publication date
WO1995022110A1 (en) 1995-08-17

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Legal Events

Date Code Title Description
MK4A Expiration of patent term of an invention patent