TW202403882A - Silicon photonic chip and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a silicon photonic chip and manufacturing method thereof, the silicon photonic chip comprises: a substrate, a buried oxide layer, a device layer, an upper cladding layer, a liquid crystal layer, a first electrode, a second electrode and a cover; the buried oxide layer is located on the upper surface of the substrate, the device layer is located on the surface of the buried oxide layer away from the substrate. The device layer comprises optical waveguide devices; the upper cladding layer covers the exposed device layer, a first window is arranged in the upper cladding layer, and the optical waveguide device exposed to the outside in the first window; the liquid crystal layer is filled in the first window; the first electrode and the second electrode are located on each side of the liquid crystal layer; the cover is located at the first window, and the cover overlays the liquid crystal layer to encapsulate the liquid crystal layer at the first window. The silicon photonic chip, can achieve a wide range of adjustment of the effective refractive index of the optical waveguide device by changing the electric field strength of the electric field formed by the first electrode and the second electrode.

Description

Silicon photonic chip and preparation method thereof

The present invention relates to the technical field of integrated circuits, and in particular to a silicon photonic chip and a preparation method thereof.

Integrated photonic chips, represented by silicon photonic chips, have good optoelectronic properties. In terms of optics, using the larger refractive index difference of materials, small-sized waveguides and optical devices can be made, and a large number of optical components can be integrated per unit area; in terms of electricity, using doped waveguides and compatible metal materials can achieve DC modulation, Microwave high-speed modulation and other functions.

However, current photonic chips lack the ability to adjust optical properties in a wide range. The most important reason is that they lack the ability to adjust the effective refractive index of light waves transmitted in optical waveguides in a wide range. In application devices based on photonic chips, such as optical waveguide coupling devices, resonant devices, polarization control devices, interference devices, optical emission devices, etc., the adjustable range of the optical waveguide refractive index will seriously affect the size, working range and other parameters of the device. .

Based on this, it is necessary to solve the problem that photonic chips in the prior art lack the ability to adjust the effective refractive index of the light waves transmitted in the optical waveguide in a wide range. It is necessary to provide a silicon photonic chip and its preparation method, which can quickly and greatly adjust the optical waveguide device. Inner light field.

In order to achieve the above object, in a first aspect, the present invention provides a silicon photonic chip, the aforementioned silicon photonic chip includes: a substrate;

The buried oxide layer is located on the surface above the aforementioned substrate;

The device layer is located on the surface of the buried oxide layer away from the substrate, and the device layer includes an optical waveguide device;

The upper cladding layer covers the exposed device layer, and a first window is provided in the upper cladding layer. The first window is located above the optical waveguide device to expose the optical waveguide device;

A liquid crystal layer is filled in the first window to cover the optical waveguide device;

The first electrode and the second electrode are respectively located on both sides of the aforementioned liquid crystal layer and are used to form an electric field that drives the deflection of the aforementioned liquid crystal layer to adjust the refractive index of the aforementioned liquid crystal layer to adjust the light field of the light beam transmitted in the aforementioned optical waveguide device;

The substrate is located at the first window, and the substrate covers the liquid crystal layer to encapsulate the liquid crystal layer at the first window.

The above-mentioned silicon photonic chip is equipped with liquid crystal and electrodes that control the electric field of the liquid crystal in the silicon photonic integrated chip based on the semiconductor CMOS process. The filled liquid crystal layer actually covers the optical waveguide to form a waveguide cladding to a part, and the liquid crystal can be controlled by changing the electric field intensity. The orientation is adjusted, thereby changing the refractive index of the waveguide cladding, and regulating the light field in the optical waveguide device. That is, by controlling the voltage of the electrode, the refractive index of the liquid crystal layer can be changed, thereby achieving a wide range of adjustment of the transmission in the optical waveguide. The effective refractive index of the light wave can then adjust the light field in the optical waveguide device. The adjustment speed is fast, and it is based on semiconductor technology, which can realize wafer-level liquid crystal filling and electrode production, making it easy to achieve mass production.

In one embodiment, an alignment layer is further included, and the alignment layer is provided between the substrate and the liquid crystal layer.

In one embodiment, the first electrode is disposed on a surface of the substrate away from the liquid crystal layer or close to a surface of the liquid crystal layer;

The aforementioned second electrode is provided on one side of the aforementioned buried oxide layer close to the aforementioned substrate, and is opposite to the aforementioned first electrode and located on the upper and lower sides of the aforementioned liquid crystal layer;

The silicon photonic chip further includes a guide electrode, which penetrates the substrate and is electrically connected to the second electrode; or the guide electrode penetrates the upper cladding layer and the buried oxide layer and is electrically connected to the second electrode.

In one embodiment, the first electrode is disposed on a surface of the substrate away from the liquid crystal layer or close to a surface of the liquid crystal layer;

A second window is provided in the substrate, the second window exposes the buried oxide layer, and the second electrode is disposed in the second window.

In one embodiment, the first electrode and the second electrode are respectively provided in the upper cladding layer on both sides of the liquid crystal layer, and the first electrode and the second electrode are arranged oppositely along the left and right sides of the liquid crystal layer.

In one embodiment, the first electrode is disposed on a surface of the substrate away from the liquid crystal layer or close to a surface of the liquid crystal layer;

The aforementioned optical waveguide device includes a doped waveguide and doped contact regions connected thereto on both sides, and the aforementioned doped waveguide is a second electrode;

The upper cladding layer on both sides of the liquid crystal layer is respectively provided with a guide electrode penetrating from the upper surface of the upper cladding layer to the doped contact region, and the guide electrode is electrically connected to the doped contact region.

In one embodiment, the aforementioned optical waveguide device includes one or more of an optical coupler, an optical resonator, an optical polarizer, an optical interferometer, an optical phase shifter, and an optical modulator.

In one embodiment, the optical waveguide device includes a grating structure, and the absolute value of the difference between the duty cycle of the grating structure along the light transmission direction and the preset threshold gradually decreases.

In a second aspect, the present invention provides a method for preparing a silicon photonic chip. The method includes:

Provide an SOI wafer, the aforementioned SOI wafer sequentially includes a substrate, a buried oxide layer and a top layer of silicon along the thickness direction, and a plurality of optical waveguide devices are produced on the aforementioned top layer of silicon;

Form an upper cladding layer on the surface of the exposed buried oxide layer and the aforementioned optical waveguide device;

Make electrodes at preset locations;

A first window is opened in the upper cladding layer at a position covering the optical waveguide device to expose the optical waveguide device;

Filling the first window with a liquid crystal layer so that the liquid crystal layer covers the optical waveguide device, wherein the electrodes are used to form an electric field that drives the deflection of the liquid crystal layer;

A substrate is covered on the liquid crystal layer to encapsulate the liquid crystal layer in the first window.

The above-mentioned preparation method of the silicon photonic chip is based on the semiconductor process to realize wafer-level liquid crystal filling and electrode production. The first window is filled with the liquid crystal layer, so that the liquid crystal layer covers the optical waveguide device, and the first electrode and the second electrode of the liquid crystal layer are When the electrode forms an electric field that drives the deflection of the liquid crystal layer, the orientation of the liquid crystal can be adjusted by changing the intensity of the electric field, thereby changing the refractive index of the waveguide cladding, thereby regulating the light field in the optical waveguide device, and then by changing the third The electric field strength of the electric field formed by the first electrode and the second electrode is used to realize a large-scale adjustment of the effective refractive index of the light wave transmitted in the optical waveguide.

In one embodiment, the aforementioned preparation of electrodes at preset positions includes:

A first electrode and a second electrode arranged opposite each other are respectively made in the upper cladding layer on the left and right sides of the liquid crystal layer.

In one of the embodiments, the first electrode and the second electrode respectively arranged opposite each other in the upper cladding layer on the left and right sides of the liquid crystal layer include:

A first through hole and a second through hole are respectively provided in the upper cladding layer on both sides of the aforementioned liquid crystal layer;

Filling the first through hole with conductive material to form the first electrode;

The second through hole is filled with conductive material to form the second electrode.

In one embodiment, the aforementioned preparation of electrodes at preset positions includes:

A first electrode and a second electrode arranged oppositely are respectively formed on the upper and lower sides of the liquid crystal layer.

In one of the embodiments, the first electrode and the second electrode respectively arranged oppositely on the upper and lower sides of the liquid crystal layer include:

Plating a conductive film on the surface of the substrate to form the first electrode;

A second window is opened in the substrate, and the second window exposes the buried oxide layer;

The second electrode is formed in the second window.

In one embodiment, the aforementioned preparation of electrodes at preset positions includes:

Plating a conductive film on the surface of the aforementioned substrate to form a first electrode;

doping to form a second electrode in the optical waveguide device; alternatively, the SOI wafer further includes a conductive layer preset between the substrate and the buried oxide layer, and the conductive layer forms the second electrode;

A through hole is made from the upper surface of the upper cladding layer or the bottom surface of the substrate to the second electrode, and conductive material is filled in the through hole to form a guide electrode. The guide electrode is electrically connected to the second electrode.

In one embodiment, the first window penetrates to the left and right sides of the optical waveguide device, so that the liquid crystal layer covers the upper part and the left and right sides of the optical waveguide device; or the first window penetrates to the buried oxide layer Or a substrate, so that the liquid crystal layer covers the top of the optical waveguide device and fills the left and right sides of the aforementioned optical waveguide device or wraps the aforementioned optical waveguide device.

In one of the embodiments, the aforementioned preparation method further includes:

Cut the aforementioned SOI wafer and separate each of the aforementioned silicon photonic wafers.

In order to facilitate understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. An embodiment of the invention is shown in the drawing. However, the present invention may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the present invention is for the purpose of describing specific embodiments only and is not intended to limit the present invention.

It will be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to" or "coupled to" another element or layer, it can be directly on the other element or layer. A layer may be on, adjacent to, connected to, or coupled to other elements or layers, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent," "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers present. layer. It will be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doped types and/or sections, these elements, components, regions, layers, doped types and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or section from another element, component, region, layer, doping type or section. Thus, a first element, component, region, layer, doping type or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the invention; for example, a first element, component, region, layer, doping type or section could be termed a second element, component, region, layer or section without departing from the teachings of the present invention. The first doping type becomes the second doping type, and similarly, the second doping type can become the first doping type; the first doping type and the second doping type are different doping types, for example, The first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

Spatial relational terms such as "under", "under", "under", "below", "on", "above", etc., in This may be used to describe the relationship of one element or feature to other elements or features shown in the figures. It will be understood that the spatially relative terms encompass different orientations of the device in use and operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "below" or "under" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "below" and "under" may include both upper and lower orientations. Additionally, the device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly.

When used herein, the singular forms "a", "an" and "the" may also include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "include" or "have" designate the presence of stated features, integers, steps, operations, elements, parts, or combinations thereof, but do not exclude the presence or addition of one or more the possibility of other features, integers, steps, operations, components, parts or combinations thereof. At the same time, in this specification, the term "and/or" includes any and all combinations of the related listed items.

Embodiments of the invention are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the invention, such that variations in the shapes shown are contemplated due, for example, to manufacturing techniques and/or tolerances. Thus, embodiments of the present invention should not be limited to the particular shapes of regions shown herein but are to include deviations in shapes that result, for example, from manufacturing techniques. For example, an implanted region that appears as a rectangle typically has rounded or curved features and/or implant concentration gradients at its edges rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by an implant may result in some implantation in the area between the buried region and the surface through which the implant occurs. Therefore, the regions shown in the figures are schematic in nature and their shapes do not represent the actual shapes of the regions of the device and do not limit the scope of the present invention.

Referring to Figures 1 to 7, the present invention provides a silicon photonic chip, including: a substrate 11, a buried oxide layer 12, a device layer 13, an upper cladding layer 4, a liquid crystal layer 5, a first electrode 2, a second electrode 3 and Substrate 6; the buried oxide layer 12 is located on the upper surface of the substrate 11; the device layer 13 is located on the upper surface of the substrate 11, and the device layer 13 includes an optical waveguide device; the upper cladding layer 4 covers the exposed device layer 13 and the buried oxide layer 12, A first window is provided in the upper cladding layer 4. The first window is located above the optical waveguide device to expose the optical waveguide device; the liquid crystal layer 5 is filled in the first window to cover the optical waveguide device; the first electrode 2 and the second The electrodes 3 are respectively located on both sides of the liquid crystal layer 5 and are used to form an electric field that drives the deflection of the liquid crystal layer 5 to adjust the refractive index of the liquid crystal layer 5 to adjust the light field of the transmitted light beam in the optical waveguide device; the substrate 6 is located at the first window , the substrate 6 covers the liquid crystal layer 5 to encapsulate the liquid crystal layer 5 at the first window.

The silicon photonic chip of the present invention is a semiconductor integrated chip based on the SOI (Silicon-On-Insulator, silicon on insulator) structure. The SOI wafer 1 is used as the processing material. The SOI wafer 1 includes a substrate 11 and a buried oxide layer 12 and the top layer of silicon (or silicon nitride, silicon oxynitride, etc.), and etching the required optical waveguide device in the top layer of silicon to form the device layer 13.

Among them, the material of the substrate 11 can be silicon, silicon carbide, etc.; the material of the buried oxide layer 12 and the upper cladding layer 4 can be silicon oxide; the material of the optical waveguide device can be silicon, silicon nitride, silicon oxynitride, etc. The material of the first electrode 2 and the second electrode 3 may be ITO (Indium Tin Oxide, tin-doped indium oxide), or may be copper, aluminum, gold, silver, platinum, etc. When the light beam in the optical waveguide device needs to be emitted from the first window, the material of the substrate 6 is a light-transmitting material, such as silicon dioxide, so that the light beam can pass through the second substrate 6 and emit to the outside world. As shown in Figures 1 to 7, the first window can penetrate to the buried oxide layer 12. After the liquid crystal layer 5 fills the first window, the liquid crystal layer 5 wraps the upper surface and side surfaces of the optical waveguide device; as shown in Figure 8, The first window can only penetrate the upper cladding layer 4 to expose the upper surface of the optical waveguide device. After the liquid crystal layer 5 fills the first window, the liquid crystal layer 5 covers the upper surface of the optical waveguide device; as shown in Figure 9, the first window It can also penetrate to the substrate 11. After the liquid crystal layer 5 fills the first window, the liquid crystal layer 5 completely wraps the optical waveguide device.

It can be understood that applying positive voltage and negative voltage to the first electrode 2 and the second electrode 3 respectively during operation can form an electric field between the first electrode 2 and the second electrode 3. Changing the intensity of the electric field will affect the orientation of the liquid crystal. Thereby changing the refractive index of the waveguide cladding of the optical waveguide device and regulating the light field in the waveguide device. However, a negative voltage and a positive voltage may be applied to the first electrode 2 and the second electrode 3 respectively.

Specifically, the first electrode 2 and the second electrode 3 can be located on the left and right sides of the liquid crystal layer 5 in the horizontal direction. For example, as shown in Figure 2, first through holes are respectively provided in the cladding layer 4 on both sides of the liquid crystal layer 5. , the second through hole, the first electrode 2 fills the first through hole, and the second electrode 3 fills the second through hole, so that the first electrode 2 and the second electrode 3 are respectively located on the left and right sides of the liquid crystal layer 5 in the horizontal direction. side, forming a horizontal electric field in the liquid crystal layer. The first electrode 2 and the second electrode 3 can also be located on the upper and lower sides of the liquid crystal layer 5 in the vertical direction. For example, as shown in Figure 1, the first electrode 2 is formed on the surface of the upper cladding layer 4 away from the SOI wafer 1. The front projection surface of the electrode 2 covers the liquid crystal layer 5, and a second window is opened in the substrate 11. The second window exposes the buried oxide layer 12, and the second electrode 3 is disposed in the second window, so that the first electrode 2 and the second window are disposed in the second window. The two electrodes 3 are respectively located on the upper and lower sides of the liquid crystal layer 5 in the vertical direction, forming a vertical electric field in the liquid crystal layer; by setting a second window in the substrate 11 and disposing the second electrode 3 in the second window, so that The surface of the second electrode 3 away from the buried oxide layer 12 is exposed, so that the power supply can be directly connected to the second electrode 3 without the need to provide an additional lead electrode to lead out the second electrode 3 , thereby allowing the external power supply to be directly connected to the second electrode 3 . When the first electrode 2 and the second electrode 3 are respectively located on both sides of the liquid crystal layer 5, the electric field formed by the first electrode 2 and the second electrode 3 can act on the liquid crystal layer 5 to deflect the liquid crystal layer 5 to change the refraction of the liquid crystal layer 5. Rate. It should be noted that the first through hole and the second through hole extend along the extending direction of the optical waveguide device and are approximately the same length as the liquid crystal layer. Alternatively, the number of the first through-holes and the plurality of second through-holes is multiple, and the plurality of first through-holes and the plurality of second through-holes are arranged along the extending direction of the optical waveguide device, and the plurality of first through-holes and the plurality of third through-holes are The length of the arrangement of the two through holes is approximately the same as the length of the liquid crystal layer.

In this embodiment, a liquid crystal and an electrode for controlling the electric field of the liquid crystal are provided in a silicon photonic integrated chip based on the semiconductor CMOS process. The orientation of the liquid crystal can be adjusted by changing the electric field intensity, thereby changing the refractive index of the waveguide cladding and affecting the light response. The light field in the waveguide device produces an adjustment effect, that is, the refractive index of the liquid crystal layer 5 can be changed by controlling the voltage of the electrode, thereby achieving a large-scale adjustment of the effective refractive index of the light waves transmitted in the optical waveguide to adjust the light in the optical waveguide device. Field, adjustment speed is fast, and based on semiconductor technology, it can realize wafer-level liquid crystal filling and electrode production, and is easy to achieve mass production .

In one embodiment, as shown in FIGS. 1 and 3 to 7 , the silicon photonic chip further includes an alignment layer 7 , and the alignment layer 7 is provided between the substrate 6 and the liquid crystal layer 5 .

When the liquid crystal layer 5 does not use a liquid crystal material that is sensitive to light beams, the alignment layer 7 is required to orient the liquid crystal layer 5 so that the liquid crystal molecules are neatly arranged and form a certain pretilt angle.

Specifically, if optical alignment is used, the alignment layer 7 can choose an alignment film that is sensitive to light beams, and the surface of the alignment film is in contact with the exposed surface of the liquid crystal layer 5; if rubbing alignment is used, the alignment layer 7 includes the rubbed alignment film. The surface of the alignment film is in contact with the exposed surface of the liquid crystal layer 5; if grating orientation is adopted, the alignment layer 7 includes a grating layer, and the pattern layer of the grating layer is in contact with the exposed surface of the liquid crystal layer 5.

In this embodiment, the alignment layer 7 is disposed between the substrate 6 and the liquid crystal layer 5 so that the exposed surfaces of the alignment layer 7 and the liquid crystal layer 5 are in contact, thereby realizing the alignment of the liquid crystal layer 5 .

In some embodiments, as shown in Figure 2, it can be understood that when the liquid crystal layer 5 directly uses a liquid crystal material that is sensitive to light beams, the alignment layer 7 is not needed. In this case, there is no need to provide an alignment layer 7 between the substrate 6 and the liquid crystal layer 5. .

In one embodiment, the silicon photonic chip may further include a first upper film layer and/or a first lower film layer. The first upper film layer is disposed on the surface of the substrate 6 away from the liquid crystal layer 5 . The first lower film layer is disposed on the substrate 6 . 6 is close to the surface of the liquid crystal layer 5 . The first upper film layer may include a filter or an analyzer. Similarly, the first lower film layer may also include a filter or an analyzer. When the filter is included, filtering of the outgoing beam may be achieved. When the analyzer is included, When, the outgoing beam can be turned into linearly polarized light.

In one embodiment, as shown in FIG. 3 , the first electrode 2 is disposed on the surface of the substrate 6 away from the liquid crystal layer 5 or close to the liquid crystal layer 5 ; the second electrode 3 is disposed on one of the buried oxide layers 12 close to the substrate 11 The silicon photonic chip also includes a guide electrode 8 that penetrates the substrate 11 and is electrically connected to the second electrode 3 .

Among them, the material of the guide electrode 8 may be ITO (Indium TinO xide, tin-doped indium oxide), or may be copper, aluminum, gold, silver, platinum, etc. Since the second electrode 3 is located between the substrate 11 and the buried oxide layer 12, it is difficult for the second electrode 3 to be directly electrically connected to an external power source. Therefore, it is necessary to provide a guide via hole on the substrate 11 and fill it with the guide electrode 8. The through hole allows the second electrode 3 to be electrically connected to an external power source through the lead electrode 8 .

It can be understood that whether the first electrode 2 is located on the surface of the substrate 6 away from the liquid crystal layer 5 or is located on the surface of the substrate 6 close to the liquid crystal layer 5, the first electrode 2 is located on the same side of the liquid crystal layer 5. The second electrodes 3 are respectively located on both sides of the liquid crystal layer 5. The first electrode 2 and the second electrode 3 form a vertical electric field. The vertical electric field drives the liquid crystal layer 5 to deflect, and then the optical waveguide device can be adjusted by adjusting the electric field intensity of the vertical electric field. The effective refractive index of internally transmitted light waves.

In this embodiment, the first electrode 2 and the second electrode 3 are respectively located on both sides of the liquid crystal layer 5 in the vertical direction, so that when a voltage is applied to the first electrode 2 and the second electrode 3, the first electrode 2 and the second electrode 3 3 will form a vertical electric field. By adjusting the electric field intensity of the vertical electric field, the refractive index of the liquid crystal layer 5 can be adjusted, thereby adjusting the effective refractive index of the light waves transmitted in the optical waveguide device.

In another embodiment, as shown in FIG. 4 , the first electrode 2 is disposed on the surface of the substrate 6 away from the liquid crystal layer 5 or close to the liquid crystal layer 5 ; the second electrode 3 is disposed on the buried oxide layer 12 close to the substrate 11 One side is opposite to the first electrode 2 and is respectively located above and below the liquid crystal layer 5; the silicon photonic chip also includes a guide electrode 8, which penetrates the upper cladding layer 4 and the buried oxide layer 12 and is electrically connected to the second electrode 3.

It can be understood that in addition to providing the guide electrode 8 in the substrate 11 to lead out the second electrode 3, interconnection vias can also be provided in the buried oxide layer 12 and the upper cladding layer 4, that is, the first guide via hole and the second guide via are connected. Through holes, the first guide through hole and the second guide through hole are filled with conductive material to form the guide electrode 8, and the second electrode 3 is led out from the other direction, so that the second electrode 3 can be electrically connected to an external power supply.

In one embodiment, as shown in Figures 5 to 7, the first electrode 2 is disposed on the surface of the substrate 6 away from the liquid crystal layer 5 or close to the liquid crystal layer 5; the optical waveguide device includes a doped waveguide 31 and its two sides. The connected doped contact areas 32, the doped waveguide 31 and the doped contact areas 32 connected to them on both sides together form the second electrode 3; the upper cladding layers 4 on both sides of the liquid crystal layer 5 are respectively provided with upper cladding layers 4. The upper surface penetrates to the guide electrode 8 of the doped contact region 32 , and the guide electrode 8 is electrically connected to the doped contact region 32 .

Among them, doping makes the silicon waveguide conductive. As shown in Figures 5 to 7, when the doped waveguide 31 and the doped contact areas 32 connected to it on both sides form the second electrode 3, they are respectively in the upper cladding layer 4. A first guide through hole and a second guide through hole are provided, and the first guide through hole and the second guide through hole are filled with conductive material to form the guide electrode 8 , so that the guide electrode 8 is connected to the second electrode 3 . When a voltage is applied to the lead electrode 8, the lead electrode 8 will apply a voltage to the second electrode 3. Then a positive voltage or a negative voltage will be applied to the first electrode 2 and the lead electrode 8 respectively, or to the first electrode 2 and the lead electrode 8 respectively. By applying negative voltage and positive voltage, the first electrode 2 and the second electrode 3 can form a vertical electric field. Since doping will cause light wave loss, in order to reduce the light wave loss caused by doping, partial doping can be used. As shown in Figure 6, at the optical waveguide device, only the bottom part of the optical waveguide device is doped; or gradient doping, As shown in FIG. 7 , the doping concentration is reduced in the middle of the optical waveguide device, and the doping concentration is gradually increased from the optical waveguide device to the doped contact regions 32 on both sides.

It can be understood that an interconnection via hole can also be provided in the buried oxide layer 12 and the substrate 11 , and the interconnection via hole is filled with conductive material to form a guide electrode, that is, the guide electrode 8 is led out from the other direction.

In this embodiment, by doping the silicon waveguide and using the doped silicon waveguide as the second electrode 3, the optical waveguide device also serves as the second electrode 3, and there is no need to provide an additional second electrode 3.

In one embodiment, the optical waveguide device includes an optical waveguide, and the first window exposes the optical waveguide.

In this embodiment, the refractive index of the liquid crystal layer 5 can be changed by controlling the voltage of the electrode, thereby realizing rapid and large-scale adjustment of the effective refractive index of the light waves transmitted in the optical waveguide, thereby adjusting the light field in the optical waveguide device.

In another embodiment, the optical waveguide device includes an optical waveguide and a grating, the grating is disposed in the optical waveguide; the first window exposes the grating.

Among them, the grating can be formed by processing optical waveguide devices. The material of the first electrode 2 and the second electrode 3 may be ITO, or may be copper, aluminum, gold, silver, platinum, etc.

In the grating vertical coupling scheme used in photonic chips, the grating satisfies the Bragg condition

(1)

in, is the effective refractive index of the grating, is the working wavelength, is the diffraction angle, is the grating period, is an integer, Represents the diffraction order. In coupling applications, we generally choose ±1 to suppress high-order modes.

You can see the diffraction angle with effective refractive index influence each other.

Furthermore, according to formula (1), we can get:

(2)

(3)

can be changed by changing to change the diffraction angle , the liquid crystal layer 5 is used to fill the gaps in the grating, and the effective refractive index of the entire grating can be changed by adjusting the refractive index of the liquid crystal layer 5 , thereby changing the coupling angle .

After simulation verification, for example, when the refractive index of the grating is 1.9, the refractive index of the liquid crystal layer 5 covering the grating is adjusted from 1.4 to 1.7, and the exit angle of the light beam changes regularly as the refractive index of the liquid crystal layer 5 increases.

Specifically, the light beam transmitted in the optical waveguide device is diffracted and output from the grating position. Since the first electrode 2 and the second electrode 3 are applied with a positive voltage and a negative voltage respectively, the first electrode 2 and the second electrode 3 can form a driving liquid crystal. The electric field deflected by layer 5 can change the refractive index of liquid crystal layer 5 by changing the magnitude of the applied voltage, thereby changing the diffraction angle of the outgoing light beam at the grating position, thereby adjusting the outgoing angle of the light beam.

In this embodiment, after filling the gap of the grating with the liquid crystal layer 5, applying voltage to the first electrode 2 and the second electrode 3, and controlling the magnitude of the applied voltage, the refractive index of the liquid crystal layer 5 can be changed, thereby changing the emission from the grating. The diffraction angle of the beam can be adjusted by changing the magnitude of the applied voltage.

In another embodiment, the optical waveguide device includes an optical waveguide and a grating, the grating is disposed in the optical waveguide; the first window exposes the optical waveguide and the grating.

Wherein, the optical waveguide and the grating can be exposed simultaneously through the first window. Multiple first windows may also be provided, and the optical waveguide and the grating are exposed through different first windows.

In one embodiment, the absolute value of the difference between the duty cycle of the grating along the light transmission direction and the preset threshold gradually decreases.

Among them, the preset threshold can be 0.5. That is, along the direction of light transmission, the absolute value |dc-0.5| of the difference between the grating's duty cycle dc and 0.5 gradually decreases.

In this embodiment, by gradually reducing the absolute value of the difference between the duty cycle of the grating along the light transmission direction and the preset threshold, the duty cycle changed in this way can achieve the convergence of the outgoing light beam, thereby optimizing the light intensity. distribution.

In other embodiments, the optical waveguide device may further include one or more of an optical coupler, an optical resonator, an optical polarizer, an optical interferometer, an optical phase shifter, and an optical modulator. That is to say, the present invention is based on semiconductor technology and combines the mature technology of silicon photonic integrated wafers with the fast and wide-range adjustable refractive index of liquid crystals to achieve fast and wide-range refractive index adjustment in silicon photonic integrated wafers, solving the problem of previous photonic integrated wafers. The chip lacks the ability to adjust the optical properties in a wide range, especially the ability to adjust the effective refractive index of the light waves transmitted in the optical waveguide in a wide range. This structure can be applied to optical waveguide devices such as optical couplers, optical resonators, optical polarizers, optical interferometers, optical phase shifters and optical modulators in silicon integrated wafers.

In one embodiment, as shown in Figure 10, based on the same concept, the present invention also provides a method for preparing a silicon photonic wafer. The method for preparing a silicon photonic wafer includes:

S1001: Provide an SOI wafer 1. The SOI wafer 1 includes a substrate 11, a buried oxide layer 12 and a top layer of silicon along the thickness direction. A plurality of optical waveguide devices are made on the top layer of silicon to form a device layer 13 as shown in Figure 11;

S1002: Form the upper cladding layer 4 on the surface of the exposed buried oxide layer 12 and the optical waveguide device, as shown in Figure 12;

S1003: Make electrodes at preset positions, as shown in Figure 13;

S1004: Open a first window 41 in the upper cladding layer 4 at a position covering the optical waveguide device to expose the optical waveguide device, as shown in Figure 14;

S1005: Fill the first window 41 with the liquid crystal layer 5 so that the liquid crystal layer 5 covers the optical waveguide device, where the electrodes are used to form an electric field that drives the deflection of the liquid crystal layer 5, as shown in Figure 15;

S1006: Cover the liquid crystal layer 5 with a substrate 6 to encapsulate the liquid crystal layer 5 in the first window 41, as shown in Figure 2.

It can be understood that the execution order of these steps or stages S1001-S1006 is not necessarily sequential, but may be performed in turn or alternately with other steps or at least part of the steps or stages in other steps. For example, after the upper cladding layer 4 is formed on the surface of the exposed buried oxide layer 12 and the device layer 13 , the first window 41 can be opened first, and then the first window 41 can be filled with the liquid crystal layer 5 , and then the first window 41 can be filled on both sides of the liquid crystal layer 5 The first electrode 2 and the second electrode 3 are formed. It should be noted that the electrode arrangement shown in FIG. 13 is only one embodiment of the present invention. The electrodes can also be arranged in other embodiments, such as the ones shown in FIGS. 1 and 3 to 7 . The electrode arrangement shown in Figure 15 is only one embodiment of the present invention. The liquid crystal layer 5 can also cover the optical waveguide device in the manner shown in Figures 8 and 9. In addition, it can be understood that the above-mentioned "top layer silicon" only represents the SOI structural composition, and its material can be silicon, silicon nitride or silicon oxynitride, etc., and is not limited to silicon material.

In this embodiment, the first window is filled with the liquid crystal layer 5 so that the liquid crystal layer 5 covers the optical waveguide device. When the first electrode 2 and the second electrode 3 of the liquid crystal layer 5 form an electric field that drives the deflection of the liquid crystal layer 5, it can By changing the electric field intensity, the orientation of the liquid crystal is adjusted, thereby changing the refractive index of the waveguide cladding, thereby regulating the light field in the optical waveguide device, and then changing the electric field formed by the first electrode 2 and the second electrode 3. The electric field strength is used to achieve a large-scale adjustment of the effective refractive index of the light waves transmitted in the optical waveguide.

In one embodiment, fabricating electrodes at preset locations includes:

The first electrode 2 and the second electrode 3 are respectively formed in the upper cladding layer 4 on the left and right sides of the liquid crystal layer 5 .

In this embodiment, the first electrode 2 and the second electrode 3 are respectively formed in the cladding layer 4 on the left and right sides of the liquid crystal layer 5 so that the first electrode 2 and the second electrode 3 are respectively disposed on the liquid crystal layer 5 . On both sides of the horizontal direction of the layer 5, the first electrode 2 and the second electrode 3 can form a horizontal electric field. By adjusting the electric field intensity of the horizontal electric field, the refractive index of the liquid crystal layer 5 can be adjusted, thereby adjusting the light waves transmitted in the optical waveguide device. the effective refractive index. The above-mentioned horizontal direction refers to the direction parallel to the surface of the wafer.

In one embodiment, fabricating the first electrode 2 and the second electrode 3 respectively in the cladding layer 4 on both sides of the liquid crystal layer 5 includes: respectively opening first vias in the cladding layer 4 on both sides of the liquid crystal layer 5 . hole and a second through hole; the first through hole is filled with conductive material to form the first electrode 2; the second through hole is filled with conductive material to form the second electrode 3.

In this embodiment, a semiconductor process can be used to respectively set first through holes and second through holes in the upper cladding layer 4 on both sides of the liquid crystal layer 5, and fill the first through holes and the second through holes with conductive materials to form The first electrode 2 and the second electrode 3; the process is mature and can be manufactured at the wafer level, which is conducive to mass production.

In one embodiment, fabricating electrodes at preset locations includes:

The first electrode 2 and the second electrode 3 arranged opposite each other are respectively formed on the upper and lower sides of the liquid crystal layer 5 .

In this embodiment, the first electrode 2 and the second electrode 3 are respectively formed on the upper and lower sides of the liquid crystal layer 5 and are arranged opposite each other, so that the first electrode 2 and the second electrode 3 are respectively provided on the upper and lower sides of the liquid crystal layer 5. The first electrode 2 and the second electrode 3 can form a vertical electric field. By adjusting the intensity of the vertical electric field, the refractive index of the liquid crystal layer 5 can be adjusted, thereby adjusting the effective refractive index of the light waves transmitted in the optical waveguide device.

In one embodiment, fabricating opposite first electrodes 2 and second electrodes 3 on the upper and lower sides of the liquid crystal layer 5 includes: plating a conductive film on the surface of the substrate 6 to form the first electrode 2; A second window is opened in 11, and the second window exposes the buried oxide layer 12; a second electrode 3 is formed in the second window.

In this embodiment, the first electrode 2 is formed by plating a conductive film on the surface of the substrate 6; the second electrode 3 is formed in the second window, so that the first electrode 2 and the second electrode 3 are respectively located in the vertical direction of the liquid crystal layer 5. When a voltage is applied to the first electrode 2 and the second electrode 3, the first electrode 2 and the second electrode 3 will form a vertical electric field. By adjusting the intensity of the vertical electric field, the refractive index of the liquid crystal layer 5 can be adjusted. , thereby adjusting the effective refractive index of the light waves transmitted in the optical waveguide device. In addition, by setting a second window in the substrate 11 and disposing the second electrode 3 in the second window, the surface of the second electrode 3 away from the buried oxide layer 12 is exposed, so that the power supply can be directly connected to the second electrode. 3 connection, there is no need to set up an additional lead electrode to lead out the second electrode 3, so that the external power supply can be directly connected to the second electrode 3. The above-mentioned vertical direction refers to the direction perpendicular to the surface of the wafer.

In one embodiment, making the electrode at the preset position includes: plating a conductive film on the surface of the substrate 6 to form the first electrode 2; doping in the optical waveguide device to form the second electrode 3; or, the SOI wafer 1 also It includes a conductive layer preset between the substrate 11 and the buried oxide layer 12. The conductive layer forms the second electrode 3; a through hole is made from the upper surface of the upper cladding layer 4 or the bottom surface of the substrate 11 to the second electrode 3 , filling the conductive material in the through hole to form a guide electrode 8 , and the guide electrode 8 is electrically connected to the second electrode 3 .

In this embodiment, the silicon waveguide is doped using a semiconductor process, and the doped silicon waveguide is used as the second electrode 3, so that the optical waveguide device also serves as the second electrode 3, and there is no need to provide an additional second electrode 3. The process is mature and can achieve wafer-level production, which is conducive to mass production.

In another embodiment, making the electrode at a predetermined position includes: plating a conductive film on the surface of the substrate 6 to form the first electrode 2; the SOI wafer 1 also includes a predetermined layer between the substrate 11 and the buried oxide layer 12. The conductive layer forms the second electrode 3; a through hole is made from the upper surface of the upper cladding layer 4 or the bottom surface of the substrate 11 to the second electrode 3, and the conductive material is filled in the through hole to form the guide electrode 8. The electrode 8 is electrically connected to the second electrode 3 .

In one embodiment, the optical waveguide device includes a grating.

In this embodiment, after filling the gap of the grating with the liquid crystal layer 5, applying voltage to the first electrode 2 and the second electrode 3, and controlling the magnitude of the applied voltage, the refractive index of the liquid crystal layer 5 can be changed, thereby changing the effectiveness of the grating. The refractive index is used to adjust the diffraction angle of the beam emitted from the grating. By changing the applied voltage, the angle of the emitted beam can be adjusted. In other embodiments, the optical waveguide device may also include one or more of an optical coupler, an optical resonator, an optical polarizer, an optical interferometer, an optical phase shifter, and an optical modulator. That is, the present invention is based on a semiconductor process, combined with silicon The mature technology of photo-integrated wafers and the fast and wide-range adjustable refractive index of liquid crystals enable rapid and wide-range refractive index adjustment in silicon photo-integrated wafers. This method can be applied to optical coupling in silicon photo-integrated wafers. Optical waveguide devices such as optical resonators, optical polarizers, optical interferometers, optical phase shifters and optical modulators.

In one embodiment, the first window penetrates to the left and right sides of the optical waveguide device, so that the liquid crystal layer 5 covers the upper part and the left and right sides of the optical waveguide device; or the first window penetrates to the buried oxide layer 12 or the substrate 11. Make the liquid crystal layer 5 cover the top of the optical waveguide device and fill the left and right sides of the optical waveguide device or wrap the optical waveguide device.

In one embodiment, the preparation method of the silicon photonic wafer further includes: cutting the SOI wafer 1 and separating each silicon photonic wafer.

It can be understood that after the SOI wafer 1 is processed through the above steps, the SOI wafer 1 includes a plurality of silicon photonic wafers, and each silicon photonic wafer can be separated by cutting the SOI wafer 1 . This is specifically shown in Figure 16. In Figure 16, each small grid represents a wafer. After all processes are completed on the wafer, each wafer can be separated by cutting.

It should be understood that although the steps in the flowchart of FIG. 10 are shown in sequence as indicated by arrows, these steps are not necessarily executed in the order indicated by arrows. Unless explicitly stated in this article, there is no strict order limit on the execution of these steps, and these steps can be executed in other sequences. Moreover, at least some of the steps in Figure 11 may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but may be executed at different times. The execution order of these steps or stages is also It does not necessarily need to be performed sequentially, but may be performed in turn or alternately with other steps or at least part of steps or stages in other steps.

In the description of this specification, reference to the terms "some embodiments," "other embodiments," "ideal embodiments," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in the specification. at least one embodiment or example of the invention. In this specification, schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

The technical features of the above-mentioned embodiments can be combined in any combination. To simplify the description, all possible combinations of the technical features of the above-mentioned embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, all possible combinations should be considered. It is within the scope of this manual.

The foregoing embodiments only express several implementation modes of the present invention. The descriptions are relatively specific and detailed, but should not be construed as limiting the scope of the patent application. It should be pointed out that for those of ordinary skill in the art, multiple modifications and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the scope of protection of the patent of the present invention should be determined by the appended claims.

1: SOI wafer 11:Substrate 12: Buried oxide layer 13: Device layer 2: First electrode 3: Second electrode 31: Doped waveguide 32: Doped contact area 4: Upper cladding 41:First window 5: Liquid crystal layer 6:Substrate 7: Orientation layer 8: Guide electrode

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the traditional technology, the drawings needed to be used in the description of the embodiments or the traditional technology will be briefly introduced below. Obviously, the drawings in the following description are only for the purpose of describing the present invention. For some embodiments of the invention, those with ordinary skill in the art can also obtain other drawings based on these drawings without exerting creative efforts.

Figure 1 is a schematic cross-sectional view of a silicon photonic chip provided in an embodiment; Figure 2 is a schematic cross-sectional view of a silicon photonic chip provided in another embodiment; Figure 3 is a schematic cross-sectional view of a silicon photonic chip provided in another embodiment; Figure 4 is a schematic cross-sectional view of a silicon photonic chip provided in another embodiment; Figure 5 is a schematic cross-sectional view of a silicon photonic chip provided in another embodiment; Figure 6 is a schematic cross-sectional view of a silicon photonic chip provided in another embodiment; Figure 7 is a schematic cross-sectional view of a silicon photonic chip provided in another embodiment; Figure 8 is a schematic cross-sectional view of an optical waveguide device covered with a liquid crystal layer in one embodiment; Figure 9 is a schematic cross-sectional view of an optical waveguide device covered with a liquid crystal layer in another embodiment; Figure 10 is a schematic flow chart of a method for preparing a silicon photonic chip provided in one embodiment; Figure 11 is a schematic cross-sectional view of the structure obtained in step S1001 of the silicon photonic chip preparation method provided in one embodiment; Figure 12 is a schematic cross-sectional view of the structure obtained in step S1002 of the method for preparing a silicon photonic chip provided in one embodiment; Figure 13 is a schematic cross-sectional view of the structure obtained in step S1003 of the silicon photonic chip preparation method provided in one embodiment; Figure 14 is a schematic cross-sectional view of the structure obtained in step S1004 of the method for preparing a silicon photonic chip provided in one embodiment; Figure 15 is a schematic cross-sectional view of the structure obtained in step S1005 of the silicon photonic chip preparation method provided in one embodiment; FIG. 16 is a top view of an SOI wafer to be cut in one embodiment.

1: SOI wafer

11:Substrate

12: Buried oxide layer

13: Device layer

2: First electrode

3: Second electrode

4: Upper cladding

5: Liquid crystal layer

6:Substrate

7: Orientation layer

Claims (16)

A silicon photonic chip, characterized by including: substrate; The buried oxide layer is located on the surface above the aforementioned substrate; The device layer is located on the surface of the buried oxide layer away from the substrate, and the device layer includes an optical waveguide device; The upper cladding layer covers the exposed device layer, and a first window is provided in the upper cladding layer. The first window is located above the optical waveguide device to expose the optical waveguide device; A liquid crystal layer is filled in the first window to cover the optical waveguide device; The first electrode and the second electrode are respectively located on both sides of the aforementioned liquid crystal layer, and are used to form an electric field that drives the deflection of the aforementioned liquid crystal layer, so as to adjust the refractive index of the aforementioned liquid crystal layer to adjust the light field of the light beam transmitted in the aforementioned optical waveguide device; and The substrate is located at the first window, and the substrate covers the liquid crystal layer to encapsulate the liquid crystal layer at the first window. The silicon photonic chip according to claim 1, further comprising an alignment layer, the alignment layer being disposed between the substrate and the liquid crystal layer. The silicon photonic chip according to claim 1, wherein the first electrode is provided on the surface of the substrate away from the liquid crystal layer or close to the surface of the liquid crystal layer; The aforementioned second electrode is provided on one side of the aforementioned buried oxide layer close to the aforementioned substrate, and is opposite to the aforementioned first electrode and located on the upper and lower sides of the aforementioned liquid crystal layer; The silicon photonic chip further includes a guide electrode, which penetrates the substrate and is electrically connected to the second electrode; or the guide electrode penetrates the upper cladding layer and the buried oxide layer and is electrically connected to the second electrode. The silicon photonic chip according to claim 1, wherein the first electrode is provided on the surface of the substrate away from the liquid crystal layer or close to the surface of the liquid crystal layer; A second window is provided in the substrate, the second window exposes the buried oxide layer, and the second electrode is disposed in the second window. The silicon photonic chip according to claim 1, wherein the first electrode and the second electrode are respectively provided in the upper cladding layer on both sides of the liquid crystal layer, and the first electrode and the second electrode are along the left and right sides of the liquid crystal layer. The two sides are set opposite each other. The silicon photonic chip according to claim 1, wherein the first electrode is provided on the surface of the substrate away from the liquid crystal layer or close to the surface of the liquid crystal layer; The aforementioned optical waveguide device includes a doped waveguide and doped contact regions connected thereto on both sides, and the aforementioned doped waveguide is a second electrode; The upper cladding layer on both sides of the liquid crystal layer is respectively provided with a guide electrode penetrating from the upper surface of the upper cladding layer to the doped contact region, and the guide electrode is electrically connected to the doped contact region. The silicon photonic chip according to any one of claims 1 to 6, wherein the aforementioned optical waveguide device includes one of an optical coupler, an optical resonator, an optical polarizer, an optical interferometer, an optical phase shifter and an optical modulator. or more. The silicon photonic chip according to claim 7, wherein the optical waveguide device includes a grating structure, and the absolute value of the difference between the duty cycle of the grating structure along the light transmission direction and the preset threshold gradually decreases. A method for preparing a silicon photonic chip, including: Provide an SOI wafer, the aforementioned SOI wafer sequentially includes a substrate, a buried oxide layer and a top layer of silicon along the thickness direction, and a plurality of optical waveguide devices are produced on the aforementioned top layer of silicon; Form an upper cladding layer on the surface of the exposed buried oxide layer and the aforementioned optical waveguide device; Make electrodes at preset locations; A first window is opened in the upper cladding layer at a position covering the optical waveguide device to expose the optical waveguide device; Filling the first window with a liquid crystal layer so that the liquid crystal layer covers the optical waveguide device, wherein the electrodes are used to form an electric field that drives the deflection of the liquid crystal layer; and A substrate is covered on the liquid crystal layer to encapsulate the liquid crystal layer in the first window. The method for preparing a silicon photonic chip as claimed in claim 9, wherein the aforementioned preparation of electrodes at a predetermined position includes: A first electrode and a second electrode arranged opposite each other are respectively made in the upper cladding layer on the left and right sides of the liquid crystal layer. The method for preparing a silicon photonic chip according to claim 10, wherein the first electrode and the second electrode respectively arranged opposite each other in the cladding layers on the left and right sides of the liquid crystal layer include: A first through hole and a second through hole are respectively provided in the upper cladding layer on both sides of the aforementioned liquid crystal layer; Filling the first through hole with conductive material to form the first electrode; and The second through hole is filled with conductive material to form the second electrode. The method for preparing a silicon photonic chip according to claim 9, wherein the aforementioned preparation of electrodes at a predetermined position includes: A first electrode and a second electrode arranged oppositely are respectively formed on the upper and lower sides of the liquid crystal layer. The method for preparing a silicon photonic chip according to claim 12, wherein the manufacturing of first electrodes and second electrodes arranged oppositely on the upper and lower sides of the liquid crystal layer includes: Plating a conductive film on the surface of the substrate to form the first electrode; A second window is opened in the substrate, and the second window exposes the buried oxide layer; and The second electrode is formed in the second window. The method for preparing a silicon photonic chip according to claim 9, wherein the aforementioned preparation of electrodes at a predetermined position includes: Plating a conductive film on the surface of the aforementioned substrate to form a first electrode; Doping forms a second electrode in the optical waveguide device; alternatively, the SOI wafer further includes a conductive layer preset between the substrate and the buried oxide layer, and the conductive layer forms the second electrode; and A through hole is made from the upper surface of the upper cladding layer or the bottom surface of the substrate to the second electrode, and conductive material is filled in the through hole to form a guide electrode. The guide electrode is electrically connected to the second electrode. The method for preparing a silicon photonic chip according to claim 9, wherein the first window penetrates to the left and right sides of the optical waveguide device, so that the liquid crystal layer covers the upper part and the left and right sides of the optical waveguide device; or The first window penetrates to the buried oxide layer or substrate, so that the liquid crystal layer covers the optical waveguide device and fills the left and right sides of the optical waveguide device or wraps the optical waveguide device. The method for preparing a silicon photonic chip according to any one of claims 9 to 15 also includes: Cut the aforementioned SOI wafer and separate each of the aforementioned silicon photonic wafers.

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