TW202320165A - Etching method, method for manufacturing semiconductor device, etching program, and plasma processing device - Google Patents

Abstract

This etching method comprises: a step for providing a substrate that comprises a layer to be etched that includes a silicon-containing layer, and a mask that includes metal having openings defined by side walls on the layer to be etched; a step for providing a processing gas that contains a metal-containing gas; and a step for generating plasma from the processing gas, forming a protective layer that contains metal on the upper part and side walls of the mask, and etching the layer to be etched via the openings.

Description

Etching method, manufacturing method of semiconductor device, etching process and plasma treatment device

The present invention relates to an etching method, a manufacturing method of a semiconductor device, an etching program and a plasma treatment device.

A method has been proposed in which, when etching an insulating film such as an oxide film using a plasma containing gas such as carbon and fluorine, in order to suppress the abnormal shape caused by localized electrification during etching, by adding WF to the etching gas ₆ gases to form the conductive layer. Prior Art Documents Patent Documents

Patent Document 1: Japanese Patent Application Laid-Open No. 9-50984

The invention provides an etching method capable of increasing the selectivity of a metal-containing mask, a manufacturing method of a semiconductor device, an etching program and a plasma treatment device. [Technical means to solve the problem]

An etching method according to an aspect of the present invention has the following steps: providing a substrate having a layer to be etched including a layer containing silicon, and a mask including metal having an opening defined by a sidewall on the layer to be etched; processing gas including metal-containing gas; and generating plasma from the processing gas to form a protective layer containing metal on the top and side walls of the mask, and etch the etching target layer through the opening. [Effect of Invention]

According to the present invention, the selectivity of metal-containing masks can be increased.

Hereinafter, embodiments of the disclosed etching method, semiconductor device manufacturing method, etching program, and plasma processing apparatus will be described in detail based on the drawings. In addition, the disclosed technology is not limited by the following embodiments.

In the etching of the dielectric film, for example, when using a metal-containing mask such as tungsten carbide (WC), there is a selectivity ratio (etching rate of the dielectric film/metal-containing mask) when the metal-containing mask is etched. The etch rate) is reduced. As the miniaturization of the semiconductor manufacturing process progresses, the reduction in the selectivity of the metal-containing mask may become a problem. Therefore, it is desired to increase the selectivity of metal-containing masks.

[Structure of plasma processing apparatus 10] FIG. 1 is a schematic cross-sectional view showing an example of a plasma processing apparatus according to an embodiment of the present invention. The plasma processing device 10 shown in FIG. 1 is a capacitively coupled plasma processing device. The plasma processing apparatus 10 includes a chamber 12 . The chamber 12 has a substantially cylindrical shape. The chamber 12 provides its inner space as a processing space 12c. The chamber 12 is formed of aluminum, for example. The inner wall surface of the chamber 12 is treated with plasma resistance. For example, the inner wall surface of the chamber 12 is anodized. Chamber 12 is electrically grounded.

Also, a passage 12p is formed on the side wall of the chamber 12 . A wafer (substrate) W as an example of a target object passes through the passage 12p when being carried into the processing space 12c and when being carried out from the processing space 12c. This passage 12p can be opened and closed by a gate valve 12g.

A supporting portion 13 is provided on the bottom of the chamber 12 . The support portion 13 is formed of an insulating material. The support portion 13 has a substantially cylindrical shape. The support part 13 extends vertically from the bottom of the chamber 12 in the processing space 12c. The supporting portion 13 supports the stage 14 . The stage 14 is installed in the processing space 12c. The stage 14 is an example of a stage and a substrate support.

The stage 14 has a lower electrode 18 and an electrostatic chuck 20 . The stage 14 may further include an electrode plate 16 . The electrode plate 16 is formed of a conductor such as aluminum, and has a substantially disc shape. The lower electrode 18 is disposed on the electrode plate 16 . The lower electrode 18 is formed of a conductor such as aluminum, and has a substantially disc shape. The lower electrode 18 is electrically connected to the electrode plate 16 .

The electrostatic chuck 20 is disposed on the lower electrode 18 . A wafer W is placed on the upper surface of the electrostatic chuck 20 . The electrostatic chuck 20 has a body formed of a dielectric. A film-shaped electrode is disposed in the body of the electrostatic chuck 20 . Electrodes of the electrostatic chuck 20 are connected to a DC power source 22 through a switch. When the voltage from the DC power supply 22 is applied to the electrodes of the electrostatic chuck 20 , an electrostatic attraction force is generated between the electrostatic chuck 20 and the wafer W. The wafer W is attracted to the electrostatic chuck 20 by the generated electrostatic attraction, and is held by the electrostatic chuck 20 .

On the peripheral portion of the lower electrode 18 , a focus ring FR is arranged so as to surround the edge of the wafer W. As shown in FIG. The focus ring FR is an example of a fringe ring, and is provided to improve the uniformity of etching. The focus ring FR may be formed of silicon, silicon carbide, or quartz, but is not limited thereto.

Inside the lower electrode 18, a flow path 18f is provided. A heat exchange medium (for example, refrigerant) is supplied to the flow path 18f from the cooler unit 26 provided outside the chamber 12 through the pipe 26a. The heat exchange medium supplied to the flow path 18f returns to the cooler unit 26 through the pipe 26b. In the plasma processing apparatus 10 , the temperature of the wafer W placed on the electrostatic chuck 20 is adjusted by the heat exchange between the heat exchange medium and the lower electrode 18 .

A gas supply line 28 is provided in the plasma processing apparatus 10 . The gas supply line 28 supplies heat transfer gas such as He gas from the heat transfer gas supply mechanism between the upper surface of the electrostatic chuck 20 and the back surface of the wafer W.

The plasma processing apparatus 10 further includes an upper electrode 30 . The upper electrode 30 is disposed above the stage 14 . The upper electrode 30 is supported above the chamber 12 via a member 32 . The member 32 is formed of an insulating material. The upper electrode 30 may include a top plate 34 and a support 36 . The lower surface of the top plate 34 is the lower surface of the processing space 12c side, and defines the processing space 12c. The top plate 34 may be formed of a low-resistance conductor or semiconductor with less Joule heat. A plurality of gas ejection holes 34 a are formed in the top plate 34 . A plurality of gas ejection holes 34 a penetrate the top plate 34 in the thickness direction of the top plate 34 .

The support body 36 supports the top plate 34 in a detachable manner, and can be formed of a conductive material such as aluminum, for example. Inside the support body 36, a gas diffusion chamber 36a is provided. Extending downward from the gas diffusion chamber 36a are a plurality of gas flow holes 36b respectively communicating with the plurality of gas ejection holes 34a. A gas introduction port 36c for introducing a process gas into the gas diffusion chamber 36a is formed in the support body 36 . The gas supply pipe 38 is connected to the gas introduction port 36c. The gas introduction port 36 c is an example of a gas supply port for supplying gas into the chamber 12 .

A gas source group 40 is connected to the gas supply pipe 38 via a valve group 42 and a flow controller group 44 . The gas source group 40 includes a plurality of gas sources. The plurality of gas sources includes a plurality of gas sources constituting a processing gas used in an etching process or the like. The valve group 42 includes a plurality of on-off valves. The flow controller group 44 includes a plurality of flow controllers. Each of the plurality of flow controllers is a mass flow controller or a pressure-controlled flow controller. A plurality of gas sources of the gas source group 40 are connected to the gas supply pipe 38 through the corresponding valves of the valve group 42 and the corresponding flow controllers of the flow controller group 44 .

In the plasma processing apparatus 10 , a mask 46 is detachably provided along the inner wall of the chamber 12 . The mask 46 is also disposed on the outer periphery of the supporting portion 13 . The mask 46 prevents etch by-products from adhering to the chamber 12 . The mask 46 can be formed, for example, by coating ceramics such as Y ₂ O ₃ on an aluminum material.

A baffle 48 is disposed between the support portion 13 and the sidewall of the chamber 12 . The baffle 48 is formed by coating a base material made of aluminum with ceramics such as Y ₂ O ₃ , for example. A plurality of through holes are formed in the baffle plate 48 . An exhaust port 12e is disposed below the baffle plate 48 and at the bottom of the chamber 12 . An exhaust device 50 is connected to the exhaust port 12e via an exhaust pipe 52 . The exhaust device 50 has a pressure control valve and a vacuum pump such as a turbomolecular pump.

The plasma processing apparatus 10 further includes a first high-frequency power source 62 and a second high-frequency power source 64 . The first high frequency power supply 62 is a power supply for generating first high frequency for plasma generation. The frequency of the first high frequency is, for example, a frequency within a range of 27 MHz to 100 MHz. The first high-frequency power source 62 is connected to the lower electrode 18 via a matching unit 66 and the electrode plate 16 . The matching unit 66 has a circuit for matching the output impedance of the first high-frequency power supply 62 with the input impedance of the load side (lower electrode 18 side). Furthermore, the first high-frequency power supply 62 may also be connected to the upper electrode 30 via a matching unit 66 . In addition, the first high-frequency power supply 62 is an example of a plasma generating unit.

The second high-frequency power supply 64 is a power supply for generating a second high-frequency for feeding ions into the wafer W. The frequency of the second high frequency is lower than the frequency of the first high frequency. The frequency of the second high frequency is, for example, a frequency within a range of 400 kHz to 13.56 MHz. The second high-frequency power supply 64 is connected to the lower electrode 18 via a matching unit 68 and the electrode plate 16 . The matching unit 68 has a circuit for matching the output impedance of the second high-frequency power supply 64 with the input impedance of the load side (lower electrode 18 side).

The plasma processing apparatus 10 may further include a DC power supply unit 70 . The DC power supply unit 70 is connected to the upper electrode 30 . The DC power supply unit 70 generates a negative DC voltage, and can apply the DC voltage to the upper electrode 30 .

The plasma processing apparatus 10 may further include a control unit 80 . The control unit 80 may be a computer including a processor, a memory unit, an input device, a display device, and the like. The control unit 80 controls each unit of the plasma processing apparatus 10 . In the control unit 80 , the operator can manage the plasma processing apparatus 10 by using the input device to perform command input operations and the like. In addition, in the control unit 80, the operation status of the plasma processing device 10 can be visually displayed through the display device. Furthermore, in the memory part of the control part 80, the control program and process recipe data for controlling various processes performed in the plasma processing apparatus 10 by a processor are stored. The processor of the control part 80 executes the control program to control each part of the plasma processing device 10 according to the process recipe data, so that desired processing is performed in the plasma processing device 10 .

For example, the control part 80 controls each part of the plasma processing apparatus 10 so that the following etching method may be performed. As a detailed example, the control unit 80 executes the process of providing a wafer (substrate) W having a layer to be etched including a layer containing silicon, and a layer defined by side walls on the layer to be etched. The opening of the opening contains a metal mask. Moreover, the control part 80 executes the process of supplying the process gas containing metal containing gas. In addition, the control unit 80 executes the process of generating plasma from the process gas, forming a protective layer containing metal on the upper portion and side walls of the mask, and etching the etching target layer through the opening.

[Substrate to be processed] Next, a substrate to be etched will be described with reference to FIGS. 2 and 3 . FIG. 2 is a diagram schematically showing an example of the structure of a substrate etched by the plasma processing apparatus of this embodiment. The wafer W shown in FIG. 2 has a silicon-containing layer 102 and a mask 103 on a silicon substrate 101 . Examples of the silicon-containing layer (silicon-containing film) 102 include a silicon oxide layer (SiO ₂ ), a silicon nitride layer (SiN), and a Low-k layer. Furthermore, the silicon-containing layer 102 is an example of a silicon-containing dielectric layer. As a Low-k layer, a SiOC layer is mentioned, for example. Furthermore, the silicon-containing layer 102 may also be a stacked structure including a silicon oxide layer and a Low-k layer, a silicon oxide layer and a silicon nitride layer, or a silicon nitride layer and a Low-k layer. Furthermore, the silicon-containing layer 102 is an example of an etching target layer.

The mask 103 is a layer formed with a mask pattern of openings having a specific pattern, for example, comb-shaped openings defined by side walls. The mask 103 is, for example, a metal-containing mask. Examples of metal-containing masks include tungsten, tungsten carbide (WC), molybdenum, or titanium nitride (TiN). The distance between openings of the mask 103 is, for example, about 30 nm, and the line CD (Critical Dimension, critical dimension) is, for example, about 10 nm. In addition, the thickness of the mask 103 is, for example, about 20 nm, and the thickness of the silicon-containing layer 102 is, for example, about 200 nm. In addition, in this embodiment, it is assumed that the wafer W to be processed is a substrate for logic elements. In addition, the wafer W to be processed may be used for purposes other than logic elements, for example, it can also be applied to substrates for memory devices formed with a high aspect ratio of 30 or more.

In addition, the metal or metal compound contained in the mask 103 includes the above examples, for example, tungsten (W), tungsten carbide (WCα (α is a real number exceeding 0, for example, α=1) ), tungsten silicide (WSiβ (β is a real number exceeding 0, for example, β = 1 or 2)), titanium (Ti), titanium nitride (TiNγ (γ is a real number exceeding 0, for example, γ = 1)), Tantalum nitride (TaNδ (δ is a real number exceeding 0, for example, δ = 1)), molybdenum carbide (MoεC (ε is a real number exceeding 0, for example, ε = 1 or 2)), molybdenum nitride (MoζN (ζ It is a real number exceeding 0, for example, ζ=1 or 2)), molybdenum silicide (MoSiη (n is a real number exceeding 0, for example, n=1 or 2)), molybdenum boride (MoBΘ (Θ is a real number exceeding 0) , for example, Θ=1, 2 or 3)), molybdenum oxide (MoOι (ι is a real number exceeding 0, for example, ι=1, 2 or 3)), rhenium (Re), rhenium oxide (ReOκ (κ is more than A real number of 0, for example, κ=1, 2 or 3)), and rhenium nitride (ReNλ (λ is a real number exceeding 0, for example, λ=1 or 2)). Metal elements such as tungsten (W), titanium (Ti), tantalum (Ta), molybdenum (Mo), and rhenium (Re) may also be included in the mask 103 . Furthermore, boron nitride (BN) may also be included in the mask 103 . Non-metallic elements such as boron (B), carbon (C), nitrogen (N), oxygen (O), silicon (Si), phosphorus (P), and sulfur (S) may also be included in the mask 103 .

FIG. 3 is a diagram schematically showing an example of the progress of etching of the substrate in this embodiment. In this embodiment, as shown in states 104 to 106 in FIG. 3 , the silicon-containing layer 102 of the wafer W is etched. State 104 is the state before the start of etching. State 105 represents the state in which etching is in progress. A protective layer 107 containing tungsten is formed on the top (upper surface) and sidewalls of the mask 103 , and grooves 108 are formed through the opening of the mask 103 . At this time, the passivation layer 107 is thinly deposited on the sidewall of the mask 103 and thickly deposited on the top of the mask 103 . That is, the thickness of the protective layer 107 formed on the top of the mask 103 is greater than the thickness of the protective layer formed on the sidewall of the mask 103 . For example, the thickness of the protective layer 107 on the sidewall of the mask 103 is about 1 nm, and the film thickness ratio of the upper part to the sidewall (film thickness of the upper part/film thickness of the sidewall) can also be more than 2 and less than 5. In another example, the film thickness ratio of the upper part to the side wall (film thickness of the upper part/film thickness of the side wall) may be 5 or more. Also, in another example, the film thickness ratio of the upper part to the side wall (film thickness of the upper part/film thickness of the side wall) may be less than 2. In addition, the thickness of the protective layer 107 formed on the side wall of the mask 103 can also be formed such that it becomes thinner from the top of the opening of the mask 103 toward the depth direction. Furthermore, through the etching process, the thickness of the protection layer 107 formed on the top of the mask 103 may also be less than the thickness of the protection layer formed on the sidewall of the mask 103 . State 106 is a state in which the groove 108 reaches the silicon substrate 101 by further etching from the state 105 . If etching is performed up to state 106, it is determined that a specific shape (in one example, a specific aspect ratio) has been obtained and the etching is terminated. In addition, in FIG. 3 , the case of etching other than the two grooves 108 is omitted.

[etching method] Next, the etching method of this embodiment will be described. FIG. 4 is a flow chart showing an example of the etching process in this embodiment.

In the etching method of this embodiment, the control part 80 performs control so that the gate valve 12g may be opened. Then, the wafer W with the mask 103 formed on the silicon-containing layer 102 is loaded into the chamber 12 and placed on the electrostatic chuck 20 of the stage 14 . The wafer W is held on the electrostatic chuck 20 by applying a DC voltage to the chucking electrodes (not shown) in the electrostatic chuck 20 . Then, the control unit 80 controls to close the gate valve 12g, and by controlling the exhaust device 50, gas is exhausted from the processing space 12c so that the environment of the processing space 12c becomes a specific vacuum degree. Furthermore, the control unit 80 controls the temperature adjustment module (not shown) to adjust the temperature of the wafer W so that the temperature becomes a specific temperature (step S1 ).

Next, the control unit 80 performs control to start supply of the processing gas (step S2). The control unit 80 performs control so that the mixed gas of WF ₆ , C ₄ F ₆ , O ₂ and Ar (hereinafter referred to as WF ₆ /C ₄ F ₆ /O ₂ /Ar gas) is treated as a gas containing tungsten. The gas is supplied to the gas introduction port 36c. Furthermore, the carbon- and fluorine-containing gas exemplified by C ₄ F ₆ may be a gas containing one or more of fluorocarbon gas and hydrofluorocarbon gas. That is, the gas containing carbon and fluorine is a gas containing C _x H _y F _z (x, z are integers of 1 or more, and y is an integer of 0 or more). C _x H _y F _z is C ₂ F ₄ , CF ₄ , C ₃ F ₄ , _{C 3 F 8 , C 4 F 8} , C ₄ F ₆ , C ₅ F ₈ , CH ₂ F ₂ , CH ₂ F ₃ , CHF ₃ , CH ₃ F and other compounds with carbon-fluorine bonds. Also, the oxygen-containing gas may be CO gas, CO ₂ gas, or the like. Furthermore, the processing gas may not contain oxygen-containing gas such as O ₂ . In addition, the Ar gas may be other rare gas, such as Xe gas, or an inert gas such as N ₂ gas instead of the rare gas.

Furthermore, the processing gas is not limited to the processing gas containing tungsten-containing gas, and may also be the processing gas containing other metal-containing gases. As the metal-containing gas, in addition to the above-mentioned tungsten hexafluoride (WF ₆ ) gas, for example, tungsten hexabromide (WBr ₆ ) gas, tungsten hexachloride (WCl ₆ ) gas, WF ₅ Cl gas, hexa Tungsten carbonyl (W(CO) ₆ ) gas, titanium tetrachloride (TiCl ₄ ) gas, molybdenum pentafluoride (MoF ₅ ) gas, vanadium hexafluoride (VF ₆ ) gas, platinum hexafluoride (PtF ₆ ) gas , hafnium tetrafluoride (HfF ₄ ) gas, and niobium pentafluoride (NbF ₅ ) gas. In addition, the metal-containing gas may be a metal-halogen-containing gas. Furthermore, the metal-containing gas may also contain metal elements such as tungsten, titanium, molybdenum, vanadium, platinum, hafnium, niobium, tantalum, and rhenium.

After being supplied to the gas introduction port 36c, the processing gas is supplied to the gas diffusion chamber 36a and diffused. After being diffused in the gas diffusion chamber 36a, the processing gas is supplied to the processing space 12c of the chamber 12 in a shower through the plurality of gas ejection holes 34a, and then introduced into the processing space 12c.

The control unit 80 supplies high-frequency power (first high-frequency power) for generating plasma to the lower electrode 18 by controlling the first high-frequency power supply 62 . That is, in the processing space 12c, plasma is generated from the processing gas by the high-frequency power for plasma generation. Here, the high-frequency power for plasma generation is less than 5 kW, preferably less than 5.6 W/cm ² . The wafer W is plasma treated by the generated plasma. That is, the control unit 80 controls to supply high-frequency power for plasma generation into the chamber 12 to generate plasma from the processing gas, and to etch the silicon-containing layer 102 through the mask 103 (step S3) . Furthermore, in this embodiment, the electrical bias voltage (second high-frequency power) from the second high-frequency power supply 64 is not supplied, but the ions in the plasma are transferred by the plasma supplied to the lower electrode 18 High-frequency power is generated and fed to the wafer W side for etching.

The control unit 80 determines whether a specific shape is obtained in step S3 based on the information obtained from the unillustrated sensor of the plasma processing device 10 , the processing time corresponding to the recipe, etc. (step S4 ). When the control part 80 determines that the specific shape has not been obtained (step S4: NO), the process returns to step S3. On the other hand, when the control unit 80 determines that a specific shape has been obtained (step S4: Yes), the processing is terminated.

The control unit 80 performs control to stop supply of the processing gas when the processing ends. In addition, the control unit 80 controls to apply a positive and negative DC voltage to the electrostatic chuck 20 to remove static electricity, and the wafer W is peeled off from the electrostatic chuck 20 . The control unit 80 controls to open the gate valve 12g. The wafer W is carried out from the processing space 12c of the chamber 12 through the passage 12p.

Furthermore, the unloaded wafer W is subjected to removal of the mask 103, formation of a conductive material functioning as a contact pad, and the like by another substrate processing apparatus or the like. That is, a semiconductor device using the wafer W to which the above-mentioned etching method is applied is manufactured.

[Experimental Results] Next, the experimental results will be described using FIGS. 5 to 7 . FIG. 5 is a diagram showing an example of experimental results in this embodiment and a reference example. FIG. 5 shows experimental results of a reference example in which WF ₆ is not added to the processing gas, and an example corresponding to this embodiment in which WF ₆ is added to the processing gas. In addition, the following processing conditions were used as processing conditions. Also, in the wafer W, a silicon oxide layer (SiO ₂ ) is used as the silicon-containing layer 102 . In addition, tungsten carbide (WC) is used for the mask 103 .

<Processing conditions> 1st high-frequency power (40 MHz): 300 W 2nd high-frequency power (400 kHz): 0 W Process gas Reference example: C ₄ F ₆ /O ₂ /Ar gas Example: WF ₆ /C ₄ F ₆ /O ₂ /Ar gas (the flow ratio of WF ₆ is less than 1%) Processing time: 30 seconds

As shown in FIG. 5 , the remaining amount of the mask 103 was 12.5 nm in the reference example, whereas it was 14.8 nm in the example. The loss (consumption amount) of the mask 103 was 3.9 nm in the reference example, but it was reduced to 1.6 nm in the example. The amount of etching was consistent so that the depth was substantially the same, and it was 15.9 nm in the reference example and 15.7 nm in the example. The mask selection ratio was 4.1 in the reference example, but it was 9.8 in the embodiment, which was improved by more than 2 times.

Fig. 6 is a graph showing an example of the relationship between the flow rate of tungsten hexafluoride gas and the mask selectivity ratio. The graph 110 of FIG. 6 shows the relationship between the flow rate of WF ₆ gas and the mask selection ratio in the experimental results of FIG. 5 . As shown in the graph 110, in the reference example where the WF ₆ gas addition flow rate is 0 sccm, the WC mask selection ratio is 4.1, and in the WF ₆ gas addition flow rate is 5 sccm embodiment, the WC mask selection ratio is 9.8. That is, by adding WF ₆ gas to the process gas, the selectivity ratio of the mask 103 of tungsten carbide (WC) as the metal-containing mask to the silicon-containing layer 102 as the silicon oxide layer can be increased (improved). Also, the ratio (flow ratio) of the flow rate of the WF ₆ gas to the total flow rate of the process gas is preferably 10% or less, more preferably 5% or less, and still more preferably 1% or less.

Next, the effect of the voltage of the electrical bias on the mask selectivity ratio will be described. Fig. 7 is a diagram showing an example of the relationship between bias voltage and mask selection ratio. In the graph 111 shown in FIG. 7 , when WF ₆ gas is added to the process gas, the voltage (shown as bias voltage in FIG. 7 ) (0 V) at which no electrical bias voltage is supplied is shown. The WC mask selection ratio of the case and the case of supplying the voltage of the electrical bias voltage (-500 V). In addition, graph 111 shows the WC mask selection ratio when WF ₆ gas is not added to the process gas and when no bias voltage (0 V) is supplied as a reference. As shown in the graph 111, it can be seen that when the bias voltage (0 W) is not supplied, the WC mask selectivity is improved by adding WF ₆ gas. On the other hand, it can be seen that when the bias voltage (-500 V) is supplied, the WC mask selectivity is not improved even if WF ₆ gas is added. That is, it can be seen that when the bias voltage is small, the effect of improving the WC mask selection ratio is large.

In addition, in the etching process, for the purpose of increasing the etching rate, etc., a voltage for an electrical bias for feeding ions may be supplied from the second high-frequency power supply 64 to the lower electrode 18 . In this case, the voltage of the electrical bias is preferably not less than -500 V and not more than 0 V.

As shown in the above-mentioned present embodiment, when a specific amount of WF ₆ is added to the process gas and no bias voltage is supplied or a low bias voltage is supplied, the mask selectivity improves. Due to the high affinity of metal elements, WF ₆ is easier to deposit on the metal-containing mask than the etched layer as a silicon-containing layer (silicon oxide layer, silicon nitride layer, Low-k layer, etc.). On the other hand, when no bias voltage is supplied or a low bias voltage is supplied, since the energy of ions incident on the substrate becomes 0 or becomes low, etching of deposits is suppressed. Through the interaction of the addition of WF ₆ and the control of the bias voltage, there is an effect that WF ₆ is more deposited on the metal-containing mask, and thus the mask selectivity is improved. Furthermore, since the mask containing tungsten which is the same type of metal as the tungsten contained in WF ₆ , the bonding between metal elements becomes stronger, even if the metals of different types are also having this effect. In another example, it is also possible to use a processing gas containing a gas containing tungsten as an additive gas to etch the etched layer through a mask containing a metal other than tungsten, or to use a processing gas containing a metal other than tungsten. The gas is used as an additive gas to etch the layer to be etched through a mask containing tungsten. In addition, the layer to be etched may be etched through a mask containing a metal other than tungsten by using a processing gas including a gas containing a metal other than tungsten as an additive gas. That is, the metal contained in the mask 103 and the metal contained in the metal-containing gas may be the same metal or different metals. Also in these cases, the mask selection ratio can be increased similarly.

In addition, in the above-mentioned embodiment, the plasma processing apparatus 10 which is a capacitively coupled plasma processing apparatus that supplies high-frequency power and bias voltage for generating plasma to the lower electrode 18 is used, but the present invention is not limited thereto. For example, a capacitively coupled plasma processing apparatus of a type that supplies high-frequency power for plasma generation to the upper electrode 30 and a bias voltage to the lower electrode 18 may be used.

As described above, according to the present embodiment, the control unit 80 controls each unit of the device to execute the process of providing the substrate (wafer W) having the etching target layer including the silicon-containing layer 102 and the etching target layer 102. A metal-containing mask 103 having openings defined by sidewalls thereon. The control part 80 controls each part of the apparatus, and executes the process of supplying the processing gas including the metal-containing gas. The control unit 80 controls each part of the device to perform the process of generating plasma from the processing gas, forming a protective layer containing metal on the upper part and side walls of the mask 103, and etching the etching target layer through the opening. As a result, the selectivity of the metal-containing mask 103 can be improved.

Also, according to the present embodiment, the mask 103 contains at least one metal element selected from the group consisting of tungsten, titanium, tantalum, molybdenum, and rhenium. As a result, the selectivity of the metal-containing mask 103 can be improved.

Moreover, according to this embodiment, the mask 103 contains at least one nonmetal element selected from the group consisting of boron, carbon, nitrogen, oxygen, silicon, phosphorus, and sulfur. As a result, the selectivity of the metal-containing mask 103 can be improved.

Also, according to this embodiment, the mask 103 is made of a material selected from tungsten, tungsten carbide, tungsten silicide, titanium, titanium nitride, tantalum nitride, molybdenum carbide, molybdenum nitride, molybdenum silicide, molybdenum boride, molybdenum oxide, rhenium, At least one of the group consisting of rhenium oxide and rhenium nitride. As a result, it is possible to increase (improve) the compound containing the selected from tungsten, tungsten carbide, tungsten silicide, titanium, titanium nitride, tantalum nitride, molybdenum carbide, molybdenum nitride, molybdenum silicide, molybdenum boride, molybdenum oxide, rhenium, rhenium oxide , the selectivity ratio between the mask 103 of at least one of the group consisting of rhenium nitride and the layer 102 containing silicon.

Also, according to the present embodiment, the metal-containing gas is a metal-halogen-containing gas. As a result, the selectivity of the metal-containing mask 103 can be improved.

Also, according to this embodiment, the metal-containing gas contains at least one metal element selected from the group consisting of tungsten, titanium, molybdenum, vanadium, platinum, hafnium, niobium, tantalum, and rhenium. As a result, the selectivity of the metal-containing mask 103 can be improved.

Also, according to this embodiment, the metal-containing gas includes a gas selected from tungsten hexafluoride (WF ₆ ) gas, tungsten hexabromide (WBr ₆ ) gas, tungsten hexachloride (WCl ₆ ) gas, WF ₅ Cl gas, hexa Composed of tungsten carbonyl (W(CO) ₆ ) gas, titanium tetrachloride gas, molybdenum pentafluoride gas, vanadium hexafluoride gas, platinum hexafluoride gas, hafnium tetrafluoride gas, and niobium pentafluoride gas group of at least one gas. As a result, the selectivity of the metal-containing mask 103 can be improved.

Also, according to the present embodiment, the metal contained in the mask 103 is the same metal as the metal contained in the metal-containing gas. As a result, the selectivity of the metal-containing mask 103 can be improved.

Also, according to the present embodiment, the metal contained in the mask 103 and the metal contained in the metal-containing gas are different metals. As a result, the selectivity of the metal-containing mask 103 can be improved.

Also, according to the present embodiment, the processing gas contains CxHyFz (x, z are integers of 1 or more, and y is an integer of 0 or more) gas. As a result, the selectivity of the metal-containing mask 103 can be improved.

Also, according to the present embodiment, the CxHyFz gas contains a gas selected from the group consisting of CF ₄ , C ₃ F ₈ , C ₄ F ₈ , C ₄ F ₆ , C ₅ F ₈ , CH ₂ F ₂ , CHF ₃ , and CH ₃ F of at least one gas. As a result, the selectivity of the metal-containing mask 103 can be improved.

Moreover, according to the present embodiment, the processing gas further includes an oxygen-containing gas. As a result, the selectivity of the metal-containing mask 103 can be improved.

Also, according to the present embodiment, the control unit 80 supplies an electrical bias voltage for feeding ions in the etching process, and the voltage of the electrical bias voltage is not less than -500 V and not more than 0 V. As a result, the selectivity of the mask 103 made of metal can also be increased in a capacitively coupled plasma processing apparatus of the type that supplies high-frequency power for generating plasma to the upper electrode 30 .

Also, according to the present embodiment, no electrical bias voltage for feeding ions is supplied during the etching process. As a result, the selectivity of the metal-containing mask 103 can be improved.

Also, according to the present embodiment, the generated plasma is capacitively coupled plasma or inductively coupled plasma. As a result, the selectivity of the metal-containing mask 103 can be improved.

Also, according to the present embodiment, the generated plasma is capacitively coupled plasma, the substrate is held on the substrate support (stage 14), and high-frequency power for plasma generation is supplied to the substrate support. As a result, the wafer W can be etched by feeding ions or the like with the high-frequency power supplied to the lower electrode 18 of the stage 14 for plasma generation.

Also, according to this embodiment, the thickness of the protective layer formed on the upper portion of the mask is made larger than the thickness of the protective layer formed on the side wall of the mask. As a result, the selectivity of the metal-containing mask can be improved.

Also, according to the present embodiment, the thickness of the protective layer formed on the side wall of the mask becomes thinner from the upper portion of the opening toward the depth direction. As a result, the selectivity of the metal-containing mask can be improved.

Also, according to the present embodiment, the substrate is a substrate for logic elements. As a result, etching suitable for logic elements can be performed.

Also, according to the present embodiment, there is provided a method of manufacturing a semiconductor device to which the above-mentioned etching method is applied. As a result, a semiconductor device can be manufactured.

Also, according to the present embodiment, an etching program for causing a plasma processing apparatus to execute the above-mentioned etching method is provided. As a result, the above-described etching method can be performed using a plasma processing apparatus.

It should be considered that the embodiment disclosed this time is an illustration and not restrictive in any respect. The above-mentioned embodiments can also be omitted, replaced, and changed in various forms without departing from the scope of the attached patent application and its gist.

In addition, in the above-mentioned embodiment, the plasma processing apparatus 10 for performing etching and other processing on the wafer W using capacitively coupled plasma has been described as an example, but the technology disclosed is not limited thereto. The plasma source is not limited to capacitively coupled plasma as long as it is a device that uses plasma to process the wafer W. For example, any plasma source such as inductively coupled plasma, microwave plasma, or magnetron plasma can be used. .

Regarding the above embodiment, the following additional notes are further disclosed.

(Appendix 1) an etching method, which has the following steps: A substrate is provided, the substrate has an etching target layer including a silicon-containing layer, and a metal-containing mask having an opening defined by a sidewall on the etching target layer; supply of process gases including metal-containing gases; and A plasma is generated from the processing gas, a metal-containing protective layer is formed on the upper portion of the mask and the sidewall, and the etching target layer is etched through the opening.

(Supplementary Note 2) The etching method as in Supplementary Note 1, wherein The mask includes at least one metal element selected from the group consisting of tungsten, titanium, tantalum, molybdenum, and rhenium.

(Supplementary Note 3) The etching method of Supplementary Note 1 or 2, wherein The mask includes at least one non-metallic element selected from the group consisting of boron, carbon, nitrogen, oxygen, silicon, phosphorus, and sulfur.

(Supplementary Note 4) The etching method according to any one of Supplementary Notes 1 to 3, wherein The above-mentioned mask contains a material selected from the group consisting of tungsten, tungsten carbide, tungsten silicide, titanium, titanium nitride, tantalum nitride, molybdenum carbide, molybdenum nitride, molybdenum silicide, molybdenum boride, molybdenum oxide, rhenium, rhenium oxide, rhenium nitride At least one of the groups formed.

(Supplementary Note 5) The etching method according to any one of Supplementary Notes 1 to 4, wherein The metal-containing gas mentioned above is a gas containing metal halides.

(Supplementary Note 6) The etching method according to any one of Supplementary Notes 1 to 5, wherein The metal-containing gas includes at least one metal element selected from the group consisting of tungsten, titanium, molybdenum, vanadium, platinum, hafnium, niobium, tantalum, and rhenium.

(Supplementary Note 7) The etching method according to any one of Supplementary Notes 1 to 5, wherein the above-mentioned metal-containing gas contains tungsten hexafluoride gas, tungsten hexabromide gas, tungsten hexachloride gas, WF ₅ Cl gas, six At least one gas in the group consisting of tungsten carbonyl gas, titanium tetrachloride gas, molybdenum pentafluoride gas, vanadium hexafluoride gas, platinum hexafluoride gas, hafnium tetrafluoride gas, and niobium pentafluoride gas.

(Supplementary Note 8) The etching method according to any one of Supplementary Notes 1 to 7, wherein The metal contained in the mask is the same metal as the metal contained in the metal-containing gas.

(Supplementary Note 9) The etching method according to any one of Supplementary Notes 1 to 7, wherein The metal contained in the mask and the metal contained in the metal-containing gas are different metals.

(Supplementary Note 10) The etching method according to any one of Supplementary Notes 1 to 9, wherein The processing gas includes CxHyFz (x, z are integers of 1 or more, y is an integer of 0 or more) gas.

(Supplementary Note 11) The etching method as in Supplementary Note 10, wherein _the above-mentioned CxHyFz gas contains a gas selected from CF ₄ , C ₃ F ₈ , C 4 F ₈ , C ₄ F ₆ , C ₅ F ₈ , CH ₂ F ₂ , CHF ₃ , CH At least one gas of the group consisting of ₃ F.

(Supplementary Note 12) The etching method according to any one of Supplementary Notes 1 to 11, wherein The above-mentioned processing gas further includes an oxygen-containing gas.

(Supplementary Note 13) The etching method according to any one of Supplementary Notes 1 to 12, wherein In the above-mentioned etching process, an electrical bias voltage for feeding ions is supplied, The voltage of the above-mentioned electrical bias voltage is not less than -500 V and not more than 0 V.

(Supplementary Note 14) The etching method according to any one of Supplementary Notes 1 to 12, wherein In the above-mentioned etching process, no electrical bias voltage for feeding ions is supplied.

(Supplementary Note 15) The etching method according to any one of Supplementary Notes 1 to 14, wherein The above-mentioned plasma generated is a capacitively coupled plasma or an inductively coupled plasma.

(Supplementary Note 16) The etching method according to any one of Supplementary Notes 1 to 15, wherein The above-mentioned plasma generated is a capacitively coupled plasma, The above-mentioned substrate is supported by a substrate support, High-frequency power for plasma generation is supplied to the above-mentioned substrate support.

(Supplementary Note 17) The etching method according to any one of Supplementary Notes 1 to 16, wherein The thickness of the protective layer formed on the upper part of the mask is greater than the thickness of the protective layer formed on the sidewall of the mask.

(Supplementary Note 18) The etching method as in Supplementary Note 17, wherein The thickness of the protective layer formed on the sidewall of the mask becomes thinner from the upper portion of the opening toward the depth direction.

(Supplementary Note 19) The etching method according to any one of Supplementary Notes 1 to 18, wherein The above-mentioned substrates are substrates for logic elements.

(Supplementary Note 20) A method of manufacturing a semiconductor device including the etching method according to any one of Supplementary Notes 1 to 19.

(Supplementary Note 21) An etching program that causes a plasma processing apparatus to perform the etching method in any one of Supplementary Notes 1 to 19.

(Additional note 22) A plasma treatment device, which has: Chamber; a substrate support, which is disposed in the chamber; a gas supply port for supplying gas into the chamber; a plasma generating unit that generates plasma in the chamber; and control department; The control unit performs the following steps: providing a substrate to the substrate support, the substrate having an etching target layer including a silicon-containing layer, and a mask including metal on the etching target layer; supply of process gases including metal-containing gases; and Plasma is generated from the processing gas, the etching target layer is etched through the mask, and a metal-containing protective layer is formed on the top and side walls of the mask.

(Supplementary Note 23) The plasma treatment device as in Supplementary Note 22, wherein In the process of forming the above protective layer, an electrical bias voltage for feeding ions is supplied, The voltage of the above-mentioned electrical bias voltage is not less than -500 V and not more than 0 V.

(Supplementary Note 24) The plasma treatment device as in Supplementary Note 22, wherein In the process of forming the above protective layer, no electrical bias voltage for feeding ions is supplied.

(Supplementary Note 25) The plasma treatment device according to any one of Supplementary Notes 22 to 24, wherein The above-mentioned plasma generated is a capacitively coupled plasma or an inductively coupled plasma.

(Supplementary Note 26) The plasma treatment device according to any one of Supplementary Notes 22 to 24, wherein The above-mentioned plasma generated is a capacitively coupled plasma, The above-mentioned substrate is supported by the above-mentioned substrate support body, High-frequency power for plasma generation is supplied to the above-mentioned substrate support.

(Supplementary Note 27) An etching method comprising the steps of: Provide a substrate, the substrate has an etching target layer including a silicon oxide layer, and a mask containing tungsten on the etching target layer; supply of process gases including tungsten-containing gases; and Plasma is generated from the processing gas, and the etching target layer is etched through the mask containing tungsten.

(Additional note 28) A plasma treatment device, which has: Chamber; a substrate support, which is disposed in the chamber; a plasma generating unit that generates plasma in the chamber; and control department; The control unit performs the following steps: providing the substrate to the above-mentioned substrate support, the substrate having an etching target layer including a silicon oxide layer, and having a mask containing tungsten on the above-mentioned etching target layer; supply of process gases including tungsten-containing gases; and Plasma is generated from the processing gas, and the etching target layer is etched through the mask containing tungsten.

10: Plasma treatment device 12: chamber 12c: Processing Space 12e: Exhaust port 12g: gate valve 12p: access 14: Carrier 16: electrode plate 18: Lower electrode 18f: flow path 20: Electrostatic chuck 22: DC power supply 26: Cooler unit 26a: Piping 26b: Piping 28: Gas supply pipeline 30: Upper electrode 32: Component 34: top plate 34a: gas ejection hole 36: Support body 36a: Gas diffusion chamber 36b: gas flow hole 36c: gas inlet 38: Gas supply pipe 40: Gas source group 42: valve group 44:Flow controller group 46: mask 48: Baffle 50: exhaust device 62: The first high-frequency power supply 64: The second high-frequency power supply 66: Matcher 68: Matcher 70: DC power supply unit 80: Control Department 101: Silicon substrate 102: Silicon-containing layer 103: mask 104: status 105: status 106: status 107: protective layer 108: slot 110: Curve graph 111: Curve FR: focus ring S1: step S2: step S3: step S4: step W: Wafer

FIG. 1 is a schematic cross-sectional view showing an example of a plasma processing apparatus according to an embodiment of the present invention. FIG. 2 is a diagram schematically showing an example of the structure of a substrate etched by the plasma processing apparatus of this embodiment. FIG. 3 is a diagram schematically showing an example of the progress of etching of the substrate in this embodiment. FIG. 4 is a flow chart showing an example of the etching process in this embodiment. FIG. 5 is a diagram showing an example of experimental results in this embodiment and a reference example. Fig. 6 is a graph showing an example of the relationship between the flow rate of tungsten hexafluoride gas and the mask selectivity ratio. Fig. 7 is a diagram showing an example of the relationship between bias voltage and mask selection ratio.

S1: step

S2: step

S3: step

S4: step

Claims (26)

A kind of etching method, it has following steps: A substrate is provided, the substrate has an etching target layer including a silicon-containing layer, and a metal-containing mask having an opening defined by a sidewall on the etching target layer; supply of process gases including metal-containing gases; and A plasma is generated from the processing gas, a metal-containing protective layer is formed on the upper portion of the mask and the sidewall, and the etching target layer is etched through the opening. Such as the etching method of claim 1, wherein The mask includes at least one metal element selected from the group consisting of tungsten, titanium, tantalum, molybdenum, and rhenium. Such as the etching method of claim 1 or 2, wherein The mask includes at least one non-metallic element selected from the group consisting of boron, carbon, nitrogen, oxygen, silicon, phosphorus, and sulfur. Such as the etching method of claim 1 or 2, wherein The above-mentioned mask contains a material selected from the group consisting of tungsten, tungsten carbide, tungsten silicide, titanium, titanium nitride, tantalum nitride, molybdenum carbide, molybdenum nitride, molybdenum silicide, molybdenum boride, molybdenum oxide, rhenium, rhenium oxide, rhenium nitride At least one of the groups formed. Such as the etching method of claim 1 or 2, wherein The metal-containing gas mentioned above is a gas containing metal halides. Such as the etching method of claim 1 or 2, wherein The metal-containing gas includes at least one metal element selected from the group consisting of tungsten, titanium, molybdenum, vanadium, platinum, hafnium, niobium, tantalum, and rhenium. The etching method as claimed in item 1 or 2, wherein the above-mentioned metal-containing gas comprises tungsten hexafluoride gas, tungsten hexabromide gas, tungsten hexachloride gas, WF ₅ Cl gas, tungsten hexacarbonyl gas, tetrachloride At least one gas of the group consisting of titanium gas, molybdenum pentafluoride gas, vanadium hexafluoride gas, platinum hexafluoride gas, hafnium tetrafluoride gas, and niobium pentafluoride gas. Such as the etching method of claim 1 or 2, wherein The metal contained in the mask is the same metal as the metal contained in the metal-containing gas. Such as the etching method of claim 1 or 2, wherein The metal contained in the mask and the metal contained in the metal-containing gas are different metals. Such as the etching method of claim 1 or 2, wherein The processing gas includes CxHyFz (x, z are integers of 1 or more, y is an integer of 0 or more) gas. The etching method as claimed in item 10, wherein the above-mentioned CxHyFz gas contains a gas selected from CF ₄ , C ₃ F ₈ , C ₄ F ₈ , C ₄ F ₆ , C ₅ F ₈ , CH ₂ F ₂ , CHF ₃ , CH ₃ F At least one gas that forms the group. Such as the etching method of claim 1 or 2, wherein The above-mentioned processing gas further includes an oxygen-containing gas. Such as the etching method of claim 1 or 2, wherein In the above-mentioned etching process, an electrical bias voltage for feeding ions is supplied, The voltage of the above-mentioned electrical bias voltage is not less than -500 V and not more than 0 V. Such as the etching method of claim 1 or 2, wherein In the above-mentioned etching process, no electrical bias voltage for feeding ions is supplied. Such as the etching method of claim 1 or 2, wherein The above-mentioned plasma generated is a capacitively coupled plasma or an inductively coupled plasma. Such as the etching method of claim 1 or 2, wherein The above-mentioned plasma generated is a capacitively coupled plasma, The above-mentioned substrate is supported by a substrate support, High-frequency power for plasma generation is supplied to the above-mentioned substrate support. Such as the etching method of claim 1 or 2, wherein The thickness of the protective layer formed on the upper part of the mask is greater than the thickness of the protective layer formed on the sidewall of the mask. Such as the etching method of claim 17, wherein The thickness of the protective layer formed on the sidewall of the mask becomes thinner from the upper portion of the opening toward the depth direction. Such as the etching method of claim 1 or 2, wherein The above-mentioned substrates are substrates for logic elements. A method of manufacturing a semiconductor device, comprising the etching method according to claim 1 or 2. An etching program, which enables a plasma processing device to perform the etching method as claimed in claim 1 or 2. A plasma treatment device, which has: Chamber; a substrate support, which is disposed in the chamber; a gas supply port for supplying gas into the chamber; a plasma generating unit that generates plasma in the chamber; and control department; The control unit performs the following steps: providing a substrate to the substrate support, the substrate having an etching target layer including a silicon-containing layer, and a mask including metal on the etching target layer; supply of process gases including metal-containing gases; and Plasma is generated from the processing gas, the etching target layer is etched through the mask, and a metal-containing protective layer is formed on the top and side walls of the mask. The plasma treatment device of claim 22, wherein In the process of forming the above protective layer, an electrical bias voltage for feeding ions is supplied, The voltage of the above-mentioned electrical bias voltage is not less than -500 V and not more than 0 V. The plasma treatment device of claim 22, wherein In the process of forming the above protective layer, no electrical bias voltage for feeding ions is supplied. The plasma treatment device of claim 22, wherein The above-mentioned plasma generated is a capacitively coupled plasma or an inductively coupled plasma. The plasma treatment device of claim 22, wherein The above-mentioned plasma generated is a capacitively coupled plasma, The above-mentioned substrate is supported by the above-mentioned substrate support body, High-frequency power for plasma generation is supplied to the above-mentioned substrate support.

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