TW202125247A - Electronic device and test mode enabling method thereof - Google Patents
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- TW202125247A TW202125247A TW108148312A TW108148312A TW202125247A TW 202125247 A TW202125247 A TW 202125247A TW 108148312 A TW108148312 A TW 108148312A TW 108148312 A TW108148312 A TW 108148312A TW 202125247 A TW202125247 A TW 202125247A
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- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
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Abstract
Description
本發明是有關於一種電子裝置,且特別是有關於一種電子裝置及其測試模式啟用方法。The present invention relates to an electronic device, and more particularly to an electronic device and a method for enabling a test mode thereof.
近年來,電子裝置的測試模式是由輸入輸出介面(例如通用型之輸入輸出(GPIO))輸入特定的資料且判斷所輸入的資料是否為進入金鑰(Entry Key)來判斷是否進入測試模式。然而,為了避免客戶使用輸入輸出介面時誤入測試模式進而影響晶片的行為,進入金鑰會被設計成複雜度高、位元數多且不容易隨機進入的形式。但是,這樣的操作模式同時提升了量測人員進入測試模式的困難度。此外,操作人員進入測試模式後必須將重置接腳的電壓狀態維持在重置狀態下,才能使處理器(例如中央處理單元(CPU))不參與,進而能夠使用測試模式進行量測。因此,如何使測試模式可以更簡易的進入但不會被使用者誤入則成為設計電子裝置的一個重點。In recent years, the test mode of an electronic device is to input specific data through an input/output interface (such as a general-purpose input/output (GPIO)) and determine whether the input data is an entry key to determine whether to enter the test mode. However, in order to prevent customers from erroneously entering the test mode when using the input and output interfaces and thus affecting the behavior of the chip, the access key is designed to be highly complex, with a large number of bits, and not easy to enter randomly. However, such an operation mode also increases the difficulty for the measurement personnel to enter the test mode. In addition, after the operator enters the test mode, the voltage state of the reset pin must be maintained in the reset state, so that the processor (such as the central processing unit (CPU)) is not involved, and the test mode can be used for measurement. Therefore, how to make the test mode easier to enter without being mistaken by the user has become an important point in the design of electronic devices.
本發明提供一種電子裝置及其測試模式啟用方法,可簡化啟用測試模式的流程且可避免電子裝置的測試模式被使用者所開啟。The present invention provides an electronic device and a test mode activation method thereof, which can simplify the process of activating the test mode and prevent the test mode of the electronic device from being opened by a user.
本發明的電子裝置,包括多個週邊元件、快閃記憶體、金鑰比對電路及測試模式電路。快閃記憶體提供比對金鑰。金鑰比對電路用以比對比對金鑰及進入金鑰,以反應於比對結果提供測試進入信號。測試模式電路反應於測試進入信號測試這些週邊元件。The electronic device of the present invention includes a plurality of peripheral components, flash memory, a key comparison circuit, and a test mode circuit. The flash memory provides the comparison key. The key comparison circuit is used to compare the comparison key and the access key, and provide a test access signal in response to the comparison result. The test mode circuit tests these peripheral components in response to the test input signal.
本發明的電子裝置的測試模式啟用方法,包括下列步驟。自快閃記憶體提供比對金鑰。透過金鑰比對電路比對比對金鑰及進入金鑰。透過金鑰比對電路反應於比對金鑰及進入金鑰的比對結果提供測試進入信號,以透過測試模式電路反應於測試進入信號測試多個週邊元件。The test mode activation method of the electronic device of the present invention includes the following steps. The comparison key is provided from the flash memory. Compare the key and enter the key through the key comparison circuit. The key comparison circuit reacts to the comparison result of the comparison key and the entry key to provide a test entry signal, and the test mode circuit reacts to the test entry signal to test multiple peripheral components.
基於上述,本發明實施例的電子裝置及其測試模式啟用方法,透過比對來自快閃記憶體的比對金鑰及進入金鑰來決定電子裝置是否進入測試模式,並且透過電子裝置的自動決定是否進入測試模式而沒有資料輸入的動作,可簡化啟用測試模式的流程且可避免電子裝置的測試模式被使用者所開啟。Based on the above, the electronic device and the test mode activation method of the embodiment of the present invention determine whether the electronic device enters the test mode by comparing the comparison key from the flash memory and the entry key, and automatically determines whether the electronic device enters the test mode. Whether to enter the test mode without data input can simplify the process of activating the test mode and prevent the test mode of the electronic device from being opened by the user.
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.
圖1為依據本發明一實施例的電子裝置的系統示意圖。請參照圖1,在本實施例中,電子裝置100包括電源電路110、快閃記憶體120、處理器130、金鑰比對電路140、測試模式電路150及多個週邊元件160、170。週邊元件160、170至少包括壓控振盪器、穩壓器或輸出輸入電路等。FIG. 1 is a schematic diagram of a system of an electronic device according to an embodiment of the invention. Please refer to FIG. 1, in this embodiment, the
電源電路110耦接至快閃記憶體120、處理器130及金鑰比對電路140。快閃記憶體120耦接至處理器130、金鑰比對電路140、測試模式電路150及多個週邊元件160、170。並且,金鑰比對電路140耦接至測試模式電路150。The
在本實施例中,電子裝置100反應於電源啟動信號Pon而啟動,並且接著進入初始化期間,其中電源啟動信號Pon可以由電子裝置100的輸入介面(例如按鍵、觸控鍵、開關等)。進一步來說,電源電路110反應於電源啟動信號Pon至少提供系統電壓Vdd至快閃記憶體120,並且快閃記憶體120反應於接收系統電壓Vdd啟動初始化程序。In this embodiment, the
在初始化期間中,電源電路110會控制處理器130的重置接腳處於重置狀態,例如電源電路110可提供為邏輯低準位或邏輯準位“0”的重置信號HRESETn至處理器130的重置接腳。During the initialization period, the
在初始化程序中,快閃記憶體120依序提供多個初始化參數DPc、DP1、DP2、DPT至處理器130、週邊元件160、170及測試模式電路150,以依序設定處理器130、週邊元件160、170及測試模式電路150的操作模式及操作狀態。In the initialization process, the
在初始化程序之後,亦即初始化期間之後,快閃記憶體120會讀取儲存於其金鑰區域Mek的比對金鑰Kcp,並且將比對金鑰Kcp提供至金鑰比對電路140。金鑰比對電路140用以比對比對金鑰Kcp及進入金鑰Ken,以反應於比對金鑰Kcp及進入金鑰Ken的比對結果決定是否提供測試進入信號Ten至電源電路110及測試模式電路150,亦即決定是否進入測試模式。舉例來說,當比對金鑰Kcp相同於進入金鑰Ken時,金鑰比對電路140可提供測試進入信號Ten;當比對金鑰Kcp不同於進入金鑰Ken時,金鑰比對電路140可不提供測試進入信號Ten。After the initialization process, that is, after the initialization period, the
接著,測試模式電路150可反應於接收到測試進入信號Ten測試週邊元件160、170,並且電源電路110可反應於接收到測試進入信號Ten使處理器130的重置接腳維持於重置狀態,以避免處理器130的運作妨礙週邊元件160、170的測試,且不需要電子裝置100的外部信號的輸入。另一方面,測試模式電路150可反應於未接收到測試進入信號Ten而不測試週邊元件160、170,並且電源電路110可反應於未接收到測試進入信號Ten使處理器130的重置接腳從重置狀態中釋放,亦即使處理器130的重置接腳從重置狀態改變至致能狀態(例如為邏輯高準位或邏輯準位“1”),以使處理器130開始運作。Then, the
舉例來說,當電子裝置100的主要元件(例如電路系統)完成後,可將比對金鑰Kcp預設為相同於進入金鑰Ken,以在工廠端中會使電子裝置100開機後會自行進入測試模式,而電子裝置100的測試會執行至電子裝置100被關機。接著,在完成測試後,可將比對金鑰Kcp改變為不同於進入金鑰Ken(例如抹除或重新寫入金鑰區域Mek),以使使用者在啟動電子裝置100後不會進入測試模式。For example, after the main components (such as the circuit system) of the
依據上述,在本發明實施例中,透過初始化期間(亦即初始化程序)之後安插比對比對金鑰Kcp及進入金鑰Ken的步驟(或動作)來決定電子裝置100是否進入測試模式,並且透過電子裝置100的自動決定是否進入測試模式而沒有資料輸入的動作,可簡化啟用測試模式的流程且可避免電子裝置100的測試模式被使用者所開啟。According to the above, in the embodiment of the present invention, after the initialization period (ie, the initialization procedure), the steps (or actions) of comparing the key Kcp and entering the key Ken are used to determine whether the
在本發明實施例中,快閃記憶體120中儲存初始化參數DPc、DP1、DP2、DPT的區域及儲存比對金鑰Kcp的區域(亦即金鑰區域Mek)可以是系統專用,亦即儲存初始化參數DPc、DP1、DP2、DPT的區域及金鑰區域Mek對使用者而言是不可見,藉此可避免使用者在工廠端之外啟用測試模式。In the embodiment of the present invention, the area storing the initialization parameters DPc, DP1, DP2, DPT and the area storing the comparison key Kcp in the flash memory 120 (ie, the key area Mek) may be dedicated to the system, that is, storing initialization The area of the parameters DPc, DP1, DP2, DPT and the key area Mek are invisible to the user, which can prevent the user from enabling the test mode outside the factory.
在本發明實施例中,進入金鑰Ken可以儲存於金鑰比對電路140中,或者可儲於存電子裝置100中的任一儲存元件(例如快閃記憶體120)中,亦即快閃記憶體120可依序提供比對金鑰Kcp及進入金鑰Ken至金鑰比對電路140。In the embodiment of the present invention, the access key Ken can be stored in the
在本發明實施例中,在初始化期間之後且金鑰比對電路140未提供測試進入信號Ten時,電子裝置100會回到開機流程,以恢復所有元件(例如處理器130、週邊元件160、170)的電力供應。在完成開機流程後,會進入使用者模式,此時處理器130可以自快閃記憶體120存取資料Data,以執行由使用者寫入快閃記憶體120的應用程式。In the embodiment of the present invention, after the initialization period and the
在本發明實施例中,可在電子裝置100中配置控制電路(未繪示)來控制快閃記憶體120輸出初始化參數DPc、DP1、DP2、DPT、以及比對金鑰Kcp的時序,亦即控制電路(未繪示)可依序提供初始化參數DPc、DP1、DP2、DPT、以及比對金鑰Kcp所對應的位址至控制快閃記憶體120。換言之,控制電路(未繪示)可反應於系統電壓Vdd提供初始化參數DPc、DP1、DP2、DPT、以及比對金鑰Kcp所對應的位址。在本發明實施例中,控制電路(未繪示)可配置快閃記憶體120中。在本發明實施例中,控制電路(未繪示)可反應於系統電壓Vdd而啟用,並且可反應測試進入信號Ten而禁用。In the embodiment of the present invention, a control circuit (not shown) can be configured in the
圖2為依據本發明一實施例的電子裝置的測試模式啟用方法的流程圖。請參照圖2,在本實施例中,電子裝置的電路系統會先上電(步驟S210),亦即電子裝置的電源電路反應於電源啟動信號而至少提供系統電壓至電路系統。接著,快閃記憶體進行初始化(步驟S220),並且在初始化後,自快閃記憶體提供比對金鑰(步驟S230)。然後,透過金鑰比對電路比對比對金鑰及進入金鑰(步驟S240),以透過金鑰比對電路反應於比對金鑰及進入金鑰的比對結果提供測試進入信號。換言之,當比對金鑰相同於進入金鑰時,亦即步驟S240的判斷結果為“是”,金鑰比對電路可提供測試進入信號,以使電子裝置進入測試模式(步驟S250);當比對金鑰不同於進入金鑰時,亦即步驟S240的判斷結果為“否”,金鑰比對電路可不提供測試進入信號,並且接著執行開機流程,以使電子裝置進入使用者模式。FIG. 2 is a flowchart of a test mode activation method of an electronic device according to an embodiment of the invention. 2, in this embodiment, the circuit system of the electronic device is first powered on (step S210), that is, the power circuit of the electronic device responds to the power-on signal to provide at least the system voltage to the circuit system. Then, the flash memory is initialized (step S220), and after the initialization, a comparison key is provided from the flash memory (step S230). Then, the comparison key and the entry key are compared through the key comparison circuit (step S240), and the comparison result of the comparison key and the entry key is reflected by the key comparison circuit to provide a test entry signal. In other words, when the comparison key is the same as the entry key, that is, the judgment result of step S240 is "Yes", the key comparison circuit can provide a test entry signal to make the electronic device enter the test mode (step S250); When the comparison key is different from the entry key, that is, the judgment result of step S240 is "No", the key comparison circuit may not provide a test entry signal, and then execute the boot process to make the electronic device enter the user mode.
在測試模式中,透過測試模式電路反應於測試進入信號測多個週邊元件。在開機流程中,至少會確保電力穩定(步驟S260)、釋放處理器的重置接腳的重置狀態(步驟S270)、以及透過處理器執行使用者所寫入的程式碼(步驟S280)。其中,步驟S210至S280的順序為用以說明,本發明實施例不以此為限。並且,步驟S210至S280的細節可參照圖1實施例所示,在此則不再贅述。In the test mode, a plurality of peripheral components are measured by the test mode circuit in response to the test input signal. During the boot process, at least the power is ensured to be stable (step S260), the reset state of the reset pin of the processor is released (step S270), and the program code written by the user is executed through the processor (step S280). The sequence of steps S210 to S280 is for illustration, and the embodiment of the present invention is not limited thereto. In addition, the details of steps S210 to S280 can be referred to as shown in the embodiment in FIG. 1, which will not be repeated here.
綜上所述,本發明實施例的電子裝置及其測試模式啟用方法,透過初始化期間之後安插比對比對金鑰及進入金鑰的步驟來決定電子裝置是否進入測試模式,並且透過電子裝置的自動決定是否進入測試模式而沒有資料輸入的動作,可簡化啟用測試模式的流程且可避免電子裝置的測試模式被使用者所開啟。To sum up, the electronic device and the test mode activation method of the embodiment of the present invention determine whether the electronic device enters the test mode through the steps of inserting the comparison key and entering the key after the initialization period. The action of determining whether to enter the test mode without data input can simplify the process of enabling the test mode and prevent the test mode of the electronic device from being opened by the user.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be subject to those defined by the attached patent application scope.
100:電子裝置
110:電源電路
120:快閃記憶體
130:處理器
140:金鑰比對電路
150:測試模式電路
160、170:多個週邊元件
Data:資料
DPc、DP1、DP2、DPT:初始化參數
HRESETn:重置信號
Kcp:比對金鑰
Ken:進入金鑰
Mek:金鑰區域
Pon:電源啟動信號
Ten:測試進入信號
Vdd:系統電壓
S210~S280:步驟100: electronic device
110: Power supply circuit
120: flash memory
130: processor
140: Key comparison circuit
150:
圖1為依據本發明一實施例的電子裝置的系統示意圖。 圖2為依據本發明一實施例的電子裝置的測試模式啟用方法的流程圖。FIG. 1 is a schematic diagram of a system of an electronic device according to an embodiment of the invention. FIG. 2 is a flowchart of a test mode activation method of an electronic device according to an embodiment of the invention.
100:電子裝置100: electronic device
110:電源電路110: Power supply circuit
120:快閃記憶體120: flash memory
130:處理器130: processor
140:金鑰比對電路140: Key comparison circuit
150:測試模式電路150: Test mode circuit
160、170:多個週邊元件160, 170: multiple peripheral components
Data:資料Data: data
DPc、DP1、DP2、DPT:初始化參數DPc, DP1, DP2, DPT: initialization parameters
HRESETn:重置信號HRESETn: reset signal
Kcp:比對金鑰Kcp: comparison key
Ken:進入金鑰Ken: Enter the key
Mek:金鑰區域Mek: key area
Pon:電源啟動信號Pon: Power start signal
Ten:測試進入信號Ten: Test entry signal
Vdd:系統電壓Vdd: system voltage
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US7814243B2 (en) * | 2007-06-01 | 2010-10-12 | Sonics, Inc. | Shared storage for multi-threaded ordered queues in an interconnect |
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